File: | lib/IR/AutoUpgrade.cpp |
Warning: | line 921, column 32 Division by zero |
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1 | //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// | |||
2 | // | |||
3 | // The LLVM Compiler Infrastructure | |||
4 | // | |||
5 | // This file is distributed under the University of Illinois Open Source | |||
6 | // License. See LICENSE.TXT for details. | |||
7 | // | |||
8 | //===----------------------------------------------------------------------===// | |||
9 | // | |||
10 | // This file implements the auto-upgrade helper functions. | |||
11 | // This is where deprecated IR intrinsics and other IR features are updated to | |||
12 | // current specifications. | |||
13 | // | |||
14 | //===----------------------------------------------------------------------===// | |||
15 | ||||
16 | #include "llvm/IR/AutoUpgrade.h" | |||
17 | #include "llvm/ADT/StringSwitch.h" | |||
18 | #include "llvm/IR/Constants.h" | |||
19 | #include "llvm/IR/DIBuilder.h" | |||
20 | #include "llvm/IR/DebugInfo.h" | |||
21 | #include "llvm/IR/DiagnosticInfo.h" | |||
22 | #include "llvm/IR/Function.h" | |||
23 | #include "llvm/IR/IRBuilder.h" | |||
24 | #include "llvm/IR/Instruction.h" | |||
25 | #include "llvm/IR/IntrinsicInst.h" | |||
26 | #include "llvm/IR/LLVMContext.h" | |||
27 | #include "llvm/IR/Module.h" | |||
28 | #include "llvm/IR/Verifier.h" | |||
29 | #include "llvm/Support/ErrorHandling.h" | |||
30 | #include "llvm/Support/Regex.h" | |||
31 | #include <cstring> | |||
32 | using namespace llvm; | |||
33 | ||||
34 | static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } | |||
35 | ||||
36 | // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have | |||
37 | // changed their type from v4f32 to v2i64. | |||
38 | static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, | |||
39 | Function *&NewFn) { | |||
40 | // Check whether this is an old version of the function, which received | |||
41 | // v4f32 arguments. | |||
42 | Type *Arg0Type = F->getFunctionType()->getParamType(0); | |||
43 | if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) | |||
44 | return false; | |||
45 | ||||
46 | // Yes, it's old, replace it with new version. | |||
47 | rename(F); | |||
48 | NewFn = Intrinsic::getDeclaration(F->getParent(), IID); | |||
49 | return true; | |||
50 | } | |||
51 | ||||
52 | // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask | |||
53 | // arguments have changed their type from i32 to i8. | |||
54 | static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, | |||
55 | Function *&NewFn) { | |||
56 | // Check that the last argument is an i32. | |||
57 | Type *LastArgType = F->getFunctionType()->getParamType( | |||
58 | F->getFunctionType()->getNumParams() - 1); | |||
59 | if (!LastArgType->isIntegerTy(32)) | |||
60 | return false; | |||
61 | ||||
62 | // Move this function aside and map down. | |||
63 | rename(F); | |||
64 | NewFn = Intrinsic::getDeclaration(F->getParent(), IID); | |||
65 | return true; | |||
66 | } | |||
67 | ||||
68 | // Upgrade the declaration of fp compare intrinsics that change return type | |||
69 | // from scalar to vXi1 mask. | |||
70 | static bool UpgradeX86MaskedFPCompare(Function *F, Intrinsic::ID IID, | |||
71 | Function *&NewFn) { | |||
72 | // Check if the return type is a vector. | |||
73 | if (F->getReturnType()->isVectorTy()) | |||
74 | return false; | |||
75 | ||||
76 | rename(F); | |||
77 | NewFn = Intrinsic::getDeclaration(F->getParent(), IID); | |||
78 | return true; | |||
79 | } | |||
80 | ||||
81 | static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { | |||
82 | // All of the intrinsics matches below should be marked with which llvm | |||
83 | // version started autoupgrading them. At some point in the future we would | |||
84 | // like to use this information to remove upgrade code for some older | |||
85 | // intrinsics. It is currently undecided how we will determine that future | |||
86 | // point. | |||
87 | if (Name=="ssse3.pabs.b.128" || // Added in 6.0 | |||
88 | Name=="ssse3.pabs.w.128" || // Added in 6.0 | |||
89 | Name=="ssse3.pabs.d.128" || // Added in 6.0 | |||
90 | Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 | |||
91 | Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 | |||
92 | Name.startswith("avx512.kunpck") || //added in 6.0 | |||
93 | Name.startswith("avx2.pabs.") || // Added in 6.0 | |||
94 | Name.startswith("avx512.mask.pabs.") || // Added in 6.0 | |||
95 | Name.startswith("avx512.broadcastm") || // Added in 6.0 | |||
96 | Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 | |||
97 | Name.startswith("sse2.pcmpeq.") || // Added in 3.1 | |||
98 | Name.startswith("sse2.pcmpgt.") || // Added in 3.1 | |||
99 | Name.startswith("avx2.pcmpeq.") || // Added in 3.1 | |||
100 | Name.startswith("avx2.pcmpgt.") || // Added in 3.1 | |||
101 | Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 | |||
102 | Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 | |||
103 | Name.startswith("avx.vperm2f128.") || // Added in 6.0 | |||
104 | Name == "avx2.vperm2i128" || // Added in 6.0 | |||
105 | Name == "sse.add.ss" || // Added in 4.0 | |||
106 | Name == "sse2.add.sd" || // Added in 4.0 | |||
107 | Name == "sse.sub.ss" || // Added in 4.0 | |||
108 | Name == "sse2.sub.sd" || // Added in 4.0 | |||
109 | Name == "sse.mul.ss" || // Added in 4.0 | |||
110 | Name == "sse2.mul.sd" || // Added in 4.0 | |||
111 | Name == "sse.div.ss" || // Added in 4.0 | |||
112 | Name == "sse2.div.sd" || // Added in 4.0 | |||
113 | Name == "sse41.pmaxsb" || // Added in 3.9 | |||
114 | Name == "sse2.pmaxs.w" || // Added in 3.9 | |||
115 | Name == "sse41.pmaxsd" || // Added in 3.9 | |||
116 | Name == "sse2.pmaxu.b" || // Added in 3.9 | |||
117 | Name == "sse41.pmaxuw" || // Added in 3.9 | |||
118 | Name == "sse41.pmaxud" || // Added in 3.9 | |||
119 | Name == "sse41.pminsb" || // Added in 3.9 | |||
120 | Name == "sse2.pmins.w" || // Added in 3.9 | |||
121 | Name == "sse41.pminsd" || // Added in 3.9 | |||
122 | Name == "sse2.pminu.b" || // Added in 3.9 | |||
123 | Name == "sse41.pminuw" || // Added in 3.9 | |||
124 | Name == "sse41.pminud" || // Added in 3.9 | |||
125 | Name == "avx512.kand.w" || // Added in 7.0 | |||
126 | Name == "avx512.kandn.w" || // Added in 7.0 | |||
127 | Name == "avx512.knot.w" || // Added in 7.0 | |||
128 | Name == "avx512.kor.w" || // Added in 7.0 | |||
129 | Name == "avx512.kxor.w" || // Added in 7.0 | |||
130 | Name == "avx512.kxnor.w" || // Added in 7.0 | |||
131 | Name == "avx512.kortestc.w" || // Added in 7.0 | |||
132 | Name == "avx512.kortestz.w" || // Added in 7.0 | |||
133 | Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 | |||
134 | Name.startswith("avx2.pmax") || // Added in 3.9 | |||
135 | Name.startswith("avx2.pmin") || // Added in 3.9 | |||
136 | Name.startswith("avx512.mask.pmax") || // Added in 4.0 | |||
137 | Name.startswith("avx512.mask.pmin") || // Added in 4.0 | |||
138 | Name.startswith("avx2.vbroadcast") || // Added in 3.8 | |||
139 | Name.startswith("avx2.pbroadcast") || // Added in 3.8 | |||
140 | Name.startswith("avx.vpermil.") || // Added in 3.1 | |||
141 | Name.startswith("sse2.pshuf") || // Added in 3.9 | |||
142 | Name.startswith("avx512.pbroadcast") || // Added in 3.9 | |||
143 | Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 | |||
144 | Name.startswith("avx512.mask.movddup") || // Added in 3.9 | |||
145 | Name.startswith("avx512.mask.movshdup") || // Added in 3.9 | |||
146 | Name.startswith("avx512.mask.movsldup") || // Added in 3.9 | |||
147 | Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 | |||
148 | Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 | |||
149 | Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 | |||
150 | Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 | |||
151 | Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 | |||
152 | Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 | |||
153 | Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 | |||
154 | Name.startswith("avx512.mask.punpckl") || // Added in 3.9 | |||
155 | Name.startswith("avx512.mask.punpckh") || // Added in 3.9 | |||
156 | Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 | |||
157 | Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 | |||
158 | Name.startswith("avx512.mask.pand.") || // Added in 3.9 | |||
159 | Name.startswith("avx512.mask.pandn.") || // Added in 3.9 | |||
160 | Name.startswith("avx512.mask.por.") || // Added in 3.9 | |||
161 | Name.startswith("avx512.mask.pxor.") || // Added in 3.9 | |||
162 | Name.startswith("avx512.mask.and.") || // Added in 3.9 | |||
163 | Name.startswith("avx512.mask.andn.") || // Added in 3.9 | |||
164 | Name.startswith("avx512.mask.or.") || // Added in 3.9 | |||
165 | Name.startswith("avx512.mask.xor.") || // Added in 3.9 | |||
166 | Name.startswith("avx512.mask.padd.") || // Added in 4.0 | |||
167 | Name.startswith("avx512.mask.psub.") || // Added in 4.0 | |||
168 | Name.startswith("avx512.mask.pmull.") || // Added in 4.0 | |||
169 | Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 | |||
170 | Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 | |||
171 | Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 | |||
172 | Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 | |||
173 | Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 | |||
174 | Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 | |||
175 | Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 | |||
176 | Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 | |||
177 | Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 | |||
178 | Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 | |||
179 | Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 | |||
180 | Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 | |||
181 | Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 | |||
182 | Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 | |||
183 | Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 | |||
184 | Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 | |||
185 | Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 | |||
186 | Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 | |||
187 | Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 | |||
188 | Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 | |||
189 | Name == "avx512.mask.add.pd.128" || // Added in 4.0 | |||
190 | Name == "avx512.mask.add.pd.256" || // Added in 4.0 | |||
191 | Name == "avx512.mask.add.ps.128" || // Added in 4.0 | |||
192 | Name == "avx512.mask.add.ps.256" || // Added in 4.0 | |||
193 | Name == "avx512.mask.div.pd.128" || // Added in 4.0 | |||
194 | Name == "avx512.mask.div.pd.256" || // Added in 4.0 | |||
195 | Name == "avx512.mask.div.ps.128" || // Added in 4.0 | |||
196 | Name == "avx512.mask.div.ps.256" || // Added in 4.0 | |||
197 | Name == "avx512.mask.mul.pd.128" || // Added in 4.0 | |||
198 | Name == "avx512.mask.mul.pd.256" || // Added in 4.0 | |||
199 | Name == "avx512.mask.mul.ps.128" || // Added in 4.0 | |||
200 | Name == "avx512.mask.mul.ps.256" || // Added in 4.0 | |||
201 | Name == "avx512.mask.sub.pd.128" || // Added in 4.0 | |||
202 | Name == "avx512.mask.sub.pd.256" || // Added in 4.0 | |||
203 | Name == "avx512.mask.sub.ps.128" || // Added in 4.0 | |||
204 | Name == "avx512.mask.sub.ps.256" || // Added in 4.0 | |||
205 | Name == "avx512.mask.max.pd.128" || // Added in 5.0 | |||
206 | Name == "avx512.mask.max.pd.256" || // Added in 5.0 | |||
207 | Name == "avx512.mask.max.ps.128" || // Added in 5.0 | |||
208 | Name == "avx512.mask.max.ps.256" || // Added in 5.0 | |||
209 | Name == "avx512.mask.min.pd.128" || // Added in 5.0 | |||
210 | Name == "avx512.mask.min.pd.256" || // Added in 5.0 | |||
211 | Name == "avx512.mask.min.ps.128" || // Added in 5.0 | |||
212 | Name == "avx512.mask.min.ps.256" || // Added in 5.0 | |||
213 | Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 | |||
214 | Name.startswith("avx512.mask.psll.d") || // Added in 4.0 | |||
215 | Name.startswith("avx512.mask.psll.q") || // Added in 4.0 | |||
216 | Name.startswith("avx512.mask.psll.w") || // Added in 4.0 | |||
217 | Name.startswith("avx512.mask.psra.d") || // Added in 4.0 | |||
218 | Name.startswith("avx512.mask.psra.q") || // Added in 4.0 | |||
219 | Name.startswith("avx512.mask.psra.w") || // Added in 4.0 | |||
220 | Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 | |||
221 | Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 | |||
222 | Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 | |||
223 | Name.startswith("avx512.mask.pslli") || // Added in 4.0 | |||
224 | Name.startswith("avx512.mask.psrai") || // Added in 4.0 | |||
225 | Name.startswith("avx512.mask.psrli") || // Added in 4.0 | |||
226 | Name.startswith("avx512.mask.psllv") || // Added in 4.0 | |||
227 | Name.startswith("avx512.mask.psrav") || // Added in 4.0 | |||
228 | Name.startswith("avx512.mask.psrlv") || // Added in 4.0 | |||
229 | Name.startswith("sse41.pmovsx") || // Added in 3.8 | |||
230 | Name.startswith("sse41.pmovzx") || // Added in 3.9 | |||
231 | Name.startswith("avx2.pmovsx") || // Added in 3.9 | |||
232 | Name.startswith("avx2.pmovzx") || // Added in 3.9 | |||
233 | Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 | |||
234 | Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 | |||
235 | Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 | |||
236 | Name == "sse2.cvtdq2pd" || // Added in 3.9 | |||
237 | Name == "sse2.cvtps2pd" || // Added in 3.9 | |||
238 | Name == "avx.cvtdq2.pd.256" || // Added in 3.9 | |||
239 | Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 | |||
240 | Name.startswith("avx.vinsertf128.") || // Added in 3.7 | |||
241 | Name == "avx2.vinserti128" || // Added in 3.7 | |||
242 | Name.startswith("avx512.mask.insert") || // Added in 4.0 | |||
243 | Name.startswith("avx.vextractf128.") || // Added in 3.7 | |||
244 | Name == "avx2.vextracti128" || // Added in 3.7 | |||
245 | Name.startswith("avx512.mask.vextract") || // Added in 4.0 | |||
246 | Name.startswith("sse4a.movnt.") || // Added in 3.9 | |||
247 | Name.startswith("avx.movnt.") || // Added in 3.2 | |||
248 | Name.startswith("avx512.storent.") || // Added in 3.9 | |||
249 | Name == "sse41.movntdqa" || // Added in 5.0 | |||
250 | Name == "avx2.movntdqa" || // Added in 5.0 | |||
251 | Name == "avx512.movntdqa" || // Added in 5.0 | |||
252 | Name == "sse2.storel.dq" || // Added in 3.9 | |||
253 | Name.startswith("sse.storeu.") || // Added in 3.9 | |||
254 | Name.startswith("sse2.storeu.") || // Added in 3.9 | |||
255 | Name.startswith("avx.storeu.") || // Added in 3.9 | |||
256 | Name.startswith("avx512.mask.storeu.") || // Added in 3.9 | |||
257 | Name.startswith("avx512.mask.store.p") || // Added in 3.9 | |||
258 | Name.startswith("avx512.mask.store.b.") || // Added in 3.9 | |||
259 | Name.startswith("avx512.mask.store.w.") || // Added in 3.9 | |||
260 | Name.startswith("avx512.mask.store.d.") || // Added in 3.9 | |||
261 | Name.startswith("avx512.mask.store.q.") || // Added in 3.9 | |||
262 | Name.startswith("avx512.mask.loadu.") || // Added in 3.9 | |||
263 | Name.startswith("avx512.mask.load.") || // Added in 3.9 | |||
264 | Name == "sse42.crc32.64.8" || // Added in 3.4 | |||
265 | Name.startswith("avx.vbroadcast.s") || // Added in 3.5 | |||
266 | Name.startswith("avx512.mask.palignr.") || // Added in 3.9 | |||
267 | Name.startswith("avx512.mask.valign.") || // Added in 4.0 | |||
268 | Name.startswith("sse2.psll.dq") || // Added in 3.7 | |||
269 | Name.startswith("sse2.psrl.dq") || // Added in 3.7 | |||
270 | Name.startswith("avx2.psll.dq") || // Added in 3.7 | |||
271 | Name.startswith("avx2.psrl.dq") || // Added in 3.7 | |||
272 | Name.startswith("avx512.psll.dq") || // Added in 3.9 | |||
273 | Name.startswith("avx512.psrl.dq") || // Added in 3.9 | |||
274 | Name == "sse41.pblendw" || // Added in 3.7 | |||
275 | Name.startswith("sse41.blendp") || // Added in 3.7 | |||
276 | Name.startswith("avx.blend.p") || // Added in 3.7 | |||
277 | Name == "avx2.pblendw" || // Added in 3.7 | |||
278 | Name.startswith("avx2.pblendd.") || // Added in 3.7 | |||
279 | Name.startswith("avx.vbroadcastf128") || // Added in 4.0 | |||
280 | Name == "avx2.vbroadcasti128" || // Added in 3.7 | |||
281 | Name.startswith("avx512.mask.broadcastf") || // Added in 6.0 | |||
282 | Name.startswith("avx512.mask.broadcasti") || // Added in 6.0 | |||
283 | Name == "xop.vpcmov" || // Added in 3.8 | |||
284 | Name == "xop.vpcmov.256" || // Added in 5.0 | |||
285 | Name.startswith("avx512.mask.move.s") || // Added in 4.0 | |||
286 | Name.startswith("avx512.cvtmask2") || // Added in 5.0 | |||
287 | (Name.startswith("xop.vpcom") && // Added in 3.2 | |||
288 | F->arg_size() == 2) || | |||
289 | Name.startswith("avx512.ptestm") || //Added in 6.0 | |||
290 | Name.startswith("avx512.ptestnm") || //Added in 6.0 | |||
291 | Name.startswith("sse2.pavg") || // Added in 6.0 | |||
292 | Name.startswith("avx2.pavg") || // Added in 6.0 | |||
293 | Name.startswith("avx512.mask.pavg")) // Added in 6.0 | |||
294 | return true; | |||
295 | ||||
296 | return false; | |||
297 | } | |||
298 | ||||
299 | static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, | |||
300 | Function *&NewFn) { | |||
301 | // Only handle intrinsics that start with "x86.". | |||
302 | if (!Name.startswith("x86.")) | |||
303 | return false; | |||
304 | // Remove "x86." prefix. | |||
305 | Name = Name.substr(4); | |||
306 | ||||
307 | if (ShouldUpgradeX86Intrinsic(F, Name)) { | |||
308 | NewFn = nullptr; | |||
309 | return true; | |||
310 | } | |||
311 | ||||
312 | // SSE4.1 ptest functions may have an old signature. | |||
313 | if (Name.startswith("sse41.ptest")) { // Added in 3.2 | |||
314 | if (Name.substr(11) == "c") | |||
315 | return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); | |||
316 | if (Name.substr(11) == "z") | |||
317 | return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); | |||
318 | if (Name.substr(11) == "nzc") | |||
319 | return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); | |||
320 | } | |||
321 | // Several blend and other instructions with masks used the wrong number of | |||
322 | // bits. | |||
323 | if (Name == "sse41.insertps") // Added in 3.6 | |||
324 | return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, | |||
325 | NewFn); | |||
326 | if (Name == "sse41.dppd") // Added in 3.6 | |||
327 | return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, | |||
328 | NewFn); | |||
329 | if (Name == "sse41.dpps") // Added in 3.6 | |||
330 | return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, | |||
331 | NewFn); | |||
332 | if (Name == "sse41.mpsadbw") // Added in 3.6 | |||
333 | return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, | |||
334 | NewFn); | |||
335 | if (Name == "avx.dp.ps.256") // Added in 3.6 | |||
336 | return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, | |||
337 | NewFn); | |||
338 | if (Name == "avx2.mpsadbw") // Added in 3.6 | |||
339 | return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, | |||
340 | NewFn); | |||
341 | if (Name == "avx512.mask.cmp.pd.128") // Added in 7.0 | |||
342 | return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_128, | |||
343 | NewFn); | |||
344 | if (Name == "avx512.mask.cmp.pd.256") // Added in 7.0 | |||
345 | return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_256, | |||
346 | NewFn); | |||
347 | if (Name == "avx512.mask.cmp.pd.512") // Added in 7.0 | |||
348 | return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_512, | |||
349 | NewFn); | |||
350 | if (Name == "avx512.mask.cmp.ps.128") // Added in 7.0 | |||
351 | return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_128, | |||
352 | NewFn); | |||
353 | if (Name == "avx512.mask.cmp.ps.256") // Added in 7.0 | |||
354 | return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_256, | |||
355 | NewFn); | |||
356 | if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0 | |||
357 | return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_512, | |||
358 | NewFn); | |||
359 | ||||
360 | // frcz.ss/sd may need to have an argument dropped. Added in 3.2 | |||
361 | if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { | |||
362 | rename(F); | |||
363 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
364 | Intrinsic::x86_xop_vfrcz_ss); | |||
365 | return true; | |||
366 | } | |||
367 | if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { | |||
368 | rename(F); | |||
369 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
370 | Intrinsic::x86_xop_vfrcz_sd); | |||
371 | return true; | |||
372 | } | |||
373 | // Upgrade any XOP PERMIL2 index operand still using a float/double vector. | |||
374 | if (Name.startswith("xop.vpermil2")) { // Added in 3.9 | |||
375 | auto Idx = F->getFunctionType()->getParamType(2); | |||
376 | if (Idx->isFPOrFPVectorTy()) { | |||
377 | rename(F); | |||
378 | unsigned IdxSize = Idx->getPrimitiveSizeInBits(); | |||
379 | unsigned EltSize = Idx->getScalarSizeInBits(); | |||
380 | Intrinsic::ID Permil2ID; | |||
381 | if (EltSize == 64 && IdxSize == 128) | |||
382 | Permil2ID = Intrinsic::x86_xop_vpermil2pd; | |||
383 | else if (EltSize == 32 && IdxSize == 128) | |||
384 | Permil2ID = Intrinsic::x86_xop_vpermil2ps; | |||
385 | else if (EltSize == 64 && IdxSize == 256) | |||
386 | Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; | |||
387 | else | |||
388 | Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; | |||
389 | NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); | |||
390 | return true; | |||
391 | } | |||
392 | } | |||
393 | ||||
394 | return false; | |||
395 | } | |||
396 | ||||
397 | static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { | |||
398 | assert(F && "Illegal to upgrade a non-existent Function.")(static_cast <bool> (F && "Illegal to upgrade a non-existent Function." ) ? void (0) : __assert_fail ("F && \"Illegal to upgrade a non-existent Function.\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 398, __extension__ __PRETTY_FUNCTION__)); | |||
399 | ||||
400 | // Quickly eliminate it, if it's not a candidate. | |||
401 | StringRef Name = F->getName(); | |||
402 | if (Name.size() <= 8 || !Name.startswith("llvm.")) | |||
403 | return false; | |||
404 | Name = Name.substr(5); // Strip off "llvm." | |||
405 | ||||
406 | switch (Name[0]) { | |||
407 | default: break; | |||
408 | case 'a': { | |||
409 | if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { | |||
410 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, | |||
411 | F->arg_begin()->getType()); | |||
412 | return true; | |||
413 | } | |||
414 | if (Name.startswith("arm.neon.vclz")) { | |||
415 | Type* args[2] = { | |||
416 | F->arg_begin()->getType(), | |||
417 | Type::getInt1Ty(F->getContext()) | |||
418 | }; | |||
419 | // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to | |||
420 | // the end of the name. Change name from llvm.arm.neon.vclz.* to | |||
421 | // llvm.ctlz.* | |||
422 | FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); | |||
423 | NewFn = Function::Create(fType, F->getLinkage(), | |||
424 | "llvm.ctlz." + Name.substr(14), F->getParent()); | |||
425 | return true; | |||
426 | } | |||
427 | if (Name.startswith("arm.neon.vcnt")) { | |||
428 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, | |||
429 | F->arg_begin()->getType()); | |||
430 | return true; | |||
431 | } | |||
432 | Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); | |||
433 | if (vldRegex.match(Name)) { | |||
434 | auto fArgs = F->getFunctionType()->params(); | |||
435 | SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); | |||
436 | // Can't use Intrinsic::getDeclaration here as the return types might | |||
437 | // then only be structurally equal. | |||
438 | FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); | |||
439 | NewFn = Function::Create(fType, F->getLinkage(), | |||
440 | "llvm." + Name + ".p0i8", F->getParent()); | |||
441 | return true; | |||
442 | } | |||
443 | Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); | |||
444 | if (vstRegex.match(Name)) { | |||
445 | static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, | |||
446 | Intrinsic::arm_neon_vst2, | |||
447 | Intrinsic::arm_neon_vst3, | |||
448 | Intrinsic::arm_neon_vst4}; | |||
449 | ||||
450 | static const Intrinsic::ID StoreLaneInts[] = { | |||
451 | Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, | |||
452 | Intrinsic::arm_neon_vst4lane | |||
453 | }; | |||
454 | ||||
455 | auto fArgs = F->getFunctionType()->params(); | |||
456 | Type *Tys[] = {fArgs[0], fArgs[1]}; | |||
457 | if (Name.find("lane") == StringRef::npos) | |||
458 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
459 | StoreInts[fArgs.size() - 3], Tys); | |||
460 | else | |||
461 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
462 | StoreLaneInts[fArgs.size() - 5], Tys); | |||
463 | return true; | |||
464 | } | |||
465 | if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { | |||
466 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); | |||
467 | return true; | |||
468 | } | |||
469 | break; | |||
470 | } | |||
471 | ||||
472 | case 'c': { | |||
473 | if (Name.startswith("ctlz.") && F->arg_size() == 1) { | |||
474 | rename(F); | |||
475 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, | |||
476 | F->arg_begin()->getType()); | |||
477 | return true; | |||
478 | } | |||
479 | if (Name.startswith("cttz.") && F->arg_size() == 1) { | |||
480 | rename(F); | |||
481 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, | |||
482 | F->arg_begin()->getType()); | |||
483 | return true; | |||
484 | } | |||
485 | break; | |||
486 | } | |||
487 | case 'd': { | |||
488 | if (Name == "dbg.value" && F->arg_size() == 4) { | |||
489 | rename(F); | |||
490 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); | |||
491 | return true; | |||
492 | } | |||
493 | break; | |||
494 | } | |||
495 | case 'i': | |||
496 | case 'l': { | |||
497 | bool IsLifetimeStart = Name.startswith("lifetime.start"); | |||
498 | if (IsLifetimeStart || Name.startswith("invariant.start")) { | |||
499 | Intrinsic::ID ID = IsLifetimeStart ? | |||
500 | Intrinsic::lifetime_start : Intrinsic::invariant_start; | |||
501 | auto Args = F->getFunctionType()->params(); | |||
502 | Type* ObjectPtr[1] = {Args[1]}; | |||
503 | if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { | |||
504 | rename(F); | |||
505 | NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); | |||
506 | return true; | |||
507 | } | |||
508 | } | |||
509 | ||||
510 | bool IsLifetimeEnd = Name.startswith("lifetime.end"); | |||
511 | if (IsLifetimeEnd || Name.startswith("invariant.end")) { | |||
512 | Intrinsic::ID ID = IsLifetimeEnd ? | |||
513 | Intrinsic::lifetime_end : Intrinsic::invariant_end; | |||
514 | ||||
515 | auto Args = F->getFunctionType()->params(); | |||
516 | Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; | |||
517 | if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { | |||
518 | rename(F); | |||
519 | NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); | |||
520 | return true; | |||
521 | } | |||
522 | } | |||
523 | break; | |||
524 | } | |||
525 | case 'm': { | |||
526 | if (Name.startswith("masked.load.")) { | |||
527 | Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; | |||
528 | if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { | |||
529 | rename(F); | |||
530 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
531 | Intrinsic::masked_load, | |||
532 | Tys); | |||
533 | return true; | |||
534 | } | |||
535 | } | |||
536 | if (Name.startswith("masked.store.")) { | |||
537 | auto Args = F->getFunctionType()->params(); | |||
538 | Type *Tys[] = { Args[0], Args[1] }; | |||
539 | if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { | |||
540 | rename(F); | |||
541 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
542 | Intrinsic::masked_store, | |||
543 | Tys); | |||
544 | return true; | |||
545 | } | |||
546 | } | |||
547 | // Renaming gather/scatter intrinsics with no address space overloading | |||
548 | // to the new overload which includes an address space | |||
549 | if (Name.startswith("masked.gather.")) { | |||
550 | Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; | |||
551 | if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { | |||
552 | rename(F); | |||
553 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
554 | Intrinsic::masked_gather, Tys); | |||
555 | return true; | |||
556 | } | |||
557 | } | |||
558 | if (Name.startswith("masked.scatter.")) { | |||
559 | auto Args = F->getFunctionType()->params(); | |||
560 | Type *Tys[] = {Args[0], Args[1]}; | |||
561 | if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { | |||
562 | rename(F); | |||
563 | NewFn = Intrinsic::getDeclaration(F->getParent(), | |||
564 | Intrinsic::masked_scatter, Tys); | |||
565 | return true; | |||
566 | } | |||
567 | } | |||
568 | // Updating the memory intrinsics (memcpy/memmove/memset) that have an | |||
569 | // alignment parameter to embedding the alignment as an attribute of | |||
570 | // the pointer args. | |||
571 | if (Name.startswith("memcpy.") && F->arg_size() == 5) { | |||
572 | rename(F); | |||
573 | // Get the types of dest, src, and len | |||
574 | ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); | |||
575 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, | |||
576 | ParamTypes); | |||
577 | return true; | |||
578 | } | |||
579 | if (Name.startswith("memmove.") && F->arg_size() == 5) { | |||
580 | rename(F); | |||
581 | // Get the types of dest, src, and len | |||
582 | ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); | |||
583 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, | |||
584 | ParamTypes); | |||
585 | return true; | |||
586 | } | |||
587 | if (Name.startswith("memset.") && F->arg_size() == 5) { | |||
588 | rename(F); | |||
589 | // Get the types of dest, and len | |||
590 | const auto *FT = F->getFunctionType(); | |||
591 | Type *ParamTypes[2] = { | |||
592 | FT->getParamType(0), // Dest | |||
593 | FT->getParamType(2) // len | |||
594 | }; | |||
595 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, | |||
596 | ParamTypes); | |||
597 | return true; | |||
598 | } | |||
599 | break; | |||
600 | } | |||
601 | case 'n': { | |||
602 | if (Name.startswith("nvvm.")) { | |||
603 | Name = Name.substr(5); | |||
604 | ||||
605 | // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. | |||
606 | Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) | |||
607 | .Cases("brev32", "brev64", Intrinsic::bitreverse) | |||
608 | .Case("clz.i", Intrinsic::ctlz) | |||
609 | .Case("popc.i", Intrinsic::ctpop) | |||
610 | .Default(Intrinsic::not_intrinsic); | |||
611 | if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { | |||
612 | NewFn = Intrinsic::getDeclaration(F->getParent(), IID, | |||
613 | {F->getReturnType()}); | |||
614 | return true; | |||
615 | } | |||
616 | ||||
617 | // The following nvvm intrinsics correspond exactly to an LLVM idiom, but | |||
618 | // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. | |||
619 | // | |||
620 | // TODO: We could add lohi.i2d. | |||
621 | bool Expand = StringSwitch<bool>(Name) | |||
622 | .Cases("abs.i", "abs.ll", true) | |||
623 | .Cases("clz.ll", "popc.ll", "h2f", true) | |||
624 | .Cases("max.i", "max.ll", "max.ui", "max.ull", true) | |||
625 | .Cases("min.i", "min.ll", "min.ui", "min.ull", true) | |||
626 | .Default(false); | |||
627 | if (Expand) { | |||
628 | NewFn = nullptr; | |||
629 | return true; | |||
630 | } | |||
631 | } | |||
632 | break; | |||
633 | } | |||
634 | case 'o': | |||
635 | // We only need to change the name to match the mangling including the | |||
636 | // address space. | |||
637 | if (Name.startswith("objectsize.")) { | |||
638 | Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; | |||
639 | if (F->arg_size() == 2 || | |||
640 | F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { | |||
641 | rename(F); | |||
642 | NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, | |||
643 | Tys); | |||
644 | return true; | |||
645 | } | |||
646 | } | |||
647 | break; | |||
648 | ||||
649 | case 's': | |||
650 | if (Name == "stackprotectorcheck") { | |||
651 | NewFn = nullptr; | |||
652 | return true; | |||
653 | } | |||
654 | break; | |||
655 | ||||
656 | case 'x': | |||
657 | if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) | |||
658 | return true; | |||
659 | } | |||
660 | // Remangle our intrinsic since we upgrade the mangling | |||
661 | auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); | |||
662 | if (Result != None) { | |||
663 | NewFn = Result.getValue(); | |||
664 | return true; | |||
665 | } | |||
666 | ||||
667 | // This may not belong here. This function is effectively being overloaded | |||
668 | // to both detect an intrinsic which needs upgrading, and to provide the | |||
669 | // upgraded form of the intrinsic. We should perhaps have two separate | |||
670 | // functions for this. | |||
671 | return false; | |||
672 | } | |||
673 | ||||
674 | bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { | |||
675 | NewFn = nullptr; | |||
676 | bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); | |||
677 | assert(F != NewFn && "Intrinsic function upgraded to the same function")(static_cast <bool> (F != NewFn && "Intrinsic function upgraded to the same function" ) ? void (0) : __assert_fail ("F != NewFn && \"Intrinsic function upgraded to the same function\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 677, __extension__ __PRETTY_FUNCTION__)); | |||
678 | ||||
679 | // Upgrade intrinsic attributes. This does not change the function. | |||
680 | if (NewFn) | |||
681 | F = NewFn; | |||
682 | if (Intrinsic::ID id = F->getIntrinsicID()) | |||
683 | F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); | |||
684 | return Upgraded; | |||
685 | } | |||
686 | ||||
687 | bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) { | |||
688 | // Nothing to do yet. | |||
689 | return false; | |||
690 | } | |||
691 | ||||
692 | // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them | |||
693 | // to byte shuffles. | |||
694 | static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, | |||
695 | Value *Op, unsigned Shift) { | |||
696 | Type *ResultTy = Op->getType(); | |||
697 | unsigned NumElts = ResultTy->getVectorNumElements() * 8; | |||
698 | ||||
699 | // Bitcast from a 64-bit element type to a byte element type. | |||
700 | Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); | |||
701 | Op = Builder.CreateBitCast(Op, VecTy, "cast"); | |||
702 | ||||
703 | // We'll be shuffling in zeroes. | |||
704 | Value *Res = Constant::getNullValue(VecTy); | |||
705 | ||||
706 | // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, | |||
707 | // we'll just return the zero vector. | |||
708 | if (Shift < 16) { | |||
709 | uint32_t Idxs[64]; | |||
710 | // 256/512-bit version is split into 2/4 16-byte lanes. | |||
711 | for (unsigned l = 0; l != NumElts; l += 16) | |||
712 | for (unsigned i = 0; i != 16; ++i) { | |||
713 | unsigned Idx = NumElts + i - Shift; | |||
714 | if (Idx < NumElts) | |||
715 | Idx -= NumElts - 16; // end of lane, switch operand. | |||
716 | Idxs[l + i] = Idx + l; | |||
717 | } | |||
718 | ||||
719 | Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); | |||
720 | } | |||
721 | ||||
722 | // Bitcast back to a 64-bit element type. | |||
723 | return Builder.CreateBitCast(Res, ResultTy, "cast"); | |||
724 | } | |||
725 | ||||
726 | // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them | |||
727 | // to byte shuffles. | |||
728 | static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, | |||
729 | unsigned Shift) { | |||
730 | Type *ResultTy = Op->getType(); | |||
731 | unsigned NumElts = ResultTy->getVectorNumElements() * 8; | |||
732 | ||||
733 | // Bitcast from a 64-bit element type to a byte element type. | |||
734 | Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); | |||
735 | Op = Builder.CreateBitCast(Op, VecTy, "cast"); | |||
736 | ||||
737 | // We'll be shuffling in zeroes. | |||
738 | Value *Res = Constant::getNullValue(VecTy); | |||
739 | ||||
740 | // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, | |||
741 | // we'll just return the zero vector. | |||
742 | if (Shift < 16) { | |||
743 | uint32_t Idxs[64]; | |||
744 | // 256/512-bit version is split into 2/4 16-byte lanes. | |||
745 | for (unsigned l = 0; l != NumElts; l += 16) | |||
746 | for (unsigned i = 0; i != 16; ++i) { | |||
747 | unsigned Idx = i + Shift; | |||
748 | if (Idx >= 16) | |||
749 | Idx += NumElts - 16; // end of lane, switch operand. | |||
750 | Idxs[l + i] = Idx + l; | |||
751 | } | |||
752 | ||||
753 | Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); | |||
754 | } | |||
755 | ||||
756 | // Bitcast back to a 64-bit element type. | |||
757 | return Builder.CreateBitCast(Res, ResultTy, "cast"); | |||
758 | } | |||
759 | ||||
760 | static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, | |||
761 | unsigned NumElts) { | |||
762 | llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), | |||
763 | cast<IntegerType>(Mask->getType())->getBitWidth()); | |||
764 | Mask = Builder.CreateBitCast(Mask, MaskTy); | |||
765 | ||||
766 | // If we have less than 8 elements, then the starting mask was an i8 and | |||
767 | // we need to extract down to the right number of elements. | |||
768 | if (NumElts < 8) { | |||
769 | uint32_t Indices[4]; | |||
770 | for (unsigned i = 0; i != NumElts; ++i) | |||
771 | Indices[i] = i; | |||
772 | Mask = Builder.CreateShuffleVector(Mask, Mask, | |||
773 | makeArrayRef(Indices, NumElts), | |||
774 | "extract"); | |||
775 | } | |||
776 | ||||
777 | return Mask; | |||
778 | } | |||
779 | ||||
780 | static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, | |||
781 | Value *Op0, Value *Op1) { | |||
782 | // If the mask is all ones just emit the align operation. | |||
783 | if (const auto *C = dyn_cast<Constant>(Mask)) | |||
784 | if (C->isAllOnesValue()) | |||
785 | return Op0; | |||
786 | ||||
787 | Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements()); | |||
788 | return Builder.CreateSelect(Mask, Op0, Op1); | |||
789 | } | |||
790 | ||||
791 | // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. | |||
792 | // PALIGNR handles large immediates by shifting while VALIGN masks the immediate | |||
793 | // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. | |||
794 | static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, | |||
795 | Value *Op1, Value *Shift, | |||
796 | Value *Passthru, Value *Mask, | |||
797 | bool IsVALIGN) { | |||
798 | unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); | |||
799 | ||||
800 | unsigned NumElts = Op0->getType()->getVectorNumElements(); | |||
801 | assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!")(static_cast <bool> ((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!") ? void (0) : __assert_fail ( "(IsVALIGN || NumElts % 16 == 0) && \"Illegal NumElts for PALIGNR!\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 801, __extension__ __PRETTY_FUNCTION__)); | |||
802 | assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!")(static_cast <bool> ((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!") ? void (0) : __assert_fail ( "(!IsVALIGN || NumElts <= 16) && \"NumElts too large for VALIGN!\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 802, __extension__ __PRETTY_FUNCTION__)); | |||
803 | assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!")(static_cast <bool> (isPowerOf2_32(NumElts) && "NumElts not a power of 2!" ) ? void (0) : __assert_fail ("isPowerOf2_32(NumElts) && \"NumElts not a power of 2!\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 803, __extension__ __PRETTY_FUNCTION__)); | |||
804 | ||||
805 | // Mask the immediate for VALIGN. | |||
806 | if (IsVALIGN) | |||
807 | ShiftVal &= (NumElts - 1); | |||
808 | ||||
809 | // If palignr is shifting the pair of vectors more than the size of two | |||
810 | // lanes, emit zero. | |||
811 | if (ShiftVal >= 32) | |||
812 | return llvm::Constant::getNullValue(Op0->getType()); | |||
813 | ||||
814 | // If palignr is shifting the pair of input vectors more than one lane, | |||
815 | // but less than two lanes, convert to shifting in zeroes. | |||
816 | if (ShiftVal > 16) { | |||
817 | ShiftVal -= 16; | |||
818 | Op1 = Op0; | |||
819 | Op0 = llvm::Constant::getNullValue(Op0->getType()); | |||
820 | } | |||
821 | ||||
822 | uint32_t Indices[64]; | |||
823 | // 256-bit palignr operates on 128-bit lanes so we need to handle that | |||
824 | for (unsigned l = 0; l < NumElts; l += 16) { | |||
825 | for (unsigned i = 0; i != 16; ++i) { | |||
826 | unsigned Idx = ShiftVal + i; | |||
827 | if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. | |||
828 | Idx += NumElts - 16; // End of lane, switch operand. | |||
829 | Indices[l + i] = Idx + l; | |||
830 | } | |||
831 | } | |||
832 | ||||
833 | Value *Align = Builder.CreateShuffleVector(Op1, Op0, | |||
834 | makeArrayRef(Indices, NumElts), | |||
835 | "palignr"); | |||
836 | ||||
837 | return EmitX86Select(Builder, Mask, Align, Passthru); | |||
838 | } | |||
839 | ||||
840 | static Value *UpgradeMaskedStore(IRBuilder<> &Builder, | |||
841 | Value *Ptr, Value *Data, Value *Mask, | |||
842 | bool Aligned) { | |||
843 | // Cast the pointer to the right type. | |||
844 | Ptr = Builder.CreateBitCast(Ptr, | |||
845 | llvm::PointerType::getUnqual(Data->getType())); | |||
846 | unsigned Align = | |||
847 | Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; | |||
848 | ||||
849 | // If the mask is all ones just emit a regular store. | |||
850 | if (const auto *C = dyn_cast<Constant>(Mask)) | |||
851 | if (C->isAllOnesValue()) | |||
852 | return Builder.CreateAlignedStore(Data, Ptr, Align); | |||
853 | ||||
854 | // Convert the mask from an integer type to a vector of i1. | |||
855 | unsigned NumElts = Data->getType()->getVectorNumElements(); | |||
856 | Mask = getX86MaskVec(Builder, Mask, NumElts); | |||
857 | return Builder.CreateMaskedStore(Data, Ptr, Align, Mask); | |||
858 | } | |||
859 | ||||
860 | static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, | |||
861 | Value *Ptr, Value *Passthru, Value *Mask, | |||
862 | bool Aligned) { | |||
863 | // Cast the pointer to the right type. | |||
864 | Ptr = Builder.CreateBitCast(Ptr, | |||
865 | llvm::PointerType::getUnqual(Passthru->getType())); | |||
866 | unsigned Align = | |||
867 | Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1; | |||
868 | ||||
869 | // If the mask is all ones just emit a regular store. | |||
870 | if (const auto *C = dyn_cast<Constant>(Mask)) | |||
871 | if (C->isAllOnesValue()) | |||
872 | return Builder.CreateAlignedLoad(Ptr, Align); | |||
873 | ||||
874 | // Convert the mask from an integer type to a vector of i1. | |||
875 | unsigned NumElts = Passthru->getType()->getVectorNumElements(); | |||
876 | Mask = getX86MaskVec(Builder, Mask, NumElts); | |||
877 | return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru); | |||
878 | } | |||
879 | ||||
880 | static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { | |||
881 | Value *Op0 = CI.getArgOperand(0); | |||
882 | llvm::Type *Ty = Op0->getType(); | |||
883 | Value *Zero = llvm::Constant::getNullValue(Ty); | |||
884 | Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); | |||
885 | Value *Neg = Builder.CreateNeg(Op0); | |||
886 | Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); | |||
887 | ||||
888 | if (CI.getNumArgOperands() == 3) | |||
889 | Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); | |||
890 | ||||
891 | return Res; | |||
892 | } | |||
893 | ||||
894 | static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, | |||
895 | ICmpInst::Predicate Pred) { | |||
896 | Value *Op0 = CI.getArgOperand(0); | |||
897 | Value *Op1 = CI.getArgOperand(1); | |||
898 | Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); | |||
899 | Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); | |||
900 | ||||
901 | if (CI.getNumArgOperands() == 4) | |||
902 | Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); | |||
903 | ||||
904 | return Res; | |||
905 | } | |||
906 | ||||
907 | // Applying mask on vector of i1's and make sure result is at least 8 bits wide. | |||
908 | static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder,Value *Vec, Value *Mask, | |||
909 | unsigned NumElts) { | |||
910 | if (Mask) { | |||
911 | const auto *C = dyn_cast<Constant>(Mask); | |||
912 | if (!C || !C->isAllOnesValue()) | |||
913 | Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); | |||
914 | } | |||
915 | ||||
916 | if (NumElts < 8) { | |||
917 | uint32_t Indices[8]; | |||
918 | for (unsigned i = 0; i != NumElts; ++i) | |||
919 | Indices[i] = i; | |||
920 | for (unsigned i = NumElts; i != 8; ++i) | |||
921 | Indices[i] = NumElts + i % NumElts; | |||
| ||||
922 | Vec = Builder.CreateShuffleVector(Vec, | |||
923 | Constant::getNullValue(Vec->getType()), | |||
924 | Indices); | |||
925 | } | |||
926 | return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); | |||
927 | } | |||
928 | ||||
929 | static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, | |||
930 | unsigned CC, bool Signed) { | |||
931 | Value *Op0 = CI.getArgOperand(0); | |||
932 | unsigned NumElts = Op0->getType()->getVectorNumElements(); | |||
933 | ||||
934 | Value *Cmp; | |||
935 | if (CC == 3) { | |||
| ||||
936 | Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); | |||
937 | } else if (CC == 7) { | |||
938 | Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); | |||
939 | } else { | |||
940 | ICmpInst::Predicate Pred; | |||
941 | switch (CC) { | |||
942 | default: llvm_unreachable("Unknown condition code")::llvm::llvm_unreachable_internal("Unknown condition code", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 942); | |||
943 | case 0: Pred = ICmpInst::ICMP_EQ; break; | |||
944 | case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; | |||
945 | case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; | |||
946 | case 4: Pred = ICmpInst::ICMP_NE; break; | |||
947 | case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; | |||
948 | case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; | |||
949 | } | |||
950 | Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); | |||
951 | } | |||
952 | ||||
953 | Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); | |||
954 | ||||
955 | return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask, NumElts); | |||
956 | } | |||
957 | ||||
958 | // Replace a masked intrinsic with an older unmasked intrinsic. | |||
959 | static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, | |||
960 | Intrinsic::ID IID) { | |||
961 | Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); | |||
962 | Value *Rep = Builder.CreateCall(Intrin, | |||
963 | { CI.getArgOperand(0), CI.getArgOperand(1) }); | |||
964 | return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); | |||
965 | } | |||
966 | ||||
967 | static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { | |||
968 | Value* A = CI.getArgOperand(0); | |||
969 | Value* B = CI.getArgOperand(1); | |||
970 | Value* Src = CI.getArgOperand(2); | |||
971 | Value* Mask = CI.getArgOperand(3); | |||
972 | ||||
973 | Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); | |||
974 | Value* Cmp = Builder.CreateIsNotNull(AndNode); | |||
975 | Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); | |||
976 | Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); | |||
977 | Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); | |||
978 | return Builder.CreateInsertElement(A, Select, (uint64_t)0); | |||
979 | } | |||
980 | ||||
981 | ||||
982 | static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { | |||
983 | Value* Op = CI.getArgOperand(0); | |||
984 | Type* ReturnOp = CI.getType(); | |||
985 | unsigned NumElts = CI.getType()->getVectorNumElements(); | |||
986 | Value *Mask = getX86MaskVec(Builder, Op, NumElts); | |||
987 | return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); | |||
988 | } | |||
989 | ||||
990 | // Replace intrinsic with unmasked version and a select. | |||
991 | static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, | |||
992 | CallInst &CI, Value *&Rep) { | |||
993 | Name = Name.substr(12); // Remove avx512.mask. | |||
994 | ||||
995 | unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); | |||
996 | unsigned EltWidth = CI.getType()->getScalarSizeInBits(); | |||
997 | Intrinsic::ID IID; | |||
998 | if (Name.startswith("max.p")) { | |||
999 | if (VecWidth == 128 && EltWidth == 32) | |||
1000 | IID = Intrinsic::x86_sse_max_ps; | |||
1001 | else if (VecWidth == 128 && EltWidth == 64) | |||
1002 | IID = Intrinsic::x86_sse2_max_pd; | |||
1003 | else if (VecWidth == 256 && EltWidth == 32) | |||
1004 | IID = Intrinsic::x86_avx_max_ps_256; | |||
1005 | else if (VecWidth == 256 && EltWidth == 64) | |||
1006 | IID = Intrinsic::x86_avx_max_pd_256; | |||
1007 | else | |||
1008 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1008); | |||
1009 | } else if (Name.startswith("min.p")) { | |||
1010 | if (VecWidth == 128 && EltWidth == 32) | |||
1011 | IID = Intrinsic::x86_sse_min_ps; | |||
1012 | else if (VecWidth == 128 && EltWidth == 64) | |||
1013 | IID = Intrinsic::x86_sse2_min_pd; | |||
1014 | else if (VecWidth == 256 && EltWidth == 32) | |||
1015 | IID = Intrinsic::x86_avx_min_ps_256; | |||
1016 | else if (VecWidth == 256 && EltWidth == 64) | |||
1017 | IID = Intrinsic::x86_avx_min_pd_256; | |||
1018 | else | |||
1019 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1019); | |||
1020 | } else if (Name.startswith("pshuf.b.")) { | |||
1021 | if (VecWidth == 128) | |||
1022 | IID = Intrinsic::x86_ssse3_pshuf_b_128; | |||
1023 | else if (VecWidth == 256) | |||
1024 | IID = Intrinsic::x86_avx2_pshuf_b; | |||
1025 | else if (VecWidth == 512) | |||
1026 | IID = Intrinsic::x86_avx512_pshuf_b_512; | |||
1027 | else | |||
1028 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1028); | |||
1029 | } else if (Name.startswith("pmul.dq.")) { | |||
1030 | if (VecWidth == 128) | |||
1031 | IID = Intrinsic::x86_sse41_pmuldq; | |||
1032 | else if (VecWidth == 256) | |||
1033 | IID = Intrinsic::x86_avx2_pmul_dq; | |||
1034 | else if (VecWidth == 512) | |||
1035 | IID = Intrinsic::x86_avx512_pmul_dq_512; | |||
1036 | else | |||
1037 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1037); | |||
1038 | } else if (Name.startswith("pmulu.dq.")) { | |||
1039 | if (VecWidth == 128) | |||
1040 | IID = Intrinsic::x86_sse2_pmulu_dq; | |||
1041 | else if (VecWidth == 256) | |||
1042 | IID = Intrinsic::x86_avx2_pmulu_dq; | |||
1043 | else if (VecWidth == 512) | |||
1044 | IID = Intrinsic::x86_avx512_pmulu_dq_512; | |||
1045 | else | |||
1046 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1046); | |||
1047 | } else if (Name.startswith("pmul.hr.sw.")) { | |||
1048 | if (VecWidth == 128) | |||
1049 | IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; | |||
1050 | else if (VecWidth == 256) | |||
1051 | IID = Intrinsic::x86_avx2_pmul_hr_sw; | |||
1052 | else if (VecWidth == 512) | |||
1053 | IID = Intrinsic::x86_avx512_pmul_hr_sw_512; | |||
1054 | else | |||
1055 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1055); | |||
1056 | } else if (Name.startswith("pmulh.w.")) { | |||
1057 | if (VecWidth == 128) | |||
1058 | IID = Intrinsic::x86_sse2_pmulh_w; | |||
1059 | else if (VecWidth == 256) | |||
1060 | IID = Intrinsic::x86_avx2_pmulh_w; | |||
1061 | else if (VecWidth == 512) | |||
1062 | IID = Intrinsic::x86_avx512_pmulh_w_512; | |||
1063 | else | |||
1064 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1064); | |||
1065 | } else if (Name.startswith("pmulhu.w.")) { | |||
1066 | if (VecWidth == 128) | |||
1067 | IID = Intrinsic::x86_sse2_pmulhu_w; | |||
1068 | else if (VecWidth == 256) | |||
1069 | IID = Intrinsic::x86_avx2_pmulhu_w; | |||
1070 | else if (VecWidth == 512) | |||
1071 | IID = Intrinsic::x86_avx512_pmulhu_w_512; | |||
1072 | else | |||
1073 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1073); | |||
1074 | } else if (Name.startswith("packsswb.")) { | |||
1075 | if (VecWidth == 128) | |||
1076 | IID = Intrinsic::x86_sse2_packsswb_128; | |||
1077 | else if (VecWidth == 256) | |||
1078 | IID = Intrinsic::x86_avx2_packsswb; | |||
1079 | else if (VecWidth == 512) | |||
1080 | IID = Intrinsic::x86_avx512_packsswb_512; | |||
1081 | else | |||
1082 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1082); | |||
1083 | } else if (Name.startswith("packssdw.")) { | |||
1084 | if (VecWidth == 128) | |||
1085 | IID = Intrinsic::x86_sse2_packssdw_128; | |||
1086 | else if (VecWidth == 256) | |||
1087 | IID = Intrinsic::x86_avx2_packssdw; | |||
1088 | else if (VecWidth == 512) | |||
1089 | IID = Intrinsic::x86_avx512_packssdw_512; | |||
1090 | else | |||
1091 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1091); | |||
1092 | } else if (Name.startswith("packuswb.")) { | |||
1093 | if (VecWidth == 128) | |||
1094 | IID = Intrinsic::x86_sse2_packuswb_128; | |||
1095 | else if (VecWidth == 256) | |||
1096 | IID = Intrinsic::x86_avx2_packuswb; | |||
1097 | else if (VecWidth == 512) | |||
1098 | IID = Intrinsic::x86_avx512_packuswb_512; | |||
1099 | else | |||
1100 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1100); | |||
1101 | } else if (Name.startswith("packusdw.")) { | |||
1102 | if (VecWidth == 128) | |||
1103 | IID = Intrinsic::x86_sse41_packusdw; | |||
1104 | else if (VecWidth == 256) | |||
1105 | IID = Intrinsic::x86_avx2_packusdw; | |||
1106 | else if (VecWidth == 512) | |||
1107 | IID = Intrinsic::x86_avx512_packusdw_512; | |||
1108 | else | |||
1109 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1109); | |||
1110 | } else if (Name.startswith("vpermilvar.")) { | |||
1111 | if (VecWidth == 128 && EltWidth == 32) | |||
1112 | IID = Intrinsic::x86_avx_vpermilvar_ps; | |||
1113 | else if (VecWidth == 128 && EltWidth == 64) | |||
1114 | IID = Intrinsic::x86_avx_vpermilvar_pd; | |||
1115 | else if (VecWidth == 256 && EltWidth == 32) | |||
1116 | IID = Intrinsic::x86_avx_vpermilvar_ps_256; | |||
1117 | else if (VecWidth == 256 && EltWidth == 64) | |||
1118 | IID = Intrinsic::x86_avx_vpermilvar_pd_256; | |||
1119 | else if (VecWidth == 512 && EltWidth == 32) | |||
1120 | IID = Intrinsic::x86_avx512_vpermilvar_ps_512; | |||
1121 | else if (VecWidth == 512 && EltWidth == 64) | |||
1122 | IID = Intrinsic::x86_avx512_vpermilvar_pd_512; | |||
1123 | else | |||
1124 | llvm_unreachable("Unexpected intrinsic")::llvm::llvm_unreachable_internal("Unexpected intrinsic", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1124); | |||
1125 | } else | |||
1126 | return false; | |||
1127 | ||||
1128 | Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), | |||
1129 | { CI.getArgOperand(0), CI.getArgOperand(1) }); | |||
1130 | Rep = EmitX86Select(Builder, CI.getArgOperand(3), Rep, | |||
1131 | CI.getArgOperand(2)); | |||
1132 | return true; | |||
1133 | } | |||
1134 | ||||
1135 | /// Upgrade a call to an old intrinsic. All argument and return casting must be | |||
1136 | /// provided to seamlessly integrate with existing context. | |||
1137 | void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { | |||
1138 | Function *F = CI->getCalledFunction(); | |||
1139 | LLVMContext &C = CI->getContext(); | |||
1140 | IRBuilder<> Builder(C); | |||
1141 | Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); | |||
1142 | ||||
1143 | assert(F && "Intrinsic call is not direct?")(static_cast <bool> (F && "Intrinsic call is not direct?" ) ? void (0) : __assert_fail ("F && \"Intrinsic call is not direct?\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1143, __extension__ __PRETTY_FUNCTION__)); | |||
1144 | ||||
1145 | if (!NewFn) { | |||
1146 | // Get the Function's name. | |||
1147 | StringRef Name = F->getName(); | |||
1148 | ||||
1149 | assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'")(static_cast <bool> (Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'") ? void (0) : __assert_fail ("Name.startswith(\"llvm.\") && \"Intrinsic doesn't start with 'llvm.'\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1149, __extension__ __PRETTY_FUNCTION__)); | |||
1150 | Name = Name.substr(5); | |||
1151 | ||||
1152 | bool IsX86 = Name.startswith("x86."); | |||
1153 | if (IsX86) | |||
1154 | Name = Name.substr(4); | |||
1155 | bool IsNVVM = Name.startswith("nvvm."); | |||
1156 | if (IsNVVM) | |||
1157 | Name = Name.substr(5); | |||
1158 | ||||
1159 | if (IsX86 && Name.startswith("sse4a.movnt.")) { | |||
1160 | Module *M = F->getParent(); | |||
1161 | SmallVector<Metadata *, 1> Elts; | |||
1162 | Elts.push_back( | |||
1163 | ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); | |||
1164 | MDNode *Node = MDNode::get(C, Elts); | |||
1165 | ||||
1166 | Value *Arg0 = CI->getArgOperand(0); | |||
1167 | Value *Arg1 = CI->getArgOperand(1); | |||
1168 | ||||
1169 | // Nontemporal (unaligned) store of the 0'th element of the float/double | |||
1170 | // vector. | |||
1171 | Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); | |||
1172 | PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); | |||
1173 | Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); | |||
1174 | Value *Extract = | |||
1175 | Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); | |||
1176 | ||||
1177 | StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1); | |||
1178 | SI->setMetadata(M->getMDKindID("nontemporal"), Node); | |||
1179 | ||||
1180 | // Remove intrinsic. | |||
1181 | CI->eraseFromParent(); | |||
1182 | return; | |||
1183 | } | |||
1184 | ||||
1185 | if (IsX86 && (Name.startswith("avx.movnt.") || | |||
1186 | Name.startswith("avx512.storent."))) { | |||
1187 | Module *M = F->getParent(); | |||
1188 | SmallVector<Metadata *, 1> Elts; | |||
1189 | Elts.push_back( | |||
1190 | ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); | |||
1191 | MDNode *Node = MDNode::get(C, Elts); | |||
1192 | ||||
1193 | Value *Arg0 = CI->getArgOperand(0); | |||
1194 | Value *Arg1 = CI->getArgOperand(1); | |||
1195 | ||||
1196 | // Convert the type of the pointer to a pointer to the stored type. | |||
1197 | Value *BC = Builder.CreateBitCast(Arg0, | |||
1198 | PointerType::getUnqual(Arg1->getType()), | |||
1199 | "cast"); | |||
1200 | VectorType *VTy = cast<VectorType>(Arg1->getType()); | |||
1201 | StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC, | |||
1202 | VTy->getBitWidth() / 8); | |||
1203 | SI->setMetadata(M->getMDKindID("nontemporal"), Node); | |||
1204 | ||||
1205 | // Remove intrinsic. | |||
1206 | CI->eraseFromParent(); | |||
1207 | return; | |||
1208 | } | |||
1209 | ||||
1210 | if (IsX86 && Name == "sse2.storel.dq") { | |||
1211 | Value *Arg0 = CI->getArgOperand(0); | |||
1212 | Value *Arg1 = CI->getArgOperand(1); | |||
1213 | ||||
1214 | Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); | |||
1215 | Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); | |||
1216 | Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); | |||
1217 | Value *BC = Builder.CreateBitCast(Arg0, | |||
1218 | PointerType::getUnqual(Elt->getType()), | |||
1219 | "cast"); | |||
1220 | Builder.CreateAlignedStore(Elt, BC, 1); | |||
1221 | ||||
1222 | // Remove intrinsic. | |||
1223 | CI->eraseFromParent(); | |||
1224 | return; | |||
1225 | } | |||
1226 | ||||
1227 | if (IsX86 && (Name.startswith("sse.storeu.") || | |||
1228 | Name.startswith("sse2.storeu.") || | |||
1229 | Name.startswith("avx.storeu."))) { | |||
1230 | Value *Arg0 = CI->getArgOperand(0); | |||
1231 | Value *Arg1 = CI->getArgOperand(1); | |||
1232 | ||||
1233 | Arg0 = Builder.CreateBitCast(Arg0, | |||
1234 | PointerType::getUnqual(Arg1->getType()), | |||
1235 | "cast"); | |||
1236 | Builder.CreateAlignedStore(Arg1, Arg0, 1); | |||
1237 | ||||
1238 | // Remove intrinsic. | |||
1239 | CI->eraseFromParent(); | |||
1240 | return; | |||
1241 | } | |||
1242 | ||||
1243 | if (IsX86 && (Name.startswith("avx512.mask.store"))) { | |||
1244 | // "avx512.mask.storeu." or "avx512.mask.store." | |||
1245 | bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". | |||
1246 | UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), | |||
1247 | CI->getArgOperand(2), Aligned); | |||
1248 | ||||
1249 | // Remove intrinsic. | |||
1250 | CI->eraseFromParent(); | |||
1251 | return; | |||
1252 | } | |||
1253 | ||||
1254 | Value *Rep; | |||
1255 | // Upgrade packed integer vector compare intrinsics to compare instructions. | |||
1256 | if (IsX86 && (Name.startswith("sse2.pcmp") || | |||
1257 | Name.startswith("avx2.pcmp"))) { | |||
1258 | // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." | |||
1259 | bool CmpEq = Name[9] == 'e'; | |||
1260 | Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, | |||
1261 | CI->getArgOperand(0), CI->getArgOperand(1)); | |||
1262 | Rep = Builder.CreateSExt(Rep, CI->getType(), ""); | |||
1263 | } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { | |||
1264 | Type *ExtTy = Type::getInt32Ty(C); | |||
1265 | if (CI->getOperand(0)->getType()->isIntegerTy(8)) | |||
1266 | ExtTy = Type::getInt64Ty(C); | |||
1267 | unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / | |||
1268 | ExtTy->getPrimitiveSizeInBits(); | |||
1269 | Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); | |||
1270 | Rep = Builder.CreateVectorSplat(NumElts, Rep); | |||
1271 | } else if (IsX86 && (Name.startswith("avx512.ptestm") || | |||
1272 | Name.startswith("avx512.ptestnm"))) { | |||
1273 | Value *Op0 = CI->getArgOperand(0); | |||
1274 | Value *Op1 = CI->getArgOperand(1); | |||
1275 | Value *Mask = CI->getArgOperand(2); | |||
1276 | Rep = Builder.CreateAnd(Op0, Op1); | |||
1277 | llvm::Type *Ty = Op0->getType(); | |||
1278 | Value *Zero = llvm::Constant::getNullValue(Ty); | |||
1279 | ICmpInst::Predicate Pred = | |||
1280 | Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; | |||
1281 | Rep = Builder.CreateICmp(Pred, Rep, Zero); | |||
1282 | unsigned NumElts = Op0->getType()->getVectorNumElements(); | |||
1283 | Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask, NumElts); | |||
1284 | } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ | |||
1285 | unsigned NumElts = | |||
1286 | CI->getArgOperand(1)->getType()->getVectorNumElements(); | |||
1287 | Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); | |||
1288 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
1289 | CI->getArgOperand(1)); | |||
1290 | } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { | |||
1291 | unsigned NumElts = CI->getType()->getScalarSizeInBits(); | |||
1292 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); | |||
1293 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); | |||
1294 | uint32_t Indices[64]; | |||
1295 | for (unsigned i = 0; i != NumElts; ++i) | |||
1296 | Indices[i] = i; | |||
1297 | ||||
1298 | // First extract half of each vector. This gives better codegen than | |||
1299 | // doing it in a single shuffle. | |||
1300 | LHS = Builder.CreateShuffleVector(LHS, LHS, | |||
1301 | makeArrayRef(Indices, NumElts / 2)); | |||
1302 | RHS = Builder.CreateShuffleVector(RHS, RHS, | |||
1303 | makeArrayRef(Indices, NumElts / 2)); | |||
1304 | // Concat the vectors. | |||
1305 | // NOTE: Operands have to be swapped to match intrinsic definition. | |||
1306 | Rep = Builder.CreateShuffleVector(RHS, LHS, | |||
1307 | makeArrayRef(Indices, NumElts)); | |||
1308 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1309 | } else if (IsX86 && Name == "avx512.kand.w") { | |||
1310 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1311 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); | |||
1312 | Rep = Builder.CreateAnd(LHS, RHS); | |||
1313 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1314 | } else if (IsX86 && Name == "avx512.kandn.w") { | |||
1315 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1316 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); | |||
1317 | LHS = Builder.CreateNot(LHS); | |||
1318 | Rep = Builder.CreateAnd(LHS, RHS); | |||
1319 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1320 | } else if (IsX86 && Name == "avx512.kor.w") { | |||
1321 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1322 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); | |||
1323 | Rep = Builder.CreateOr(LHS, RHS); | |||
1324 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1325 | } else if (IsX86 && Name == "avx512.kxor.w") { | |||
1326 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1327 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); | |||
1328 | Rep = Builder.CreateXor(LHS, RHS); | |||
1329 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1330 | } else if (IsX86 && Name == "avx512.kxnor.w") { | |||
1331 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1332 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); | |||
1333 | LHS = Builder.CreateNot(LHS); | |||
1334 | Rep = Builder.CreateXor(LHS, RHS); | |||
1335 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1336 | } else if (IsX86 && Name == "avx512.knot.w") { | |||
1337 | Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1338 | Rep = Builder.CreateNot(Rep); | |||
1339 | Rep = Builder.CreateBitCast(Rep, CI->getType()); | |||
1340 | } else if (IsX86 && | |||
1341 | (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { | |||
1342 | Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); | |||
1343 | Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); | |||
1344 | Rep = Builder.CreateOr(LHS, RHS); | |||
1345 | Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); | |||
1346 | Value *C; | |||
1347 | if (Name[14] == 'c') | |||
1348 | C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); | |||
1349 | else | |||
1350 | C = ConstantInt::getNullValue(Builder.getInt16Ty()); | |||
1351 | Rep = Builder.CreateICmpEQ(Rep, C); | |||
1352 | Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); | |||
1353 | } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd")) { | |||
1354 | Type *I32Ty = Type::getInt32Ty(C); | |||
1355 | Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), | |||
1356 | ConstantInt::get(I32Ty, 0)); | |||
1357 | Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), | |||
1358 | ConstantInt::get(I32Ty, 0)); | |||
1359 | Rep = Builder.CreateInsertElement(CI->getArgOperand(0), | |||
1360 | Builder.CreateFAdd(Elt0, Elt1), | |||
1361 | ConstantInt::get(I32Ty, 0)); | |||
1362 | } else if (IsX86 && (Name == "sse.sub.ss" || Name == "sse2.sub.sd")) { | |||
1363 | Type *I32Ty = Type::getInt32Ty(C); | |||
1364 | Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), | |||
1365 | ConstantInt::get(I32Ty, 0)); | |||
1366 | Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), | |||
1367 | ConstantInt::get(I32Ty, 0)); | |||
1368 | Rep = Builder.CreateInsertElement(CI->getArgOperand(0), | |||
1369 | Builder.CreateFSub(Elt0, Elt1), | |||
1370 | ConstantInt::get(I32Ty, 0)); | |||
1371 | } else if (IsX86 && (Name == "sse.mul.ss" || Name == "sse2.mul.sd")) { | |||
1372 | Type *I32Ty = Type::getInt32Ty(C); | |||
1373 | Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), | |||
1374 | ConstantInt::get(I32Ty, 0)); | |||
1375 | Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), | |||
1376 | ConstantInt::get(I32Ty, 0)); | |||
1377 | Rep = Builder.CreateInsertElement(CI->getArgOperand(0), | |||
1378 | Builder.CreateFMul(Elt0, Elt1), | |||
1379 | ConstantInt::get(I32Ty, 0)); | |||
1380 | } else if (IsX86 && (Name == "sse.div.ss" || Name == "sse2.div.sd")) { | |||
1381 | Type *I32Ty = Type::getInt32Ty(C); | |||
1382 | Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), | |||
1383 | ConstantInt::get(I32Ty, 0)); | |||
1384 | Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), | |||
1385 | ConstantInt::get(I32Ty, 0)); | |||
1386 | Rep = Builder.CreateInsertElement(CI->getArgOperand(0), | |||
1387 | Builder.CreateFDiv(Elt0, Elt1), | |||
1388 | ConstantInt::get(I32Ty, 0)); | |||
1389 | } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { | |||
1390 | // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." | |||
1391 | bool CmpEq = Name[16] == 'e'; | |||
1392 | Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); | |||
1393 | } else if (IsX86 && Name.startswith("avx512.mask.cmp")) { | |||
1394 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1395 | Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); | |||
1396 | } else if (IsX86 && Name.startswith("avx512.mask.ucmp")) { | |||
1397 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1398 | Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); | |||
1399 | } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || | |||
1400 | Name.startswith("avx512.cvtw2mask.") || | |||
1401 | Name.startswith("avx512.cvtd2mask.") || | |||
1402 | Name.startswith("avx512.cvtq2mask."))) { | |||
1403 | Value *Op = CI->getArgOperand(0); | |||
1404 | Value *Zero = llvm::Constant::getNullValue(Op->getType()); | |||
1405 | Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); | |||
1406 | Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr, | |||
1407 | Op->getType()->getVectorNumElements()); | |||
1408 | } else if(IsX86 && (Name == "ssse3.pabs.b.128" || | |||
1409 | Name == "ssse3.pabs.w.128" || | |||
1410 | Name == "ssse3.pabs.d.128" || | |||
1411 | Name.startswith("avx2.pabs") || | |||
1412 | Name.startswith("avx512.mask.pabs"))) { | |||
1413 | Rep = upgradeAbs(Builder, *CI); | |||
1414 | } else if (IsX86 && (Name == "sse41.pmaxsb" || | |||
1415 | Name == "sse2.pmaxs.w" || | |||
1416 | Name == "sse41.pmaxsd" || | |||
1417 | Name.startswith("avx2.pmaxs") || | |||
1418 | Name.startswith("avx512.mask.pmaxs"))) { | |||
1419 | Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); | |||
1420 | } else if (IsX86 && (Name == "sse2.pmaxu.b" || | |||
1421 | Name == "sse41.pmaxuw" || | |||
1422 | Name == "sse41.pmaxud" || | |||
1423 | Name.startswith("avx2.pmaxu") || | |||
1424 | Name.startswith("avx512.mask.pmaxu"))) { | |||
1425 | Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); | |||
1426 | } else if (IsX86 && (Name == "sse41.pminsb" || | |||
1427 | Name == "sse2.pmins.w" || | |||
1428 | Name == "sse41.pminsd" || | |||
1429 | Name.startswith("avx2.pmins") || | |||
1430 | Name.startswith("avx512.mask.pmins"))) { | |||
1431 | Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); | |||
1432 | } else if (IsX86 && (Name == "sse2.pminu.b" || | |||
1433 | Name == "sse41.pminuw" || | |||
1434 | Name == "sse41.pminud" || | |||
1435 | Name.startswith("avx2.pminu") || | |||
1436 | Name.startswith("avx512.mask.pminu"))) { | |||
1437 | Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); | |||
1438 | } else if (IsX86 && (Name == "sse2.cvtdq2pd" || | |||
1439 | Name == "sse2.cvtps2pd" || | |||
1440 | Name == "avx.cvtdq2.pd.256" || | |||
1441 | Name == "avx.cvt.ps2.pd.256" || | |||
1442 | Name.startswith("avx512.mask.cvtdq2pd.") || | |||
1443 | Name.startswith("avx512.mask.cvtudq2pd."))) { | |||
1444 | // Lossless i32/float to double conversion. | |||
1445 | // Extract the bottom elements if necessary and convert to double vector. | |||
1446 | Value *Src = CI->getArgOperand(0); | |||
1447 | VectorType *SrcTy = cast<VectorType>(Src->getType()); | |||
1448 | VectorType *DstTy = cast<VectorType>(CI->getType()); | |||
1449 | Rep = CI->getArgOperand(0); | |||
1450 | ||||
1451 | unsigned NumDstElts = DstTy->getNumElements(); | |||
1452 | if (NumDstElts < SrcTy->getNumElements()) { | |||
1453 | assert(NumDstElts == 2 && "Unexpected vector size")(static_cast <bool> (NumDstElts == 2 && "Unexpected vector size" ) ? void (0) : __assert_fail ("NumDstElts == 2 && \"Unexpected vector size\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1453, __extension__ __PRETTY_FUNCTION__)); | |||
1454 | uint32_t ShuffleMask[2] = { 0, 1 }; | |||
1455 | Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy), | |||
1456 | ShuffleMask); | |||
1457 | } | |||
1458 | ||||
1459 | bool SInt2Double = (StringRef::npos != Name.find("cvtdq2")); | |||
1460 | bool UInt2Double = (StringRef::npos != Name.find("cvtudq2")); | |||
1461 | if (SInt2Double) | |||
1462 | Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd"); | |||
1463 | else if (UInt2Double) | |||
1464 | Rep = Builder.CreateUIToFP(Rep, DstTy, "cvtudq2pd"); | |||
1465 | else | |||
1466 | Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); | |||
1467 | ||||
1468 | if (CI->getNumArgOperands() == 3) | |||
1469 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
1470 | CI->getArgOperand(1)); | |||
1471 | } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { | |||
1472 | Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), | |||
1473 | CI->getArgOperand(1), CI->getArgOperand(2), | |||
1474 | /*Aligned*/false); | |||
1475 | } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { | |||
1476 | Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), | |||
1477 | CI->getArgOperand(1),CI->getArgOperand(2), | |||
1478 | /*Aligned*/true); | |||
1479 | } else if (IsX86 && Name.startswith("xop.vpcom")) { | |||
1480 | Intrinsic::ID intID; | |||
1481 | if (Name.endswith("ub")) | |||
1482 | intID = Intrinsic::x86_xop_vpcomub; | |||
1483 | else if (Name.endswith("uw")) | |||
1484 | intID = Intrinsic::x86_xop_vpcomuw; | |||
1485 | else if (Name.endswith("ud")) | |||
1486 | intID = Intrinsic::x86_xop_vpcomud; | |||
1487 | else if (Name.endswith("uq")) | |||
1488 | intID = Intrinsic::x86_xop_vpcomuq; | |||
1489 | else if (Name.endswith("b")) | |||
1490 | intID = Intrinsic::x86_xop_vpcomb; | |||
1491 | else if (Name.endswith("w")) | |||
1492 | intID = Intrinsic::x86_xop_vpcomw; | |||
1493 | else if (Name.endswith("d")) | |||
1494 | intID = Intrinsic::x86_xop_vpcomd; | |||
1495 | else if (Name.endswith("q")) | |||
1496 | intID = Intrinsic::x86_xop_vpcomq; | |||
1497 | else | |||
1498 | llvm_unreachable("Unknown suffix")::llvm::llvm_unreachable_internal("Unknown suffix", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1498); | |||
1499 | ||||
1500 | Name = Name.substr(9); // strip off "xop.vpcom" | |||
1501 | unsigned Imm; | |||
1502 | if (Name.startswith("lt")) | |||
1503 | Imm = 0; | |||
1504 | else if (Name.startswith("le")) | |||
1505 | Imm = 1; | |||
1506 | else if (Name.startswith("gt")) | |||
1507 | Imm = 2; | |||
1508 | else if (Name.startswith("ge")) | |||
1509 | Imm = 3; | |||
1510 | else if (Name.startswith("eq")) | |||
1511 | Imm = 4; | |||
1512 | else if (Name.startswith("ne")) | |||
1513 | Imm = 5; | |||
1514 | else if (Name.startswith("false")) | |||
1515 | Imm = 6; | |||
1516 | else if (Name.startswith("true")) | |||
1517 | Imm = 7; | |||
1518 | else | |||
1519 | llvm_unreachable("Unknown condition")::llvm::llvm_unreachable_internal("Unknown condition", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 1519); | |||
1520 | ||||
1521 | Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID); | |||
1522 | Rep = | |||
1523 | Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1), | |||
1524 | Builder.getInt8(Imm)}); | |||
1525 | } else if (IsX86 && Name.startswith("xop.vpcmov")) { | |||
1526 | Value *Sel = CI->getArgOperand(2); | |||
1527 | Value *NotSel = Builder.CreateNot(Sel); | |||
1528 | Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); | |||
1529 | Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); | |||
1530 | Rep = Builder.CreateOr(Sel0, Sel1); | |||
1531 | } else if (IsX86 && Name == "sse42.crc32.64.8") { | |||
1532 | Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), | |||
1533 | Intrinsic::x86_sse42_crc32_32_8); | |||
1534 | Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); | |||
1535 | Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); | |||
1536 | Rep = Builder.CreateZExt(Rep, CI->getType(), ""); | |||
1537 | } else if (IsX86 && Name.startswith("avx.vbroadcast.s")) { | |||
1538 | // Replace broadcasts with a series of insertelements. | |||
1539 | Type *VecTy = CI->getType(); | |||
1540 | Type *EltTy = VecTy->getVectorElementType(); | |||
1541 | unsigned EltNum = VecTy->getVectorNumElements(); | |||
1542 | Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), | |||
1543 | EltTy->getPointerTo()); | |||
1544 | Value *Load = Builder.CreateLoad(EltTy, Cast); | |||
1545 | Type *I32Ty = Type::getInt32Ty(C); | |||
1546 | Rep = UndefValue::get(VecTy); | |||
1547 | for (unsigned I = 0; I < EltNum; ++I) | |||
1548 | Rep = Builder.CreateInsertElement(Rep, Load, | |||
1549 | ConstantInt::get(I32Ty, I)); | |||
1550 | } else if (IsX86 && (Name.startswith("sse41.pmovsx") || | |||
1551 | Name.startswith("sse41.pmovzx") || | |||
1552 | Name.startswith("avx2.pmovsx") || | |||
1553 | Name.startswith("avx2.pmovzx") || | |||
1554 | Name.startswith("avx512.mask.pmovsx") || | |||
1555 | Name.startswith("avx512.mask.pmovzx"))) { | |||
1556 | VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); | |||
1557 | VectorType *DstTy = cast<VectorType>(CI->getType()); | |||
1558 | unsigned NumDstElts = DstTy->getNumElements(); | |||
1559 | ||||
1560 | // Extract a subvector of the first NumDstElts lanes and sign/zero extend. | |||
1561 | SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); | |||
1562 | for (unsigned i = 0; i != NumDstElts; ++i) | |||
1563 | ShuffleMask[i] = i; | |||
1564 | ||||
1565 | Value *SV = Builder.CreateShuffleVector( | |||
1566 | CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); | |||
1567 | ||||
1568 | bool DoSext = (StringRef::npos != Name.find("pmovsx")); | |||
1569 | Rep = DoSext ? Builder.CreateSExt(SV, DstTy) | |||
1570 | : Builder.CreateZExt(SV, DstTy); | |||
1571 | // If there are 3 arguments, it's a masked intrinsic so we need a select. | |||
1572 | if (CI->getNumArgOperands() == 3) | |||
1573 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
1574 | CI->getArgOperand(1)); | |||
1575 | } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || | |||
1576 | Name == "avx2.vbroadcasti128")) { | |||
1577 | // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. | |||
1578 | Type *EltTy = CI->getType()->getVectorElementType(); | |||
1579 | unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); | |||
1580 | Type *VT = VectorType::get(EltTy, NumSrcElts); | |||
1581 | Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), | |||
1582 | PointerType::getUnqual(VT)); | |||
1583 | Value *Load = Builder.CreateAlignedLoad(Op, 1); | |||
1584 | if (NumSrcElts == 2) | |||
1585 | Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), | |||
1586 | { 0, 1, 0, 1 }); | |||
1587 | else | |||
1588 | Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), | |||
1589 | { 0, 1, 2, 3, 0, 1, 2, 3 }); | |||
1590 | } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || | |||
1591 | Name.startswith("avx512.mask.shuf.f"))) { | |||
1592 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1593 | Type *VT = CI->getType(); | |||
1594 | unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; | |||
1595 | unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); | |||
1596 | unsigned ControlBitsMask = NumLanes - 1; | |||
1597 | unsigned NumControlBits = NumLanes / 2; | |||
1598 | SmallVector<uint32_t, 8> ShuffleMask(0); | |||
1599 | ||||
1600 | for (unsigned l = 0; l != NumLanes; ++l) { | |||
1601 | unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; | |||
1602 | // We actually need the other source. | |||
1603 | if (l >= NumLanes / 2) | |||
1604 | LaneMask += NumLanes; | |||
1605 | for (unsigned i = 0; i != NumElementsInLane; ++i) | |||
1606 | ShuffleMask.push_back(LaneMask * NumElementsInLane + i); | |||
1607 | } | |||
1608 | Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), | |||
1609 | CI->getArgOperand(1), ShuffleMask); | |||
1610 | Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, | |||
1611 | CI->getArgOperand(3)); | |||
1612 | }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || | |||
1613 | Name.startswith("avx512.mask.broadcasti"))) { | |||
1614 | unsigned NumSrcElts = | |||
1615 | CI->getArgOperand(0)->getType()->getVectorNumElements(); | |||
1616 | unsigned NumDstElts = CI->getType()->getVectorNumElements(); | |||
1617 | ||||
1618 | SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); | |||
1619 | for (unsigned i = 0; i != NumDstElts; ++i) | |||
1620 | ShuffleMask[i] = i % NumSrcElts; | |||
1621 | ||||
1622 | Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), | |||
1623 | CI->getArgOperand(0), | |||
1624 | ShuffleMask); | |||
1625 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
1626 | CI->getArgOperand(1)); | |||
1627 | } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || | |||
1628 | Name.startswith("avx2.vbroadcast") || | |||
1629 | Name.startswith("avx512.pbroadcast") || | |||
1630 | Name.startswith("avx512.mask.broadcast.s"))) { | |||
1631 | // Replace vp?broadcasts with a vector shuffle. | |||
1632 | Value *Op = CI->getArgOperand(0); | |||
1633 | unsigned NumElts = CI->getType()->getVectorNumElements(); | |||
1634 | Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); | |||
1635 | Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), | |||
1636 | Constant::getNullValue(MaskTy)); | |||
1637 | ||||
1638 | if (CI->getNumArgOperands() == 3) | |||
1639 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
1640 | CI->getArgOperand(1)); | |||
1641 | } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { | |||
1642 | Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), | |||
1643 | CI->getArgOperand(1), | |||
1644 | CI->getArgOperand(2), | |||
1645 | CI->getArgOperand(3), | |||
1646 | CI->getArgOperand(4), | |||
1647 | false); | |||
1648 | } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { | |||
1649 | Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), | |||
1650 | CI->getArgOperand(1), | |||
1651 | CI->getArgOperand(2), | |||
1652 | CI->getArgOperand(3), | |||
1653 | CI->getArgOperand(4), | |||
1654 | true); | |||
1655 | } else if (IsX86 && (Name == "sse2.psll.dq" || | |||
1656 | Name == "avx2.psll.dq")) { | |||
1657 | // 128/256-bit shift left specified in bits. | |||
1658 | unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1659 | Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), | |||
1660 | Shift / 8); // Shift is in bits. | |||
1661 | } else if (IsX86 && (Name == "sse2.psrl.dq" || | |||
1662 | Name == "avx2.psrl.dq")) { | |||
1663 | // 128/256-bit shift right specified in bits. | |||
1664 | unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1665 | Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), | |||
1666 | Shift / 8); // Shift is in bits. | |||
1667 | } else if (IsX86 && (Name == "sse2.psll.dq.bs" || | |||
1668 | Name == "avx2.psll.dq.bs" || | |||
1669 | Name == "avx512.psll.dq.512")) { | |||
1670 | // 128/256/512-bit shift left specified in bytes. | |||
1671 | unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1672 | Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); | |||
1673 | } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || | |||
1674 | Name == "avx2.psrl.dq.bs" || | |||
1675 | Name == "avx512.psrl.dq.512")) { | |||
1676 | // 128/256/512-bit shift right specified in bytes. | |||
1677 | unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1678 | Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); | |||
1679 | } else if (IsX86 && (Name == "sse41.pblendw" || | |||
1680 | Name.startswith("sse41.blendp") || | |||
1681 | Name.startswith("avx.blend.p") || | |||
1682 | Name == "avx2.pblendw" || | |||
1683 | Name.startswith("avx2.pblendd."))) { | |||
1684 | Value *Op0 = CI->getArgOperand(0); | |||
1685 | Value *Op1 = CI->getArgOperand(1); | |||
1686 | unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1687 | VectorType *VecTy = cast<VectorType>(CI->getType()); | |||
1688 | unsigned NumElts = VecTy->getNumElements(); | |||
1689 | ||||
1690 | SmallVector<uint32_t, 16> Idxs(NumElts); | |||
1691 | for (unsigned i = 0; i != NumElts; ++i) | |||
1692 | Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; | |||
1693 | ||||
1694 | Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); | |||
1695 | } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || | |||
1696 | Name == "avx2.vinserti128" || | |||
1697 | Name.startswith("avx512.mask.insert"))) { | |||
1698 | Value *Op0 = CI->getArgOperand(0); | |||
1699 | Value *Op1 = CI->getArgOperand(1); | |||
1700 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1701 | unsigned DstNumElts = CI->getType()->getVectorNumElements(); | |||
1702 | unsigned SrcNumElts = Op1->getType()->getVectorNumElements(); | |||
1703 | unsigned Scale = DstNumElts / SrcNumElts; | |||
1704 | ||||
1705 | // Mask off the high bits of the immediate value; hardware ignores those. | |||
1706 | Imm = Imm % Scale; | |||
1707 | ||||
1708 | // Extend the second operand into a vector the size of the destination. | |||
1709 | Value *UndefV = UndefValue::get(Op1->getType()); | |||
1710 | SmallVector<uint32_t, 8> Idxs(DstNumElts); | |||
1711 | for (unsigned i = 0; i != SrcNumElts; ++i) | |||
1712 | Idxs[i] = i; | |||
1713 | for (unsigned i = SrcNumElts; i != DstNumElts; ++i) | |||
1714 | Idxs[i] = SrcNumElts; | |||
1715 | Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); | |||
1716 | ||||
1717 | // Insert the second operand into the first operand. | |||
1718 | ||||
1719 | // Note that there is no guarantee that instruction lowering will actually | |||
1720 | // produce a vinsertf128 instruction for the created shuffles. In | |||
1721 | // particular, the 0 immediate case involves no lane changes, so it can | |||
1722 | // be handled as a blend. | |||
1723 | ||||
1724 | // Example of shuffle mask for 32-bit elements: | |||
1725 | // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> | |||
1726 | // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > | |||
1727 | ||||
1728 | // First fill with identify mask. | |||
1729 | for (unsigned i = 0; i != DstNumElts; ++i) | |||
1730 | Idxs[i] = i; | |||
1731 | // Then replace the elements where we need to insert. | |||
1732 | for (unsigned i = 0; i != SrcNumElts; ++i) | |||
1733 | Idxs[i + Imm * SrcNumElts] = i + DstNumElts; | |||
1734 | Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); | |||
1735 | ||||
1736 | // If the intrinsic has a mask operand, handle that. | |||
1737 | if (CI->getNumArgOperands() == 5) | |||
1738 | Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, | |||
1739 | CI->getArgOperand(3)); | |||
1740 | } else if (IsX86 && (Name.startswith("avx.vextractf128.") || | |||
1741 | Name == "avx2.vextracti128" || | |||
1742 | Name.startswith("avx512.mask.vextract"))) { | |||
1743 | Value *Op0 = CI->getArgOperand(0); | |||
1744 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1745 | unsigned DstNumElts = CI->getType()->getVectorNumElements(); | |||
1746 | unsigned SrcNumElts = Op0->getType()->getVectorNumElements(); | |||
1747 | unsigned Scale = SrcNumElts / DstNumElts; | |||
1748 | ||||
1749 | // Mask off the high bits of the immediate value; hardware ignores those. | |||
1750 | Imm = Imm % Scale; | |||
1751 | ||||
1752 | // Get indexes for the subvector of the input vector. | |||
1753 | SmallVector<uint32_t, 8> Idxs(DstNumElts); | |||
1754 | for (unsigned i = 0; i != DstNumElts; ++i) { | |||
1755 | Idxs[i] = i + (Imm * DstNumElts); | |||
1756 | } | |||
1757 | Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); | |||
1758 | ||||
1759 | // If the intrinsic has a mask operand, handle that. | |||
1760 | if (CI->getNumArgOperands() == 4) | |||
1761 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1762 | CI->getArgOperand(2)); | |||
1763 | } else if (!IsX86 && Name == "stackprotectorcheck") { | |||
1764 | Rep = nullptr; | |||
1765 | } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || | |||
1766 | Name.startswith("avx512.mask.perm.di."))) { | |||
1767 | Value *Op0 = CI->getArgOperand(0); | |||
1768 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1769 | VectorType *VecTy = cast<VectorType>(CI->getType()); | |||
1770 | unsigned NumElts = VecTy->getNumElements(); | |||
1771 | ||||
1772 | SmallVector<uint32_t, 8> Idxs(NumElts); | |||
1773 | for (unsigned i = 0; i != NumElts; ++i) | |||
1774 | Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); | |||
1775 | ||||
1776 | Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); | |||
1777 | ||||
1778 | if (CI->getNumArgOperands() == 4) | |||
1779 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1780 | CI->getArgOperand(2)); | |||
1781 | } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || | |||
1782 | Name == "avx2.vperm2i128")) { | |||
1783 | // The immediate permute control byte looks like this: | |||
1784 | // [1:0] - select 128 bits from sources for low half of destination | |||
1785 | // [2] - ignore | |||
1786 | // [3] - zero low half of destination | |||
1787 | // [5:4] - select 128 bits from sources for high half of destination | |||
1788 | // [6] - ignore | |||
1789 | // [7] - zero high half of destination | |||
1790 | ||||
1791 | uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1792 | ||||
1793 | unsigned NumElts = CI->getType()->getVectorNumElements(); | |||
1794 | unsigned HalfSize = NumElts / 2; | |||
1795 | SmallVector<uint32_t, 8> ShuffleMask(NumElts); | |||
1796 | ||||
1797 | // Determine which operand(s) are actually in use for this instruction. | |||
1798 | Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); | |||
1799 | Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); | |||
1800 | ||||
1801 | // If needed, replace operands based on zero mask. | |||
1802 | V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; | |||
1803 | V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; | |||
1804 | ||||
1805 | // Permute low half of result. | |||
1806 | unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; | |||
1807 | for (unsigned i = 0; i < HalfSize; ++i) | |||
1808 | ShuffleMask[i] = StartIndex + i; | |||
1809 | ||||
1810 | // Permute high half of result. | |||
1811 | StartIndex = (Imm & 0x10) ? HalfSize : 0; | |||
1812 | for (unsigned i = 0; i < HalfSize; ++i) | |||
1813 | ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; | |||
1814 | ||||
1815 | Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); | |||
1816 | ||||
1817 | } else if (IsX86 && (Name.startswith("avx.vpermil.") || | |||
1818 | Name == "sse2.pshuf.d" || | |||
1819 | Name.startswith("avx512.mask.vpermil.p") || | |||
1820 | Name.startswith("avx512.mask.pshuf.d."))) { | |||
1821 | Value *Op0 = CI->getArgOperand(0); | |||
1822 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1823 | VectorType *VecTy = cast<VectorType>(CI->getType()); | |||
1824 | unsigned NumElts = VecTy->getNumElements(); | |||
1825 | // Calculate the size of each index in the immediate. | |||
1826 | unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); | |||
1827 | unsigned IdxMask = ((1 << IdxSize) - 1); | |||
1828 | ||||
1829 | SmallVector<uint32_t, 8> Idxs(NumElts); | |||
1830 | // Lookup the bits for this element, wrapping around the immediate every | |||
1831 | // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need | |||
1832 | // to offset by the first index of each group. | |||
1833 | for (unsigned i = 0; i != NumElts; ++i) | |||
1834 | Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); | |||
1835 | ||||
1836 | Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); | |||
1837 | ||||
1838 | if (CI->getNumArgOperands() == 4) | |||
1839 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1840 | CI->getArgOperand(2)); | |||
1841 | } else if (IsX86 && (Name == "sse2.pshufl.w" || | |||
1842 | Name.startswith("avx512.mask.pshufl.w."))) { | |||
1843 | Value *Op0 = CI->getArgOperand(0); | |||
1844 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1845 | unsigned NumElts = CI->getType()->getVectorNumElements(); | |||
1846 | ||||
1847 | SmallVector<uint32_t, 16> Idxs(NumElts); | |||
1848 | for (unsigned l = 0; l != NumElts; l += 8) { | |||
1849 | for (unsigned i = 0; i != 4; ++i) | |||
1850 | Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; | |||
1851 | for (unsigned i = 4; i != 8; ++i) | |||
1852 | Idxs[i + l] = i + l; | |||
1853 | } | |||
1854 | ||||
1855 | Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); | |||
1856 | ||||
1857 | if (CI->getNumArgOperands() == 4) | |||
1858 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1859 | CI->getArgOperand(2)); | |||
1860 | } else if (IsX86 && (Name == "sse2.pshufh.w" || | |||
1861 | Name.startswith("avx512.mask.pshufh.w."))) { | |||
1862 | Value *Op0 = CI->getArgOperand(0); | |||
1863 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); | |||
1864 | unsigned NumElts = CI->getType()->getVectorNumElements(); | |||
1865 | ||||
1866 | SmallVector<uint32_t, 16> Idxs(NumElts); | |||
1867 | for (unsigned l = 0; l != NumElts; l += 8) { | |||
1868 | for (unsigned i = 0; i != 4; ++i) | |||
1869 | Idxs[i + l] = i + l; | |||
1870 | for (unsigned i = 0; i != 4; ++i) | |||
1871 | Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; | |||
1872 | } | |||
1873 | ||||
1874 | Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); | |||
1875 | ||||
1876 | if (CI->getNumArgOperands() == 4) | |||
1877 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1878 | CI->getArgOperand(2)); | |||
1879 | } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { | |||
1880 | Value *Op0 = CI->getArgOperand(0); | |||
1881 | Value *Op1 = CI->getArgOperand(1); | |||
1882 | unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); | |||
1883 | unsigned NumElts = CI->getType()->getVectorNumElements(); | |||
1884 | ||||
1885 | unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); | |||
1886 | unsigned HalfLaneElts = NumLaneElts / 2; | |||
1887 | ||||
1888 | SmallVector<uint32_t, 16> Idxs(NumElts); | |||
1889 | for (unsigned i = 0; i != NumElts; ++i) { | |||
1890 | // Base index is the starting element of the lane. | |||
1891 | Idxs[i] = i - (i % NumLaneElts); | |||
1892 | // If we are half way through the lane switch to the other source. | |||
1893 | if ((i % NumLaneElts) >= HalfLaneElts) | |||
1894 | Idxs[i] += NumElts; | |||
1895 | // Now select the specific element. By adding HalfLaneElts bits from | |||
1896 | // the immediate. Wrapping around the immediate every 8-bits. | |||
1897 | Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); | |||
1898 | } | |||
1899 | ||||
1900 | Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); | |||
1901 | ||||
1902 | Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, | |||
1903 | CI->getArgOperand(3)); | |||
1904 | } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || | |||
1905 | Name.startswith("avx512.mask.movshdup") || | |||
1906 | Name.startswith("avx512.mask.movsldup"))) { | |||
1907 | Value *Op0 = CI->getArgOperand(0); | |||
1908 | unsigned NumElts = CI->getType()->getVectorNumElements(); | |||
1909 | unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); | |||
1910 | ||||
1911 | unsigned Offset = 0; | |||
1912 | if (Name.startswith("avx512.mask.movshdup.")) | |||
1913 | Offset = 1; | |||
1914 | ||||
1915 | SmallVector<uint32_t, 16> Idxs(NumElts); | |||
1916 | for (unsigned l = 0; l != NumElts; l += NumLaneElts) | |||
1917 | for (unsigned i = 0; i != NumLaneElts; i += 2) { | |||
1918 | Idxs[i + l + 0] = i + l + Offset; | |||
1919 | Idxs[i + l + 1] = i + l + Offset; | |||
1920 | } | |||
1921 | ||||
1922 | Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); | |||
1923 | ||||
1924 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
1925 | CI->getArgOperand(1)); | |||
1926 | } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || | |||
1927 | Name.startswith("avx512.mask.unpckl."))) { | |||
1928 | Value *Op0 = CI->getArgOperand(0); | |||
1929 | Value *Op1 = CI->getArgOperand(1); | |||
1930 | int NumElts = CI->getType()->getVectorNumElements(); | |||
1931 | int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); | |||
1932 | ||||
1933 | SmallVector<uint32_t, 64> Idxs(NumElts); | |||
1934 | for (int l = 0; l != NumElts; l += NumLaneElts) | |||
1935 | for (int i = 0; i != NumLaneElts; ++i) | |||
1936 | Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); | |||
1937 | ||||
1938 | Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); | |||
1939 | ||||
1940 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1941 | CI->getArgOperand(2)); | |||
1942 | } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || | |||
1943 | Name.startswith("avx512.mask.unpckh."))) { | |||
1944 | Value *Op0 = CI->getArgOperand(0); | |||
1945 | Value *Op1 = CI->getArgOperand(1); | |||
1946 | int NumElts = CI->getType()->getVectorNumElements(); | |||
1947 | int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); | |||
1948 | ||||
1949 | SmallVector<uint32_t, 64> Idxs(NumElts); | |||
1950 | for (int l = 0; l != NumElts; l += NumLaneElts) | |||
1951 | for (int i = 0; i != NumLaneElts; ++i) | |||
1952 | Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); | |||
1953 | ||||
1954 | Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); | |||
1955 | ||||
1956 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1957 | CI->getArgOperand(2)); | |||
1958 | } else if (IsX86 && Name.startswith("avx512.mask.pand.")) { | |||
1959 | Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
1960 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1961 | CI->getArgOperand(2)); | |||
1962 | } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) { | |||
1963 | Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)), | |||
1964 | CI->getArgOperand(1)); | |||
1965 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1966 | CI->getArgOperand(2)); | |||
1967 | } else if (IsX86 && Name.startswith("avx512.mask.por.")) { | |||
1968 | Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
1969 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1970 | CI->getArgOperand(2)); | |||
1971 | } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) { | |||
1972 | Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
1973 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1974 | CI->getArgOperand(2)); | |||
1975 | } else if (IsX86 && Name.startswith("avx512.mask.and.")) { | |||
1976 | VectorType *FTy = cast<VectorType>(CI->getType()); | |||
1977 | VectorType *ITy = VectorType::getInteger(FTy); | |||
1978 | Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), | |||
1979 | Builder.CreateBitCast(CI->getArgOperand(1), ITy)); | |||
1980 | Rep = Builder.CreateBitCast(Rep, FTy); | |||
1981 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1982 | CI->getArgOperand(2)); | |||
1983 | } else if (IsX86 && Name.startswith("avx512.mask.andn.")) { | |||
1984 | VectorType *FTy = cast<VectorType>(CI->getType()); | |||
1985 | VectorType *ITy = VectorType::getInteger(FTy); | |||
1986 | Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); | |||
1987 | Rep = Builder.CreateAnd(Rep, | |||
1988 | Builder.CreateBitCast(CI->getArgOperand(1), ITy)); | |||
1989 | Rep = Builder.CreateBitCast(Rep, FTy); | |||
1990 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1991 | CI->getArgOperand(2)); | |||
1992 | } else if (IsX86 && Name.startswith("avx512.mask.or.")) { | |||
1993 | VectorType *FTy = cast<VectorType>(CI->getType()); | |||
1994 | VectorType *ITy = VectorType::getInteger(FTy); | |||
1995 | Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), | |||
1996 | Builder.CreateBitCast(CI->getArgOperand(1), ITy)); | |||
1997 | Rep = Builder.CreateBitCast(Rep, FTy); | |||
1998 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
1999 | CI->getArgOperand(2)); | |||
2000 | } else if (IsX86 && Name.startswith("avx512.mask.xor.")) { | |||
2001 | VectorType *FTy = cast<VectorType>(CI->getType()); | |||
2002 | VectorType *ITy = VectorType::getInteger(FTy); | |||
2003 | Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), | |||
2004 | Builder.CreateBitCast(CI->getArgOperand(1), ITy)); | |||
2005 | Rep = Builder.CreateBitCast(Rep, FTy); | |||
2006 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2007 | CI->getArgOperand(2)); | |||
2008 | } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { | |||
2009 | Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2010 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2011 | CI->getArgOperand(2)); | |||
2012 | } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { | |||
2013 | Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2014 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2015 | CI->getArgOperand(2)); | |||
2016 | } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { | |||
2017 | Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2018 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2019 | CI->getArgOperand(2)); | |||
2020 | } else if (IsX86 && (Name.startswith("avx512.mask.add.p"))) { | |||
2021 | Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2022 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2023 | CI->getArgOperand(2)); | |||
2024 | } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { | |||
2025 | Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2026 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2027 | CI->getArgOperand(2)); | |||
2028 | } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { | |||
2029 | Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2030 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2031 | CI->getArgOperand(2)); | |||
2032 | } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { | |||
2033 | Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); | |||
2034 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2035 | CI->getArgOperand(2)); | |||
2036 | } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { | |||
2037 | Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), | |||
2038 | Intrinsic::ctlz, | |||
2039 | CI->getType()), | |||
2040 | { CI->getArgOperand(0), Builder.getInt1(false) }); | |||
2041 | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | |||
2042 | CI->getArgOperand(1)); | |||
2043 | } else if (IsX86 && Name.startswith("avx512.mask.psll")) { | |||
2044 | bool IsImmediate = Name[16] == 'i' || | |||
2045 | (Name.size() > 18 && Name[18] == 'i'); | |||
2046 | bool IsVariable = Name[16] == 'v'; | |||
2047 | char Size = Name[16] == '.' ? Name[17] : | |||
2048 | Name[17] == '.' ? Name[18] : | |||
2049 | Name[18] == '.' ? Name[19] : | |||
2050 | Name[20]; | |||
2051 | ||||
2052 | Intrinsic::ID IID; | |||
2053 | if (IsVariable && Name[17] != '.') { | |||
2054 | if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di | |||
2055 | IID = Intrinsic::x86_avx2_psllv_q; | |||
2056 | else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di | |||
2057 | IID = Intrinsic::x86_avx2_psllv_q_256; | |||
2058 | else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si | |||
2059 | IID = Intrinsic::x86_avx2_psllv_d; | |||
2060 | else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si | |||
2061 | IID = Intrinsic::x86_avx2_psllv_d_256; | |||
2062 | else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi | |||
2063 | IID = Intrinsic::x86_avx512_psllv_w_128; | |||
2064 | else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi | |||
2065 | IID = Intrinsic::x86_avx512_psllv_w_256; | |||
2066 | else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi | |||
2067 | IID = Intrinsic::x86_avx512_psllv_w_512; | |||
2068 | else | |||
2069 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2069); | |||
2070 | } else if (Name.endswith(".128")) { | |||
2071 | if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 | |||
2072 | IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d | |||
2073 | : Intrinsic::x86_sse2_psll_d; | |||
2074 | else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 | |||
2075 | IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q | |||
2076 | : Intrinsic::x86_sse2_psll_q; | |||
2077 | else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 | |||
2078 | IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w | |||
2079 | : Intrinsic::x86_sse2_psll_w; | |||
2080 | else | |||
2081 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2081); | |||
2082 | } else if (Name.endswith(".256")) { | |||
2083 | if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 | |||
2084 | IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d | |||
2085 | : Intrinsic::x86_avx2_psll_d; | |||
2086 | else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 | |||
2087 | IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q | |||
2088 | : Intrinsic::x86_avx2_psll_q; | |||
2089 | else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 | |||
2090 | IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w | |||
2091 | : Intrinsic::x86_avx2_psll_w; | |||
2092 | else | |||
2093 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2093); | |||
2094 | } else { | |||
2095 | if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 | |||
2096 | IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : | |||
2097 | IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : | |||
2098 | Intrinsic::x86_avx512_psll_d_512; | |||
2099 | else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 | |||
2100 | IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : | |||
2101 | IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : | |||
2102 | Intrinsic::x86_avx512_psll_q_512; | |||
2103 | else if (Size == 'w') // psll.wi.512, pslli.w, psll.w | |||
2104 | IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 | |||
2105 | : Intrinsic::x86_avx512_psll_w_512; | |||
2106 | else | |||
2107 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2107); | |||
2108 | } | |||
2109 | ||||
2110 | Rep = UpgradeX86MaskedShift(Builder, *CI, IID); | |||
2111 | } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { | |||
2112 | bool IsImmediate = Name[16] == 'i' || | |||
2113 | (Name.size() > 18 && Name[18] == 'i'); | |||
2114 | bool IsVariable = Name[16] == 'v'; | |||
2115 | char Size = Name[16] == '.' ? Name[17] : | |||
2116 | Name[17] == '.' ? Name[18] : | |||
2117 | Name[18] == '.' ? Name[19] : | |||
2118 | Name[20]; | |||
2119 | ||||
2120 | Intrinsic::ID IID; | |||
2121 | if (IsVariable && Name[17] != '.') { | |||
2122 | if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di | |||
2123 | IID = Intrinsic::x86_avx2_psrlv_q; | |||
2124 | else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di | |||
2125 | IID = Intrinsic::x86_avx2_psrlv_q_256; | |||
2126 | else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si | |||
2127 | IID = Intrinsic::x86_avx2_psrlv_d; | |||
2128 | else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si | |||
2129 | IID = Intrinsic::x86_avx2_psrlv_d_256; | |||
2130 | else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi | |||
2131 | IID = Intrinsic::x86_avx512_psrlv_w_128; | |||
2132 | else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi | |||
2133 | IID = Intrinsic::x86_avx512_psrlv_w_256; | |||
2134 | else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi | |||
2135 | IID = Intrinsic::x86_avx512_psrlv_w_512; | |||
2136 | else | |||
2137 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2137); | |||
2138 | } else if (Name.endswith(".128")) { | |||
2139 | if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 | |||
2140 | IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d | |||
2141 | : Intrinsic::x86_sse2_psrl_d; | |||
2142 | else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 | |||
2143 | IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q | |||
2144 | : Intrinsic::x86_sse2_psrl_q; | |||
2145 | else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 | |||
2146 | IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w | |||
2147 | : Intrinsic::x86_sse2_psrl_w; | |||
2148 | else | |||
2149 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2149); | |||
2150 | } else if (Name.endswith(".256")) { | |||
2151 | if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 | |||
2152 | IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d | |||
2153 | : Intrinsic::x86_avx2_psrl_d; | |||
2154 | else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 | |||
2155 | IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q | |||
2156 | : Intrinsic::x86_avx2_psrl_q; | |||
2157 | else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 | |||
2158 | IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w | |||
2159 | : Intrinsic::x86_avx2_psrl_w; | |||
2160 | else | |||
2161 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2161); | |||
2162 | } else { | |||
2163 | if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 | |||
2164 | IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : | |||
2165 | IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : | |||
2166 | Intrinsic::x86_avx512_psrl_d_512; | |||
2167 | else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 | |||
2168 | IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : | |||
2169 | IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : | |||
2170 | Intrinsic::x86_avx512_psrl_q_512; | |||
2171 | else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) | |||
2172 | IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 | |||
2173 | : Intrinsic::x86_avx512_psrl_w_512; | |||
2174 | else | |||
2175 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2175); | |||
2176 | } | |||
2177 | ||||
2178 | Rep = UpgradeX86MaskedShift(Builder, *CI, IID); | |||
2179 | } else if (IsX86 && Name.startswith("avx512.mask.psra")) { | |||
2180 | bool IsImmediate = Name[16] == 'i' || | |||
2181 | (Name.size() > 18 && Name[18] == 'i'); | |||
2182 | bool IsVariable = Name[16] == 'v'; | |||
2183 | char Size = Name[16] == '.' ? Name[17] : | |||
2184 | Name[17] == '.' ? Name[18] : | |||
2185 | Name[18] == '.' ? Name[19] : | |||
2186 | Name[20]; | |||
2187 | ||||
2188 | Intrinsic::ID IID; | |||
2189 | if (IsVariable && Name[17] != '.') { | |||
2190 | if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si | |||
2191 | IID = Intrinsic::x86_avx2_psrav_d; | |||
2192 | else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si | |||
2193 | IID = Intrinsic::x86_avx2_psrav_d_256; | |||
2194 | else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi | |||
2195 | IID = Intrinsic::x86_avx512_psrav_w_128; | |||
2196 | else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi | |||
2197 | IID = Intrinsic::x86_avx512_psrav_w_256; | |||
2198 | else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi | |||
2199 | IID = Intrinsic::x86_avx512_psrav_w_512; | |||
2200 | else | |||
2201 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2201); | |||
2202 | } else if (Name.endswith(".128")) { | |||
2203 | if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 | |||
2204 | IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d | |||
2205 | : Intrinsic::x86_sse2_psra_d; | |||
2206 | else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 | |||
2207 | IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : | |||
2208 | IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : | |||
2209 | Intrinsic::x86_avx512_psra_q_128; | |||
2210 | else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 | |||
2211 | IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w | |||
2212 | : Intrinsic::x86_sse2_psra_w; | |||
2213 | else | |||
2214 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2214); | |||
2215 | } else if (Name.endswith(".256")) { | |||
2216 | if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 | |||
2217 | IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d | |||
2218 | : Intrinsic::x86_avx2_psra_d; | |||
2219 | else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 | |||
2220 | IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : | |||
2221 | IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : | |||
2222 | Intrinsic::x86_avx512_psra_q_256; | |||
2223 | else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 | |||
2224 | IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w | |||
2225 | : Intrinsic::x86_avx2_psra_w; | |||
2226 | else | |||
2227 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2227); | |||
2228 | } else { | |||
2229 | if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 | |||
2230 | IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : | |||
2231 | IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : | |||
2232 | Intrinsic::x86_avx512_psra_d_512; | |||
2233 | else if (Size == 'q') // psra.qi.512, psrai.q, psra.q | |||
2234 | IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : | |||
2235 | IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : | |||
2236 | Intrinsic::x86_avx512_psra_q_512; | |||
2237 | else if (Size == 'w') // psra.wi.512, psrai.w, psra.w | |||
2238 | IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 | |||
2239 | : Intrinsic::x86_avx512_psra_w_512; | |||
2240 | else | |||
2241 | llvm_unreachable("Unexpected size")::llvm::llvm_unreachable_internal("Unexpected size", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2241); | |||
2242 | } | |||
2243 | ||||
2244 | Rep = UpgradeX86MaskedShift(Builder, *CI, IID); | |||
2245 | } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { | |||
2246 | Rep = upgradeMaskedMove(Builder, *CI); | |||
2247 | } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { | |||
2248 | Rep = UpgradeMaskToInt(Builder, *CI); | |||
2249 | } else if (IsX86 && Name.endswith(".movntdqa")) { | |||
2250 | Module *M = F->getParent(); | |||
2251 | MDNode *Node = MDNode::get( | |||
2252 | C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); | |||
2253 | ||||
2254 | Value *Ptr = CI->getArgOperand(0); | |||
2255 | VectorType *VTy = cast<VectorType>(CI->getType()); | |||
2256 | ||||
2257 | // Convert the type of the pointer to a pointer to the stored type. | |||
2258 | Value *BC = | |||
2259 | Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast"); | |||
2260 | LoadInst *LI = Builder.CreateAlignedLoad(BC, VTy->getBitWidth() / 8); | |||
2261 | LI->setMetadata(M->getMDKindID("nontemporal"), Node); | |||
2262 | Rep = LI; | |||
2263 | } else if (IsX86 && | |||
2264 | (Name.startswith("sse2.pavg") || Name.startswith("avx2.pavg") || | |||
2265 | Name.startswith("avx512.mask.pavg"))) { | |||
2266 | // llvm.x86.sse2.pavg.b/w, llvm.x86.avx2.pavg.b/w, | |||
2267 | // llvm.x86.avx512.mask.pavg.b/w | |||
2268 | Value *A = CI->getArgOperand(0); | |||
2269 | Value *B = CI->getArgOperand(1); | |||
2270 | VectorType *ZextType = VectorType::getExtendedElementVectorType( | |||
2271 | cast<VectorType>(A->getType())); | |||
2272 | Value *ExtendedA = Builder.CreateZExt(A, ZextType); | |||
2273 | Value *ExtendedB = Builder.CreateZExt(B, ZextType); | |||
2274 | Value *Sum = Builder.CreateAdd(ExtendedA, ExtendedB); | |||
2275 | Value *AddOne = Builder.CreateAdd(Sum, ConstantInt::get(ZextType, 1)); | |||
2276 | Value *ShiftR = Builder.CreateLShr(AddOne, ConstantInt::get(ZextType, 1)); | |||
2277 | Rep = Builder.CreateTrunc(ShiftR, A->getType()); | |||
2278 | if (CI->getNumArgOperands() > 2) { | |||
2279 | Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, | |||
2280 | CI->getArgOperand(2)); | |||
2281 | } | |||
2282 | } else if (IsX86 && Name.startswith("avx512.mask.") && | |||
2283 | upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { | |||
2284 | // Rep will be updated by the call in the condition. | |||
2285 | } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { | |||
2286 | Value *Arg = CI->getArgOperand(0); | |||
2287 | Value *Neg = Builder.CreateNeg(Arg, "neg"); | |||
2288 | Value *Cmp = Builder.CreateICmpSGE( | |||
2289 | Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); | |||
2290 | Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); | |||
2291 | } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || | |||
2292 | Name == "max.ui" || Name == "max.ull")) { | |||
2293 | Value *Arg0 = CI->getArgOperand(0); | |||
2294 | Value *Arg1 = CI->getArgOperand(1); | |||
2295 | Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") | |||
2296 | ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") | |||
2297 | : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); | |||
2298 | Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); | |||
2299 | } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || | |||
2300 | Name == "min.ui" || Name == "min.ull")) { | |||
2301 | Value *Arg0 = CI->getArgOperand(0); | |||
2302 | Value *Arg1 = CI->getArgOperand(1); | |||
2303 | Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") | |||
2304 | ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") | |||
2305 | : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); | |||
2306 | Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); | |||
2307 | } else if (IsNVVM && Name == "clz.ll") { | |||
2308 | // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. | |||
2309 | Value *Arg = CI->getArgOperand(0); | |||
2310 | Value *Ctlz = Builder.CreateCall( | |||
2311 | Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, | |||
2312 | {Arg->getType()}), | |||
2313 | {Arg, Builder.getFalse()}, "ctlz"); | |||
2314 | Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); | |||
2315 | } else if (IsNVVM && Name == "popc.ll") { | |||
2316 | // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an | |||
2317 | // i64. | |||
2318 | Value *Arg = CI->getArgOperand(0); | |||
2319 | Value *Popc = Builder.CreateCall( | |||
2320 | Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, | |||
2321 | {Arg->getType()}), | |||
2322 | Arg, "ctpop"); | |||
2323 | Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); | |||
2324 | } else if (IsNVVM && Name == "h2f") { | |||
2325 | Rep = Builder.CreateCall(Intrinsic::getDeclaration( | |||
2326 | F->getParent(), Intrinsic::convert_from_fp16, | |||
2327 | {Builder.getFloatTy()}), | |||
2328 | CI->getArgOperand(0), "h2f"); | |||
2329 | } else { | |||
2330 | llvm_unreachable("Unknown function for CallInst upgrade.")::llvm::llvm_unreachable_internal("Unknown function for CallInst upgrade." , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2330); | |||
2331 | } | |||
2332 | ||||
2333 | if (Rep) | |||
2334 | CI->replaceAllUsesWith(Rep); | |||
2335 | CI->eraseFromParent(); | |||
2336 | return; | |||
2337 | } | |||
2338 | ||||
2339 | const auto &DefaultCase = [&NewFn, &CI]() -> void { | |||
2340 | // Handle generic mangling change, but nothing else | |||
2341 | assert((static_cast <bool> ((CI->getCalledFunction()->getName () != NewFn->getName()) && "Unknown function for CallInst upgrade and isn't just a name change" ) ? void (0) : __assert_fail ("(CI->getCalledFunction()->getName() != NewFn->getName()) && \"Unknown function for CallInst upgrade and isn't just a name change\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2343, __extension__ __PRETTY_FUNCTION__)) | |||
2342 | (CI->getCalledFunction()->getName() != NewFn->getName()) &&(static_cast <bool> ((CI->getCalledFunction()->getName () != NewFn->getName()) && "Unknown function for CallInst upgrade and isn't just a name change" ) ? void (0) : __assert_fail ("(CI->getCalledFunction()->getName() != NewFn->getName()) && \"Unknown function for CallInst upgrade and isn't just a name change\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2343, __extension__ __PRETTY_FUNCTION__)) | |||
2343 | "Unknown function for CallInst upgrade and isn't just a name change")(static_cast <bool> ((CI->getCalledFunction()->getName () != NewFn->getName()) && "Unknown function for CallInst upgrade and isn't just a name change" ) ? void (0) : __assert_fail ("(CI->getCalledFunction()->getName() != NewFn->getName()) && \"Unknown function for CallInst upgrade and isn't just a name change\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2343, __extension__ __PRETTY_FUNCTION__)); | |||
2344 | CI->setCalledFunction(NewFn); | |||
2345 | }; | |||
2346 | CallInst *NewCall = nullptr; | |||
2347 | switch (NewFn->getIntrinsicID()) { | |||
2348 | default: { | |||
2349 | DefaultCase(); | |||
2350 | return; | |||
2351 | } | |||
2352 | ||||
2353 | case Intrinsic::arm_neon_vld1: | |||
2354 | case Intrinsic::arm_neon_vld2: | |||
2355 | case Intrinsic::arm_neon_vld3: | |||
2356 | case Intrinsic::arm_neon_vld4: | |||
2357 | case Intrinsic::arm_neon_vld2lane: | |||
2358 | case Intrinsic::arm_neon_vld3lane: | |||
2359 | case Intrinsic::arm_neon_vld4lane: | |||
2360 | case Intrinsic::arm_neon_vst1: | |||
2361 | case Intrinsic::arm_neon_vst2: | |||
2362 | case Intrinsic::arm_neon_vst3: | |||
2363 | case Intrinsic::arm_neon_vst4: | |||
2364 | case Intrinsic::arm_neon_vst2lane: | |||
2365 | case Intrinsic::arm_neon_vst3lane: | |||
2366 | case Intrinsic::arm_neon_vst4lane: { | |||
2367 | SmallVector<Value *, 4> Args(CI->arg_operands().begin(), | |||
2368 | CI->arg_operands().end()); | |||
2369 | NewCall = Builder.CreateCall(NewFn, Args); | |||
2370 | break; | |||
2371 | } | |||
2372 | ||||
2373 | case Intrinsic::bitreverse: | |||
2374 | NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); | |||
2375 | break; | |||
2376 | ||||
2377 | case Intrinsic::ctlz: | |||
2378 | case Intrinsic::cttz: | |||
2379 | assert(CI->getNumArgOperands() == 1 &&(static_cast <bool> (CI->getNumArgOperands() == 1 && "Mismatch between function args and call args") ? void (0) : __assert_fail ("CI->getNumArgOperands() == 1 && \"Mismatch between function args and call args\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2380, __extension__ __PRETTY_FUNCTION__)) | |||
2380 | "Mismatch between function args and call args")(static_cast <bool> (CI->getNumArgOperands() == 1 && "Mismatch between function args and call args") ? void (0) : __assert_fail ("CI->getNumArgOperands() == 1 && \"Mismatch between function args and call args\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2380, __extension__ __PRETTY_FUNCTION__)); | |||
2381 | NewCall = | |||
2382 | Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); | |||
2383 | break; | |||
2384 | ||||
2385 | case Intrinsic::objectsize: { | |||
2386 | Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 | |||
2387 | ? Builder.getFalse() | |||
2388 | : CI->getArgOperand(2); | |||
2389 | NewCall = Builder.CreateCall( | |||
2390 | NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize}); | |||
2391 | break; | |||
2392 | } | |||
2393 | ||||
2394 | case Intrinsic::ctpop: | |||
2395 | NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); | |||
2396 | break; | |||
2397 | ||||
2398 | case Intrinsic::convert_from_fp16: | |||
2399 | NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); | |||
2400 | break; | |||
2401 | ||||
2402 | case Intrinsic::dbg_value: | |||
2403 | // Upgrade from the old version that had an extra offset argument. | |||
2404 | assert(CI->getNumArgOperands() == 4)(static_cast <bool> (CI->getNumArgOperands() == 4) ? void (0) : __assert_fail ("CI->getNumArgOperands() == 4", "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2404, __extension__ __PRETTY_FUNCTION__)); | |||
2405 | // Drop nonzero offsets instead of attempting to upgrade them. | |||
2406 | if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) | |||
2407 | if (Offset->isZeroValue()) { | |||
2408 | NewCall = Builder.CreateCall( | |||
2409 | NewFn, | |||
2410 | {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); | |||
2411 | break; | |||
2412 | } | |||
2413 | CI->eraseFromParent(); | |||
2414 | return; | |||
2415 | ||||
2416 | case Intrinsic::x86_xop_vfrcz_ss: | |||
2417 | case Intrinsic::x86_xop_vfrcz_sd: | |||
2418 | NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); | |||
2419 | break; | |||
2420 | ||||
2421 | case Intrinsic::x86_xop_vpermil2pd: | |||
2422 | case Intrinsic::x86_xop_vpermil2ps: | |||
2423 | case Intrinsic::x86_xop_vpermil2pd_256: | |||
2424 | case Intrinsic::x86_xop_vpermil2ps_256: { | |||
2425 | SmallVector<Value *, 4> Args(CI->arg_operands().begin(), | |||
2426 | CI->arg_operands().end()); | |||
2427 | VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); | |||
2428 | VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); | |||
2429 | Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); | |||
2430 | NewCall = Builder.CreateCall(NewFn, Args); | |||
2431 | break; | |||
2432 | } | |||
2433 | ||||
2434 | case Intrinsic::x86_sse41_ptestc: | |||
2435 | case Intrinsic::x86_sse41_ptestz: | |||
2436 | case Intrinsic::x86_sse41_ptestnzc: { | |||
2437 | // The arguments for these intrinsics used to be v4f32, and changed | |||
2438 | // to v2i64. This is purely a nop, since those are bitwise intrinsics. | |||
2439 | // So, the only thing required is a bitcast for both arguments. | |||
2440 | // First, check the arguments have the old type. | |||
2441 | Value *Arg0 = CI->getArgOperand(0); | |||
2442 | if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) | |||
2443 | return; | |||
2444 | ||||
2445 | // Old intrinsic, add bitcasts | |||
2446 | Value *Arg1 = CI->getArgOperand(1); | |||
2447 | ||||
2448 | Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); | |||
2449 | ||||
2450 | Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); | |||
2451 | Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); | |||
2452 | ||||
2453 | NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); | |||
2454 | break; | |||
2455 | } | |||
2456 | ||||
2457 | case Intrinsic::x86_sse41_insertps: | |||
2458 | case Intrinsic::x86_sse41_dppd: | |||
2459 | case Intrinsic::x86_sse41_dpps: | |||
2460 | case Intrinsic::x86_sse41_mpsadbw: | |||
2461 | case Intrinsic::x86_avx_dp_ps_256: | |||
2462 | case Intrinsic::x86_avx2_mpsadbw: { | |||
2463 | // Need to truncate the last argument from i32 to i8 -- this argument models | |||
2464 | // an inherently 8-bit immediate operand to these x86 instructions. | |||
2465 | SmallVector<Value *, 4> Args(CI->arg_operands().begin(), | |||
2466 | CI->arg_operands().end()); | |||
2467 | ||||
2468 | // Replace the last argument with a trunc. | |||
2469 | Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); | |||
2470 | NewCall = Builder.CreateCall(NewFn, Args); | |||
2471 | break; | |||
2472 | } | |||
2473 | ||||
2474 | case Intrinsic::x86_avx512_mask_cmp_pd_128: | |||
2475 | case Intrinsic::x86_avx512_mask_cmp_pd_256: | |||
2476 | case Intrinsic::x86_avx512_mask_cmp_pd_512: | |||
2477 | case Intrinsic::x86_avx512_mask_cmp_ps_128: | |||
2478 | case Intrinsic::x86_avx512_mask_cmp_ps_256: | |||
2479 | case Intrinsic::x86_avx512_mask_cmp_ps_512: { | |||
2480 | SmallVector<Value *, 4> Args; | |||
2481 | Args.push_back(CI->getArgOperand(0)); | |||
2482 | Args.push_back(CI->getArgOperand(1)); | |||
2483 | Args.push_back(CI->getArgOperand(2)); | |||
2484 | if (CI->getNumArgOperands() == 5) | |||
2485 | Args.push_back(CI->getArgOperand(4)); | |||
2486 | ||||
2487 | NewCall = Builder.CreateCall(NewFn, Args); | |||
2488 | unsigned NumElts = Args[0]->getType()->getVectorNumElements(); | |||
2489 | Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall, CI->getArgOperand(3), | |||
2490 | NumElts); | |||
2491 | ||||
2492 | std::string Name = CI->getName(); | |||
2493 | if (!Name.empty()) { | |||
2494 | CI->setName(Name + ".old"); | |||
2495 | NewCall->setName(Name); | |||
2496 | } | |||
2497 | CI->replaceAllUsesWith(Res); | |||
2498 | CI->eraseFromParent(); | |||
2499 | return; | |||
2500 | } | |||
2501 | ||||
2502 | case Intrinsic::thread_pointer: { | |||
2503 | NewCall = Builder.CreateCall(NewFn, {}); | |||
2504 | break; | |||
2505 | } | |||
2506 | ||||
2507 | case Intrinsic::invariant_start: | |||
2508 | case Intrinsic::invariant_end: | |||
2509 | case Intrinsic::masked_load: | |||
2510 | case Intrinsic::masked_store: | |||
2511 | case Intrinsic::masked_gather: | |||
2512 | case Intrinsic::masked_scatter: { | |||
2513 | SmallVector<Value *, 4> Args(CI->arg_operands().begin(), | |||
2514 | CI->arg_operands().end()); | |||
2515 | NewCall = Builder.CreateCall(NewFn, Args); | |||
2516 | break; | |||
2517 | } | |||
2518 | ||||
2519 | case Intrinsic::memcpy: | |||
2520 | case Intrinsic::memmove: | |||
2521 | case Intrinsic::memset: { | |||
2522 | // We have to make sure that the call signature is what we're expecting. | |||
2523 | // We only want to change the old signatures by removing the alignment arg: | |||
2524 | // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) | |||
2525 | // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) | |||
2526 | // @llvm.memset...(i8*, i8, i[32|64], i32, i1) | |||
2527 | // -> @llvm.memset...(i8*, i8, i[32|64], i1) | |||
2528 | // Note: i8*'s in the above can be any pointer type | |||
2529 | if (CI->getNumArgOperands() != 5) { | |||
2530 | DefaultCase(); | |||
2531 | return; | |||
2532 | } | |||
2533 | // Remove alignment argument (3), and add alignment attributes to the | |||
2534 | // dest/src pointers. | |||
2535 | Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), | |||
2536 | CI->getArgOperand(2), CI->getArgOperand(4)}; | |||
2537 | NewCall = Builder.CreateCall(NewFn, Args); | |||
2538 | auto *MemCI = cast<MemIntrinsic>(NewCall); | |||
2539 | // All mem intrinsics support dest alignment. | |||
2540 | const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); | |||
2541 | MemCI->setDestAlignment(Align->getZExtValue()); | |||
2542 | // Memcpy/Memmove also support source alignment. | |||
2543 | if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) | |||
2544 | MTI->setSourceAlignment(Align->getZExtValue()); | |||
2545 | break; | |||
2546 | } | |||
2547 | } | |||
2548 | assert(NewCall && "Should have either set this variable or returned through "(static_cast <bool> (NewCall && "Should have either set this variable or returned through " "the default case") ? void (0) : __assert_fail ("NewCall && \"Should have either set this variable or returned through \" \"the default case\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2549, __extension__ __PRETTY_FUNCTION__)) | |||
2549 | "the default case")(static_cast <bool> (NewCall && "Should have either set this variable or returned through " "the default case") ? void (0) : __assert_fail ("NewCall && \"Should have either set this variable or returned through \" \"the default case\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2549, __extension__ __PRETTY_FUNCTION__)); | |||
2550 | std::string Name = CI->getName(); | |||
2551 | if (!Name.empty()) { | |||
2552 | CI->setName(Name + ".old"); | |||
2553 | NewCall->setName(Name); | |||
2554 | } | |||
2555 | CI->replaceAllUsesWith(NewCall); | |||
2556 | CI->eraseFromParent(); | |||
2557 | } | |||
2558 | ||||
2559 | void llvm::UpgradeCallsToIntrinsic(Function *F) { | |||
2560 | assert(F && "Illegal attempt to upgrade a non-existent intrinsic.")(static_cast <bool> (F && "Illegal attempt to upgrade a non-existent intrinsic." ) ? void (0) : __assert_fail ("F && \"Illegal attempt to upgrade a non-existent intrinsic.\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2560, __extension__ __PRETTY_FUNCTION__)); | |||
2561 | ||||
2562 | // Check if this function should be upgraded and get the replacement function | |||
2563 | // if there is one. | |||
2564 | Function *NewFn; | |||
2565 | if (UpgradeIntrinsicFunction(F, NewFn)) { | |||
2566 | // Replace all users of the old function with the new function or new | |||
2567 | // instructions. This is not a range loop because the call is deleted. | |||
2568 | for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) | |||
2569 | if (CallInst *CI = dyn_cast<CallInst>(*UI++)) | |||
2570 | UpgradeIntrinsicCall(CI, NewFn); | |||
2571 | ||||
2572 | // Remove old function, no longer used, from the module. | |||
2573 | F->eraseFromParent(); | |||
2574 | } | |||
2575 | } | |||
2576 | ||||
2577 | MDNode *llvm::UpgradeTBAANode(MDNode &MD) { | |||
2578 | // Check if the tag uses struct-path aware TBAA format. | |||
2579 | if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) | |||
2580 | return &MD; | |||
2581 | ||||
2582 | auto &Context = MD.getContext(); | |||
2583 | if (MD.getNumOperands() == 3) { | |||
2584 | Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; | |||
2585 | MDNode *ScalarType = MDNode::get(Context, Elts); | |||
2586 | // Create a MDNode <ScalarType, ScalarType, offset 0, const> | |||
2587 | Metadata *Elts2[] = {ScalarType, ScalarType, | |||
2588 | ConstantAsMetadata::get( | |||
2589 | Constant::getNullValue(Type::getInt64Ty(Context))), | |||
2590 | MD.getOperand(2)}; | |||
2591 | return MDNode::get(Context, Elts2); | |||
2592 | } | |||
2593 | // Create a MDNode <MD, MD, offset 0> | |||
2594 | Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( | |||
2595 | Type::getInt64Ty(Context)))}; | |||
2596 | return MDNode::get(Context, Elts); | |||
2597 | } | |||
2598 | ||||
2599 | Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, | |||
2600 | Instruction *&Temp) { | |||
2601 | if (Opc != Instruction::BitCast) | |||
2602 | return nullptr; | |||
2603 | ||||
2604 | Temp = nullptr; | |||
2605 | Type *SrcTy = V->getType(); | |||
2606 | if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && | |||
2607 | SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { | |||
2608 | LLVMContext &Context = V->getContext(); | |||
2609 | ||||
2610 | // We have no information about target data layout, so we assume that | |||
2611 | // the maximum pointer size is 64bit. | |||
2612 | Type *MidTy = Type::getInt64Ty(Context); | |||
2613 | Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); | |||
2614 | ||||
2615 | return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); | |||
2616 | } | |||
2617 | ||||
2618 | return nullptr; | |||
2619 | } | |||
2620 | ||||
2621 | Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { | |||
2622 | if (Opc != Instruction::BitCast) | |||
2623 | return nullptr; | |||
2624 | ||||
2625 | Type *SrcTy = C->getType(); | |||
2626 | if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && | |||
2627 | SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { | |||
2628 | LLVMContext &Context = C->getContext(); | |||
2629 | ||||
2630 | // We have no information about target data layout, so we assume that | |||
2631 | // the maximum pointer size is 64bit. | |||
2632 | Type *MidTy = Type::getInt64Ty(Context); | |||
2633 | ||||
2634 | return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), | |||
2635 | DestTy); | |||
2636 | } | |||
2637 | ||||
2638 | return nullptr; | |||
2639 | } | |||
2640 | ||||
2641 | /// Check the debug info version number, if it is out-dated, drop the debug | |||
2642 | /// info. Return true if module is modified. | |||
2643 | bool llvm::UpgradeDebugInfo(Module &M) { | |||
2644 | unsigned Version = getDebugMetadataVersionFromModule(M); | |||
2645 | if (Version == DEBUG_METADATA_VERSION) { | |||
2646 | bool BrokenDebugInfo = false; | |||
2647 | if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) | |||
2648 | report_fatal_error("Broken module found, compilation aborted!"); | |||
2649 | if (!BrokenDebugInfo) | |||
2650 | // Everything is ok. | |||
2651 | return false; | |||
2652 | else { | |||
2653 | // Diagnose malformed debug info. | |||
2654 | DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); | |||
2655 | M.getContext().diagnose(Diag); | |||
2656 | } | |||
2657 | } | |||
2658 | bool Modified = StripDebugInfo(M); | |||
2659 | if (Modified && Version != DEBUG_METADATA_VERSION) { | |||
2660 | // Diagnose a version mismatch. | |||
2661 | DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); | |||
2662 | M.getContext().diagnose(DiagVersion); | |||
2663 | } | |||
2664 | return Modified; | |||
2665 | } | |||
2666 | ||||
2667 | bool llvm::UpgradeRetainReleaseMarker(Module &M) { | |||
2668 | bool Changed = false; | |||
2669 | NamedMDNode *ModRetainReleaseMarker = | |||
2670 | M.getNamedMetadata("clang.arc.retainAutoreleasedReturnValueMarker"); | |||
2671 | if (ModRetainReleaseMarker) { | |||
2672 | MDNode *Op = ModRetainReleaseMarker->getOperand(0); | |||
2673 | if (Op) { | |||
2674 | MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); | |||
2675 | if (ID) { | |||
2676 | SmallVector<StringRef, 4> ValueComp; | |||
2677 | ID->getString().split(ValueComp, "#"); | |||
2678 | if (ValueComp.size() == 2) { | |||
2679 | std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); | |||
2680 | Metadata *Ops[1] = {MDString::get(M.getContext(), NewValue)}; | |||
2681 | ModRetainReleaseMarker->setOperand(0, | |||
2682 | MDNode::get(M.getContext(), Ops)); | |||
2683 | Changed = true; | |||
2684 | } | |||
2685 | } | |||
2686 | } | |||
2687 | } | |||
2688 | return Changed; | |||
2689 | } | |||
2690 | ||||
2691 | bool llvm::UpgradeModuleFlags(Module &M) { | |||
2692 | NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); | |||
2693 | if (!ModFlags) | |||
2694 | return false; | |||
2695 | ||||
2696 | bool HasObjCFlag = false, HasClassProperties = false, Changed = false; | |||
2697 | for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { | |||
2698 | MDNode *Op = ModFlags->getOperand(I); | |||
2699 | if (Op->getNumOperands() != 3) | |||
2700 | continue; | |||
2701 | MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); | |||
2702 | if (!ID) | |||
2703 | continue; | |||
2704 | if (ID->getString() == "Objective-C Image Info Version") | |||
2705 | HasObjCFlag = true; | |||
2706 | if (ID->getString() == "Objective-C Class Properties") | |||
2707 | HasClassProperties = true; | |||
2708 | // Upgrade PIC/PIE Module Flags. The module flag behavior for these two | |||
2709 | // field was Error and now they are Max. | |||
2710 | if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { | |||
2711 | if (auto *Behavior = | |||
2712 | mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { | |||
2713 | if (Behavior->getLimitedValue() == Module::Error) { | |||
2714 | Type *Int32Ty = Type::getInt32Ty(M.getContext()); | |||
2715 | Metadata *Ops[3] = { | |||
2716 | ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), | |||
2717 | MDString::get(M.getContext(), ID->getString()), | |||
2718 | Op->getOperand(2)}; | |||
2719 | ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); | |||
2720 | Changed = true; | |||
2721 | } | |||
2722 | } | |||
2723 | } | |||
2724 | // Upgrade Objective-C Image Info Section. Removed the whitespce in the | |||
2725 | // section name so that llvm-lto will not complain about mismatching | |||
2726 | // module flags that is functionally the same. | |||
2727 | if (ID->getString() == "Objective-C Image Info Section") { | |||
2728 | if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { | |||
2729 | SmallVector<StringRef, 4> ValueComp; | |||
2730 | Value->getString().split(ValueComp, " "); | |||
2731 | if (ValueComp.size() != 1) { | |||
2732 | std::string NewValue; | |||
2733 | for (auto &S : ValueComp) | |||
2734 | NewValue += S.str(); | |||
2735 | Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), | |||
2736 | MDString::get(M.getContext(), NewValue)}; | |||
2737 | ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); | |||
2738 | Changed = true; | |||
2739 | } | |||
2740 | } | |||
2741 | } | |||
2742 | } | |||
2743 | ||||
2744 | // "Objective-C Class Properties" is recently added for Objective-C. We | |||
2745 | // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module | |||
2746 | // flag of value 0, so we can correclty downgrade this flag when trying to | |||
2747 | // link an ObjC bitcode without this module flag with an ObjC bitcode with | |||
2748 | // this module flag. | |||
2749 | if (HasObjCFlag && !HasClassProperties) { | |||
2750 | M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", | |||
2751 | (uint32_t)0); | |||
2752 | Changed = true; | |||
2753 | } | |||
2754 | ||||
2755 | return Changed; | |||
2756 | } | |||
2757 | ||||
2758 | void llvm::UpgradeSectionAttributes(Module &M) { | |||
2759 | auto TrimSpaces = [](StringRef Section) -> std::string { | |||
2760 | SmallVector<StringRef, 5> Components; | |||
2761 | Section.split(Components, ','); | |||
2762 | ||||
2763 | SmallString<32> Buffer; | |||
2764 | raw_svector_ostream OS(Buffer); | |||
2765 | ||||
2766 | for (auto Component : Components) | |||
2767 | OS << ',' << Component.trim(); | |||
2768 | ||||
2769 | return OS.str().substr(1); | |||
2770 | }; | |||
2771 | ||||
2772 | for (auto &GV : M.globals()) { | |||
2773 | if (!GV.hasSection()) | |||
2774 | continue; | |||
2775 | ||||
2776 | StringRef Section = GV.getSection(); | |||
2777 | ||||
2778 | if (!Section.startswith("__DATA, __objc_catlist")) | |||
2779 | continue; | |||
2780 | ||||
2781 | // __DATA, __objc_catlist, regular, no_dead_strip | |||
2782 | // __DATA,__objc_catlist,regular,no_dead_strip | |||
2783 | GV.setSection(TrimSpaces(Section)); | |||
2784 | } | |||
2785 | } | |||
2786 | ||||
2787 | static bool isOldLoopArgument(Metadata *MD) { | |||
2788 | auto *T = dyn_cast_or_null<MDTuple>(MD); | |||
2789 | if (!T) | |||
2790 | return false; | |||
2791 | if (T->getNumOperands() < 1) | |||
2792 | return false; | |||
2793 | auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); | |||
2794 | if (!S) | |||
2795 | return false; | |||
2796 | return S->getString().startswith("llvm.vectorizer."); | |||
2797 | } | |||
2798 | ||||
2799 | static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { | |||
2800 | StringRef OldPrefix = "llvm.vectorizer."; | |||
2801 | assert(OldTag.startswith(OldPrefix) && "Expected old prefix")(static_cast <bool> (OldTag.startswith(OldPrefix) && "Expected old prefix") ? void (0) : __assert_fail ("OldTag.startswith(OldPrefix) && \"Expected old prefix\"" , "/build/llvm-toolchain-snapshot-7~svn329677/lib/IR/AutoUpgrade.cpp" , 2801, __extension__ __PRETTY_FUNCTION__)); | |||
2802 | ||||
2803 | if (OldTag == "llvm.vectorizer.unroll") | |||
2804 | return MDString::get(C, "llvm.loop.interleave.count"); | |||
2805 | ||||
2806 | return MDString::get( | |||
2807 | C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) | |||
2808 | .str()); | |||
2809 | } | |||
2810 | ||||
2811 | static Metadata *upgradeLoopArgument(Metadata *MD) { | |||
2812 | auto *T = dyn_cast_or_null<MDTuple>(MD); | |||
2813 | if (!T) | |||
2814 | return MD; | |||
2815 | if (T->getNumOperands() < 1) | |||
2816 | return MD; | |||
2817 | auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); | |||
2818 | if (!OldTag) | |||
2819 | return MD; | |||
2820 | if (!OldTag->getString().startswith("llvm.vectorizer.")) | |||
2821 | return MD; | |||
2822 | ||||
2823 | // This has an old tag. Upgrade it. | |||
2824 | SmallVector<Metadata *, 8> Ops; | |||
2825 | Ops.reserve(T->getNumOperands()); | |||
2826 | Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); | |||
2827 | for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) | |||
2828 | Ops.push_back(T->getOperand(I)); | |||
2829 | ||||
2830 | return MDTuple::get(T->getContext(), Ops); | |||
2831 | } | |||
2832 | ||||
2833 | MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { | |||
2834 | auto *T = dyn_cast<MDTuple>(&N); | |||
2835 | if (!T) | |||
2836 | return &N; | |||
2837 | ||||
2838 | if (none_of(T->operands(), isOldLoopArgument)) | |||
2839 | return &N; | |||
2840 | ||||
2841 | SmallVector<Metadata *, 8> Ops; | |||
2842 | Ops.reserve(T->getNumOperands()); | |||
2843 | for (Metadata *MD : T->operands()) | |||
2844 | Ops.push_back(upgradeLoopArgument(MD)); | |||
2845 | ||||
2846 | return MDTuple::get(T->getContext(), Ops); | |||
2847 | } |