Bug Summary

File:lib/CodeGen/ExecutionDepsFix.cpp
Location:line 648, column 5
Description:Dereference of null pointer

Annotated Source Code

1//===- ExecutionDepsFix.cpp - Fix execution dependecy issues ----*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the execution dependency fix pass.
11//
12// Some X86 SSE instructions like mov, and, or, xor are available in different
13// variants for different operand types. These variant instructions are
14// equivalent, but on Nehalem and newer cpus there is extra latency
15// transferring data between integer and floating point domains. ARM cores
16// have similar issues when they are configured with both VFP and NEON
17// pipelines.
18//
19// This pass changes the variant instructions to minimize domain crossings.
20//
21//===----------------------------------------------------------------------===//
22
23#include "llvm/CodeGen/Passes.h"
24#include "llvm/ADT/PostOrderIterator.h"
25#include "llvm/CodeGen/LivePhysRegs.h"
26#include "llvm/CodeGen/MachineFunctionPass.h"
27#include "llvm/CodeGen/MachineRegisterInfo.h"
28#include "llvm/Support/Allocator.h"
29#include "llvm/Support/Debug.h"
30#include "llvm/Support/raw_ostream.h"
31#include "llvm/Target/TargetInstrInfo.h"
32#include "llvm/Target/TargetSubtargetInfo.h"
33
34using namespace llvm;
35
36#define DEBUG_TYPE"execution-fix" "execution-fix"
37
38/// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
39/// of execution domains.
40///
41/// An open DomainValue represents a set of instructions that can still switch
42/// execution domain. Multiple registers may refer to the same open
43/// DomainValue - they will eventually be collapsed to the same execution
44/// domain.
45///
46/// A collapsed DomainValue represents a single register that has been forced
47/// into one of more execution domains. There is a separate collapsed
48/// DomainValue for each register, but it may contain multiple execution
49/// domains. A register value is initially created in a single execution
50/// domain, but if we were forced to pay the penalty of a domain crossing, we
51/// keep track of the fact that the register is now available in multiple
52/// domains.
53namespace {
54struct DomainValue {
55 // Basic reference counting.
56 unsigned Refs;
57
58 // Bitmask of available domains. For an open DomainValue, it is the still
59 // possible domains for collapsing. For a collapsed DomainValue it is the
60 // domains where the register is available for free.
61 unsigned AvailableDomains;
62
63 // Pointer to the next DomainValue in a chain. When two DomainValues are
64 // merged, Victim.Next is set to point to Victor, so old DomainValue
65 // references can be updated by following the chain.
66 DomainValue *Next;
67
68 // Twiddleable instructions using or defining these registers.
69 SmallVector<MachineInstr*, 8> Instrs;
70
71 // A collapsed DomainValue has no instructions to twiddle - it simply keeps
72 // track of the domains where the registers are already available.
73 bool isCollapsed() const { return Instrs.empty(); }
74
75 // Is domain available?
76 bool hasDomain(unsigned domain) const {
77 return AvailableDomains & (1u << domain);
78 }
79
80 // Mark domain as available.
81 void addDomain(unsigned domain) {
82 AvailableDomains |= 1u << domain;
83 }
84
85 // Restrict to a single domain available.
86 void setSingleDomain(unsigned domain) {
87 AvailableDomains = 1u << domain;
88 }
89
90 // Return bitmask of domains that are available and in mask.
91 unsigned getCommonDomains(unsigned mask) const {
92 return AvailableDomains & mask;
93 }
94
95 // First domain available.
96 unsigned getFirstDomain() const {
97 return countTrailingZeros(AvailableDomains);
98 }
99
100 DomainValue() : Refs(0) { clear(); }
101
102 // Clear this DomainValue and point to next which has all its data.
103 void clear() {
104 AvailableDomains = 0;
105 Next = nullptr;
106 Instrs.clear();
107 }
108};
109}
110
111namespace {
112/// LiveReg - Information about a live register.
113struct LiveReg {
114 /// Value currently in this register, or NULL when no value is being tracked.
115 /// This counts as a DomainValue reference.
116 DomainValue *Value;
117
118 /// Instruction that defined this register, relative to the beginning of the
119 /// current basic block. When a LiveReg is used to represent a live-out
120 /// register, this value is relative to the end of the basic block, so it
121 /// will be a negative number.
122 int Def;
123};
124} // anonynous namespace
125
126namespace {
127class ExeDepsFix : public MachineFunctionPass {
128 static char ID;
129 SpecificBumpPtrAllocator<DomainValue> Allocator;
130 SmallVector<DomainValue*,16> Avail;
131
132 const TargetRegisterClass *const RC;
133 MachineFunction *MF;
134 const TargetInstrInfo *TII;
135 const TargetRegisterInfo *TRI;
136 std::vector<int> AliasMap;
137 const unsigned NumRegs;
138 LiveReg *LiveRegs;
139 typedef DenseMap<MachineBasicBlock*, LiveReg*> LiveOutMap;
140 LiveOutMap LiveOuts;
141
142 /// List of undefined register reads in this block in forward order.
143 std::vector<std::pair<MachineInstr*, unsigned> > UndefReads;
144
145 /// Storage for register unit liveness.
146 LivePhysRegs LiveRegSet;
147
148 /// Current instruction number.
149 /// The first instruction in each basic block is 0.
150 int CurInstr;
151
152 /// True when the current block has a predecessor that hasn't been visited
153 /// yet.
154 bool SeenUnknownBackEdge;
155
156public:
157 ExeDepsFix(const TargetRegisterClass *rc)
158 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
159
160 void getAnalysisUsage(AnalysisUsage &AU) const override {
161 AU.setPreservesAll();
162 MachineFunctionPass::getAnalysisUsage(AU);
163 }
164
165 bool runOnMachineFunction(MachineFunction &MF) override;
166
167 const char *getPassName() const override {
168 return "Execution dependency fix";
169 }
170
171private:
172 // Register mapping.
173 int regIndex(unsigned Reg);
174
175 // DomainValue allocation.
176 DomainValue *alloc(int domain = -1);
177 DomainValue *retain(DomainValue *DV) {
178 if (DV) ++DV->Refs;
179 return DV;
180 }
181 void release(DomainValue*);
182 DomainValue *resolve(DomainValue*&);
183
184 // LiveRegs manipulations.
185 void setLiveReg(int rx, DomainValue *DV);
186 void kill(int rx);
187 void force(int rx, unsigned domain);
188 void collapse(DomainValue *dv, unsigned domain);
189 bool merge(DomainValue *A, DomainValue *B);
190
191 void enterBasicBlock(MachineBasicBlock*);
192 void leaveBasicBlock(MachineBasicBlock*);
193 void visitInstr(MachineInstr*);
194 void processDefs(MachineInstr*, bool Kill);
195 void visitSoftInstr(MachineInstr*, unsigned mask);
196 void visitHardInstr(MachineInstr*, unsigned domain);
197 bool shouldBreakDependence(MachineInstr*, unsigned OpIdx, unsigned Pref);
198 void processUndefReads(MachineBasicBlock*);
199};
200}
201
202char ExeDepsFix::ID = 0;
203
204/// Translate TRI register number to an index into our smaller tables of
205/// interesting registers. Return -1 for boring registers.
206int ExeDepsFix::regIndex(unsigned Reg) {
207 assert(Reg < AliasMap.size() && "Invalid register")((Reg < AliasMap.size() && "Invalid register") ? static_cast
<void> (0) : __assert_fail ("Reg < AliasMap.size() && \"Invalid register\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 207, __PRETTY_FUNCTION__));
208 return AliasMap[Reg];
209}
210
211DomainValue *ExeDepsFix::alloc(int domain) {
212 DomainValue *dv = Avail.empty() ?
213 new(Allocator.Allocate()) DomainValue :
214 Avail.pop_back_val();
215 if (domain >= 0)
216 dv->addDomain(domain);
217 assert(dv->Refs == 0 && "Reference count wasn't cleared")((dv->Refs == 0 && "Reference count wasn't cleared"
) ? static_cast<void> (0) : __assert_fail ("dv->Refs == 0 && \"Reference count wasn't cleared\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 217, __PRETTY_FUNCTION__));
218 assert(!dv->Next && "Chained DomainValue shouldn't have been recycled")((!dv->Next && "Chained DomainValue shouldn't have been recycled"
) ? static_cast<void> (0) : __assert_fail ("!dv->Next && \"Chained DomainValue shouldn't have been recycled\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 218, __PRETTY_FUNCTION__));
219 return dv;
220}
221
222/// release - Release a reference to DV. When the last reference is released,
223/// collapse if needed.
224void ExeDepsFix::release(DomainValue *DV) {
225 while (DV) {
226 assert(DV->Refs && "Bad DomainValue")((DV->Refs && "Bad DomainValue") ? static_cast<
void> (0) : __assert_fail ("DV->Refs && \"Bad DomainValue\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 226, __PRETTY_FUNCTION__));
227 if (--DV->Refs)
228 return;
229
230 // There are no more DV references. Collapse any contained instructions.
231 if (DV->AvailableDomains && !DV->isCollapsed())
232 collapse(DV, DV->getFirstDomain());
233
234 DomainValue *Next = DV->Next;
235 DV->clear();
236 Avail.push_back(DV);
237 // Also release the next DomainValue in the chain.
238 DV = Next;
239 }
240}
241
242/// resolve - Follow the chain of dead DomainValues until a live DomainValue is
243/// reached. Update the referenced pointer when necessary.
244DomainValue *ExeDepsFix::resolve(DomainValue *&DVRef) {
245 DomainValue *DV = DVRef;
246 if (!DV || !DV->Next)
247 return DV;
248
249 // DV has a chain. Find the end.
250 do DV = DV->Next;
251 while (DV->Next);
252
253 // Update DVRef to point to DV.
254 retain(DV);
255 release(DVRef);
256 DVRef = DV;
257 return DV;
258}
259
260/// Set LiveRegs[rx] = dv, updating reference counts.
261void ExeDepsFix::setLiveReg(int rx, DomainValue *dv) {
262 assert(unsigned(rx) < NumRegs && "Invalid index")((unsigned(rx) < NumRegs && "Invalid index") ? static_cast
<void> (0) : __assert_fail ("unsigned(rx) < NumRegs && \"Invalid index\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 262, __PRETTY_FUNCTION__));
263 assert(LiveRegs && "Must enter basic block first.")((LiveRegs && "Must enter basic block first.") ? static_cast
<void> (0) : __assert_fail ("LiveRegs && \"Must enter basic block first.\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 263, __PRETTY_FUNCTION__));
264
265 if (LiveRegs[rx].Value == dv)
266 return;
267 if (LiveRegs[rx].Value)
268 release(LiveRegs[rx].Value);
269 LiveRegs[rx].Value = retain(dv);
270}
271
272// Kill register rx, recycle or collapse any DomainValue.
273void ExeDepsFix::kill(int rx) {
274 assert(unsigned(rx) < NumRegs && "Invalid index")((unsigned(rx) < NumRegs && "Invalid index") ? static_cast
<void> (0) : __assert_fail ("unsigned(rx) < NumRegs && \"Invalid index\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 274, __PRETTY_FUNCTION__));
275 assert(LiveRegs && "Must enter basic block first.")((LiveRegs && "Must enter basic block first.") ? static_cast
<void> (0) : __assert_fail ("LiveRegs && \"Must enter basic block first.\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 275, __PRETTY_FUNCTION__));
276 if (!LiveRegs[rx].Value)
277 return;
278
279 release(LiveRegs[rx].Value);
280 LiveRegs[rx].Value = nullptr;
281}
282
283/// Force register rx into domain.
284void ExeDepsFix::force(int rx, unsigned domain) {
285 assert(unsigned(rx) < NumRegs && "Invalid index")((unsigned(rx) < NumRegs && "Invalid index") ? static_cast
<void> (0) : __assert_fail ("unsigned(rx) < NumRegs && \"Invalid index\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 285, __PRETTY_FUNCTION__));
286 assert(LiveRegs && "Must enter basic block first.")((LiveRegs && "Must enter basic block first.") ? static_cast
<void> (0) : __assert_fail ("LiveRegs && \"Must enter basic block first.\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 286, __PRETTY_FUNCTION__));
287 if (DomainValue *dv = LiveRegs[rx].Value) {
288 if (dv->isCollapsed())
289 dv->addDomain(domain);
290 else if (dv->hasDomain(domain))
291 collapse(dv, domain);
292 else {
293 // This is an incompatible open DomainValue. Collapse it to whatever and
294 // force the new value into domain. This costs a domain crossing.
295 collapse(dv, dv->getFirstDomain());
296 assert(LiveRegs[rx].Value && "Not live after collapse?")((LiveRegs[rx].Value && "Not live after collapse?") ?
static_cast<void> (0) : __assert_fail ("LiveRegs[rx].Value && \"Not live after collapse?\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 296, __PRETTY_FUNCTION__));
297 LiveRegs[rx].Value->addDomain(domain);
298 }
299 } else {
300 // Set up basic collapsed DomainValue.
301 setLiveReg(rx, alloc(domain));
302 }
303}
304
305/// Collapse open DomainValue into given domain. If there are multiple
306/// registers using dv, they each get a unique collapsed DomainValue.
307void ExeDepsFix::collapse(DomainValue *dv, unsigned domain) {
308 assert(dv->hasDomain(domain) && "Cannot collapse")((dv->hasDomain(domain) && "Cannot collapse") ? static_cast
<void> (0) : __assert_fail ("dv->hasDomain(domain) && \"Cannot collapse\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 308, __PRETTY_FUNCTION__));
309
310 // Collapse all the instructions.
311 while (!dv->Instrs.empty())
312 TII->setExecutionDomain(dv->Instrs.pop_back_val(), domain);
313 dv->setSingleDomain(domain);
314
315 // If there are multiple users, give them new, unique DomainValues.
316 if (LiveRegs && dv->Refs > 1)
317 for (unsigned rx = 0; rx != NumRegs; ++rx)
318 if (LiveRegs[rx].Value == dv)
319 setLiveReg(rx, alloc(domain));
320}
321
322/// Merge - All instructions and registers in B are moved to A, and B is
323/// released.
324bool ExeDepsFix::merge(DomainValue *A, DomainValue *B) {
325 assert(!A->isCollapsed() && "Cannot merge into collapsed")((!A->isCollapsed() && "Cannot merge into collapsed"
) ? static_cast<void> (0) : __assert_fail ("!A->isCollapsed() && \"Cannot merge into collapsed\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 325, __PRETTY_FUNCTION__));
326 assert(!B->isCollapsed() && "Cannot merge from collapsed")((!B->isCollapsed() && "Cannot merge from collapsed"
) ? static_cast<void> (0) : __assert_fail ("!B->isCollapsed() && \"Cannot merge from collapsed\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 326, __PRETTY_FUNCTION__));
327 if (A == B)
328 return true;
329 // Restrict to the domains that A and B have in common.
330 unsigned common = A->getCommonDomains(B->AvailableDomains);
331 if (!common)
332 return false;
333 A->AvailableDomains = common;
334 A->Instrs.append(B->Instrs.begin(), B->Instrs.end());
335
336 // Clear the old DomainValue so we won't try to swizzle instructions twice.
337 B->clear();
338 // All uses of B are referred to A.
339 B->Next = retain(A);
340
341 for (unsigned rx = 0; rx != NumRegs; ++rx)
342 if (LiveRegs[rx].Value == B)
343 setLiveReg(rx, A);
344 return true;
345}
346
347// enterBasicBlock - Set up LiveRegs by merging predecessor live-out values.
348void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
349 // Detect back-edges from predecessors we haven't processed yet.
350 SeenUnknownBackEdge = false;
351
352 // Reset instruction counter in each basic block.
353 CurInstr = 0;
354
355 // Set up UndefReads to track undefined register reads.
356 UndefReads.clear();
357 LiveRegSet.clear();
358
359 // Set up LiveRegs to represent registers entering MBB.
360 if (!LiveRegs)
361 LiveRegs = new LiveReg[NumRegs];
362
363 // Default values are 'nothing happened a long time ago'.
364 for (unsigned rx = 0; rx != NumRegs; ++rx) {
365 LiveRegs[rx].Value = nullptr;
366 LiveRegs[rx].Def = -(1 << 20);
367 }
368
369 // This is the entry block.
370 if (MBB->pred_empty()) {
371 for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
372 e = MBB->livein_end(); i != e; ++i) {
373 int rx = regIndex(*i);
374 if (rx < 0)
375 continue;
376 // Treat function live-ins as if they were defined just before the first
377 // instruction. Usually, function arguments are set up immediately
378 // before the call.
379 LiveRegs[rx].Def = -1;
380 }
381 DEBUG(dbgs() << "BB#" << MBB->getNumber() << ": entry\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << "BB#" << MBB->getNumber
() << ": entry\n"; } } while (0);
382 return;
383 }
384
385 // Try to coalesce live-out registers from predecessors.
386 for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(),
387 pe = MBB->pred_end(); pi != pe; ++pi) {
388 LiveOutMap::const_iterator fi = LiveOuts.find(*pi);
389 if (fi == LiveOuts.end()) {
390 SeenUnknownBackEdge = true;
391 continue;
392 }
393 assert(fi->second && "Can't have NULL entries")((fi->second && "Can't have NULL entries") ? static_cast
<void> (0) : __assert_fail ("fi->second && \"Can't have NULL entries\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 393, __PRETTY_FUNCTION__));
394
395 for (unsigned rx = 0; rx != NumRegs; ++rx) {
396 // Use the most recent predecessor def for each register.
397 LiveRegs[rx].Def = std::max(LiveRegs[rx].Def, fi->second[rx].Def);
398
399 DomainValue *pdv = resolve(fi->second[rx].Value);
400 if (!pdv)
401 continue;
402 if (!LiveRegs[rx].Value) {
403 setLiveReg(rx, pdv);
404 continue;
405 }
406
407 // We have a live DomainValue from more than one predecessor.
408 if (LiveRegs[rx].Value->isCollapsed()) {
409 // We are already collapsed, but predecessor is not. Force it.
410 unsigned Domain = LiveRegs[rx].Value->getFirstDomain();
411 if (!pdv->isCollapsed() && pdv->hasDomain(Domain))
412 collapse(pdv, Domain);
413 continue;
414 }
415
416 // Currently open, merge in predecessor.
417 if (!pdv->isCollapsed())
418 merge(LiveRegs[rx].Value, pdv);
419 else
420 force(rx, pdv->getFirstDomain());
421 }
422 }
423 DEBUG(dbgs() << "BB#" << MBB->getNumber()do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << "BB#" << MBB->getNumber
() << (SeenUnknownBackEdge ? ": incomplete\n" : ": all preds known\n"
); } } while (0)
424 << (SeenUnknownBackEdge ? ": incomplete\n" : ": all preds known\n"))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << "BB#" << MBB->getNumber
() << (SeenUnknownBackEdge ? ": incomplete\n" : ": all preds known\n"
); } } while (0);
425}
426
427void ExeDepsFix::leaveBasicBlock(MachineBasicBlock *MBB) {
428 assert(LiveRegs && "Must enter basic block first.")((LiveRegs && "Must enter basic block first.") ? static_cast
<void> (0) : __assert_fail ("LiveRegs && \"Must enter basic block first.\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 428, __PRETTY_FUNCTION__));
429 // Save live registers at end of MBB - used by enterBasicBlock().
430 // Also use LiveOuts as a visited set to detect back-edges.
431 bool First = LiveOuts.insert(std::make_pair(MBB, LiveRegs)).second;
432
433 if (First) {
434 // LiveRegs was inserted in LiveOuts. Adjust all defs to be relative to
435 // the end of this block instead of the beginning.
436 for (unsigned i = 0, e = NumRegs; i != e; ++i)
437 LiveRegs[i].Def -= CurInstr;
438 } else {
439 // Insertion failed, this must be the second pass.
440 // Release all the DomainValues instead of keeping them.
441 for (unsigned i = 0, e = NumRegs; i != e; ++i)
442 release(LiveRegs[i].Value);
443 delete[] LiveRegs;
444 }
445 LiveRegs = nullptr;
446}
447
448void ExeDepsFix::visitInstr(MachineInstr *MI) {
449 if (MI->isDebugValue())
450 return;
451
452 // Update instructions with explicit execution domains.
453 std::pair<uint16_t, uint16_t> DomP = TII->getExecutionDomain(MI);
454 if (DomP.first) {
455 if (DomP.second)
456 visitSoftInstr(MI, DomP.second);
457 else
458 visitHardInstr(MI, DomP.first);
459 }
460
461 // Process defs to track register ages, and kill values clobbered by generic
462 // instructions.
463 processDefs(MI, !DomP.first);
464}
465
466/// \brief Return true to if it makes sense to break dependence on a partial def
467/// or undef use.
468bool ExeDepsFix::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx,
469 unsigned Pref) {
470 int rx = regIndex(MI->getOperand(OpIdx).getReg());
471 if (rx < 0)
472 return false;
473
474 unsigned Clearance = CurInstr - LiveRegs[rx].Def;
475 DEBUG(dbgs() << "Clearance: " << Clearance << ", want " << Pref)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << "Clearance: " << Clearance
<< ", want " << Pref; } } while (0);
476
477 if (Pref > Clearance) {
478 DEBUG(dbgs() << ": Break dependency.\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << ": Break dependency.\n";
} } while (0);
479 return true;
480 }
481 // The current clearance seems OK, but we may be ignoring a def from a
482 // back-edge.
483 if (!SeenUnknownBackEdge || Pref <= unsigned(CurInstr)) {
484 DEBUG(dbgs() << ": OK .\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << ": OK .\n"; } } while (0
);
485 return false;
486 }
487 // A def from an unprocessed back-edge may make us break this dependency.
488 DEBUG(dbgs() << ": Wait for back-edge to resolve.\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << ": Wait for back-edge to resolve.\n"
; } } while (0);
489 return false;
490}
491
492// Update def-ages for registers defined by MI.
493// If Kill is set, also kill off DomainValues clobbered by the defs.
494//
495// Also break dependencies on partial defs and undef uses.
496void ExeDepsFix::processDefs(MachineInstr *MI, bool Kill) {
497 assert(!MI->isDebugValue() && "Won't process debug values")((!MI->isDebugValue() && "Won't process debug values"
) ? static_cast<void> (0) : __assert_fail ("!MI->isDebugValue() && \"Won't process debug values\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 497, __PRETTY_FUNCTION__));
498
499 // Break dependence on undef uses. Do this before updating LiveRegs below.
500 unsigned OpNum;
501 unsigned Pref = TII->getUndefRegClearance(MI, OpNum, TRI);
502 if (Pref) {
503 if (shouldBreakDependence(MI, OpNum, Pref))
504 UndefReads.push_back(std::make_pair(MI, OpNum));
505 }
506 const MCInstrDesc &MCID = MI->getDesc();
507 for (unsigned i = 0,
508 e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs();
509 i != e; ++i) {
510 MachineOperand &MO = MI->getOperand(i);
511 if (!MO.isReg())
512 continue;
513 if (MO.isImplicit())
514 break;
515 if (MO.isUse())
516 continue;
517 int rx = regIndex(MO.getReg());
518 if (rx < 0)
519 continue;
520
521 // This instruction explicitly defines rx.
522 DEBUG(dbgs() << TRI->getName(RC->getRegister(rx)) << ":\t" << CurInstrdo { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << TRI->getName(RC->getRegister
(rx)) << ":\t" << CurInstr << '\t' <<
*MI; } } while (0)
523 << '\t' << *MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << TRI->getName(RC->getRegister
(rx)) << ":\t" << CurInstr << '\t' <<
*MI; } } while (0);
524
525 // Check clearance before partial register updates.
526 // Call breakDependence before setting LiveRegs[rx].Def.
527 unsigned Pref = TII->getPartialRegUpdateClearance(MI, i, TRI);
528 if (Pref && shouldBreakDependence(MI, i, Pref))
529 TII->breakPartialRegDependency(MI, i, TRI);
530
531 // How many instructions since rx was last written?
532 LiveRegs[rx].Def = CurInstr;
533
534 // Kill off domains redefined by generic instructions.
535 if (Kill)
536 kill(rx);
537 }
538 ++CurInstr;
539}
540
541/// \break Break false dependencies on undefined register reads.
542///
543/// Walk the block backward computing precise liveness. This is expensive, so we
544/// only do it on demand. Note that the occurrence of undefined register reads
545/// that should be broken is very rare, but when they occur we may have many in
546/// a single block.
547void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
548 if (UndefReads.empty())
549 return;
550
551 // Collect this block's live out register units.
552 LiveRegSet.init(TRI);
553 LiveRegSet.addLiveOuts(MBB);
554
555 MachineInstr *UndefMI = UndefReads.back().first;
556 unsigned OpIdx = UndefReads.back().second;
557
558 for (MachineBasicBlock::reverse_iterator I = MBB->rbegin(), E = MBB->rend();
559 I != E; ++I) {
560 // Update liveness, including the current instruction's defs.
561 LiveRegSet.stepBackward(*I);
562
563 if (UndefMI == &*I) {
564 if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
565 TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
566
567 UndefReads.pop_back();
568 if (UndefReads.empty())
569 return;
570
571 UndefMI = UndefReads.back().first;
572 OpIdx = UndefReads.back().second;
573 }
574 }
575}
576
577// A hard instruction only works in one domain. All input registers will be
578// forced into that domain.
579void ExeDepsFix::visitHardInstr(MachineInstr *mi, unsigned domain) {
580 // Collapse all uses.
581 for (unsigned i = mi->getDesc().getNumDefs(),
582 e = mi->getDesc().getNumOperands(); i != e; ++i) {
583 MachineOperand &mo = mi->getOperand(i);
584 if (!mo.isReg()) continue;
585 int rx = regIndex(mo.getReg());
586 if (rx < 0) continue;
587 force(rx, domain);
588 }
589
590 // Kill all defs and force them.
591 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
592 MachineOperand &mo = mi->getOperand(i);
593 if (!mo.isReg()) continue;
594 int rx = regIndex(mo.getReg());
595 if (rx < 0) continue;
596 kill(rx);
597 force(rx, domain);
598 }
599}
600
601// A soft instruction can be changed to work in other domains given by mask.
602void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
603 // Bitmask of available domains for this instruction after taking collapsed
604 // operands into account.
605 unsigned available = mask;
606
607 // Scan the explicit use operands for incoming domains.
608 SmallVector<int, 4> used;
609 if (LiveRegs)
1
Assuming pointer value is null
→
2
←
Taking false branch
→
610 for (unsigned i = mi->getDesc().getNumDefs(),
611 e = mi->getDesc().getNumOperands(); i != e; ++i) {
612 MachineOperand &mo = mi->getOperand(i);
613 if (!mo.isReg()) continue;
614 int rx = regIndex(mo.getReg());
615 if (rx < 0) continue;
616 if (DomainValue *dv = LiveRegs[rx].Value) {
617 // Bitmask of domains that dv and available have in common.
618 unsigned common = dv->getCommonDomains(available);
619 // Is it possible to use this collapsed register for free?
620 if (dv->isCollapsed()) {
621 // Restrict available domains to the ones in common with the operand.
622 // If there are no common domains, we must pay the cross-domain
623 // penalty for this operand.
624 if (common) available = common;
625 } else if (common)
626 // Open DomainValue is compatible, save it for merging.
627 used.push_back(rx);
628 else
629 // Open DomainValue is not compatible with instruction. It is useless
630 // now.
631 kill(rx);
632 }
633 }
634
635 // If the collapsed operands force a single domain, propagate the collapse.
636 if (isPowerOf2_32(available)) {
3
←
Taking false branch
→
637 unsigned domain = countTrailingZeros(available);
638 TII->setExecutionDomain(mi, domain);
639 visitHardInstr(mi, domain);
640 return;
641 }
642
643 // Kill off any remaining uses that don't match available, and build a list of
644 // incoming DomainValues that we want to merge.
645 SmallVector<LiveReg, 4> Regs;
646 for (SmallVectorImpl<int>::iterator i=used.begin(), e=used.end(); i!=e; ++i) {
4
←
Assuming 'i' is not equal to 'e'
→
5
←
Loop condition is true. Entering loop body
→
647 int rx = *i;
648 const LiveReg &LR = LiveRegs[rx];
6
←
Dereference of null pointer
649 // This useless DomainValue could have been missed above.
650 if (!LR.Value->getCommonDomains(available)) {
651 kill(rx);
652 continue;
653 }
654 // Sorted insertion.
655 bool Inserted = false;
656 for (SmallVectorImpl<LiveReg>::iterator i = Regs.begin(), e = Regs.end();
657 i != e && !Inserted; ++i) {
658 if (LR.Def < i->Def) {
659 Inserted = true;
660 Regs.insert(i, LR);
661 }
662 }
663 if (!Inserted)
664 Regs.push_back(LR);
665 }
666
667 // doms are now sorted in order of appearance. Try to merge them all, giving
668 // priority to the latest ones.
669 DomainValue *dv = nullptr;
670 while (!Regs.empty()) {
671 if (!dv) {
672 dv = Regs.pop_back_val().Value;
673 // Force the first dv to match the current instruction.
674 dv->AvailableDomains = dv->getCommonDomains(available);
675 assert(dv->AvailableDomains && "Domain should have been filtered")((dv->AvailableDomains && "Domain should have been filtered"
) ? static_cast<void> (0) : __assert_fail ("dv->AvailableDomains && \"Domain should have been filtered\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 675, __PRETTY_FUNCTION__));
676 continue;
677 }
678
679 DomainValue *Latest = Regs.pop_back_val().Value;
680 // Skip already merged values.
681 if (Latest == dv || Latest->Next)
682 continue;
683 if (merge(dv, Latest))
684 continue;
685
686 // If latest didn't merge, it is useless now. Kill all registers using it.
687 for (SmallVectorImpl<int>::iterator i=used.begin(), e=used.end(); i!=e; ++i)
688 if (LiveRegs[*i].Value == Latest)
689 kill(*i);
690 }
691
692 // dv is the DomainValue we are going to use for this instruction.
693 if (!dv) {
694 dv = alloc();
695 dv->AvailableDomains = available;
696 }
697 dv->Instrs.push_back(mi);
698
699 // Finally set all defs and non-collapsed uses to dv. We must iterate through
700 // all the operators, including imp-def ones.
701 for (MachineInstr::mop_iterator ii = mi->operands_begin(),
702 ee = mi->operands_end();
703 ii != ee; ++ii) {
704 MachineOperand &mo = *ii;
705 if (!mo.isReg()) continue;
706 int rx = regIndex(mo.getReg());
707 if (rx < 0) continue;
708 if (!LiveRegs[rx].Value || (mo.isDef() && LiveRegs[rx].Value != dv)) {
709 kill(rx);
710 setLiveReg(rx, dv);
711 }
712 }
713}
714
715bool ExeDepsFix::runOnMachineFunction(MachineFunction &mf) {
716 MF = &mf;
717 TII = MF->getSubtarget().getInstrInfo();
718 TRI = MF->getSubtarget().getRegisterInfo();
719 LiveRegs = nullptr;
720 assert(NumRegs == RC->getNumRegs() && "Bad regclass")((NumRegs == RC->getNumRegs() && "Bad regclass") ?
static_cast<void> (0) : __assert_fail ("NumRegs == RC->getNumRegs() && \"Bad regclass\""
, "/tmp/buildd/llvm-toolchain-snapshot-3.6~svn224240/lib/CodeGen/ExecutionDepsFix.cpp"
, 720, __PRETTY_FUNCTION__));
721
722 DEBUG(dbgs() << "********** FIX EXECUTION DEPENDENCIES: "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << "********** FIX EXECUTION DEPENDENCIES: "
<< TRI->getRegClassName(RC) << " **********\n"
; } } while (0)
723 << TRI->getRegClassName(RC) << " **********\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("execution-fix")) { dbgs() << "********** FIX EXECUTION DEPENDENCIES: "
<< TRI->getRegClassName(RC) << " **********\n"
; } } while (0);
724
725 // If no relevant registers are used in the function, we can skip it
726 // completely.
727 bool anyregs = false;
728 for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
729 I != E; ++I)
730 if (MF->getRegInfo().isPhysRegUsed(*I)) {
731 anyregs = true;
732 break;
733 }
734 if (!anyregs) return false;
735
736 // Initialize the AliasMap on the first use.
737 if (AliasMap.empty()) {
738 // Given a PhysReg, AliasMap[PhysReg] is either the relevant index into RC,
739 // or -1.
740 AliasMap.resize(TRI->getNumRegs(), -1);
741 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
742 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true);
743 AI.isValid(); ++AI)
744 AliasMap[*AI] = i;
745 }
746
747 MachineBasicBlock *Entry = MF->begin();
748 ReversePostOrderTraversal<MachineBasicBlock*> RPOT(Entry);
749 SmallVector<MachineBasicBlock*, 16> Loops;
750 for (ReversePostOrderTraversal<MachineBasicBlock*>::rpo_iterator
751 MBBI = RPOT.begin(), MBBE = RPOT.end(); MBBI != MBBE; ++MBBI) {
752 MachineBasicBlock *MBB = *MBBI;
753 enterBasicBlock(MBB);
754 if (SeenUnknownBackEdge)
755 Loops.push_back(MBB);
756 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
757 ++I)
758 visitInstr(I);
759 processUndefReads(MBB);
760 leaveBasicBlock(MBB);
761 }
762
763 // Visit all the loop blocks again in order to merge DomainValues from
764 // back-edges.
765 for (unsigned i = 0, e = Loops.size(); i != e; ++i) {
766 MachineBasicBlock *MBB = Loops[i];
767 enterBasicBlock(MBB);
768 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
769 ++I)
770 if (!I->isDebugValue())
771 processDefs(I, false);
772 processUndefReads(MBB);
773 leaveBasicBlock(MBB);
774 }
775
776 // Clear the LiveOuts vectors and collapse any remaining DomainValues.
777 for (ReversePostOrderTraversal<MachineBasicBlock*>::rpo_iterator
778 MBBI = RPOT.begin(), MBBE = RPOT.end(); MBBI != MBBE; ++MBBI) {
779 LiveOutMap::const_iterator FI = LiveOuts.find(*MBBI);
780 if (FI == LiveOuts.end() || !FI->second)
781 continue;
782 for (unsigned i = 0, e = NumRegs; i != e; ++i)
783 if (FI->second[i].Value)
784 release(FI->second[i].Value);
785 delete[] FI->second;
786 }
787 LiveOuts.clear();
788 UndefReads.clear();
789 Avail.clear();
790 Allocator.DestroyAll();
791
792 return false;
793}
794
795FunctionPass *
796llvm::createExecutionDependencyFixPass(const TargetRegisterClass *RC) {
797 return new ExeDepsFix(RC);
798}