File: | lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp |
Location: | line 112, column 5 |
Description: | Value stored to 'Separator' is never read |
1 | //===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===// |
2 | // |
3 | // The LLVM Compiler Infrastructure |
4 | // |
5 | // This file is distributed under the University of Illinois Open Source |
6 | // License. See LICENSE.TXT for details. |
7 | // |
8 | //===----------------------------------------------------------------------===// |
9 | // |
10 | // This class prints an Hexagon MCInst to a .s file. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #include "HexagonAsmPrinter.h" |
15 | #include "Hexagon.h" |
16 | #include "HexagonInstPrinter.h" |
17 | #include "MCTargetDesc/HexagonMCInstrInfo.h" |
18 | #include "llvm/ADT/StringExtras.h" |
19 | #include "llvm/MC/MCAsmInfo.h" |
20 | #include "llvm/MC/MCExpr.h" |
21 | #include "llvm/MC/MCInst.h" |
22 | #include "llvm/Support/raw_ostream.h" |
23 | |
24 | using namespace llvm; |
25 | |
26 | #define DEBUG_TYPE"asm-printer" "asm-printer" |
27 | |
28 | #define GET_INSTRUCTION_NAME |
29 | #include "HexagonGenAsmWriter.inc" |
30 | |
31 | // Return the minimum value that a constant extendable operand can have |
32 | // without being extended. |
33 | static int getMinValue(uint64_t TSFlags) { |
34 | unsigned isSigned = |
35 | (TSFlags >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask; |
36 | unsigned bits = |
37 | (TSFlags >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask; |
38 | |
39 | if (isSigned) |
40 | return -1U << (bits - 1); |
41 | |
42 | return 0; |
43 | } |
44 | |
45 | // Return the maximum value that a constant extendable operand can have |
46 | // without being extended. |
47 | static int getMaxValue(uint64_t TSFlags) { |
48 | unsigned isSigned = |
49 | (TSFlags >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask; |
50 | unsigned bits = |
51 | (TSFlags >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask; |
52 | |
53 | if (isSigned) |
54 | return ~(-1U << (bits - 1)); |
55 | |
56 | return ~(-1U << bits); |
57 | } |
58 | |
59 | // Return true if the instruction must be extended. |
60 | static bool isExtended(uint64_t TSFlags) { |
61 | return (TSFlags >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask; |
62 | } |
63 | |
64 | // Currently just used in an assert statement |
65 | static bool isExtendable(uint64_t TSFlags) LLVM_ATTRIBUTE_UNUSED__attribute__((__unused__)); |
66 | // Return true if the instruction may be extended based on the operand value. |
67 | static bool isExtendable(uint64_t TSFlags) { |
68 | return (TSFlags >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask; |
69 | } |
70 | |
71 | StringRef HexagonInstPrinter::getOpcodeName(unsigned Opcode) const { |
72 | return MII.getName(Opcode); |
73 | } |
74 | |
75 | void HexagonInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { |
76 | OS << getRegisterName(RegNo); |
77 | } |
78 | |
79 | void HexagonInstPrinter::setExtender(MCInst const &MCI) { |
80 | HasExtender = HexagonMCInstrInfo::isImmext(MCI); |
81 | } |
82 | |
83 | void HexagonInstPrinter::printInst(MCInst const *MI, raw_ostream &OS, |
84 | StringRef Annot, |
85 | MCSubtargetInfo const &STI) { |
86 | assert(HexagonMCInstrInfo::isBundle(*MI))((HexagonMCInstrInfo::isBundle(*MI)) ? static_cast<void> (0) : __assert_fail ("HexagonMCInstrInfo::isBundle(*MI)", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 86, __PRETTY_FUNCTION__)); |
87 | assert(HexagonMCInstrInfo::bundleSize(*MI) <= HEXAGON_PACKET_SIZE)((HexagonMCInstrInfo::bundleSize(*MI) <= 4) ? static_cast< void> (0) : __assert_fail ("HexagonMCInstrInfo::bundleSize(*MI) <= 4" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 87, __PRETTY_FUNCTION__)); |
88 | HasExtender = false; |
89 | for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) { |
90 | MCInst const &MCI = *I.getInst(); |
91 | if (HexagonMCInstrInfo::isDuplex(MII, MCI)) { |
92 | printInstruction(MCI.getOperand(1).getInst(), OS); |
93 | OS << '\v'; |
94 | HasExtender = false; |
95 | printInstruction(MCI.getOperand(0).getInst(), OS); |
96 | } else |
97 | printInstruction(&MCI, OS); |
98 | setExtender(MCI); |
99 | OS << "\n"; |
100 | } |
101 | |
102 | auto Separator = ""; |
103 | if (HexagonMCInstrInfo::isInnerLoop(*MI)) { |
104 | OS << Separator; |
105 | Separator = " "; |
106 | MCInst ME; |
107 | ME.setOpcode(Hexagon::ENDLOOP0); |
108 | printInstruction(&ME, OS); |
109 | } |
110 | if (HexagonMCInstrInfo::isOuterLoop(*MI)) { |
111 | OS << Separator; |
112 | Separator = " "; |
Value stored to 'Separator' is never read | |
113 | MCInst ME; |
114 | ME.setOpcode(Hexagon::ENDLOOP1); |
115 | printInstruction(&ME, OS); |
116 | } |
117 | } |
118 | |
119 | void HexagonInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, |
120 | raw_ostream &O) const { |
121 | const MCOperand& MO = MI->getOperand(OpNo); |
122 | |
123 | if (MO.isReg()) { |
124 | printRegName(O, MO.getReg()); |
125 | } else if(MO.isExpr()) { |
126 | MO.getExpr()->print(O, &MAI); |
127 | } else if(MO.isImm()) { |
128 | printImmOperand(MI, OpNo, O); |
129 | } else { |
130 | llvm_unreachable("Unknown operand")::llvm::llvm_unreachable_internal("Unknown operand", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 130); |
131 | } |
132 | } |
133 | |
134 | void HexagonInstPrinter::printImmOperand(const MCInst *MI, unsigned OpNo, |
135 | raw_ostream &O) const { |
136 | const MCOperand& MO = MI->getOperand(OpNo); |
137 | |
138 | if(MO.isExpr()) { |
139 | MO.getExpr()->print(O, &MAI); |
140 | } else if(MO.isImm()) { |
141 | O << MI->getOperand(OpNo).getImm(); |
142 | } else { |
143 | llvm_unreachable("Unknown operand")::llvm::llvm_unreachable_internal("Unknown operand", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 143); |
144 | } |
145 | } |
146 | |
147 | void HexagonInstPrinter::printExtOperand(const MCInst *MI, unsigned OpNo, |
148 | raw_ostream &O) const { |
149 | const MCOperand &MO = MI->getOperand(OpNo); |
150 | const MCInstrDesc &MII = getMII().get(MI->getOpcode()); |
151 | |
152 | assert((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) &&(((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && "Expecting an extendable operand") ? static_cast<void> (0) : __assert_fail ("(isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && \"Expecting an extendable operand\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 153, __PRETTY_FUNCTION__)) |
153 | "Expecting an extendable operand")(((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && "Expecting an extendable operand") ? static_cast<void> (0) : __assert_fail ("(isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && \"Expecting an extendable operand\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 153, __PRETTY_FUNCTION__)); |
154 | |
155 | if (MO.isExpr() || isExtended(MII.TSFlags)) { |
156 | O << "#"; |
157 | } else if (MO.isImm()) { |
158 | int ImmValue = MO.getImm(); |
159 | if (ImmValue < getMinValue(MII.TSFlags) || |
160 | ImmValue > getMaxValue(MII.TSFlags)) |
161 | O << "#"; |
162 | } |
163 | printOperand(MI, OpNo, O); |
164 | } |
165 | |
166 | void HexagonInstPrinter::printUnsignedImmOperand(const MCInst *MI, |
167 | unsigned OpNo, raw_ostream &O) const { |
168 | O << MI->getOperand(OpNo).getImm(); |
169 | } |
170 | |
171 | void HexagonInstPrinter::printNegImmOperand(const MCInst *MI, unsigned OpNo, |
172 | raw_ostream &O) const { |
173 | O << -MI->getOperand(OpNo).getImm(); |
174 | } |
175 | |
176 | void HexagonInstPrinter::printNOneImmOperand(const MCInst *MI, unsigned OpNo, |
177 | raw_ostream &O) const { |
178 | O << -1; |
179 | } |
180 | |
181 | void HexagonInstPrinter::prints3_6ImmOperand(MCInst const *MI, unsigned OpNo, |
182 | raw_ostream &O) const { |
183 | int64_t Imm = MI->getOperand(OpNo).getImm(); |
184 | assert(((Imm & 0x3f) == 0) && "Lower 6 bits must be ZERO.")((((Imm & 0x3f) == 0) && "Lower 6 bits must be ZERO." ) ? static_cast<void> (0) : __assert_fail ("((Imm & 0x3f) == 0) && \"Lower 6 bits must be ZERO.\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 184, __PRETTY_FUNCTION__)); |
185 | O << formatImm(Imm/64); |
186 | } |
187 | |
188 | void HexagonInstPrinter::prints3_7ImmOperand(MCInst const *MI, unsigned OpNo, |
189 | raw_ostream &O) const { |
190 | int64_t Imm = MI->getOperand(OpNo).getImm(); |
191 | assert(((Imm & 0x7f) == 0) && "Lower 7 bits must be ZERO.")((((Imm & 0x7f) == 0) && "Lower 7 bits must be ZERO." ) ? static_cast<void> (0) : __assert_fail ("((Imm & 0x7f) == 0) && \"Lower 7 bits must be ZERO.\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 191, __PRETTY_FUNCTION__)); |
192 | O << formatImm(Imm/128); |
193 | } |
194 | |
195 | void HexagonInstPrinter::prints4_6ImmOperand(MCInst const *MI, unsigned OpNo, |
196 | raw_ostream &O) const { |
197 | int64_t Imm = MI->getOperand(OpNo).getImm(); |
198 | assert(((Imm & 0x3f) == 0) && "Lower 6 bits must be ZERO.")((((Imm & 0x3f) == 0) && "Lower 6 bits must be ZERO." ) ? static_cast<void> (0) : __assert_fail ("((Imm & 0x3f) == 0) && \"Lower 6 bits must be ZERO.\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 198, __PRETTY_FUNCTION__)); |
199 | O << formatImm(Imm/64); |
200 | } |
201 | |
202 | void HexagonInstPrinter::prints4_7ImmOperand(MCInst const *MI, unsigned OpNo, |
203 | raw_ostream &O) const { |
204 | int64_t Imm = MI->getOperand(OpNo).getImm(); |
205 | assert(((Imm & 0x7f) == 0) && "Lower 7 bits must be ZERO.")((((Imm & 0x7f) == 0) && "Lower 7 bits must be ZERO." ) ? static_cast<void> (0) : __assert_fail ("((Imm & 0x7f) == 0) && \"Lower 7 bits must be ZERO.\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 205, __PRETTY_FUNCTION__)); |
206 | O << formatImm(Imm/128); |
207 | } |
208 | |
209 | void HexagonInstPrinter::printMEMriOperand(const MCInst *MI, unsigned OpNo, |
210 | raw_ostream &O) const { |
211 | const MCOperand& MO0 = MI->getOperand(OpNo); |
212 | const MCOperand& MO1 = MI->getOperand(OpNo + 1); |
213 | |
214 | printRegName(O, MO0.getReg()); |
215 | O << " + #" << MO1.getImm(); |
216 | } |
217 | |
218 | void HexagonInstPrinter::printFrameIndexOperand(const MCInst *MI, unsigned OpNo, |
219 | raw_ostream &O) const { |
220 | const MCOperand& MO0 = MI->getOperand(OpNo); |
221 | const MCOperand& MO1 = MI->getOperand(OpNo + 1); |
222 | |
223 | printRegName(O, MO0.getReg()); |
224 | O << ", #" << MO1.getImm(); |
225 | } |
226 | |
227 | void HexagonInstPrinter::printGlobalOperand(const MCInst *MI, unsigned OpNo, |
228 | raw_ostream &O) const { |
229 | assert(MI->getOperand(OpNo).isExpr() && "Expecting expression")((MI->getOperand(OpNo).isExpr() && "Expecting expression" ) ? static_cast<void> (0) : __assert_fail ("MI->getOperand(OpNo).isExpr() && \"Expecting expression\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 229, __PRETTY_FUNCTION__)); |
230 | |
231 | printOperand(MI, OpNo, O); |
232 | } |
233 | |
234 | void HexagonInstPrinter::printJumpTable(const MCInst *MI, unsigned OpNo, |
235 | raw_ostream &O) const { |
236 | assert(MI->getOperand(OpNo).isExpr() && "Expecting expression")((MI->getOperand(OpNo).isExpr() && "Expecting expression" ) ? static_cast<void> (0) : __assert_fail ("MI->getOperand(OpNo).isExpr() && \"Expecting expression\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 236, __PRETTY_FUNCTION__)); |
237 | |
238 | printOperand(MI, OpNo, O); |
239 | } |
240 | |
241 | void HexagonInstPrinter::printConstantPool(const MCInst *MI, unsigned OpNo, |
242 | raw_ostream &O) const { |
243 | assert(MI->getOperand(OpNo).isExpr() && "Expecting expression")((MI->getOperand(OpNo).isExpr() && "Expecting expression" ) ? static_cast<void> (0) : __assert_fail ("MI->getOperand(OpNo).isExpr() && \"Expecting expression\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 243, __PRETTY_FUNCTION__)); |
244 | |
245 | printOperand(MI, OpNo, O); |
246 | } |
247 | |
248 | void HexagonInstPrinter::printBranchOperand(const MCInst *MI, unsigned OpNo, |
249 | raw_ostream &O) const { |
250 | // Branches can take an immediate operand. This is used by the branch |
251 | // selection pass to print $+8, an eight byte displacement from the PC. |
252 | llvm_unreachable("Unknown branch operand.")::llvm::llvm_unreachable_internal("Unknown branch operand.", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 252); |
253 | } |
254 | |
255 | void HexagonInstPrinter::printCallOperand(const MCInst *MI, unsigned OpNo, |
256 | raw_ostream &O) const { |
257 | } |
258 | |
259 | void HexagonInstPrinter::printAbsAddrOperand(const MCInst *MI, unsigned OpNo, |
260 | raw_ostream &O) const { |
261 | } |
262 | |
263 | void HexagonInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo, |
264 | raw_ostream &O) const { |
265 | } |
266 | |
267 | void HexagonInstPrinter::printSymbol(const MCInst *MI, unsigned OpNo, |
268 | raw_ostream &O, bool hi) const { |
269 | assert(MI->getOperand(OpNo).isImm() && "Unknown symbol operand")((MI->getOperand(OpNo).isImm() && "Unknown symbol operand" ) ? static_cast<void> (0) : __assert_fail ("MI->getOperand(OpNo).isImm() && \"Unknown symbol operand\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 269, __PRETTY_FUNCTION__)); |
270 | |
271 | O << '#' << (hi ? "HI" : "LO") << "(#"; |
272 | printOperand(MI, OpNo, O); |
273 | O << ')'; |
274 | } |
275 | |
276 | void HexagonInstPrinter::printExtBrtarget(const MCInst *MI, unsigned OpNo, |
277 | raw_ostream &O) const { |
278 | const MCOperand &MO = MI->getOperand(OpNo); |
279 | const MCInstrDesc &MII = getMII().get(MI->getOpcode()); |
280 | |
281 | assert((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) &&(((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && "Expecting an extendable operand") ? static_cast<void> (0) : __assert_fail ("(isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && \"Expecting an extendable operand\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 282, __PRETTY_FUNCTION__)) |
282 | "Expecting an extendable operand")(((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && "Expecting an extendable operand") ? static_cast<void> (0) : __assert_fail ("(isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) && \"Expecting an extendable operand\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn251506/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp" , 282, __PRETTY_FUNCTION__)); |
283 | |
284 | if (MO.isExpr() || isExtended(MII.TSFlags)) { |
285 | O << "##"; |
286 | } |
287 | printOperand(MI, OpNo, O); |
288 | } |