File: | lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp |
Location: | line 410, column 5 |
Description: | Value stored to 'Res' is never read |
1 | //===-- HexagonMCCodeEmitter.cpp - Hexagon Target Descriptions ------------===// |
2 | // |
3 | // The LLVM Compiler Infrastructure |
4 | // |
5 | // This file is distributed under the University of Illinois Open Source |
6 | // License. See LICENSE.TXT for details. |
7 | // |
8 | //===----------------------------------------------------------------------===// |
9 | |
10 | #include "Hexagon.h" |
11 | #include "MCTargetDesc/HexagonBaseInfo.h" |
12 | #include "MCTargetDesc/HexagonFixupKinds.h" |
13 | #include "MCTargetDesc/HexagonMCCodeEmitter.h" |
14 | #include "MCTargetDesc/HexagonMCInstrInfo.h" |
15 | #include "MCTargetDesc/HexagonMCTargetDesc.h" |
16 | #include "llvm/ADT/Statistic.h" |
17 | #include "llvm/MC/MCCodeEmitter.h" |
18 | #include "llvm/MC/MCContext.h" |
19 | #include "llvm/MC/MCExpr.h" |
20 | #include "llvm/MC/MCInst.h" |
21 | #include "llvm/MC/MCInstrInfo.h" |
22 | #include "llvm/MC/MCRegisterInfo.h" |
23 | #include "llvm/MC/MCSubtargetInfo.h" |
24 | #include "llvm/Support/Debug.h" |
25 | #include "llvm/Support/EndianStream.h" |
26 | #include "llvm/Support/raw_ostream.h" |
27 | |
28 | #define DEBUG_TYPE"mccodeemitter" "mccodeemitter" |
29 | |
30 | using namespace llvm; |
31 | using namespace Hexagon; |
32 | |
33 | STATISTIC(MCNumEmitted, "Number of MC instructions emitted")static llvm::Statistic MCNumEmitted = { "mccodeemitter", "Number of MC instructions emitted" , 0, 0 }; |
34 | |
35 | HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII, |
36 | MCContext &aMCT) |
37 | : MCT(aMCT), MCII(aMII), Addend(new unsigned(0)), |
38 | Extended(new bool(false)), CurrentBundle(new MCInst const *) {} |
39 | |
40 | uint32_t HexagonMCCodeEmitter::parseBits(size_t Instruction, size_t Last, |
41 | MCInst const &MCB, |
42 | MCInst const &MCI) const { |
43 | bool Duplex = HexagonMCInstrInfo::isDuplex(MCII, MCI); |
44 | if (Instruction == 0) { |
45 | if (HexagonMCInstrInfo::isInnerLoop(MCB)) { |
46 | assert(!Duplex)((!Duplex) ? static_cast<void> (0) : __assert_fail ("!Duplex" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 46, __PRETTY_FUNCTION__)); |
47 | assert(Instruction != Last)((Instruction != Last) ? static_cast<void> (0) : __assert_fail ("Instruction != Last", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 47, __PRETTY_FUNCTION__)); |
48 | return HexagonII::INST_PARSE_LOOP_END; |
49 | } |
50 | } |
51 | if (Instruction == 1) { |
52 | if (HexagonMCInstrInfo::isOuterLoop(MCB)) { |
53 | assert(!Duplex)((!Duplex) ? static_cast<void> (0) : __assert_fail ("!Duplex" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 53, __PRETTY_FUNCTION__)); |
54 | assert(Instruction != Last)((Instruction != Last) ? static_cast<void> (0) : __assert_fail ("Instruction != Last", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 54, __PRETTY_FUNCTION__)); |
55 | return HexagonII::INST_PARSE_LOOP_END; |
56 | } |
57 | } |
58 | if (Duplex) { |
59 | assert(Instruction == Last)((Instruction == Last) ? static_cast<void> (0) : __assert_fail ("Instruction == Last", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 59, __PRETTY_FUNCTION__)); |
60 | return HexagonII::INST_PARSE_DUPLEX; |
61 | } |
62 | if(Instruction == Last) |
63 | return HexagonII::INST_PARSE_PACKET_END; |
64 | return HexagonII::INST_PARSE_NOT_END; |
65 | } |
66 | |
67 | void HexagonMCCodeEmitter::encodeInstruction(MCInst const &MI, raw_ostream &OS, |
68 | SmallVectorImpl<MCFixup> &Fixups, |
69 | MCSubtargetInfo const &STI) const { |
70 | MCInst &HMB = const_cast<MCInst &>(MI); |
71 | |
72 | assert(HexagonMCInstrInfo::isBundle(HMB))((HexagonMCInstrInfo::isBundle(HMB)) ? static_cast<void> (0) : __assert_fail ("HexagonMCInstrInfo::isBundle(HMB)", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 72, __PRETTY_FUNCTION__)); |
73 | DEBUG(dbgs() << "Encoding bundle\n";)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Encoding bundle\n";; } } while (0); |
74 | *Addend = 0; |
75 | *Extended = false; |
76 | *CurrentBundle = &MI; |
77 | size_t Instruction = 0; |
78 | size_t Last = HexagonMCInstrInfo::bundleSize(HMB) - 1; |
79 | for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) { |
80 | MCInst &HMI = const_cast<MCInst &>(*I.getInst()); |
81 | EncodeSingleInstruction(HMI, OS, Fixups, STI, |
82 | parseBits(Instruction, Last, HMB, HMI), |
83 | Instruction); |
84 | *Extended = HexagonMCInstrInfo::isImmext(HMI); |
85 | *Addend += HEXAGON_INSTR_SIZE4; |
86 | ++Instruction; |
87 | } |
88 | return; |
89 | } |
90 | |
91 | /// EncodeSingleInstruction - Emit a single |
92 | void HexagonMCCodeEmitter::EncodeSingleInstruction( |
93 | const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, |
94 | const MCSubtargetInfo &STI, uint32_t Parse, size_t Index) const { |
95 | MCInst HMB = MI; |
96 | assert(!HexagonMCInstrInfo::isBundle(HMB))((!HexagonMCInstrInfo::isBundle(HMB)) ? static_cast<void> (0) : __assert_fail ("!HexagonMCInstrInfo::isBundle(HMB)", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 96, __PRETTY_FUNCTION__)); |
97 | uint64_t Binary; |
98 | |
99 | // Compound instructions are limited to using registers 0-7 and 16-23 |
100 | // and here we make a map 16-23 to 8-15 so they can be correctly encoded. |
101 | static unsigned RegMap[8] = {Hexagon::R8, Hexagon::R9, Hexagon::R10, |
102 | Hexagon::R11, Hexagon::R12, Hexagon::R13, |
103 | Hexagon::R14, Hexagon::R15}; |
104 | |
105 | // Pseudo instructions don't get encoded and shouldn't be here |
106 | // in the first place! |
107 | assert(!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() &&((!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() && "pseudo-instruction found") ? static_cast<void> (0) : __assert_fail ("!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() && \"pseudo-instruction found\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 108, __PRETTY_FUNCTION__)) |
108 | "pseudo-instruction found")((!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() && "pseudo-instruction found") ? static_cast<void> (0) : __assert_fail ("!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() && \"pseudo-instruction found\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 108, __PRETTY_FUNCTION__)); |
109 | DEBUG(dbgs() << "Encoding insn"do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Encoding insn" " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'" "\n"; } } while (0) |
110 | " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Encoding insn" " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'" "\n"; } } while (0) |
111 | "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Encoding insn" " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'" "\n"; } } while (0); |
112 | |
113 | if (llvm::HexagonMCInstrInfo::getType(MCII, HMB) == HexagonII::TypeCOMPOUND) { |
114 | for (unsigned i = 0; i < HMB.getNumOperands(); ++i) |
115 | if (HMB.getOperand(i).isReg()) { |
116 | unsigned Reg = |
117 | MCT.getRegisterInfo()->getEncodingValue(HMB.getOperand(i).getReg()); |
118 | if ((Reg <= 23) && (Reg >= 16)) |
119 | HMB.getOperand(i).setReg(RegMap[Reg - 16]); |
120 | } |
121 | } |
122 | |
123 | if (HexagonMCInstrInfo::isNewValue(MCII, HMB)) { |
124 | // Calculate the new value distance to the associated producer |
125 | MCOperand &MCO = |
126 | HMB.getOperand(HexagonMCInstrInfo::getNewValueOp(MCII, HMB)); |
127 | unsigned SOffset = 0; |
128 | unsigned Register = MCO.getReg(); |
129 | unsigned Register1; |
130 | auto Instructions = HexagonMCInstrInfo::bundleInstructions(**CurrentBundle); |
131 | auto i = Instructions.begin() + Index - 1; |
132 | for (;; --i) { |
133 | assert(i != Instructions.begin() - 1 && "Couldn't find producer")((i != Instructions.begin() - 1 && "Couldn't find producer" ) ? static_cast<void> (0) : __assert_fail ("i != Instructions.begin() - 1 && \"Couldn't find producer\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 133, __PRETTY_FUNCTION__)); |
134 | MCInst const &Inst = *i->getInst(); |
135 | if (HexagonMCInstrInfo::isImmext(Inst)) |
136 | continue; |
137 | ++SOffset; |
138 | Register1 = |
139 | HexagonMCInstrInfo::hasNewValue(MCII, Inst) |
140 | ? HexagonMCInstrInfo::getNewValueOperand(MCII, Inst).getReg() |
141 | : static_cast<unsigned>(Hexagon::NoRegister); |
142 | if (Register != Register1) |
143 | // This isn't the register we're looking for |
144 | continue; |
145 | if (!HexagonMCInstrInfo::isPredicated(MCII, Inst)) |
146 | // Producer is unpredicated |
147 | break; |
148 | assert(HexagonMCInstrInfo::isPredicated(MCII, HMB) &&((HexagonMCInstrInfo::isPredicated(MCII, HMB) && "Unpredicated consumer depending on predicated producer" ) ? static_cast<void> (0) : __assert_fail ("HexagonMCInstrInfo::isPredicated(MCII, HMB) && \"Unpredicated consumer depending on predicated producer\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 149, __PRETTY_FUNCTION__)) |
149 | "Unpredicated consumer depending on predicated producer")((HexagonMCInstrInfo::isPredicated(MCII, HMB) && "Unpredicated consumer depending on predicated producer" ) ? static_cast<void> (0) : __assert_fail ("HexagonMCInstrInfo::isPredicated(MCII, HMB) && \"Unpredicated consumer depending on predicated producer\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 149, __PRETTY_FUNCTION__)); |
150 | if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) == |
151 | HexagonMCInstrInfo::isPredicatedTrue(MCII, HMB)) |
152 | // Producer predicate sense matched ours |
153 | break; |
154 | } |
155 | // Hexagon PRM 10.11 Construct Nt from distance |
156 | unsigned Offset = SOffset; |
157 | Offset <<= 1; |
158 | MCO.setReg(Offset + Hexagon::R0); |
159 | } |
160 | |
161 | Binary = getBinaryCodeForInstr(HMB, Fixups, STI); |
162 | // Check for unimplemented instructions. Immediate extenders |
163 | // are encoded as zero, so they need to be accounted for. |
164 | if ((!Binary) && |
165 | ((HMB.getOpcode() != DuplexIClass0) && (HMB.getOpcode() != A4_ext) && |
166 | (HMB.getOpcode() != A4_ext_b) && (HMB.getOpcode() != A4_ext_c) && |
167 | (HMB.getOpcode() != A4_ext_g))) { |
168 | // Use a A2_nop for unimplemented instructions. |
169 | DEBUG(dbgs() << "Unimplemented inst: "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Unimplemented inst: " " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'" "\n"; } } while (0) |
170 | " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Unimplemented inst: " " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'" "\n"; } } while (0) |
171 | "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Unimplemented inst: " " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'" "\n"; } } while (0); |
172 | llvm_unreachable("Unimplemented Instruction")::llvm::llvm_unreachable_internal("Unimplemented Instruction" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 172); |
173 | } |
174 | Binary |= Parse; |
175 | |
176 | // if we need to emit a duplexed instruction |
177 | if (HMB.getOpcode() >= Hexagon::DuplexIClass0 && |
178 | HMB.getOpcode() <= Hexagon::DuplexIClassF) { |
179 | assert(Parse == HexagonII::INST_PARSE_DUPLEX &&((Parse == HexagonII::INST_PARSE_DUPLEX && "Emitting duplex without duplex parse bits" ) ? static_cast<void> (0) : __assert_fail ("Parse == HexagonII::INST_PARSE_DUPLEX && \"Emitting duplex without duplex parse bits\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 180, __PRETTY_FUNCTION__)) |
180 | "Emitting duplex without duplex parse bits")((Parse == HexagonII::INST_PARSE_DUPLEX && "Emitting duplex without duplex parse bits" ) ? static_cast<void> (0) : __assert_fail ("Parse == HexagonII::INST_PARSE_DUPLEX && \"Emitting duplex without duplex parse bits\"" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 180, __PRETTY_FUNCTION__)); |
181 | unsigned dupIClass; |
182 | switch (HMB.getOpcode()) { |
183 | case Hexagon::DuplexIClass0: |
184 | dupIClass = 0; |
185 | break; |
186 | case Hexagon::DuplexIClass1: |
187 | dupIClass = 1; |
188 | break; |
189 | case Hexagon::DuplexIClass2: |
190 | dupIClass = 2; |
191 | break; |
192 | case Hexagon::DuplexIClass3: |
193 | dupIClass = 3; |
194 | break; |
195 | case Hexagon::DuplexIClass4: |
196 | dupIClass = 4; |
197 | break; |
198 | case Hexagon::DuplexIClass5: |
199 | dupIClass = 5; |
200 | break; |
201 | case Hexagon::DuplexIClass6: |
202 | dupIClass = 6; |
203 | break; |
204 | case Hexagon::DuplexIClass7: |
205 | dupIClass = 7; |
206 | break; |
207 | case Hexagon::DuplexIClass8: |
208 | dupIClass = 8; |
209 | break; |
210 | case Hexagon::DuplexIClass9: |
211 | dupIClass = 9; |
212 | break; |
213 | case Hexagon::DuplexIClassA: |
214 | dupIClass = 10; |
215 | break; |
216 | case Hexagon::DuplexIClassB: |
217 | dupIClass = 11; |
218 | break; |
219 | case Hexagon::DuplexIClassC: |
220 | dupIClass = 12; |
221 | break; |
222 | case Hexagon::DuplexIClassD: |
223 | dupIClass = 13; |
224 | break; |
225 | case Hexagon::DuplexIClassE: |
226 | dupIClass = 14; |
227 | break; |
228 | case Hexagon::DuplexIClassF: |
229 | dupIClass = 15; |
230 | break; |
231 | default: |
232 | llvm_unreachable("Unimplemented DuplexIClass")::llvm::llvm_unreachable_internal("Unimplemented DuplexIClass" , "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 232); |
233 | break; |
234 | } |
235 | // 29 is the bit position. |
236 | // 0b1110 =0xE bits are masked off and down shifted by 1 bit. |
237 | // Last bit is moved to bit position 13 |
238 | Binary = ((dupIClass & 0xE) << (29 - 1)) | ((dupIClass & 0x1) << 13); |
239 | |
240 | const MCInst *subInst0 = HMB.getOperand(0).getInst(); |
241 | const MCInst *subInst1 = HMB.getOperand(1).getInst(); |
242 | |
243 | // get subinstruction slot 0 |
244 | unsigned subInstSlot0Bits = getBinaryCodeForInstr(*subInst0, Fixups, STI); |
245 | // get subinstruction slot 1 |
246 | unsigned subInstSlot1Bits = getBinaryCodeForInstr(*subInst1, Fixups, STI); |
247 | |
248 | Binary |= subInstSlot0Bits | (subInstSlot1Bits << 16); |
249 | } |
250 | support::endian::Writer<support::little>(OS).write<uint32_t>(Binary); |
251 | ++MCNumEmitted; |
252 | } |
253 | |
254 | static Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI, |
255 | const MCOperand &MO, |
256 | const MCSymbolRefExpr::VariantKind kind) { |
257 | const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI); |
258 | unsigned insnType = llvm::HexagonMCInstrInfo::getType(MCII, MI); |
259 | |
260 | if (insnType == HexagonII::TypePREFIX) { |
261 | switch (kind) { |
262 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
263 | return Hexagon::fixup_Hexagon_GOTREL_32_6_X; |
264 | case llvm::MCSymbolRefExpr::VK_GOT: |
265 | return Hexagon::fixup_Hexagon_GOT_32_6_X; |
266 | case llvm::MCSymbolRefExpr::VK_TPREL: |
267 | return Hexagon::fixup_Hexagon_TPREL_32_6_X; |
268 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
269 | return Hexagon::fixup_Hexagon_DTPREL_32_6_X; |
270 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
271 | return Hexagon::fixup_Hexagon_GD_GOT_32_6_X; |
272 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
273 | return Hexagon::fixup_Hexagon_LD_GOT_32_6_X; |
274 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE: |
275 | return Hexagon::fixup_Hexagon_IE_32_6_X; |
276 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
277 | return Hexagon::fixup_Hexagon_IE_GOT_32_6_X; |
278 | default: |
279 | if (MCID.isBranch()) |
280 | return Hexagon::fixup_Hexagon_B32_PCREL_X; |
281 | else |
282 | return Hexagon::fixup_Hexagon_32_6_X; |
283 | } |
284 | } else if (MCID.isBranch()) |
285 | return (Hexagon::fixup_Hexagon_B13_PCREL); |
286 | |
287 | switch (MCID.getOpcode()) { |
288 | case Hexagon::HI: |
289 | case Hexagon::A2_tfrih: |
290 | switch (kind) { |
291 | case llvm::MCSymbolRefExpr::VK_GOT: |
292 | return Hexagon::fixup_Hexagon_GOT_HI16; |
293 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
294 | return Hexagon::fixup_Hexagon_GOTREL_HI16; |
295 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
296 | return Hexagon::fixup_Hexagon_GD_GOT_HI16; |
297 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
298 | return Hexagon::fixup_Hexagon_LD_GOT_HI16; |
299 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE: |
300 | return Hexagon::fixup_Hexagon_IE_HI16; |
301 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
302 | return Hexagon::fixup_Hexagon_IE_GOT_HI16; |
303 | case llvm::MCSymbolRefExpr::VK_TPREL: |
304 | return Hexagon::fixup_Hexagon_TPREL_HI16; |
305 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
306 | return Hexagon::fixup_Hexagon_DTPREL_HI16; |
307 | default: |
308 | return Hexagon::fixup_Hexagon_HI16; |
309 | } |
310 | |
311 | case Hexagon::LO: |
312 | case Hexagon::A2_tfril: |
313 | switch (kind) { |
314 | case llvm::MCSymbolRefExpr::VK_GOT: |
315 | return Hexagon::fixup_Hexagon_GOT_LO16; |
316 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
317 | return Hexagon::fixup_Hexagon_GOTREL_LO16; |
318 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
319 | return Hexagon::fixup_Hexagon_GD_GOT_LO16; |
320 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
321 | return Hexagon::fixup_Hexagon_LD_GOT_LO16; |
322 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE: |
323 | return Hexagon::fixup_Hexagon_IE_LO16; |
324 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
325 | return Hexagon::fixup_Hexagon_IE_GOT_LO16; |
326 | case llvm::MCSymbolRefExpr::VK_TPREL: |
327 | return Hexagon::fixup_Hexagon_TPREL_LO16; |
328 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
329 | return Hexagon::fixup_Hexagon_DTPREL_LO16; |
330 | default: |
331 | return Hexagon::fixup_Hexagon_LO16; |
332 | } |
333 | |
334 | // The only relocs left should be GP relative: |
335 | default: |
336 | if (MCID.mayStore() || MCID.mayLoad()) { |
337 | for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; |
338 | ++ImpUses) { |
339 | if (*ImpUses == Hexagon::GP) { |
340 | switch (HexagonMCInstrInfo::getAccessSize(MCII, MI)) { |
341 | case HexagonII::MemAccessSize::ByteAccess: |
342 | return fixup_Hexagon_GPREL16_0; |
343 | case HexagonII::MemAccessSize::HalfWordAccess: |
344 | return fixup_Hexagon_GPREL16_1; |
345 | case HexagonII::MemAccessSize::WordAccess: |
346 | return fixup_Hexagon_GPREL16_2; |
347 | case HexagonII::MemAccessSize::DoubleWordAccess: |
348 | return fixup_Hexagon_GPREL16_3; |
349 | default: |
350 | llvm_unreachable("unhandled fixup")::llvm::llvm_unreachable_internal("unhandled fixup", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 350); |
351 | } |
352 | } |
353 | } |
354 | } else |
355 | llvm_unreachable("unhandled fixup")::llvm::llvm_unreachable_internal("unhandled fixup", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 355); |
356 | } |
357 | |
358 | return LastTargetFixupKind; |
359 | } |
360 | |
361 | namespace llvm { |
362 | extern const MCInstrDesc HexagonInsts[]; |
363 | } |
364 | |
365 | namespace { |
366 | bool isPCRel (unsigned Kind) { |
367 | switch(Kind){ |
368 | case fixup_Hexagon_B22_PCREL: |
369 | case fixup_Hexagon_B15_PCREL: |
370 | case fixup_Hexagon_B7_PCREL: |
371 | case fixup_Hexagon_B13_PCREL: |
372 | case fixup_Hexagon_B9_PCREL: |
373 | case fixup_Hexagon_B32_PCREL_X: |
374 | case fixup_Hexagon_B22_PCREL_X: |
375 | case fixup_Hexagon_B15_PCREL_X: |
376 | case fixup_Hexagon_B13_PCREL_X: |
377 | case fixup_Hexagon_B9_PCREL_X: |
378 | case fixup_Hexagon_B7_PCREL_X: |
379 | case fixup_Hexagon_32_PCREL: |
380 | case fixup_Hexagon_PLT_B22_PCREL: |
381 | case fixup_Hexagon_GD_PLT_B22_PCREL: |
382 | case fixup_Hexagon_LD_PLT_B22_PCREL: |
383 | case fixup_Hexagon_6_PCREL_X: |
384 | return true; |
385 | default: |
386 | return false; |
387 | } |
388 | } |
389 | } |
390 | |
391 | unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI, |
392 | const MCOperand &MO, |
393 | const MCExpr *ME, |
394 | SmallVectorImpl<MCFixup> &Fixups, |
395 | const MCSubtargetInfo &STI) const |
396 | |
397 | { |
398 | int64_t Res; |
399 | |
400 | if (ME->evaluateAsAbsolute(Res)) |
401 | return Res; |
402 | |
403 | MCExpr::ExprKind MK = ME->getKind(); |
404 | if (MK == MCExpr::Constant) { |
405 | return cast<MCConstantExpr>(ME)->getValue(); |
406 | } |
407 | if (MK == MCExpr::Binary) { |
408 | unsigned Res; |
409 | Res = getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getLHS(), Fixups, STI); |
410 | Res += |
Value stored to 'Res' is never read | |
411 | getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getRHS(), Fixups, STI); |
412 | return 0; |
413 | } |
414 | |
415 | assert(MK == MCExpr::SymbolRef)((MK == MCExpr::SymbolRef) ? static_cast<void> (0) : __assert_fail ("MK == MCExpr::SymbolRef", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 415, __PRETTY_FUNCTION__)); |
416 | |
417 | Hexagon::Fixups FixupKind = |
418 | Hexagon::Fixups(Hexagon::fixup_Hexagon_TPREL_LO16); |
419 | const MCSymbolRefExpr *MCSRE = static_cast<const MCSymbolRefExpr *>(ME); |
420 | const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI); |
421 | unsigned bits = HexagonMCInstrInfo::getExtentBits(MCII, MI) - |
422 | HexagonMCInstrInfo::getExtentAlignment(MCII, MI); |
423 | const MCSymbolRefExpr::VariantKind kind = MCSRE->getKind(); |
424 | |
425 | DEBUG(dbgs() << "----------------------------------------\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "----------------------------------------\n" ; } } while (0); |
426 | DEBUG(dbgs() << "Opcode Name: " << HexagonMCInstrInfo::getName(MCII, MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Opcode Name: " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; } } while (0) |
427 | << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Opcode Name: " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; } } while (0); |
428 | DEBUG(dbgs() << "Opcode: " << MCID.getOpcode() << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Opcode: " << MCID .getOpcode() << "\n"; } } while (0); |
429 | DEBUG(dbgs() << "Relocation bits: " << bits << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Relocation bits: " << bits << "\n"; } } while (0); |
430 | DEBUG(dbgs() << "Addend: " << *Addend << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "Addend: " << *Addend << "\n"; } } while (0); |
431 | DEBUG(dbgs() << "----------------------------------------\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "----------------------------------------\n" ; } } while (0); |
432 | |
433 | switch (bits) { |
434 | default: |
435 | DEBUG(dbgs() << "unrecognized bit count of " << bits << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType ("mccodeemitter")) { dbgs() << "unrecognized bit count of " << bits << '\n'; } } while (0); |
436 | break; |
437 | |
438 | case 32: |
439 | switch (kind) { |
440 | case llvm::MCSymbolRefExpr::VK_Hexagon_PCREL: |
441 | FixupKind = Hexagon::fixup_Hexagon_32_PCREL; |
442 | break; |
443 | case llvm::MCSymbolRefExpr::VK_GOT: |
444 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_GOT_32_6_X |
445 | : Hexagon::fixup_Hexagon_GOT_32; |
446 | break; |
447 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
448 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_GOTREL_32_6_X |
449 | : Hexagon::fixup_Hexagon_GOTREL_32; |
450 | break; |
451 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
452 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_GD_GOT_32_6_X |
453 | : Hexagon::fixup_Hexagon_GD_GOT_32; |
454 | break; |
455 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
456 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_LD_GOT_32_6_X |
457 | : Hexagon::fixup_Hexagon_LD_GOT_32; |
458 | break; |
459 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE: |
460 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_IE_32_6_X |
461 | : Hexagon::fixup_Hexagon_IE_32; |
462 | break; |
463 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
464 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_IE_GOT_32_6_X |
465 | : Hexagon::fixup_Hexagon_IE_GOT_32; |
466 | break; |
467 | case llvm::MCSymbolRefExpr::VK_TPREL: |
468 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_TPREL_32_6_X |
469 | : Hexagon::fixup_Hexagon_TPREL_32; |
470 | break; |
471 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
472 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_DTPREL_32_6_X |
473 | : Hexagon::fixup_Hexagon_DTPREL_32; |
474 | break; |
475 | default: |
476 | FixupKind = |
477 | *Extended ? Hexagon::fixup_Hexagon_32_6_X : Hexagon::fixup_Hexagon_32; |
478 | break; |
479 | } |
480 | break; |
481 | |
482 | case 22: |
483 | switch (kind) { |
484 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_PLT: |
485 | FixupKind = Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL; |
486 | break; |
487 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_PLT: |
488 | FixupKind = Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL; |
489 | break; |
490 | default: |
491 | if (MCID.isBranch() || MCID.isCall()) { |
492 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_B22_PCREL_X |
493 | : Hexagon::fixup_Hexagon_B22_PCREL; |
494 | } else { |
495 | errs() << "unrecognized relocation, bits: " << bits << "\n"; |
496 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
497 | } |
498 | break; |
499 | } |
500 | break; |
501 | |
502 | case 16: |
503 | if (*Extended) { |
504 | switch (kind) { |
505 | default: |
506 | FixupKind = Hexagon::fixup_Hexagon_16_X; |
507 | break; |
508 | case llvm::MCSymbolRefExpr::VK_GOT: |
509 | FixupKind = Hexagon::fixup_Hexagon_GOT_16_X; |
510 | break; |
511 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
512 | FixupKind = Hexagon::fixup_Hexagon_GOTREL_16_X; |
513 | break; |
514 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
515 | FixupKind = Hexagon::fixup_Hexagon_GD_GOT_16_X; |
516 | break; |
517 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
518 | FixupKind = Hexagon::fixup_Hexagon_LD_GOT_16_X; |
519 | break; |
520 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE: |
521 | FixupKind = Hexagon::fixup_Hexagon_IE_16_X; |
522 | break; |
523 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
524 | FixupKind = Hexagon::fixup_Hexagon_IE_GOT_16_X; |
525 | break; |
526 | case llvm::MCSymbolRefExpr::VK_TPREL: |
527 | FixupKind = Hexagon::fixup_Hexagon_TPREL_16_X; |
528 | break; |
529 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
530 | FixupKind = Hexagon::fixup_Hexagon_DTPREL_16_X; |
531 | break; |
532 | } |
533 | } else |
534 | switch (kind) { |
535 | default: |
536 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
537 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
538 | break; |
539 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
540 | if ((MCID.getOpcode() == Hexagon::HI) || |
541 | (MCID.getOpcode() == Hexagon::LO_H)) |
542 | FixupKind = Hexagon::fixup_Hexagon_GOTREL_HI16; |
543 | else |
544 | FixupKind = Hexagon::fixup_Hexagon_GOTREL_LO16; |
545 | break; |
546 | case llvm::MCSymbolRefExpr::VK_Hexagon_GPREL: |
547 | FixupKind = Hexagon::fixup_Hexagon_GPREL16_0; |
548 | break; |
549 | case llvm::MCSymbolRefExpr::VK_Hexagon_LO16: |
550 | FixupKind = Hexagon::fixup_Hexagon_LO16; |
551 | break; |
552 | case llvm::MCSymbolRefExpr::VK_Hexagon_HI16: |
553 | FixupKind = Hexagon::fixup_Hexagon_HI16; |
554 | break; |
555 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
556 | FixupKind = Hexagon::fixup_Hexagon_GD_GOT_16; |
557 | break; |
558 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
559 | FixupKind = Hexagon::fixup_Hexagon_LD_GOT_16; |
560 | break; |
561 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
562 | FixupKind = Hexagon::fixup_Hexagon_IE_GOT_16; |
563 | break; |
564 | case llvm::MCSymbolRefExpr::VK_TPREL: |
565 | FixupKind = Hexagon::fixup_Hexagon_TPREL_16; |
566 | break; |
567 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
568 | FixupKind = Hexagon::fixup_Hexagon_DTPREL_16; |
569 | break; |
570 | } |
571 | break; |
572 | |
573 | case 15: |
574 | if (MCID.isBranch() || MCID.isCall()) |
575 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_B15_PCREL_X |
576 | : Hexagon::fixup_Hexagon_B15_PCREL; |
577 | break; |
578 | |
579 | case 13: |
580 | if (MCID.isBranch()) |
581 | FixupKind = Hexagon::fixup_Hexagon_B13_PCREL; |
582 | else { |
583 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
584 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
585 | } |
586 | break; |
587 | |
588 | case 12: |
589 | if (*Extended) |
590 | switch (kind) { |
591 | default: |
592 | FixupKind = Hexagon::fixup_Hexagon_12_X; |
593 | break; |
594 | // There isn't a GOT_12_X, both 11_X and 16_X resolve to 6/26 |
595 | case llvm::MCSymbolRefExpr::VK_GOT: |
596 | FixupKind = Hexagon::fixup_Hexagon_GOT_16_X; |
597 | break; |
598 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
599 | FixupKind = Hexagon::fixup_Hexagon_GOTREL_16_X; |
600 | break; |
601 | } |
602 | else { |
603 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
604 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
605 | } |
606 | break; |
607 | |
608 | case 11: |
609 | if (*Extended) |
610 | switch (kind) { |
611 | default: |
612 | FixupKind = Hexagon::fixup_Hexagon_11_X; |
613 | break; |
614 | case llvm::MCSymbolRefExpr::VK_GOT: |
615 | FixupKind = Hexagon::fixup_Hexagon_GOT_11_X; |
616 | break; |
617 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
618 | FixupKind = Hexagon::fixup_Hexagon_GOTREL_11_X; |
619 | break; |
620 | case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT: |
621 | FixupKind = Hexagon::fixup_Hexagon_GD_GOT_11_X; |
622 | break; |
623 | case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT: |
624 | FixupKind = Hexagon::fixup_Hexagon_LD_GOT_11_X; |
625 | break; |
626 | case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT: |
627 | FixupKind = Hexagon::fixup_Hexagon_IE_GOT_11_X; |
628 | break; |
629 | case llvm::MCSymbolRefExpr::VK_TPREL: |
630 | FixupKind = Hexagon::fixup_Hexagon_TPREL_11_X; |
631 | break; |
632 | case llvm::MCSymbolRefExpr::VK_DTPREL: |
633 | FixupKind = Hexagon::fixup_Hexagon_DTPREL_11_X; |
634 | break; |
635 | } |
636 | else { |
637 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
638 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
639 | } |
640 | break; |
641 | |
642 | case 10: |
643 | if (*Extended) |
644 | FixupKind = Hexagon::fixup_Hexagon_10_X; |
645 | break; |
646 | |
647 | case 9: |
648 | if (MCID.isBranch() || |
649 | (llvm::HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCR)) |
650 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_B9_PCREL_X |
651 | : Hexagon::fixup_Hexagon_B9_PCREL; |
652 | else if (*Extended) |
653 | FixupKind = Hexagon::fixup_Hexagon_9_X; |
654 | else { |
655 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
656 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
657 | } |
658 | break; |
659 | |
660 | case 8: |
661 | if (*Extended) |
662 | FixupKind = Hexagon::fixup_Hexagon_8_X; |
663 | else { |
664 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
665 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
666 | } |
667 | break; |
668 | |
669 | case 7: |
670 | if (MCID.isBranch() || |
671 | (llvm::HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCR)) |
672 | FixupKind = *Extended ? Hexagon::fixup_Hexagon_B7_PCREL_X |
673 | : Hexagon::fixup_Hexagon_B7_PCREL; |
674 | else if (*Extended) |
675 | FixupKind = Hexagon::fixup_Hexagon_7_X; |
676 | else { |
677 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
678 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
679 | } |
680 | break; |
681 | |
682 | case 6: |
683 | if (*Extended) { |
684 | switch (kind) { |
685 | default: |
686 | FixupKind = Hexagon::fixup_Hexagon_6_X; |
687 | break; |
688 | case llvm::MCSymbolRefExpr::VK_Hexagon_PCREL: |
689 | FixupKind = Hexagon::fixup_Hexagon_6_PCREL_X; |
690 | break; |
691 | // This is part of an extender, GOT_11 is a |
692 | // Word32_U6 unsigned/truncated reloc. |
693 | case llvm::MCSymbolRefExpr::VK_GOT: |
694 | FixupKind = Hexagon::fixup_Hexagon_GOT_11_X; |
695 | break; |
696 | case llvm::MCSymbolRefExpr::VK_GOTOFF: |
697 | FixupKind = Hexagon::fixup_Hexagon_GOTREL_11_X; |
698 | break; |
699 | } |
700 | } else { |
701 | errs() << "unrecognized relocation, bits " << bits << "\n"; |
702 | errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n"; |
703 | } |
704 | break; |
705 | |
706 | case 0: |
707 | FixupKind = getFixupNoBits(MCII, MI, MO, kind); |
708 | break; |
709 | } |
710 | |
711 | MCExpr const *FixupExpression = (*Addend > 0 && isPCRel(FixupKind)) ? |
712 | MCBinaryExpr::createAdd(MO.getExpr(), |
713 | MCConstantExpr::create(*Addend, MCT), MCT) : |
714 | MO.getExpr(); |
715 | |
716 | MCFixup fixup = MCFixup::create(*Addend, FixupExpression, |
717 | MCFixupKind(FixupKind), MI.getLoc()); |
718 | Fixups.push_back(fixup); |
719 | // All of the information is in the fixup. |
720 | return (0); |
721 | } |
722 | |
723 | unsigned |
724 | HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, |
725 | SmallVectorImpl<MCFixup> &Fixups, |
726 | MCSubtargetInfo const &STI) const { |
727 | if (MO.isReg()) |
728 | return MCT.getRegisterInfo()->getEncodingValue(MO.getReg()); |
729 | if (MO.isImm()) |
730 | return static_cast<unsigned>(MO.getImm()); |
731 | |
732 | // MO must be an ME. |
733 | assert(MO.isExpr())((MO.isExpr()) ? static_cast<void> (0) : __assert_fail ( "MO.isExpr()", "/tmp/buildd/llvm-toolchain-snapshot-3.8~svn253036/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp" , 733, __PRETTY_FUNCTION__)); |
734 | return getExprOpValue(MI, MO, MO.getExpr(), Fixups, STI); |
735 | } |
736 | |
737 | MCCodeEmitter *llvm::createHexagonMCCodeEmitter(MCInstrInfo const &MII, |
738 | MCRegisterInfo const &MRI, |
739 | MCContext &MCT) { |
740 | return new HexagonMCCodeEmitter(MII, MCT); |
741 | } |
742 | |
743 | #include "HexagonGenMCCodeEmitter.inc" |