Bug Summary

File:lib/CodeGen/GlobalISel/InstructionSelect.cpp
Warning:line 36, column 40
Called C++ object pointer is null

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name InstructionSelect.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-eagerly-assume -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-7/lib/clang/7.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/CodeGen/GlobalISel -I /build/llvm-toolchain-snapshot-7~svn329677/lib/CodeGen/GlobalISel -I /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/include -I /build/llvm-toolchain-snapshot-7~svn329677/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/c++/7.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/x86_64-linux-gnu/c++/7.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/x86_64-linux-gnu/c++/7.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/c++/7.3.0/backward -internal-isystem /usr/include/clang/7.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-7/lib/clang/7.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/CodeGen/GlobalISel -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-checker optin.performance.Padding -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-04-11-031539-24776-1 -x c++ /build/llvm-toolchain-snapshot-7~svn329677/lib/CodeGen/GlobalISel/InstructionSelect.cpp

/build/llvm-toolchain-snapshot-7~svn329677/lib/CodeGen/GlobalISel/InstructionSelect.cpp

1//===- llvm/CodeGen/GlobalISel/InstructionSelect.cpp - InstructionSelect ---==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file implements the InstructionSelect class.
11//===----------------------------------------------------------------------===//
12
13#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
14#include "llvm/ADT/PostOrderIterator.h"
15#include "llvm/ADT/Twine.h"
16#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
17#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
18#include "llvm/CodeGen/GlobalISel/Utils.h"
19#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
20#include "llvm/CodeGen/MachineRegisterInfo.h"
21#include "llvm/CodeGen/TargetLowering.h"
22#include "llvm/CodeGen/TargetPassConfig.h"
23#include "llvm/CodeGen/TargetSubtargetInfo.h"
24#include "llvm/Config/config.h"
25#include "llvm/IR/Constants.h"
26#include "llvm/IR/Function.h"
27#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
29#include "llvm/Support/TargetRegistry.h"
30
31#define DEBUG_TYPE"instruction-select" "instruction-select"
32
33using namespace llvm;
34
35#ifdef LLVM_GISEL_COV_PREFIX
36static cl::opt<std::string>
37 CoveragePrefix("gisel-coverage-prefix", cl::init(LLVM_GISEL_COV_PREFIX),
38 cl::desc("Record GlobalISel rule coverage files of this "
39 "prefix if instrumentation was generated"));
40#else
41static const std::string CoveragePrefix = "";
42#endif
43
44char InstructionSelect::ID = 0;
45INITIALIZE_PASS_BEGIN(InstructionSelect, DEBUG_TYPE,static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
46 "Select target instructions out of generic instructions",static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
47 false, false)static void *initializeInstructionSelectPassOnce(PassRegistry
&Registry) {
48INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)initializeTargetPassConfigPass(Registry);
49INITIALIZE_PASS_END(InstructionSelect, DEBUG_TYPE,PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
50 "Select target instructions out of generic instructions",PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
51 false, false)PassInfo *PI = new PassInfo( "Select target instructions out of generic instructions"
, "instruction-select", &InstructionSelect::ID, PassInfo::
NormalCtor_t(callDefaultCtor<InstructionSelect>), false
, false); Registry.registerPass(*PI, true); return PI; } static
llvm::once_flag InitializeInstructionSelectPassFlag; void llvm
::initializeInstructionSelectPass(PassRegistry &Registry)
{ llvm::call_once(InitializeInstructionSelectPassFlag, initializeInstructionSelectPassOnce
, std::ref(Registry)); }
52
53InstructionSelect::InstructionSelect() : MachineFunctionPass(ID) {
54 initializeInstructionSelectPass(*PassRegistry::getPassRegistry());
55}
56
57void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {
58 AU.addRequired<TargetPassConfig>();
59 MachineFunctionPass::getAnalysisUsage(AU);
60}
61
62bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
63 // If the ISel pipeline failed, do not bother running that pass.
64 if (MF.getProperties().hasProperty(
1
Taking false branch
65 MachineFunctionProperties::Property::FailedISel))
66 return false;
67
68 DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n')do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Selecting function: "
<< MF.getName() << '\n'; } } while (false)
;
69
70 const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
71 const InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
72 CodeGenCoverage CoverageInfo;
73 assert(ISel && "Cannot work without InstructionSelector")(static_cast <bool> (ISel && "Cannot work without InstructionSelector"
) ? void (0) : __assert_fail ("ISel && \"Cannot work without InstructionSelector\""
, "/build/llvm-toolchain-snapshot-7~svn329677/lib/CodeGen/GlobalISel/InstructionSelect.cpp"
, 73, __extension__ __PRETTY_FUNCTION__))
;
74
75 // An optimization remark emitter. Used to report failures.
76 MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
77
78 // FIXME: There are many other MF/MFI fields we need to initialize.
79
80 const MachineRegisterInfo &MRI = MF.getRegInfo();
81#ifndef NDEBUG
82 // Check that our input is fully legal: we require the function to have the
83 // Legalized property, so it should be.
84 // FIXME: This should be in the MachineVerifier, as the RegBankSelected
85 // property check already is.
86 if (!DisableGISelLegalityCheck)
2
Assuming the condition is false
3
Taking false branch
87 if (const MachineInstr *MI = machineFunctionIsIllegal(MF)) {
88 reportGISelFailure(MF, TPC, MORE, "gisel-select",
89 "instruction is not legal", *MI);
90 return false;
91 }
92#endif
93 // FIXME: We could introduce new blocks and will need to fix the outer loop.
94 // Until then, keep track of the number of blocks to assert that we don't.
95 const size_t NumBlocks = MF.size();
96
97 for (MachineBasicBlock *MBB : post_order(&MF)) {
98 if (MBB->empty())
99 continue;
100
101 // Select instructions in reverse block order. We permit erasing so have
102 // to resort to manually iterating and recognizing the begin (rend) case.
103 bool ReachedBegin = false;
104 for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
105 !ReachedBegin;) {
106#ifndef NDEBUG
107 // Keep track of the insertion range for debug printing.
108 const auto AfterIt = std::next(MII);
109#endif
110 // Select this instruction.
111 MachineInstr &MI = *MII;
112
113 // And have our iterator point to the next instruction, if there is one.
114 if (MII == Begin)
115 ReachedBegin = true;
116 else
117 --MII;
118
119 DEBUG(dbgs() << "Selecting: \n " << MI)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Selecting: \n " <<
MI; } } while (false)
;
120
121 // We could have folded this instruction away already, making it dead.
122 // If so, erase it.
123 if (isTriviallyDead(MI, MRI)) {
124 DEBUG(dbgs() << "Is dead; erasing.\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { dbgs() << "Is dead; erasing.\n"
; } } while (false)
;
125 MI.eraseFromParentAndMarkDBGValuesForRemoval();
126 continue;
127 }
128
129 if (!ISel->select(MI, CoverageInfo)) {
130 // FIXME: It would be nice to dump all inserted instructions. It's
131 // not obvious how, esp. considering select() can insert after MI.
132 reportGISelFailure(MF, TPC, MORE, "gisel-select", "cannot select", MI);
133 return false;
134 }
135
136 // Dump the range of instructions that MI expanded into.
137 DEBUG({do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
138 auto InsertedBegin = ReachedBegin ? MBB->begin() : std::next(MII);do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
139 dbgs() << "Into:\n";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
140 for (auto &InsertedMI : make_range(InsertedBegin, AfterIt))do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
141 dbgs() << " " << InsertedMI;do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
142 dbgs() << '\n';do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
143 })do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("instruction-select")) { { auto InsertedBegin = ReachedBegin
? MBB->begin() : std::next(MII); dbgs() << "Into:\n"
; for (auto &InsertedMI : make_range(InsertedBegin, AfterIt
)) dbgs() << " " << InsertedMI; dbgs() << '\n'
; }; } } while (false)
;
144 }
145 }
146
147 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
148
149 for (MachineBasicBlock &MBB : MF) {
150 if (MBB.empty())
151 continue;
152
153 // Try to find redundant copies b/w vregs of the same register class.
154 bool ReachedBegin = false;
155 for (auto MII = std::prev(MBB.end()), Begin = MBB.begin(); !ReachedBegin;) {
156 // Select this instruction.
157 MachineInstr &MI = *MII;
158
159 // And have our iterator point to the next instruction, if there is one.
160 if (MII == Begin)
161 ReachedBegin = true;
162 else
163 --MII;
164 if (MI.getOpcode() != TargetOpcode::COPY)
165 continue;
166 unsigned SrcReg = MI.getOperand(1).getReg();
167 unsigned DstReg = MI.getOperand(0).getReg();
168 if (TargetRegisterInfo::isVirtualRegister(SrcReg) &&
169 TargetRegisterInfo::isVirtualRegister(DstReg)) {
170 MachineRegisterInfo &MRI = MF.getRegInfo();
171 auto SrcRC = MRI.getRegClass(SrcReg);
172 auto DstRC = MRI.getRegClass(DstReg);
173 if (SrcRC == DstRC) {
174 MRI.replaceRegWith(DstReg, SrcReg);
175 MI.eraseFromParentAndMarkDBGValuesForRemoval();
176 }
177 }
178 }
179 }
180
181 // Now that selection is complete, there are no more generic vregs. Verify
182 // that the size of the now-constrained vreg is unchanged and that it has a
183 // register class.
184 for (auto &VRegToType : MRI.getVRegToType()) {
185 unsigned VReg = VRegToType.first;
186 auto *RC = MRI.getRegClassOrNull(VReg);
187 MachineInstr *MI = nullptr;
188 if (!MRI.def_empty(VReg))
189 MI = &*MRI.def_instr_begin(VReg);
190 else if (!MRI.use_empty(VReg))
191 MI = &*MRI.use_instr_begin(VReg);
192
193 if (MI && !RC) {
194 reportGISelFailure(MF, TPC, MORE, "gisel-select",
195 "VReg has no regclass after selection", *MI);
196 return false;
197 } else if (!RC)
198 continue;
199
200 if (VRegToType.second.isValid() &&
201 VRegToType.second.getSizeInBits() > TRI.getRegSizeInBits(*RC)) {
202 reportGISelFailure(MF, TPC, MORE, "gisel-select",
203 "VReg has explicit size different from class size",
204 *MI);
205 return false;
206 }
207 }
208
209 if (MF.size() != NumBlocks) {
4
Taking true branch
210 MachineOptimizationRemarkMissed R("gisel-select", "GISelFailure",
6
Calling constructor for 'MachineOptimizationRemarkMissed'
211 MF.getFunction().getSubprogram(),
212 /*MBB=*/nullptr);
5
Passing null pointer value via 4th parameter 'MBB'
213 R << "inserting blocks is not supported yet";
214 reportGISelFailure(MF, TPC, MORE, R);
215 return false;
216 }
217
218 auto &TLI = *MF.getSubtarget().getTargetLowering();
219 TLI.finalizeLowering(MF);
220
221 CoverageInfo.emit(CoveragePrefix,
222 MF.getSubtarget()
223 .getTargetLowering()
224 ->getTargetMachine()
225 .getTarget()
226 .getBackendName());
227
228 // If we successfully selected the function nothing is going to use the vreg
229 // types after us (otherwise MIRPrinter would need them). Make sure the types
230 // disappear.
231 MRI.getVRegToType().clear();
232
233 // FIXME: Should we accurately track changes?
234 return true;
235}

/build/llvm-toolchain-snapshot-7~svn329677/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h

1///===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*----===//
2///
3/// The LLVM Compiler Infrastructure
4///
5/// This file is distributed under the University of Illinois Open Source
6/// License. See LICENSE.TXT for details.
7///
8///===---------------------------------------------------------------------===//
9/// \file
10/// Optimization diagnostic interfaces for machine passes. It's packaged as an
11/// analysis pass so that by using this service passes become dependent on MBFI
12/// as well. MBFI is used to compute the "hotness" of the diagnostic message.
13///
14///===---------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
17#define LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
18
19#include "llvm/Analysis/OptimizationRemarkEmitter.h"
20#include "llvm/CodeGen/MachineFunctionPass.h"
21
22namespace llvm {
23class MachineBasicBlock;
24class MachineBlockFrequencyInfo;
25class MachineInstr;
26
27/// \brief Common features for diagnostics dealing with optimization remarks
28/// that are used by machine passes.
29class DiagnosticInfoMIROptimization : public DiagnosticInfoOptimizationBase {
30public:
31 DiagnosticInfoMIROptimization(enum DiagnosticKind Kind, const char *PassName,
32 StringRef RemarkName,
33 const DiagnosticLocation &Loc,
34 const MachineBasicBlock *MBB)
35 : DiagnosticInfoOptimizationBase(Kind, DS_Remark, PassName, RemarkName,
36 MBB->getParent()->getFunction(), Loc),
9
Called C++ object pointer is null
37 MBB(MBB) {}
38
39 /// MI-specific kinds of diagnostic Arguments.
40 struct MachineArgument : public DiagnosticInfoOptimizationBase::Argument {
41 /// Print an entire MachineInstr.
42 MachineArgument(StringRef Key, const MachineInstr &MI);
43 };
44
45 static bool classof(const DiagnosticInfo *DI) {
46 return DI->getKind() >= DK_FirstMachineRemark &&
47 DI->getKind() <= DK_LastMachineRemark;
48 }
49
50 const MachineBasicBlock *getBlock() const { return MBB; }
51
52private:
53 const MachineBasicBlock *MBB;
54};
55
56/// Diagnostic information for applied optimization remarks.
57class MachineOptimizationRemark : public DiagnosticInfoMIROptimization {
58public:
59 /// \p PassName is the name of the pass emitting this diagnostic. If this name
60 /// matches the regular expression given in -Rpass=, then the diagnostic will
61 /// be emitted. \p RemarkName is a textual identifier for the remark. \p
62 /// Loc is the debug location and \p MBB is the block that the optimization
63 /// operates in.
64 MachineOptimizationRemark(const char *PassName, StringRef RemarkName,
65 const DiagnosticLocation &Loc,
66 const MachineBasicBlock *MBB)
67 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemark, PassName,
68 RemarkName, Loc, MBB) {}
69
70 static bool classof(const DiagnosticInfo *DI) {
71 return DI->getKind() == DK_MachineOptimizationRemark;
72 }
73
74 /// \see DiagnosticInfoOptimizationBase::isEnabled.
75 bool isEnabled() const override {
76 const Function &Fn = getFunction();
77 LLVMContext &Ctx = Fn.getContext();
78 return Ctx.getDiagHandlerPtr()->isPassedOptRemarkEnabled(getPassName());
79 }
80};
81
82/// Diagnostic information for missed-optimization remarks.
83class MachineOptimizationRemarkMissed : public DiagnosticInfoMIROptimization {
84public:
85 /// \p PassName is the name of the pass emitting this diagnostic. If this name
86 /// matches the regular expression given in -Rpass-missed=, then the
87 /// diagnostic will be emitted. \p RemarkName is a textual identifier for the
88 /// remark. \p Loc is the debug location and \p MBB is the block that the
89 /// optimization operates in.
90 MachineOptimizationRemarkMissed(const char *PassName, StringRef RemarkName,
91 const DiagnosticLocation &Loc,
92 const MachineBasicBlock *MBB)
93 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkMissed,
8
Calling constructor for 'DiagnosticInfoMIROptimization'
94 PassName, RemarkName, Loc, MBB) {}
7
Passing null pointer value via 5th parameter 'MBB'
95
96 static bool classof(const DiagnosticInfo *DI) {
97 return DI->getKind() == DK_MachineOptimizationRemarkMissed;
98 }
99
100 /// \see DiagnosticInfoOptimizationBase::isEnabled.
101 bool isEnabled() const override {
102 const Function &Fn = getFunction();
103 LLVMContext &Ctx = Fn.getContext();
104 return Ctx.getDiagHandlerPtr()->isMissedOptRemarkEnabled(getPassName());
105 }
106};
107
108/// Diagnostic information for optimization analysis remarks.
109class MachineOptimizationRemarkAnalysis : public DiagnosticInfoMIROptimization {
110public:
111 /// \p PassName is the name of the pass emitting this diagnostic. If this name
112 /// matches the regular expression given in -Rpass-analysis=, then the
113 /// diagnostic will be emitted. \p RemarkName is a textual identifier for the
114 /// remark. \p Loc is the debug location and \p MBB is the block that the
115 /// optimization operates in.
116 MachineOptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
117 const DiagnosticLocation &Loc,
118 const MachineBasicBlock *MBB)
119 : DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkAnalysis,
120 PassName, RemarkName, Loc, MBB) {}
121
122 static bool classof(const DiagnosticInfo *DI) {
123 return DI->getKind() == DK_MachineOptimizationRemarkAnalysis;
124 }
125
126 /// \see DiagnosticInfoOptimizationBase::isEnabled.
127 bool isEnabled() const override {
128 const Function &Fn = getFunction();
129 LLVMContext &Ctx = Fn.getContext();
130 return Ctx.getDiagHandlerPtr()->isAnalysisRemarkEnabled(getPassName());
131 }
132};
133
134/// Extend llvm::ore:: with MI-specific helper names.
135namespace ore {
136using MNV = DiagnosticInfoMIROptimization::MachineArgument;
137}
138
139/// The optimization diagnostic interface.
140///
141/// It allows reporting when optimizations are performed and when they are not
142/// along with the reasons for it. Hotness information of the corresponding
143/// code region can be included in the remark if DiagnosticsHotnessRequested is
144/// enabled in the LLVM context.
145class MachineOptimizationRemarkEmitter {
146public:
147 MachineOptimizationRemarkEmitter(MachineFunction &MF,
148 MachineBlockFrequencyInfo *MBFI)
149 : MF(MF), MBFI(MBFI) {}
150
151 /// Emit an optimization remark.
152 void emit(DiagnosticInfoOptimizationBase &OptDiag);
153
154 /// \brief Whether we allow for extra compile-time budget to perform more
155 /// analysis to be more informative.
156 ///
157 /// This is useful to enable additional missed optimizations to be reported
158 /// that are normally too noisy. In this mode, we can use the extra analysis
159 /// (1) to filter trivial false positives or (2) to provide more context so
160 /// that non-trivial false positives can be quickly detected by the user.
161 bool allowExtraAnalysis(StringRef PassName) const {
162 return (MF.getFunction().getContext().getDiagnosticsOutputFile() ||
163 MF.getFunction().getContext()
164 .getDiagHandlerPtr()->isAnyRemarkEnabled(PassName));
165 }
166
167 /// \brief Take a lambda that returns a remark which will be emitted. Second
168 /// argument is only used to restrict this to functions.
169 template <typename T>
170 void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
171 // Avoid building the remark unless we know there are at least *some*
172 // remarks enabled. We can't currently check whether remarks are requested
173 // for the calling pass since that requires actually building the remark.
174
175 if (MF.getFunction().getContext().getDiagnosticsOutputFile() ||
176 MF.getFunction().getContext().getDiagHandlerPtr()->isAnyRemarkEnabled()) {
177 auto R = RemarkBuilder();
178 emit((DiagnosticInfoOptimizationBase &)R);
179 }
180 }
181
182private:
183 MachineFunction &MF;
184
185 /// MBFI is only set if hotness is requested.
186 MachineBlockFrequencyInfo *MBFI;
187
188 /// Compute hotness from IR value (currently assumed to be a block) if PGO is
189 /// available.
190 Optional<uint64_t> computeHotness(const MachineBasicBlock &MBB);
191
192 /// Similar but use value from \p OptDiag and update hotness there.
193 void computeHotness(DiagnosticInfoMIROptimization &Remark);
194
195 /// \brief Only allow verbose messages if we know we're filtering by hotness
196 /// (BFI is only set in this case).
197 bool shouldEmitVerbose() { return MBFI != nullptr; }
198};
199
200/// The analysis pass
201///
202/// Note that this pass shouldn't generally be marked as preserved by other
203/// passes. It's holding onto BFI, so if the pass does not preserve BFI, BFI
204/// could be freed.
205class MachineOptimizationRemarkEmitterPass : public MachineFunctionPass {
206 std::unique_ptr<MachineOptimizationRemarkEmitter> ORE;
207
208public:
209 MachineOptimizationRemarkEmitterPass();
210
211 bool runOnMachineFunction(MachineFunction &MF) override;
212
213 void getAnalysisUsage(AnalysisUsage &AU) const override;
214
215 MachineOptimizationRemarkEmitter &getORE() {
216 assert(ORE && "pass not run yet")(static_cast <bool> (ORE && "pass not run yet")
? void (0) : __assert_fail ("ORE && \"pass not run yet\""
, "/build/llvm-toolchain-snapshot-7~svn329677/include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
, 216, __extension__ __PRETTY_FUNCTION__))
;
217 return *ORE;
218 }
219
220 static char ID;
221};
222}
223
224#endif