Bug Summary

File:build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc
Warning:line 859, column 10
Excessive padding in 'struct (anonymous namespace)::MatchEntry' (2 padding bytes, where 0 is optimal). Optimal fields order: Opcode, Mnemonic, ConvertFn, RequiredFeatures, Classes, consider reordering the fields or adding explicit padding members

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name LanaiAsmParser.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-eagerly-assume -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-7/lib/clang/7.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/AsmParser -I /build/llvm-toolchain-snapshot-7~svn329677/lib/Target/Lanai/AsmParser -I /build/llvm-toolchain-snapshot-7~svn329677/lib/Target/Lanai -I /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai -I /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/include -I /build/llvm-toolchain-snapshot-7~svn329677/include -I /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/AsmParser/.. -I /build/llvm-toolchain-snapshot-7~svn329677/lib/Target/Lanai/AsmParser/.. -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/c++/7.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/x86_64-linux-gnu/c++/7.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/x86_64-linux-gnu/c++/7.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.3.0/../../../../include/c++/7.3.0/backward -internal-isystem /usr/include/clang/7.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-7/lib/clang/7.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/AsmParser -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-checker optin.performance.Padding -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-04-11-031539-24776-1 -x c++ /build/llvm-toolchain-snapshot-7~svn329677/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9
10#ifdef GET_ASSEMBLER_HEADER
11#undef GET_ASSEMBLER_HEADER
12 // This should be included into the middle of the declaration of
13 // your subclasses implementation of MCTargetAsmParser.
14 uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
15 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16 const OperandVector &Operands);
17 void convertToMapAndConstraints(unsigned Kind,
18 const OperandVector &Operands) override;
19 unsigned MatchInstructionImpl(const OperandVector &Operands,
20 MCInst &Inst,
21 uint64_t &ErrorInfo,
22 bool matchingInlineAsm,
23 unsigned VariantID = 0);
24 OperandMatchResultTy MatchOperandParserImpl(
25 OperandVector &Operands,
26 StringRef Mnemonic,
27 bool ParseForAllFeatures = false);
28 OperandMatchResultTy tryCustomParseOperand(
29 OperandVector &Operands,
30 unsigned MCK);
31
32#endif // GET_ASSEMBLER_HEADER_INFO
33
34
35#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
36#undef GET_OPERAND_DIAGNOSTIC_TYPES
37
38#endif // GET_OPERAND_DIAGNOSTIC_TYPES
39
40
41#ifdef GET_REGISTER_MATCHER
42#undef GET_REGISTER_MATCHER
43
44// Flags for subtarget features that participate in instruction matching.
45enum SubtargetFeatureFlag : uint8_t {
46 Feature_None = 0
47};
48
49static unsigned MatchRegisterName(StringRef Name) {
50 switch (Name.size()) {
51 default: break;
52 case 2: // 15 strings to match.
53 switch (Name[0]) {
54 default: break;
55 case 'f': // 1 string to match.
56 if (Name[1] != 'p')
57 break;
58 return 1; // "fp"
59 case 'p': // 1 string to match.
60 if (Name[1] != 'c')
61 break;
62 return 2; // "pc"
63 case 'r': // 11 strings to match.
64 switch (Name[1]) {
65 default: break;
66 case '0': // 1 string to match.
67 return 7; // "r0"
68 case '1': // 1 string to match.
69 return 8; // "r1"
70 case '2': // 1 string to match.
71 return 9; // "r2"
72 case '3': // 1 string to match.
73 return 10; // "r3"
74 case '4': // 1 string to match.
75 return 11; // "r4"
76 case '5': // 1 string to match.
77 return 12; // "r5"
78 case '6': // 1 string to match.
79 return 13; // "r6"
80 case '7': // 1 string to match.
81 return 14; // "r7"
82 case '8': // 1 string to match.
83 return 15; // "r8"
84 case '9': // 1 string to match.
85 return 16; // "r9"
86 case 'v': // 1 string to match.
87 return 4; // "rv"
88 }
89 break;
90 case 's': // 2 strings to match.
91 switch (Name[1]) {
92 default: break;
93 case 'p': // 1 string to match.
94 return 5; // "sp"
95 case 'w': // 1 string to match.
96 return 6; // "sw"
97 }
98 break;
99 }
100 break;
101 case 3: // 25 strings to match.
102 if (Name[0] != 'r')
103 break;
104 switch (Name[1]) {
105 default: break;
106 case '1': // 10 strings to match.
107 switch (Name[2]) {
108 default: break;
109 case '0': // 1 string to match.
110 return 17; // "r10"
111 case '1': // 1 string to match.
112 return 18; // "r11"
113 case '2': // 1 string to match.
114 return 19; // "r12"
115 case '3': // 1 string to match.
116 return 20; // "r13"
117 case '4': // 1 string to match.
118 return 21; // "r14"
119 case '5': // 1 string to match.
120 return 22; // "r15"
121 case '6': // 1 string to match.
122 return 23; // "r16"
123 case '7': // 1 string to match.
124 return 24; // "r17"
125 case '8': // 1 string to match.
126 return 25; // "r18"
127 case '9': // 1 string to match.
128 return 26; // "r19"
129 }
130 break;
131 case '2': // 10 strings to match.
132 switch (Name[2]) {
133 default: break;
134 case '0': // 1 string to match.
135 return 27; // "r20"
136 case '1': // 1 string to match.
137 return 28; // "r21"
138 case '2': // 1 string to match.
139 return 29; // "r22"
140 case '3': // 1 string to match.
141 return 30; // "r23"
142 case '4': // 1 string to match.
143 return 31; // "r24"
144 case '5': // 1 string to match.
145 return 32; // "r25"
146 case '6': // 1 string to match.
147 return 33; // "r26"
148 case '7': // 1 string to match.
149 return 34; // "r27"
150 case '8': // 1 string to match.
151 return 35; // "r28"
152 case '9': // 1 string to match.
153 return 36; // "r29"
154 }
155 break;
156 case '3': // 2 strings to match.
157 switch (Name[2]) {
158 default: break;
159 case '0': // 1 string to match.
160 return 37; // "r30"
161 case '1': // 1 string to match.
162 return 38; // "r31"
163 }
164 break;
165 case 'c': // 1 string to match.
166 if (Name[2] != 'a')
167 break;
168 return 3; // "rca"
169 case 'r': // 2 strings to match.
170 switch (Name[2]) {
171 default: break;
172 case '1': // 1 string to match.
173 return 39; // "rr1"
174 case '2': // 1 string to match.
175 return 40; // "rr2"
176 }
177 break;
178 }
179 break;
180 }
181 return 0;
182}
183
184#endif // GET_REGISTER_MATCHER
185
186
187#ifdef GET_SUBTARGET_FEATURE_NAME
188#undef GET_SUBTARGET_FEATURE_NAME
189
190// User-level names for subtarget features that participate in
191// instruction matching.
192static const char *getSubtargetFeatureName(uint64_t Val) {
193 return "(unknown)";
194}
195
196#endif // GET_SUBTARGET_FEATURE_NAME
197
198
199#ifdef GET_MATCHER_IMPLEMENTATION
200#undef GET_MATCHER_IMPLEMENTATION
201
202const char TiedAsmOperandTable[][3] = { /* empty */ {0, 0, 0} };
203
204namespace {
205enum OperatorConversionKind {
206 CVT_Done,
207 CVT_Reg,
208 CVT_Tied,
209 CVT_95_addImmOperands,
210 CVT_95_Reg,
211 CVT_95_addHiImm16Operands,
212 CVT_95_addLoImm16Operands,
213 CVT_95_addCondCodeOperands,
214 CVT_95_addHiImm16AndOperands,
215 CVT_95_addLoImm16AndOperands,
216 CVT_95_addBrTargetOperands,
217 CVT_95_addMemImmOperands,
218 CVT_95_addMemRegImmOperands,
219 CVT_95_addMemRegRegOperands,
220 CVT_95_addMemSplsOperands,
221 CVT_regR0,
222 CVT_imm_95_0,
223 CVT_regR1,
224 CVT_95_addLoImm21Operands,
225 CVT_95_addImmShiftOperands,
226 CVT_NUM_CONVERTERS
227};
228
229enum InstructionConversionKind {
230 Convert__Imm1_0__Imm1_1,
231 Convert__Reg1_0__Reg1_1,
232 Convert__Reg1_2__Reg1_0__HiImm161_1,
233 Convert__Reg1_2__Reg1_0__LoImm161_1,
234 Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0,
235 Convert__Reg1_2__Reg1_0__HiImm16And1_1,
236 Convert__Reg1_2__Reg1_0__LoImm16And1_1,
237 Convert__Reg1_1__Imm1_0,
238 Convert__BrTarget1_1__Imm1_0,
239 Convert__Imm1_2__Imm1_0,
240 Convert__Reg1_1__Reg1_3__Imm1_0,
241 Convert__Reg1_0,
242 Convert__BrTarget1_0,
243 Convert__Reg1_1__MemImm1_0,
244 Convert__Reg1_1__MemRegImm3_0,
245 Convert__Reg1_1__MemRegReg3_0,
246 Convert_NoOperands,
247 Convert__Reg1_1__MemSpls3_0,
248 Convert__Reg1_1__Reg1_0,
249 Convert__Reg1_1__Reg1_0__regR0__imm_95_0,
250 Convert__Reg1_1__regR1__HiImm16And1_0,
251 Convert__Reg1_1__regR0__HiImm161_0,
252 Convert__Reg1_1__regR1__LoImm16And1_0,
253 Convert__Reg1_1__regR0__LoImm161_0,
254 Convert__Reg1_1__LoImm211_0,
255 Convert__Reg1_3__Reg1_1__Reg1_2__Imm1_0,
256 Convert__Reg1_2__Reg1_0__ImmShift1_1,
257 Convert__Reg1_0__MemImm1_1,
258 Convert__Reg1_0__MemRegImm3_1,
259 Convert__Reg1_0__MemRegReg3_1,
260 Convert__Reg1_0__MemSpls3_1,
261 CVT_NUM_SIGNATURES
262};
263
264} // end anonymous namespace
265
266static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][9] = {
267 // Convert__Imm1_0__Imm1_1
268 { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
269 // Convert__Reg1_0__Reg1_1
270 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
271 // Convert__Reg1_2__Reg1_0__HiImm161_1
272 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addHiImm16Operands, 2, CVT_Done },
273 // Convert__Reg1_2__Reg1_0__LoImm161_1
274 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addLoImm16Operands, 2, CVT_Done },
275 // Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0
276 { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done },
277 // Convert__Reg1_2__Reg1_0__HiImm16And1_1
278 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addHiImm16AndOperands, 2, CVT_Done },
279 // Convert__Reg1_2__Reg1_0__LoImm16And1_1
280 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addLoImm16AndOperands, 2, CVT_Done },
281 // Convert__Reg1_1__Imm1_0
282 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
283 // Convert__BrTarget1_1__Imm1_0
284 { CVT_95_addBrTargetOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
285 // Convert__Imm1_2__Imm1_0
286 { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
287 // Convert__Reg1_1__Reg1_3__Imm1_0
288 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
289 // Convert__Reg1_0
290 { CVT_95_Reg, 1, CVT_Done },
291 // Convert__BrTarget1_0
292 { CVT_95_addBrTargetOperands, 1, CVT_Done },
293 // Convert__Reg1_1__MemImm1_0
294 { CVT_95_Reg, 2, CVT_95_addMemImmOperands, 1, CVT_Done },
295 // Convert__Reg1_1__MemRegImm3_0
296 { CVT_95_Reg, 2, CVT_95_addMemRegImmOperands, 1, CVT_Done },
297 // Convert__Reg1_1__MemRegReg3_0
298 { CVT_95_Reg, 2, CVT_95_addMemRegRegOperands, 1, CVT_Done },
299 // Convert_NoOperands
300 { CVT_Done },
301 // Convert__Reg1_1__MemSpls3_0
302 { CVT_95_Reg, 2, CVT_95_addMemSplsOperands, 1, CVT_Done },
303 // Convert__Reg1_1__Reg1_0
304 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
305 // Convert__Reg1_1__Reg1_0__regR0__imm_95_0
306 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done },
307 // Convert__Reg1_1__regR1__HiImm16And1_0
308 { CVT_95_Reg, 2, CVT_regR1, 0, CVT_95_addHiImm16AndOperands, 1, CVT_Done },
309 // Convert__Reg1_1__regR0__HiImm161_0
310 { CVT_95_Reg, 2, CVT_regR0, 0, CVT_95_addHiImm16Operands, 1, CVT_Done },
311 // Convert__Reg1_1__regR1__LoImm16And1_0
312 { CVT_95_Reg, 2, CVT_regR1, 0, CVT_95_addLoImm16AndOperands, 1, CVT_Done },
313 // Convert__Reg1_1__regR0__LoImm161_0
314 { CVT_95_Reg, 2, CVT_regR0, 0, CVT_95_addLoImm16Operands, 1, CVT_Done },
315 // Convert__Reg1_1__LoImm211_0
316 { CVT_95_Reg, 2, CVT_95_addLoImm21Operands, 1, CVT_Done },
317 // Convert__Reg1_3__Reg1_1__Reg1_2__Imm1_0
318 { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
319 // Convert__Reg1_2__Reg1_0__ImmShift1_1
320 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmShiftOperands, 2, CVT_Done },
321 // Convert__Reg1_0__MemImm1_1
322 { CVT_95_Reg, 1, CVT_95_addMemImmOperands, 2, CVT_Done },
323 // Convert__Reg1_0__MemRegImm3_1
324 { CVT_95_Reg, 1, CVT_95_addMemRegImmOperands, 2, CVT_Done },
325 // Convert__Reg1_0__MemRegReg3_1
326 { CVT_95_Reg, 1, CVT_95_addMemRegRegOperands, 2, CVT_Done },
327 // Convert__Reg1_0__MemSpls3_1
328 { CVT_95_Reg, 1, CVT_95_addMemSplsOperands, 2, CVT_Done },
329};
330
331void LanaiAsmParser::
332convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
333 const OperandVector &Operands) {
334 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!")(static_cast <bool> (Kind < CVT_NUM_SIGNATURES &&
"Invalid signature!") ? void (0) : __assert_fail ("Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 334, __extension__ __PRETTY_FUNCTION__));
335 const uint8_t *Converter = ConversionTable[Kind];
336 unsigned OpIdx;
337 Inst.setOpcode(Opcode);
338 for (const uint8_t *p = Converter; *p; p+= 2) {
339 OpIdx = *(p + 1);
340 switch (*p) {
341 default: llvm_unreachable("invalid conversion entry!")::llvm::llvm_unreachable_internal("invalid conversion entry!"
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 341);
342 case CVT_Reg:
343 static_cast<LanaiOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
344 break;
345 case CVT_Tied: {
346 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -(static_cast <bool> (OpIdx < (size_t)(std::end(TiedAsmOperandTable
) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"
) ? void (0) : __assert_fail ("OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && \"Tied operand not found\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 348, __extension__ __PRETTY_FUNCTION__))
347 std::begin(TiedAsmOperandTable)) &&(static_cast <bool> (OpIdx < (size_t)(std::end(TiedAsmOperandTable
) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"
) ? void (0) : __assert_fail ("OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && \"Tied operand not found\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 348, __extension__ __PRETTY_FUNCTION__))
348 "Tied operand not found")(static_cast <bool> (OpIdx < (size_t)(std::end(TiedAsmOperandTable
) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"
) ? void (0) : __assert_fail ("OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && \"Tied operand not found\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 348, __extension__ __PRETTY_FUNCTION__));
349 unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
350 Inst.addOperand(Inst.getOperand(TiedResOpnd));
351 break;
352 }
353 case CVT_95_addImmOperands:
354 static_cast<LanaiOperand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
355 break;
356 case CVT_95_Reg:
357 static_cast<LanaiOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
358 break;
359 case CVT_95_addHiImm16Operands:
360 static_cast<LanaiOperand&>(*Operands[OpIdx]).addHiImm16Operands(Inst, 1);
361 break;
362 case CVT_95_addLoImm16Operands:
363 static_cast<LanaiOperand&>(*Operands[OpIdx]).addLoImm16Operands(Inst, 1);
364 break;
365 case CVT_95_addCondCodeOperands:
366 static_cast<LanaiOperand&>(*Operands[OpIdx]).addCondCodeOperands(Inst, 1);
367 break;
368 case CVT_95_addHiImm16AndOperands:
369 static_cast<LanaiOperand&>(*Operands[OpIdx]).addHiImm16AndOperands(Inst, 1);
370 break;
371 case CVT_95_addLoImm16AndOperands:
372 static_cast<LanaiOperand&>(*Operands[OpIdx]).addLoImm16AndOperands(Inst, 1);
373 break;
374 case CVT_95_addBrTargetOperands:
375 static_cast<LanaiOperand&>(*Operands[OpIdx]).addBrTargetOperands(Inst, 1);
376 break;
377 case CVT_95_addMemImmOperands:
378 static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemImmOperands(Inst, 1);
379 break;
380 case CVT_95_addMemRegImmOperands:
381 static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemRegImmOperands(Inst, 3);
382 break;
383 case CVT_95_addMemRegRegOperands:
384 static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemRegRegOperands(Inst, 3);
385 break;
386 case CVT_95_addMemSplsOperands:
387 static_cast<LanaiOperand&>(*Operands[OpIdx]).addMemSplsOperands(Inst, 3);
388 break;
389 case CVT_regR0:
390 Inst.addOperand(MCOperand::createReg(Lanai::R0));
391 break;
392 case CVT_imm_95_0:
393 Inst.addOperand(MCOperand::createImm(0));
394 break;
395 case CVT_regR1:
396 Inst.addOperand(MCOperand::createReg(Lanai::R1));
397 break;
398 case CVT_95_addLoImm21Operands:
399 static_cast<LanaiOperand&>(*Operands[OpIdx]).addLoImm21Operands(Inst, 1);
400 break;
401 case CVT_95_addImmShiftOperands:
402 static_cast<LanaiOperand&>(*Operands[OpIdx]).addImmShiftOperands(Inst, 1);
403 break;
404 }
405 }
406}
407
408void LanaiAsmParser::
409convertToMapAndConstraints(unsigned Kind,
410 const OperandVector &Operands) {
411 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!")(static_cast <bool> (Kind < CVT_NUM_SIGNATURES &&
"Invalid signature!") ? void (0) : __assert_fail ("Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 411, __extension__ __PRETTY_FUNCTION__));
412 unsigned NumMCOperands = 0;
413 const uint8_t *Converter = ConversionTable[Kind];
414 for (const uint8_t *p = Converter; *p; p+= 2) {
415 switch (*p) {
416 default: llvm_unreachable("invalid conversion entry!")::llvm::llvm_unreachable_internal("invalid conversion entry!"
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 416);
417 case CVT_Reg:
418 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
419 Operands[*(p + 1)]->setConstraint("r");
420 ++NumMCOperands;
421 break;
422 case CVT_Tied:
423 ++NumMCOperands;
424 break;
425 case CVT_95_addImmOperands:
426 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
427 Operands[*(p + 1)]->setConstraint("m");
428 NumMCOperands += 1;
429 break;
430 case CVT_95_Reg:
431 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
432 Operands[*(p + 1)]->setConstraint("r");
433 NumMCOperands += 1;
434 break;
435 case CVT_95_addHiImm16Operands:
436 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
437 Operands[*(p + 1)]->setConstraint("m");
438 NumMCOperands += 1;
439 break;
440 case CVT_95_addLoImm16Operands:
441 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
442 Operands[*(p + 1)]->setConstraint("m");
443 NumMCOperands += 1;
444 break;
445 case CVT_95_addCondCodeOperands:
446 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
447 Operands[*(p + 1)]->setConstraint("m");
448 NumMCOperands += 1;
449 break;
450 case CVT_95_addHiImm16AndOperands:
451 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
452 Operands[*(p + 1)]->setConstraint("m");
453 NumMCOperands += 1;
454 break;
455 case CVT_95_addLoImm16AndOperands:
456 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
457 Operands[*(p + 1)]->setConstraint("m");
458 NumMCOperands += 1;
459 break;
460 case CVT_95_addBrTargetOperands:
461 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
462 Operands[*(p + 1)]->setConstraint("m");
463 NumMCOperands += 1;
464 break;
465 case CVT_95_addMemImmOperands:
466 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
467 Operands[*(p + 1)]->setConstraint("m");
468 NumMCOperands += 1;
469 break;
470 case CVT_95_addMemRegImmOperands:
471 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
472 Operands[*(p + 1)]->setConstraint("m");
473 NumMCOperands += 3;
474 break;
475 case CVT_95_addMemRegRegOperands:
476 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
477 Operands[*(p + 1)]->setConstraint("m");
478 NumMCOperands += 3;
479 break;
480 case CVT_95_addMemSplsOperands:
481 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
482 Operands[*(p + 1)]->setConstraint("m");
483 NumMCOperands += 3;
484 break;
485 case CVT_regR0:
486 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
487 Operands[*(p + 1)]->setConstraint("m");
488 ++NumMCOperands;
489 break;
490 case CVT_imm_95_0:
491 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
492 Operands[*(p + 1)]->setConstraint("");
493 ++NumMCOperands;
494 break;
495 case CVT_regR1:
496 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
497 Operands[*(p + 1)]->setConstraint("m");
498 ++NumMCOperands;
499 break;
500 case CVT_95_addLoImm21Operands:
501 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
502 Operands[*(p + 1)]->setConstraint("m");
503 NumMCOperands += 1;
504 break;
505 case CVT_95_addImmShiftOperands:
506 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
507 Operands[*(p + 1)]->setConstraint("m");
508 NumMCOperands += 1;
509 break;
510 }
511 }
512}
513
514namespace {
515
516/// MatchClassKind - The kinds of classes which participate in
517/// instruction matching.
518enum MatchClassKind {
519 InvalidMatchClass = 0,
520 OptionalMatchClass = 1,
521 MCK__EXCLAIM_, // '!'
522 MCK__PCT_fp, // '%fp'
523 MCK__PCT_pc, // '%pc'
524 MCK__MINUS_4, // '-4'
525 MCK__DOT_r, // '.r'
526 MCK__91_, // '['
527 MCK__93_, // ']'
528 MCK_add, // 'add'
529 MCK_return, // 'return'
530 MCK_LAST_TOKEN = MCK_return,
531 MCK_CCR, // register class 'CCR'
532 MCK_Reg1, // derived register class
533 MCK_GPR, // register class 'GPR'
534 MCK_LAST_REGISTER = MCK_GPR,
535 MCK_BrTarget, // user defined class 'BrTargetAsmOperand'
536 MCK_CallTarget, // user defined class 'CallTargetAsmOperand'
537 MCK_CondCode, // user defined class 'CondCodeOperand'
538 MCK_HiImm16And, // user defined class 'HiImm16AndAsmOperand'
539 MCK_HiImm16, // user defined class 'HiImm16AsmOperand'
540 MCK_Imm10, // user defined class 'Imm10AsmOperand'
541 MCK_Imm, // user defined class 'ImmAsmOperand'
542 MCK_ImmShift, // user defined class 'ImmShiftAsmOperand'
543 MCK_LoImm16And, // user defined class 'LoImm16AndAsmOperand'
544 MCK_LoImm16, // user defined class 'LoImm16AsmOperand'
545 MCK_LoImm21, // user defined class 'LoImm21AsmOperand'
546 MCK_MemImm, // user defined class 'MemImmAsmOperand'
547 MCK_MemRegImm, // user defined class 'MemRegImmAsmOperand'
548 MCK_MemRegReg, // user defined class 'MemRegRegAsmOperand'
549 MCK_MemSpls, // user defined class 'MemSplsAsmOperand'
550 NumMatchClassKinds
551};
552
553}
554
555static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
556 return MCTargetAsmParser::Match_InvalidOperand;
557}
558
559static MatchClassKind matchTokenString(StringRef Name) {
560 switch (Name.size()) {
561 default: break;
562 case 1: // 3 strings to match.
563 switch (Name[0]) {
564 default: break;
565 case '!': // 1 string to match.
566 return MCK__EXCLAIM_; // "!"
567 case '[': // 1 string to match.
568 return MCK__91_; // "["
569 case ']': // 1 string to match.
570 return MCK__93_; // "]"
571 }
572 break;
573 case 2: // 2 strings to match.
574 switch (Name[0]) {
575 default: break;
576 case '-': // 1 string to match.
577 if (Name[1] != '4')
578 break;
579 return MCK__MINUS_4; // "-4"
580 case '.': // 1 string to match.
581 if (Name[1] != 'r')
582 break;
583 return MCK__DOT_r; // ".r"
584 }
585 break;
586 case 3: // 3 strings to match.
587 switch (Name[0]) {
588 default: break;
589 case '%': // 2 strings to match.
590 switch (Name[1]) {
591 default: break;
592 case 'f': // 1 string to match.
593 if (Name[2] != 'p')
594 break;
595 return MCK__PCT_fp; // "%fp"
596 case 'p': // 1 string to match.
597 if (Name[2] != 'c')
598 break;
599 return MCK__PCT_pc; // "%pc"
600 }
601 break;
602 case 'a': // 1 string to match.
603 if (memcmp(Name.data()+1, "dd", 2) != 0)
604 break;
605 return MCK_add; // "add"
606 }
607 break;
608 case 6: // 1 string to match.
609 if (memcmp(Name.data()+0, "return", 6) != 0)
610 break;
611 return MCK_return; // "return"
612 }
613 return InvalidMatchClass;
614}
615
616/// isSubclass - Compute whether \p A is a subclass of \p B.
617static bool isSubclass(MatchClassKind A, MatchClassKind B) {
618 if (A == B)
619 return true;
620
621 switch (A) {
622 default:
623 return false;
624
625 case MCK_Reg1:
626 return B == MCK_GPR;
627 }
628}
629
630static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
631 LanaiOperand &Operand = (LanaiOperand&)GOp;
632 if (Kind == InvalidMatchClass)
633 return MCTargetAsmParser::Match_InvalidOperand;
634
635 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
636 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
637 MCTargetAsmParser::Match_Success :
638 MCTargetAsmParser::Match_InvalidOperand;
639
640 switch (Kind) {
641 default: break;
642 // 'BrTarget' class
643 case MCK_BrTarget:
644 if (Operand.isBrTarget())
645 return MCTargetAsmParser::Match_Success;
646 break;
647 // 'CallTarget' class
648 case MCK_CallTarget:
649 if (Operand.isCallTarget())
650 return MCTargetAsmParser::Match_Success;
651 break;
652 // 'CondCode' class
653 case MCK_CondCode:
654 if (Operand.isCondCode())
655 return MCTargetAsmParser::Match_Success;
656 break;
657 // 'HiImm16And' class
658 case MCK_HiImm16And:
659 if (Operand.isHiImm16And())
660 return MCTargetAsmParser::Match_Success;
661 break;
662 // 'HiImm16' class
663 case MCK_HiImm16:
664 if (Operand.isHiImm16())
665 return MCTargetAsmParser::Match_Success;
666 break;
667 // 'Imm10' class
668 case MCK_Imm10:
669 if (Operand.isImm10())
670 return MCTargetAsmParser::Match_Success;
671 break;
672 // 'Imm' class
673 case MCK_Imm:
674 if (Operand.isImm())
675 return MCTargetAsmParser::Match_Success;
676 break;
677 // 'ImmShift' class
678 case MCK_ImmShift:
679 if (Operand.isImmShift())
680 return MCTargetAsmParser::Match_Success;
681 break;
682 // 'LoImm16And' class
683 case MCK_LoImm16And:
684 if (Operand.isLoImm16And())
685 return MCTargetAsmParser::Match_Success;
686 break;
687 // 'LoImm16' class
688 case MCK_LoImm16:
689 if (Operand.isLoImm16())
690 return MCTargetAsmParser::Match_Success;
691 break;
692 // 'LoImm21' class
693 case MCK_LoImm21:
694 if (Operand.isLoImm21())
695 return MCTargetAsmParser::Match_Success;
696 break;
697 // 'MemImm' class
698 case MCK_MemImm:
699 if (Operand.isMemImm())
700 return MCTargetAsmParser::Match_Success;
701 break;
702 // 'MemRegImm' class
703 case MCK_MemRegImm:
704 if (Operand.isMemRegImm())
705 return MCTargetAsmParser::Match_Success;
706 break;
707 // 'MemRegReg' class
708 case MCK_MemRegReg:
709 if (Operand.isMemRegReg())
710 return MCTargetAsmParser::Match_Success;
711 break;
712 // 'MemSpls' class
713 case MCK_MemSpls:
714 if (Operand.isMemSpls())
715 return MCTargetAsmParser::Match_Success;
716 break;
717 } // end switch (Kind)
718
719 if (Operand.isReg()) {
720 MatchClassKind OpKind;
721 switch (Operand.getReg()) {
722 default: OpKind = InvalidMatchClass; break;
723 case Lanai::R0: OpKind = MCK_GPR; break;
724 case Lanai::R1: OpKind = MCK_GPR; break;
725 case Lanai::R2: OpKind = MCK_GPR; break;
726 case Lanai::R3: OpKind = MCK_GPR; break;
727 case Lanai::R4: OpKind = MCK_GPR; break;
728 case Lanai::R5: OpKind = MCK_GPR; break;
729 case Lanai::R6: OpKind = MCK_GPR; break;
730 case Lanai::R7: OpKind = MCK_GPR; break;
731 case Lanai::R8: OpKind = MCK_GPR; break;
732 case Lanai::R9: OpKind = MCK_GPR; break;
733 case Lanai::R10: OpKind = MCK_GPR; break;
734 case Lanai::R11: OpKind = MCK_GPR; break;
735 case Lanai::R12: OpKind = MCK_GPR; break;
736 case Lanai::R13: OpKind = MCK_GPR; break;
737 case Lanai::R14: OpKind = MCK_GPR; break;
738 case Lanai::R15: OpKind = MCK_GPR; break;
739 case Lanai::R16: OpKind = MCK_GPR; break;
740 case Lanai::R17: OpKind = MCK_GPR; break;
741 case Lanai::R18: OpKind = MCK_GPR; break;
742 case Lanai::R19: OpKind = MCK_GPR; break;
743 case Lanai::R20: OpKind = MCK_GPR; break;
744 case Lanai::R21: OpKind = MCK_GPR; break;
745 case Lanai::R22: OpKind = MCK_GPR; break;
746 case Lanai::R23: OpKind = MCK_GPR; break;
747 case Lanai::R24: OpKind = MCK_GPR; break;
748 case Lanai::R25: OpKind = MCK_GPR; break;
749 case Lanai::R26: OpKind = MCK_GPR; break;
750 case Lanai::R27: OpKind = MCK_GPR; break;
751 case Lanai::R28: OpKind = MCK_GPR; break;
752 case Lanai::R29: OpKind = MCK_GPR; break;
753 case Lanai::R30: OpKind = MCK_GPR; break;
754 case Lanai::R31: OpKind = MCK_GPR; break;
755 case Lanai::PC: OpKind = MCK_Reg1; break;
756 case Lanai::SP: OpKind = MCK_Reg1; break;
757 case Lanai::FP: OpKind = MCK_Reg1; break;
758 case Lanai::RV: OpKind = MCK_Reg1; break;
759 case Lanai::RR1: OpKind = MCK_Reg1; break;
760 case Lanai::RR2: OpKind = MCK_Reg1; break;
761 case Lanai::RCA: OpKind = MCK_Reg1; break;
762 case Lanai::SR: OpKind = MCK_CCR; break;
763 }
764 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
765 getDiagKindFromRegisterClass(Kind);
766 }
767
768 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
769 return getDiagKindFromRegisterClass(Kind);
770
771 return MCTargetAsmParser::Match_InvalidOperand;
772}
773
774#ifndef NDEBUG
775const char *getMatchClassName(MatchClassKind Kind) {
776 switch (Kind) {
777 case InvalidMatchClass: return "InvalidMatchClass";
778 case OptionalMatchClass: return "OptionalMatchClass";
779 case MCK__EXCLAIM_: return "MCK__EXCLAIM_";
780 case MCK__PCT_fp: return "MCK__PCT_fp";
781 case MCK__PCT_pc: return "MCK__PCT_pc";
782 case MCK__MINUS_4: return "MCK__MINUS_4";
783 case MCK__DOT_r: return "MCK__DOT_r";
784 case MCK__91_: return "MCK__91_";
785 case MCK__93_: return "MCK__93_";
786 case MCK_add: return "MCK_add";
787 case MCK_return: return "MCK_return";
788 case MCK_CCR: return "MCK_CCR";
789 case MCK_Reg1: return "MCK_Reg1";
790 case MCK_GPR: return "MCK_GPR";
791 case MCK_BrTarget: return "MCK_BrTarget";
792 case MCK_CallTarget: return "MCK_CallTarget";
793 case MCK_CondCode: return "MCK_CondCode";
794 case MCK_HiImm16And: return "MCK_HiImm16And";
795 case MCK_HiImm16: return "MCK_HiImm16";
796 case MCK_Imm10: return "MCK_Imm10";
797 case MCK_Imm: return "MCK_Imm";
798 case MCK_ImmShift: return "MCK_ImmShift";
799 case MCK_LoImm16And: return "MCK_LoImm16And";
800 case MCK_LoImm16: return "MCK_LoImm16";
801 case MCK_LoImm21: return "MCK_LoImm21";
802 case MCK_MemImm: return "MCK_MemImm";
803 case MCK_MemRegImm: return "MCK_MemRegImm";
804 case MCK_MemRegReg: return "MCK_MemRegReg";
805 case MCK_MemSpls: return "MCK_MemSpls";
806 case NumMatchClassKinds: return "NumMatchClassKinds";
807 }
808 llvm_unreachable("unhandled MatchClassKind!")::llvm::llvm_unreachable_internal("unhandled MatchClassKind!"
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 808);
809}
810
811#endif // NDEBUG
812uint64_t LanaiAsmParser::
813ComputeAvailableFeatures(const FeatureBitset& FB) const {
814 uint64_t Features = 0;
815 return Features;
816}
817
818static bool checkAsmTiedOperandConstraints(unsigned Kind,
819 const OperandVector &Operands,
820 uint64_t &ErrorInfo) {
821 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!")(static_cast <bool> (Kind < CVT_NUM_SIGNATURES &&
"Invalid signature!") ? void (0) : __assert_fail ("Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 821, __extension__ __PRETTY_FUNCTION__));
822 const uint8_t *Converter = ConversionTable[Kind];
823 for (const uint8_t *p = Converter; *p; p+= 2) {
824 switch (*p) {
825 case CVT_Tied: {
826 unsigned OpIdx = *(p+1);
827 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -(static_cast <bool> (OpIdx < (size_t)(std::end(TiedAsmOperandTable
) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"
) ? void (0) : __assert_fail ("OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && \"Tied operand not found\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 829, __extension__ __PRETTY_FUNCTION__))
828 std::begin(TiedAsmOperandTable)) &&(static_cast <bool> (OpIdx < (size_t)(std::end(TiedAsmOperandTable
) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"
) ? void (0) : __assert_fail ("OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && \"Tied operand not found\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 829, __extension__ __PRETTY_FUNCTION__))
829 "Tied operand not found")(static_cast <bool> (OpIdx < (size_t)(std::end(TiedAsmOperandTable
) - std::begin(TiedAsmOperandTable)) && "Tied operand not found"
) ? void (0) : __assert_fail ("OpIdx < (size_t)(std::end(TiedAsmOperandTable) - std::begin(TiedAsmOperandTable)) && \"Tied operand not found\""
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 829, __extension__ __PRETTY_FUNCTION__));
830 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
831 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
832 if (OpndNum1 != OpndNum2) {
833 auto &SrcOp1 = Operands[OpndNum1];
834 auto &SrcOp2 = Operands[OpndNum2];
835 if (SrcOp1->isReg() && SrcOp2->isReg() &&
836 SrcOp1->getReg() != SrcOp2->getReg()) {
837 ErrorInfo = OpndNum2;
838 return false;
839 }
840 }
841 break;
842 }
843 default:
844 break;
845 }
846 }
847 return true;
848}
849
850static const char *const MnemonicTable =
851 "\021#ADJCALLSTACKDOWN\017#ADJCALLSTACKUP\014#ADJDYNALLOC\003add\005add."
852 "f\004addc\006addc.f\003and\005and.f\001b\002bt\002ld\004ld.b\004ld.h\005"
853 "leadz\005log_0\005log_1\005log_2\005log_3\005log_4\003mov\003nop\002or\004"
854 "or.f\004popc\001s\004sel.\002sh\004sh.f\003sha\005sha.f\002st\004st.b\004"
855 "st.h\003sub\005sub.f\004subb\006subb.f\006trailz\003uld\005uld.b\005uld"
856 ".h\003xor\005xor.f";
857
858namespace {
859 struct MatchEntry {
Excessive padding in 'struct (anonymous namespace)::MatchEntry' (2 padding bytes, where 0 is optimal). Optimal fields order: Opcode, Mnemonic, ConvertFn, RequiredFeatures, Classes, consider reordering the fields or adding explicit padding members
860 uint8_t Mnemonic;
861 uint16_t Opcode;
862 uint8_t ConvertFn;
863 uint8_t RequiredFeatures;
864 uint8_t Classes[7];
865 StringRef getMnemonic() const {
866 return StringRef(MnemonicTable + Mnemonic + 1,
867 MnemonicTable[Mnemonic]);
868 }
869 };
870
871 // Predicate for searching for an opcode.
872 struct LessOpcode {
873 bool operator()(const MatchEntry &LHS, StringRef RHS) {
874 return LHS.getMnemonic() < RHS;
875 }
876 bool operator()(StringRef LHS, const MatchEntry &RHS) {
877 return LHS < RHS.getMnemonic();
878 }
879 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
880 return LHS.getMnemonic() < RHS.getMnemonic();
881 }
882 };
883} // end anonymous namespace.
884
885static const MatchEntry MatchTable0[] = {
886 { 0 /* #ADJCALLSTACKDOWN */, Lanai::ADJCALLSTACKDOWN, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
887 { 18 /* #ADJCALLSTACKUP */, Lanai::ADJCALLSTACKUP, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
888 { 34 /* #ADJDYNALLOC */, Lanai::ADJDYNALLOC, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR, MCK_GPR }, },
889 { 47 /* add */, Lanai::ADD_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
890 { 47 /* add */, Lanai::ADD_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
891 { 47 /* add */, Lanai::ADD_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
892 { 51 /* add.f */, Lanai::ADD_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
893 { 51 /* add.f */, Lanai::ADD_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
894 { 51 /* add.f */, Lanai::ADD_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
895 { 57 /* addc */, Lanai::ADDC_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
896 { 57 /* addc */, Lanai::ADDC_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
897 { 57 /* addc */, Lanai::ADDC_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
898 { 62 /* addc.f */, Lanai::ADDC_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
899 { 62 /* addc.f */, Lanai::ADDC_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
900 { 62 /* addc.f */, Lanai::ADDC_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
901 { 69 /* and */, Lanai::AND_I_HI, Convert__Reg1_2__Reg1_0__HiImm16And1_1, 0, { MCK_GPR, MCK_HiImm16And, MCK_GPR }, },
902 { 69 /* and */, Lanai::AND_I_LO, Convert__Reg1_2__Reg1_0__LoImm16And1_1, 0, { MCK_GPR, MCK_LoImm16And, MCK_GPR }, },
903 { 69 /* and */, Lanai::AND_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
904 { 73 /* and.f */, Lanai::AND_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm16And1_1, 0, { MCK_GPR, MCK_HiImm16And, MCK_GPR }, },
905 { 73 /* and.f */, Lanai::AND_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm16And1_1, 0, { MCK_GPR, MCK_LoImm16And, MCK_GPR }, },
906 { 73 /* and.f */, Lanai::AND_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
907 { 79 /* b */, Lanai::BRIND_CC, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GPR }, },
908 { 79 /* b */, Lanai::BRCC, Convert__BrTarget1_1__Imm1_0, 0, { MCK_Imm, MCK_BrTarget }, },
909 { 79 /* b */, Lanai::BRR, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__DOT_r, MCK_Imm }, },
910 { 79 /* b */, Lanai::BRIND_CCA, Convert__Reg1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_GPR, MCK_add, MCK_GPR }, },
911 { 81 /* bt */, Lanai::JR, Convert__Reg1_0, 0, { MCK_GPR }, },
912 { 81 /* bt */, Lanai::BT, Convert__BrTarget1_0, 0, { MCK_BrTarget }, },
913 { 84 /* ld */, Lanai::LDADDR, Convert__Reg1_1__MemImm1_0, 0, { MCK_MemImm, MCK_GPR }, },
914 { 84 /* ld */, Lanai::LDW_RI, Convert__Reg1_1__MemRegImm3_0, 0, { MCK_MemRegImm, MCK_GPR }, },
915 { 84 /* ld */, Lanai::LDW_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
916 { 84 /* ld */, Lanai::RET, Convert_NoOperands, 0, { MCK__MINUS_4, MCK__91_, MCK__PCT_fp, MCK__93_, MCK__PCT_pc, MCK__EXCLAIM_, MCK_return }, },
917 { 87 /* ld.b */, Lanai::LDBs_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
918 { 87 /* ld.b */, Lanai::LDBs_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
919 { 92 /* ld.h */, Lanai::LDHs_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
920 { 92 /* ld.h */, Lanai::LDHs_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
921 { 97 /* leadz */, Lanai::LEADZ, Convert__Reg1_1__Reg1_0, 0, { MCK_GPR, MCK_GPR }, },
922 { 103 /* log_0 */, Lanai::LOG0, Convert_NoOperands, 0, { }, },
923 { 109 /* log_1 */, Lanai::LOG1, Convert_NoOperands, 0, { }, },
924 { 115 /* log_2 */, Lanai::LOG2, Convert_NoOperands, 0, { }, },
925 { 121 /* log_3 */, Lanai::LOG3, Convert_NoOperands, 0, { }, },
926 { 127 /* log_4 */, Lanai::LOG4, Convert_NoOperands, 0, { }, },
927 { 133 /* mov */, Lanai::ADD_R, Convert__Reg1_1__Reg1_0__regR0__imm_95_0, 0, { MCK_GPR, MCK_GPR }, },
928 { 133 /* mov */, Lanai::AND_I_HI, Convert__Reg1_1__regR1__HiImm16And1_0, 0, { MCK_HiImm16And, MCK_GPR }, },
929 { 133 /* mov */, Lanai::ADD_I_HI, Convert__Reg1_1__regR0__HiImm161_0, 0, { MCK_HiImm16, MCK_GPR }, },
930 { 133 /* mov */, Lanai::AND_I_LO, Convert__Reg1_1__regR1__LoImm16And1_0, 0, { MCK_LoImm16And, MCK_GPR }, },
931 { 133 /* mov */, Lanai::ADD_I_LO, Convert__Reg1_1__regR0__LoImm161_0, 0, { MCK_LoImm16, MCK_GPR }, },
932 { 133 /* mov */, Lanai::SLI, Convert__Reg1_1__LoImm211_0, 0, { MCK_LoImm21, MCK_GPR }, },
933 { 137 /* nop */, Lanai::NOP, Convert_NoOperands, 0, { }, },
934 { 141 /* or */, Lanai::OR_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
935 { 141 /* or */, Lanai::OR_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
936 { 141 /* or */, Lanai::OR_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
937 { 144 /* or.f */, Lanai::OR_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
938 { 144 /* or.f */, Lanai::OR_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
939 { 144 /* or.f */, Lanai::OR_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
940 { 149 /* popc */, Lanai::POPC, Convert__Reg1_1__Reg1_0, 0, { MCK_GPR, MCK_GPR }, },
941 { 154 /* s */, Lanai::SCC, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GPR }, },
942 { 156 /* sel. */, Lanai::SELECT, Convert__Reg1_3__Reg1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_GPR, MCK_GPR, MCK_GPR }, },
943 { 161 /* sh */, Lanai::SL_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
944 { 161 /* sh */, Lanai::SHL_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
945 { 164 /* sh.f */, Lanai::SL_F_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
946 { 164 /* sh.f */, Lanai::SHL_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
947 { 169 /* sha */, Lanai::SA_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
948 { 169 /* sha */, Lanai::SRA_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
949 { 173 /* sha.f */, Lanai::SA_F_I, Convert__Reg1_2__Reg1_0__ImmShift1_1, 0, { MCK_GPR, MCK_ImmShift, MCK_GPR }, },
950 { 173 /* sha.f */, Lanai::SRA_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
951 { 179 /* st */, Lanai::STADDR, Convert__Reg1_0__MemImm1_1, 0, { MCK_GPR, MCK_MemImm }, },
952 { 179 /* st */, Lanai::SW_RI, Convert__Reg1_0__MemRegImm3_1, 0, { MCK_GPR, MCK_MemRegImm }, },
953 { 179 /* st */, Lanai::SW_RR, Convert__Reg1_0__MemRegReg3_1, 0, { MCK_GPR, MCK_MemRegReg }, },
954 { 182 /* st.b */, Lanai::STB_RR, Convert__Reg1_0__MemRegReg3_1, 0, { MCK_GPR, MCK_MemRegReg }, },
955 { 182 /* st.b */, Lanai::STB_RI, Convert__Reg1_0__MemSpls3_1, 0, { MCK_GPR, MCK_MemSpls }, },
956 { 187 /* st.h */, Lanai::STH_RR, Convert__Reg1_0__MemRegReg3_1, 0, { MCK_GPR, MCK_MemRegReg }, },
957 { 187 /* st.h */, Lanai::STH_RI, Convert__Reg1_0__MemSpls3_1, 0, { MCK_GPR, MCK_MemSpls }, },
958 { 192 /* sub */, Lanai::SUB_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
959 { 192 /* sub */, Lanai::SUB_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
960 { 192 /* sub */, Lanai::SUB_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
961 { 196 /* sub.f */, Lanai::SUB_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
962 { 196 /* sub.f */, Lanai::SUB_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
963 { 196 /* sub.f */, Lanai::SUB_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
964 { 202 /* subb */, Lanai::SUBB_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
965 { 202 /* subb */, Lanai::SUBB_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
966 { 202 /* subb */, Lanai::SUBB_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
967 { 207 /* subb.f */, Lanai::SUBB_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
968 { 207 /* subb.f */, Lanai::SUBB_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
969 { 207 /* subb.f */, Lanai::SUBB_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
970 { 214 /* trailz */, Lanai::TRAILZ, Convert__Reg1_1__Reg1_0, 0, { MCK_GPR, MCK_GPR }, },
971 { 221 /* uld */, Lanai::LDW_RI, Convert__Reg1_1__MemRegImm3_0, 0, { MCK_MemRegImm, MCK_GPR }, },
972 { 221 /* uld */, Lanai::LDWz_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
973 { 225 /* uld.b */, Lanai::LDBz_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
974 { 225 /* uld.b */, Lanai::LDBz_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
975 { 231 /* uld.h */, Lanai::LDHz_RR, Convert__Reg1_1__MemRegReg3_0, 0, { MCK_MemRegReg, MCK_GPR }, },
976 { 231 /* uld.h */, Lanai::LDHz_RI, Convert__Reg1_1__MemSpls3_0, 0, { MCK_MemSpls, MCK_GPR }, },
977 { 237 /* xor */, Lanai::XOR_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
978 { 237 /* xor */, Lanai::XOR_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
979 { 237 /* xor */, Lanai::XOR_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
980 { 241 /* xor.f */, Lanai::XOR_F_I_HI, Convert__Reg1_2__Reg1_0__HiImm161_1, 0, { MCK_GPR, MCK_HiImm16, MCK_GPR }, },
981 { 241 /* xor.f */, Lanai::XOR_F_I_LO, Convert__Reg1_2__Reg1_0__LoImm161_1, 0, { MCK_GPR, MCK_LoImm16, MCK_GPR }, },
982 { 241 /* xor.f */, Lanai::XOR_F_R, Convert__Reg1_3__Reg1_1__Reg1_2__CondCode1_0, 0, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, },
983};
984
985#include "llvm/Support/Debug.h"
986#include "llvm/Support/Format.h"
987
988unsigned LanaiAsmParser::
989MatchInstructionImpl(const OperandVector &Operands,
990 MCInst &Inst,
991 uint64_t &ErrorInfo,
992 bool matchingInlineAsm, unsigned VariantID) {
993 // Eliminate obvious mismatches.
994 if (Operands.size() > 8) {
995 ErrorInfo = 8;
996 return Match_InvalidOperand;
997 }
998
999 // Get the current feature set.
1000 uint64_t AvailableFeatures = getAvailableFeatures();
1001
1002 // Get the instruction mnemonic, which is the first token.
1003 StringRef Mnemonic = ((LanaiOperand&)*Operands[0]).getToken();
1004
1005 // Some state to try to produce better error messages.
1006 bool HadMatchOtherThanFeatures = false;
1007 bool HadMatchOtherThanPredicate = false;
1008 unsigned RetCode = Match_InvalidOperand;
1009 uint64_t MissingFeatures = ~0ULL;
1010 // Set ErrorInfo to the operand that mismatches if it is
1011 // wrong for all instances of the instruction.
1012 ErrorInfo = ~0ULL;
1013 // Find the appropriate table for this asm variant.
1014 const MatchEntry *Start, *End;
1015 switch (VariantID) {
1016 default: llvm_unreachable("invalid variant!")::llvm::llvm_unreachable_internal("invalid variant!", "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 1016);
1017 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
1018 }
1019 // Search the table.
1020 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
1021
1022 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "AsmMatcher: found " <<
std::distance(MnemonicRange.first, MnemonicRange.second) <<
" encodings with mnemonic '" << Mnemonic << "'\n"
; } } while (false)
1023 std::distance(MnemonicRange.first, MnemonicRange.second) <<do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "AsmMatcher: found " <<
std::distance(MnemonicRange.first, MnemonicRange.second) <<
" encodings with mnemonic '" << Mnemonic << "'\n"
; } } while (false)
1024 " encodings with mnemonic '" << Mnemonic << "'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "AsmMatcher: found " <<
std::distance(MnemonicRange.first, MnemonicRange.second) <<
" encodings with mnemonic '" << Mnemonic << "'\n"
; } } while (false);
1025
1026 // Return a more specific error code if no mnemonics match.
1027 if (MnemonicRange.first == MnemonicRange.second)
1028 return Match_MnemonicFail;
1029
1030 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
1031 it != ie; ++it) {
1032 bool HasRequiredFeatures =
1033 (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
1034 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Trying to match opcode " <<
MII.getName(it->Opcode) << "\n"; } } while (false)
1035 << MII.getName(it->Opcode) << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Trying to match opcode " <<
MII.getName(it->Opcode) << "\n"; } } while (false);
1036 // equal_range guarantees that instruction mnemonic matches.
1037 assert(Mnemonic == it->getMnemonic())(static_cast <bool> (Mnemonic == it->getMnemonic()) ?
void (0) : __assert_fail ("Mnemonic == it->getMnemonic()"
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 1037, __extension__ __PRETTY_FUNCTION__));
1038 bool OperandsValid = true;
1039 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 7; ++FormalIdx) {
1040 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
1041 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " Matching formal operand class "
<< getMatchClassName(Formal) << " against actual operand at index "
<< ActualIdx; } } while (false)
1042 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " Matching formal operand class "
<< getMatchClassName(Formal) << " against actual operand at index "
<< ActualIdx; } } while (false)
1043 << " against actual operand at index " << ActualIdx)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " Matching formal operand class "
<< getMatchClassName(Formal) << " against actual operand at index "
<< ActualIdx; } } while (false);
1044 if (ActualIdx < Operands.size())
1045 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " ("; Operands[ActualIdx]->
print(dbgs()); dbgs() << "): "; } } while (false)
1046 Operands[ActualIdx]->print(dbgs()); dbgs() << "): ")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " ("; Operands[ActualIdx]->
print(dbgs()); dbgs() << "): "; } } while (false);
1047 else
1048 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << ": "; } } while (false);
1049 if (ActualIdx >= Operands.size()) {
1050 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "actual operand index out of range "
; } } while (false);
1051 OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
1052 if (!OperandsValid) ErrorInfo = ActualIdx;
1053 break;
1054 }
1055 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
1056 unsigned Diag = validateOperandClass(Actual, Formal);
1057 if (Diag == Match_Success) {
1058 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using generic matcher\n"
; } } while (false)
1059 dbgs() << "match success using generic matcher\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using generic matcher\n"
; } } while (false);
1060 ++ActualIdx;
1061 continue;
1062 }
1063 // If the generic handler indicates an invalid operand
1064 // failure, check for a special case.
1065 if (Diag != Match_Success) {
1066 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
1067 if (TargetDiag == Match_Success) {
1068 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using target matcher\n"
; } } while (false)
1069 dbgs() << "match success using target matcher\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using target matcher\n"
; } } while (false);
1070 ++ActualIdx;
1071 continue;
1072 }
1073 // If the target matcher returned a specific error code use
1074 // that, else use the one from the generic matcher.
1075 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
1076 Diag = TargetDiag;
1077 }
1078 // If current formal operand wasn't matched and it is optional
1079 // then try to match next formal operand
1080 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
1081 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "ignoring optional operand\n"
; } } while (false);
1082 continue;
1083 }
1084 // If this operand is broken for all of the instances of this
1085 // mnemonic, keep track of it so we can report loc info.
1086 // If we already had a match that only failed due to a
1087 // target predicate, that diagnostic is preferred.
1088 if (!HadMatchOtherThanPredicate &&
1089 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
1090 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
1091 RetCode = Diag;
1092 ErrorInfo = ActualIdx;
1093 }
1094 // Otherwise, just reject this instance of the mnemonic.
1095 OperandsValid = false;
1096 break;
1097 }
1098
1099 if (!OperandsValid) {
1100 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: multiple "
"operand mismatches, ignoring " "this opcode\n"; } } while (
false)
1101 "operand mismatches, ignoring "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: multiple "
"operand mismatches, ignoring " "this opcode\n"; } } while (
false)
1102 "this opcode\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: multiple "
"operand mismatches, ignoring " "this opcode\n"; } } while (
false);
1103 continue;
1104 }
1105 if (!HasRequiredFeatures) {
1106 HadMatchOtherThanFeatures = true;
1107 uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
1108 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Missing target features: "
<< format_hex(NewMissingFeatures, 18) << "\n"; }
} while (false)
1109 << format_hex(NewMissingFeatures, 18)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Missing target features: "
<< format_hex(NewMissingFeatures, 18) << "\n"; }
} while (false)
1110 << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Missing target features: "
<< format_hex(NewMissingFeatures, 18) << "\n"; }
} while (false);
1111 if (countPopulation(NewMissingFeatures) <=
1112 countPopulation(MissingFeatures))
1113 MissingFeatures = NewMissingFeatures;
1114 continue;
1115 }
1116
1117 Inst.clear();
1118
1119 Inst.setOpcode(it->Opcode);
1120 // We have a potential match but have not rendered the operands.
1121 // Check the target predicate to handle any context sensitive
1122 // constraints.
1123 // For example, Ties that are referenced multiple times must be
1124 // checked here to ensure the input is the same for each match
1125 // constraints. If we leave it any later the ties will have been
1126 // canonicalized
1127 unsigned MatchResult;
1128 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
1129 Inst.clear();
1130 DEBUG_WITH_TYPE(do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
1131 "asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
1132 dbgs() << "Early target match predicate failed with diag code "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
1133 << MatchResult << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false);
1134 RetCode = MatchResult;
1135 HadMatchOtherThanPredicate = true;
1136 continue;
1137 }
1138
1139 if (matchingInlineAsm) {
1140 convertToMapAndConstraints(it->ConvertFn, Operands);
1141 if (!checkAsmTiedOperandConstraints(it->ConvertFn, Operands, ErrorInfo))
1142 return Match_InvalidTiedOperand;
1143
1144 return Match_Success;
1145 }
1146
1147 // We have selected a definite instruction, convert the parsed
1148 // operands into the appropriate MCInst.
1149 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
1150
1151 // We have a potential match. Check the target predicate to
1152 // handle any context sensitive constraints.
1153 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
1154 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
1155 dbgs() << "Target match predicate failed with diag code "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
1156 << MatchResult << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false);
1157 Inst.clear();
1158 RetCode = MatchResult;
1159 HadMatchOtherThanPredicate = true;
1160 continue;
1161 }
1162
1163 if (!checkAsmTiedOperandConstraints(it->ConvertFn, Operands, ErrorInfo))
1164 return Match_InvalidTiedOperand;
1165
1166 DEBUG_WITH_TYPE(do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: complete match, selecting this opcode\n"
; } } while (false)
1167 "asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: complete match, selecting this opcode\n"
; } } while (false)
1168 dbgs() << "Opcode result: complete match, selecting this opcode\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: complete match, selecting this opcode\n"
; } } while (false);
1169 return Match_Success;
1170 }
1171
1172 // Okay, we had no match. Try to return a useful error code.
1173 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
1174 return RetCode;
1175
1176 // Missing feature matches return which features were missing
1177 ErrorInfo = MissingFeatures;
1178 return Match_MissingFeature;
1179}
1180
1181namespace {
1182 struct OperandMatchEntry {
1183 uint8_t RequiredFeatures;
1184 uint8_t Mnemonic;
1185 uint8_t Class;
1186 uint8_t OperandMask;
1187
1188 StringRef getMnemonic() const {
1189 return StringRef(MnemonicTable + Mnemonic + 1,
1190 MnemonicTable[Mnemonic]);
1191 }
1192 };
1193
1194 // Predicate for searching for an opcode.
1195 struct LessOpcodeOperand {
1196 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
1197 return LHS.getMnemonic() < RHS;
1198 }
1199 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
1200 return LHS < RHS.getMnemonic();
1201 }
1202 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
1203 return LHS.getMnemonic() < RHS.getMnemonic();
1204 }
1205 };
1206} // end anonymous namespace.
1207
1208static const OperandMatchEntry OperandMatchTable[20] = {
1209 /* Operand List Mask, Mnemonic, Operand Class, Features */
1210 { 0, 84 /* ld */, MCK_MemImm, 1 /* 0 */ },
1211 { 0, 84 /* ld */, MCK_MemRegImm, 1 /* 0 */ },
1212 { 0, 84 /* ld */, MCK_MemRegReg, 1 /* 0 */ },
1213 { 0, 87 /* ld.b */, MCK_MemRegReg, 1 /* 0 */ },
1214 { 0, 87 /* ld.b */, MCK_MemSpls, 1 /* 0 */ },
1215 { 0, 92 /* ld.h */, MCK_MemRegReg, 1 /* 0 */ },
1216 { 0, 92 /* ld.h */, MCK_MemSpls, 1 /* 0 */ },
1217 { 0, 179 /* st */, MCK_MemImm, 2 /* 1 */ },
1218 { 0, 179 /* st */, MCK_MemRegImm, 2 /* 1 */ },
1219 { 0, 179 /* st */, MCK_MemRegReg, 2 /* 1 */ },
1220 { 0, 182 /* st.b */, MCK_MemRegReg, 2 /* 1 */ },
1221 { 0, 182 /* st.b */, MCK_MemSpls, 2 /* 1 */ },
1222 { 0, 187 /* st.h */, MCK_MemRegReg, 2 /* 1 */ },
1223 { 0, 187 /* st.h */, MCK_MemSpls, 2 /* 1 */ },
1224 { 0, 221 /* uld */, MCK_MemRegImm, 1 /* 0 */ },
1225 { 0, 221 /* uld */, MCK_MemRegReg, 1 /* 0 */ },
1226 { 0, 225 /* uld.b */, MCK_MemRegReg, 1 /* 0 */ },
1227 { 0, 225 /* uld.b */, MCK_MemSpls, 1 /* 0 */ },
1228 { 0, 231 /* uld.h */, MCK_MemRegReg, 1 /* 0 */ },
1229 { 0, 231 /* uld.h */, MCK_MemSpls, 1 /* 0 */ },
1230};
1231
1232OperandMatchResultTy LanaiAsmParser::
1233tryCustomParseOperand(OperandVector &Operands,
1234 unsigned MCK) {
1235
1236 switch(MCK) {
1237 case MCK_MemImm:
1238 return parseMemoryOperand(Operands);
1239 case MCK_MemRegImm:
1240 return parseMemoryOperand(Operands);
1241 case MCK_MemRegReg:
1242 return parseMemoryOperand(Operands);
1243 case MCK_MemSpls:
1244 return parseMemoryOperand(Operands);
1245 default:
1246 return MatchOperand_NoMatch;
1247 }
1248 return MatchOperand_NoMatch;
1249}
1250
1251OperandMatchResultTy LanaiAsmParser::
1252MatchOperandParserImpl(OperandVector &Operands,
1253 StringRef Mnemonic,
1254 bool ParseForAllFeatures) {
1255 // Get the current feature set.
1256 uint64_t AvailableFeatures = getAvailableFeatures();
1257
1258 // Get the next operand index.
1259 unsigned NextOpNum = Operands.size() - 1;
1260 // Search the table.
1261 auto MnemonicRange =
1262 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
1263 Mnemonic, LessOpcodeOperand());
1264
1265 if (MnemonicRange.first == MnemonicRange.second)
1266 return MatchOperand_NoMatch;
1267
1268 for (const OperandMatchEntry *it = MnemonicRange.first,
1269 *ie = MnemonicRange.second; it != ie; ++it) {
1270 // equal_range guarantees that instruction mnemonic matches.
1271 assert(Mnemonic == it->getMnemonic())(static_cast <bool> (Mnemonic == it->getMnemonic()) ?
void (0) : __assert_fail ("Mnemonic == it->getMnemonic()"
, "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 1271, __extension__ __PRETTY_FUNCTION__));
1272
1273 // check if the available features match
1274 if (!ParseForAllFeatures && (AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures)
1275 continue;
1276
1277 // check if the operand in question has a custom parser.
1278 if (!(it->OperandMask & (1 << NextOpNum)))
1279 continue;
1280
1281 // call custom parse method to handle the operand
1282 OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class);
1283 if (Result != MatchOperand_NoMatch)
1284 return Result;
1285 }
1286
1287 // Okay, we had no match.
1288 return MatchOperand_NoMatch;
1289}
1290
1291#endif // GET_MATCHER_IMPLEMENTATION
1292
1293
1294#ifdef GET_MNEMONIC_SPELL_CHECKER
1295#undef GET_MNEMONIC_SPELL_CHECKER
1296
1297static std::string LanaiMnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
1298 const unsigned MaxEditDist = 2;
1299 std::vector<StringRef> Candidates;
1300 StringRef Prev = "";
1301
1302 // Find the appropriate table for this asm variant.
1303 const MatchEntry *Start, *End;
1304 switch (VariantID) {
1305 default: llvm_unreachable("invalid variant!")::llvm::llvm_unreachable_internal("invalid variant!", "/build/llvm-toolchain-snapshot-7~svn329677/build-llvm/lib/Target/Lanai/LanaiGenAsmMatcher.inc"
, 1305);
1306 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
1307 }
1308
1309 for (auto I = Start; I < End; I++) {
1310 // Ignore unsupported instructions.
1311 if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
1312 continue;
1313
1314 StringRef T = I->getMnemonic();
1315 // Avoid recomputing the edit distance for the same string.
1316 if (T.equals(Prev))
1317 continue;
1318
1319 Prev = T;
1320 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
1321 if (Dist <= MaxEditDist)
1322 Candidates.push_back(T);
1323 }
1324
1325 if (Candidates.empty())
1326 return "";
1327
1328 std::string Res = ", did you mean: ";
1329 unsigned i = 0;
1330 for( ; i < Candidates.size() - 1; i++)
1331 Res += Candidates[i].str() + ", ";
1332 return Res + Candidates[i].str() + "?";
1333}
1334
1335#endif // GET_MNEMONIC_SPELL_CHECKER
1336