Bug Summary

File:tools/clang/lib/Driver/ToolChains/Arch/Mips.cpp
Warning:line 250, column 5
Value stored to 'NonPIC' is never read

Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name Mips.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -relaxed-aliasing -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-8/lib/clang/8.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/tools/clang/lib/Driver -I /build/llvm-toolchain-snapshot-8~svn345461/tools/clang/lib/Driver -I /build/llvm-toolchain-snapshot-8~svn345461/tools/clang/include -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/tools/clang/include -I /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/include -I /build/llvm-toolchain-snapshot-8~svn345461/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/x86_64-linux-gnu/c++/6.3.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/6.3.0/../../../../include/c++/6.3.0/backward -internal-isystem /usr/include/clang/8.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-8/lib/clang/8.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-8~svn345461/build-llvm/tools/clang/lib/Driver -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fno-common -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-10-27-211344-32123-1 -x c++ /build/llvm-toolchain-snapshot-8~svn345461/tools/clang/lib/Driver/ToolChains/Arch/Mips.cpp -faddrsig
1//===--- Mips.cpp - Tools Implementations -----------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "Mips.h"
11#include "ToolChains/CommonArgs.h"
12#include "clang/Driver/Driver.h"
13#include "clang/Driver/DriverDiagnostic.h"
14#include "clang/Driver/Options.h"
15#include "llvm/ADT/StringSwitch.h"
16#include "llvm/Option/ArgList.h"
17
18using namespace clang::driver;
19using namespace clang::driver::tools;
20using namespace clang;
21using namespace llvm::opt;
22
23// Get CPU and ABI names. They are not independent
24// so we have to calculate them together.
25void mips::getMipsCPUAndABI(const ArgList &Args, const llvm::Triple &Triple,
26 StringRef &CPUName, StringRef &ABIName) {
27 const char *DefMips32CPU = "mips32r2";
28 const char *DefMips64CPU = "mips64r2";
29
30 // MIPS32r6 is the default for mips(el)?-img-linux-gnu and MIPS64r6 is the
31 // default for mips64(el)?-img-linux-gnu.
32 if (Triple.getVendor() == llvm::Triple::ImaginationTechnologies &&
33 Triple.isGNUEnvironment()) {
34 DefMips32CPU = "mips32r6";
35 DefMips64CPU = "mips64r6";
36 }
37
38 if (Triple.getSubArch() == llvm::Triple::MipsSubArch_r6) {
39 DefMips32CPU = "mips32r6";
40 DefMips64CPU = "mips64r6";
41 }
42
43 // MIPS64r6 is the default for Android MIPS64 (mips64el-linux-android).
44 if (Triple.isAndroid()) {
45 DefMips32CPU = "mips32";
46 DefMips64CPU = "mips64r6";
47 }
48
49 // MIPS3 is the default for mips64*-unknown-openbsd.
50 if (Triple.getOS() == llvm::Triple::OpenBSD)
51 DefMips64CPU = "mips3";
52
53 // MIPS2 is the default for mips(el)?-unknown-freebsd.
54 // MIPS3 is the default for mips64(el)?-unknown-freebsd.
55 if (Triple.getOS() == llvm::Triple::FreeBSD) {
56 DefMips32CPU = "mips2";
57 DefMips64CPU = "mips3";
58 }
59
60 if (Arg *A = Args.getLastArg(clang::driver::options::OPT_march_EQ,
61 options::OPT_mcpu_EQ))
62 CPUName = A->getValue();
63
64 if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
65 ABIName = A->getValue();
66 // Convert a GNU style Mips ABI name to the name
67 // accepted by LLVM Mips backend.
68 ABIName = llvm::StringSwitch<llvm::StringRef>(ABIName)
69 .Case("32", "o32")
70 .Case("64", "n64")
71 .Default(ABIName);
72 }
73
74 // Setup default CPU and ABI names.
75 if (CPUName.empty() && ABIName.empty()) {
76 switch (Triple.getArch()) {
77 default:
78 llvm_unreachable("Unexpected triple arch name")::llvm::llvm_unreachable_internal("Unexpected triple arch name"
, "/build/llvm-toolchain-snapshot-8~svn345461/tools/clang/lib/Driver/ToolChains/Arch/Mips.cpp"
, 78)
;
79 case llvm::Triple::mips:
80 case llvm::Triple::mipsel:
81 CPUName = DefMips32CPU;
82 break;
83 case llvm::Triple::mips64:
84 case llvm::Triple::mips64el:
85 CPUName = DefMips64CPU;
86 break;
87 }
88 }
89
90 if (ABIName.empty() && (Triple.getEnvironment() == llvm::Triple::GNUABIN32))
91 ABIName = "n32";
92
93 if (ABIName.empty() &&
94 (Triple.getVendor() == llvm::Triple::MipsTechnologies ||
95 Triple.getVendor() == llvm::Triple::ImaginationTechnologies)) {
96 ABIName = llvm::StringSwitch<const char *>(CPUName)
97 .Case("mips1", "o32")
98 .Case("mips2", "o32")
99 .Case("mips3", "n64")
100 .Case("mips4", "n64")
101 .Case("mips5", "n64")
102 .Case("mips32", "o32")
103 .Case("mips32r2", "o32")
104 .Case("mips32r3", "o32")
105 .Case("mips32r5", "o32")
106 .Case("mips32r6", "o32")
107 .Case("mips64", "n64")
108 .Case("mips64r2", "n64")
109 .Case("mips64r3", "n64")
110 .Case("mips64r5", "n64")
111 .Case("mips64r6", "n64")
112 .Case("octeon", "n64")
113 .Case("p5600", "o32")
114 .Default("");
115 }
116
117 if (ABIName.empty()) {
118 // Deduce ABI name from the target triple.
119 ABIName = Triple.isMIPS32() ? "o32" : "n64";
120 }
121
122 if (CPUName.empty()) {
123 // Deduce CPU name from ABI name.
124 CPUName = llvm::StringSwitch<const char *>(ABIName)
125 .Case("o32", DefMips32CPU)
126 .Cases("n32", "n64", DefMips64CPU)
127 .Default("");
128 }
129
130 // FIXME: Warn on inconsistent use of -march and -mabi.
131}
132
133std::string mips::getMipsABILibSuffix(const ArgList &Args,
134 const llvm::Triple &Triple) {
135 StringRef CPUName, ABIName;
136 tools::mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
137 return llvm::StringSwitch<std::string>(ABIName)
138 .Case("o32", "")
139 .Case("n32", "32")
140 .Case("n64", "64");
141}
142
143// Convert ABI name to the GNU tools acceptable variant.
144StringRef mips::getGnuCompatibleMipsABIName(StringRef ABI) {
145 return llvm::StringSwitch<llvm::StringRef>(ABI)
146 .Case("o32", "32")
147 .Case("n64", "64")
148 .Default(ABI);
149}
150
151// Select the MIPS float ABI as determined by -msoft-float, -mhard-float,
152// and -mfloat-abi=.
153mips::FloatABI mips::getMipsFloatABI(const Driver &D, const ArgList &Args) {
154 mips::FloatABI ABI = mips::FloatABI::Invalid;
155 if (Arg *A =
156 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
157 options::OPT_mfloat_abi_EQ)) {
158 if (A->getOption().matches(options::OPT_msoft_float))
159 ABI = mips::FloatABI::Soft;
160 else if (A->getOption().matches(options::OPT_mhard_float))
161 ABI = mips::FloatABI::Hard;
162 else {
163 ABI = llvm::StringSwitch<mips::FloatABI>(A->getValue())
164 .Case("soft", mips::FloatABI::Soft)
165 .Case("hard", mips::FloatABI::Hard)
166 .Default(mips::FloatABI::Invalid);
167 if (ABI == mips::FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
168 D.Diag(clang::diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
169 ABI = mips::FloatABI::Hard;
170 }
171 }
172 }
173
174 // If unspecified, choose the default based on the platform.
175 if (ABI == mips::FloatABI::Invalid) {
176 // Assume "hard", because it's a default value used by gcc.
177 // When we start to recognize specific target MIPS processors,
178 // we will be able to select the default more correctly.
179 ABI = mips::FloatABI::Hard;
180 }
181
182 assert(ABI != mips::FloatABI::Invalid && "must select an ABI")((ABI != mips::FloatABI::Invalid && "must select an ABI"
) ? static_cast<void> (0) : __assert_fail ("ABI != mips::FloatABI::Invalid && \"must select an ABI\""
, "/build/llvm-toolchain-snapshot-8~svn345461/tools/clang/lib/Driver/ToolChains/Arch/Mips.cpp"
, 182, __PRETTY_FUNCTION__))
;
183 return ABI;
184}
185
186void mips::getMIPSTargetFeatures(const Driver &D, const llvm::Triple &Triple,
187 const ArgList &Args,
188 std::vector<StringRef> &Features) {
189 StringRef CPUName;
190 StringRef ABIName;
191 getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
192 ABIName = getGnuCompatibleMipsABIName(ABIName);
193
194 // Historically, PIC code for MIPS was associated with -mabicalls, a.k.a
195 // SVR4 abicalls. Static code does not use SVR4 calling sequences. An ABI
196 // extension was developed by Richard Sandiford & Code Sourcery to support
197 // static code calling PIC code (CPIC). For O32 and N32 this means we have
198 // several combinations of PIC/static and abicalls. Pure static, static
199 // with the CPIC extension, and pure PIC code.
200
201 // At final link time, O32 and N32 with CPIC will have another section
202 // added to the binary which contains the stub functions to perform
203 // any fixups required for PIC code.
204
205 // For N64, the situation is more regular: code can either be static
206 // (non-abicalls) or PIC (abicalls). GCC has traditionally picked PIC code
207 // code for N64. Since Clang has already built the relocation model portion
208 // of the commandline, we pick add +noabicalls feature in the N64 static
209 // case.
210
211 // The is another case to be accounted for: -msym32, which enforces that all
212 // symbols have 32 bits in size. In this case, N64 can in theory use CPIC
213 // but it is unsupported.
214
215 // The combinations for N64 are:
216 // a) Static without abicalls and 64bit symbols.
217 // b) Static with abicalls and 32bit symbols.
218 // c) PIC with abicalls and 64bit symbols.
219
220 // For case (a) we need to add +noabicalls for N64.
221
222 bool IsN64 = ABIName == "64";
223 bool IsPIC = false;
224 bool NonPIC = false;
225
226 Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
227 options::OPT_fpic, options::OPT_fno_pic,
228 options::OPT_fPIE, options::OPT_fno_PIE,
229 options::OPT_fpie, options::OPT_fno_pie);
230 if (LastPICArg) {
231 Option O = LastPICArg->getOption();
232 NonPIC =
233 (O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
234 O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
235 IsPIC =
236 (O.matches(options::OPT_fPIC) || O.matches(options::OPT_fpic) ||
237 O.matches(options::OPT_fPIE) || O.matches(options::OPT_fpie));
238 }
239
240 bool UseAbiCalls = false;
241
242 Arg *ABICallsArg =
243 Args.getLastArg(options::OPT_mabicalls, options::OPT_mno_abicalls);
244 UseAbiCalls =
245 !ABICallsArg || ABICallsArg->getOption().matches(options::OPT_mabicalls);
246
247 if (IsN64 && NonPIC && (!ABICallsArg || UseAbiCalls)) {
248 D.Diag(diag::warn_drv_unsupported_pic_with_mabicalls)
249 << LastPICArg->getAsString(Args) << (!ABICallsArg ? 0 : 1);
250 NonPIC = false;
Value stored to 'NonPIC' is never read
251 }
252
253 if (ABICallsArg && !UseAbiCalls && IsPIC) {
254 D.Diag(diag::err_drv_unsupported_noabicalls_pic);
255 }
256
257 if (!UseAbiCalls)
258 Features.push_back("+noabicalls");
259 else
260 Features.push_back("-noabicalls");
261
262 if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
263 options::OPT_mno_long_calls)) {
264 if (A->getOption().matches(options::OPT_mno_long_calls))
265 Features.push_back("-long-calls");
266 else if (!UseAbiCalls)
267 Features.push_back("+long-calls");
268 else
269 D.Diag(diag::warn_drv_unsupported_longcalls) << (ABICallsArg ? 0 : 1);
270 }
271
272 mips::FloatABI FloatABI = mips::getMipsFloatABI(D, Args);
273 if (FloatABI == mips::FloatABI::Soft) {
274 // FIXME: Note, this is a hack. We need to pass the selected float
275 // mode to the MipsTargetInfoBase to define appropriate macros there.
276 // Now it is the only method.
277 Features.push_back("+soft-float");
278 }
279
280 if (Arg *A = Args.getLastArg(options::OPT_mnan_EQ)) {
281 StringRef Val = StringRef(A->getValue());
282 if (Val == "2008") {
283 if (mips::getIEEE754Standard(CPUName) & mips::Std2008)
284 Features.push_back("+nan2008");
285 else {
286 Features.push_back("-nan2008");
287 D.Diag(diag::warn_target_unsupported_nan2008) << CPUName;
288 }
289 } else if (Val == "legacy") {
290 if (mips::getIEEE754Standard(CPUName) & mips::Legacy)
291 Features.push_back("-nan2008");
292 else {
293 Features.push_back("+nan2008");
294 D.Diag(diag::warn_target_unsupported_nanlegacy) << CPUName;
295 }
296 } else
297 D.Diag(diag::err_drv_unsupported_option_argument)
298 << A->getOption().getName() << Val;
299 }
300
301 if (Arg *A = Args.getLastArg(options::OPT_mabs_EQ)) {
302 StringRef Val = StringRef(A->getValue());
303 if (Val == "2008") {
304 if (mips::getIEEE754Standard(CPUName) & mips::Std2008) {
305 Features.push_back("+abs2008");
306 } else {
307 Features.push_back("-abs2008");
308 D.Diag(diag::warn_target_unsupported_abs2008) << CPUName;
309 }
310 } else if (Val == "legacy") {
311 if (mips::getIEEE754Standard(CPUName) & mips::Legacy) {
312 Features.push_back("-abs2008");
313 } else {
314 Features.push_back("+abs2008");
315 D.Diag(diag::warn_target_unsupported_abslegacy) << CPUName;
316 }
317 } else {
318 D.Diag(diag::err_drv_unsupported_option_argument)
319 << A->getOption().getName() << Val;
320 }
321 }
322
323 AddTargetFeature(Args, Features, options::OPT_msingle_float,
324 options::OPT_mdouble_float, "single-float");
325 AddTargetFeature(Args, Features, options::OPT_mips16, options::OPT_mno_mips16,
326 "mips16");
327 AddTargetFeature(Args, Features, options::OPT_mmicromips,
328 options::OPT_mno_micromips, "micromips");
329 AddTargetFeature(Args, Features, options::OPT_mdsp, options::OPT_mno_dsp,
330 "dsp");
331 AddTargetFeature(Args, Features, options::OPT_mdspr2, options::OPT_mno_dspr2,
332 "dspr2");
333 AddTargetFeature(Args, Features, options::OPT_mmsa, options::OPT_mno_msa,
334 "msa");
335
336 // Add the last -mfp32/-mfpxx/-mfp64, if none are given and the ABI is O32
337 // pass -mfpxx, or if none are given and fp64a is default, pass fp64 and
338 // nooddspreg.
339 if (Arg *A = Args.getLastArg(options::OPT_mfp32, options::OPT_mfpxx,
340 options::OPT_mfp64)) {
341 if (A->getOption().matches(options::OPT_mfp32))
342 Features.push_back("-fp64");
343 else if (A->getOption().matches(options::OPT_mfpxx)) {
344 Features.push_back("+fpxx");
345 Features.push_back("+nooddspreg");
346 } else
347 Features.push_back("+fp64");
348 } else if (mips::shouldUseFPXX(Args, Triple, CPUName, ABIName, FloatABI)) {
349 Features.push_back("+fpxx");
350 Features.push_back("+nooddspreg");
351 } else if (mips::isFP64ADefault(Triple, CPUName)) {
352 Features.push_back("+fp64");
353 Features.push_back("+nooddspreg");
354 }
355
356 AddTargetFeature(Args, Features, options::OPT_mno_odd_spreg,
357 options::OPT_modd_spreg, "nooddspreg");
358 AddTargetFeature(Args, Features, options::OPT_mno_madd4, options::OPT_mmadd4,
359 "nomadd4");
360 AddTargetFeature(Args, Features, options::OPT_mmt, options::OPT_mno_mt, "mt");
361 AddTargetFeature(Args, Features, options::OPT_mcrc, options::OPT_mno_crc,
362 "crc");
363 AddTargetFeature(Args, Features, options::OPT_mvirt, options::OPT_mno_virt,
364 "virt");
365 AddTargetFeature(Args, Features, options::OPT_mginv, options::OPT_mno_ginv,
366 "ginv");
367
368 if (Arg *A = Args.getLastArg(options::OPT_mindirect_jump_EQ)) {
369 StringRef Val = StringRef(A->getValue());
370 if (Val == "hazard") {
371 Arg *B =
372 Args.getLastArg(options::OPT_mmicromips, options::OPT_mno_micromips);
373 Arg *C = Args.getLastArg(options::OPT_mips16, options::OPT_mno_mips16);
374
375 if (B && B->getOption().matches(options::OPT_mmicromips))
376 D.Diag(diag::err_drv_unsupported_indirect_jump_opt)
377 << "hazard" << "micromips";
378 else if (C && C->getOption().matches(options::OPT_mips16))
379 D.Diag(diag::err_drv_unsupported_indirect_jump_opt)
380 << "hazard" << "mips16";
381 else if (mips::supportsIndirectJumpHazardBarrier(CPUName))
382 Features.push_back("+use-indirect-jump-hazard");
383 else
384 D.Diag(diag::err_drv_unsupported_indirect_jump_opt)
385 << "hazard" << CPUName;
386 } else
387 D.Diag(diag::err_drv_unknown_indirect_jump_opt) << Val;
388 }
389}
390
391mips::IEEE754Standard mips::getIEEE754Standard(StringRef &CPU) {
392 // Strictly speaking, mips32r2 and mips64r2 do not conform to the
393 // IEEE754-2008 standard. Support for this standard was first introduced
394 // in Release 3. However, other compilers have traditionally allowed it
395 // for Release 2 so we should do the same.
396 return (IEEE754Standard)llvm::StringSwitch<int>(CPU)
397 .Case("mips1", Legacy)
398 .Case("mips2", Legacy)
399 .Case("mips3", Legacy)
400 .Case("mips4", Legacy)
401 .Case("mips5", Legacy)
402 .Case("mips32", Legacy)
403 .Case("mips32r2", Legacy | Std2008)
404 .Case("mips32r3", Legacy | Std2008)
405 .Case("mips32r5", Legacy | Std2008)
406 .Case("mips32r6", Std2008)
407 .Case("mips64", Legacy)
408 .Case("mips64r2", Legacy | Std2008)
409 .Case("mips64r3", Legacy | Std2008)
410 .Case("mips64r5", Legacy | Std2008)
411 .Case("mips64r6", Std2008)
412 .Default(Std2008);
413}
414
415bool mips::hasCompactBranches(StringRef &CPU) {
416 // mips32r6 and mips64r6 have compact branches.
417 return llvm::StringSwitch<bool>(CPU)
418 .Case("mips32r6", true)
419 .Case("mips64r6", true)
420 .Default(false);
421}
422
423bool mips::hasMipsAbiArg(const ArgList &Args, const char *Value) {
424 Arg *A = Args.getLastArg(options::OPT_mabi_EQ);
425 return A && (A->getValue() == StringRef(Value));
426}
427
428bool mips::isUCLibc(const ArgList &Args) {
429 Arg *A = Args.getLastArg(options::OPT_m_libc_Group);
430 return A && A->getOption().matches(options::OPT_muclibc);
431}
432
433bool mips::isNaN2008(const ArgList &Args, const llvm::Triple &Triple) {
434 if (Arg *NaNArg = Args.getLastArg(options::OPT_mnan_EQ))
435 return llvm::StringSwitch<bool>(NaNArg->getValue())
436 .Case("2008", true)
437 .Case("legacy", false)
438 .Default(false);
439
440 // NaN2008 is the default for MIPS32r6/MIPS64r6.
441 return llvm::StringSwitch<bool>(getCPUName(Args, Triple))
442 .Cases("mips32r6", "mips64r6", true)
443 .Default(false);
444
445 return false;
446}
447
448bool mips::isFP64ADefault(const llvm::Triple &Triple, StringRef CPUName) {
449 if (!Triple.isAndroid())
450 return false;
451
452 // Android MIPS32R6 defaults to FP64A.
453 return llvm::StringSwitch<bool>(CPUName)
454 .Case("mips32r6", true)
455 .Default(false);
456}
457
458bool mips::isFPXXDefault(const llvm::Triple &Triple, StringRef CPUName,
459 StringRef ABIName, mips::FloatABI FloatABI) {
460/* if (Triple.getVendor() != llvm::Triple::ImaginationTechnologies &&
461 Triple.getVendor() != llvm::Triple::MipsTechnologies &&
462 !Triple.isAndroid())
463 return false;*/
464
465 if (ABIName != "32")
466 return false;
467
468 // FPXX shouldn't be used if either -msoft-float or -mfloat-abi=soft is
469 // present.
470 if (FloatABI == mips::FloatABI::Soft)
471 return false;
472
473 return llvm::StringSwitch<bool>(CPUName)
474 .Cases("mips2", "mips3", "mips4", "mips5", true)
475 .Cases("mips32", "mips32r2", "mips32r3", "mips32r5", true)
476 .Cases("mips64", "mips64r2", "mips64r3", "mips64r5", true)
477 .Default(false);
478}
479
480bool mips::shouldUseFPXX(const ArgList &Args, const llvm::Triple &Triple,
481 StringRef CPUName, StringRef ABIName,
482 mips::FloatABI FloatABI) {
483 bool UseFPXX = isFPXXDefault(Triple, CPUName, ABIName, FloatABI);
484
485 // FPXX shouldn't be used if -msingle-float is present.
486 if (Arg *A = Args.getLastArg(options::OPT_msingle_float,
487 options::OPT_mdouble_float))
488 if (A->getOption().matches(options::OPT_msingle_float))
489 UseFPXX = false;
490
491 return UseFPXX;
492}
493
494bool mips::supportsIndirectJumpHazardBarrier(StringRef &CPU) {
495 // Supporting the hazard barrier method of dealing with indirect
496 // jumps requires MIPSR2 support.
497 return llvm::StringSwitch<bool>(CPU)
498 .Case("mips32r2", true)
499 .Case("mips32r3", true)
500 .Case("mips32r5", true)
501 .Case("mips32r6", true)
502 .Case("mips64r2", true)
503 .Case("mips64r3", true)
504 .Case("mips64r5", true)
505 .Case("mips64r6", true)
506 .Case("octeon", true)
507 .Case("p5600", true)
508 .Default(false);
509}