Bug Summary

File:include/llvm/Analysis/TargetTransformInfoImpl.h
Warning:line 711, column 52
Called C++ object pointer is null

Annotated Source Code

Press '?' to see keyboard shortcuts

clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name PPCTargetTransformInfo.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-eagerly-assume -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -mrelocation-model pic -pic-level 2 -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -ffunction-sections -fdata-sections -resource-dir /usr/lib/llvm-7/lib/clang/7.0.0 -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I /build/llvm-toolchain-snapshot-7~svn338205/build-llvm/lib/Target/PowerPC -I /build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC -I /build/llvm-toolchain-snapshot-7~svn338205/build-llvm/include -I /build/llvm-toolchain-snapshot-7~svn338205/include -U NDEBUG -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/8/../../../../include/c++/8 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/8/../../../../include/x86_64-linux-gnu/c++/8 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/8/../../../../include/x86_64-linux-gnu/c++/8 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/8/../../../../include/c++/8/backward -internal-isystem /usr/include/clang/7.0.0/include/ -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-7/lib/clang/7.0.0/include -internal-externc-isystem /usr/lib/gcc/x86_64-linux-gnu/8/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-unused-parameter -Wwrite-strings -Wno-missing-field-initializers -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-comment -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /build/llvm-toolchain-snapshot-7~svn338205/build-llvm/lib/Target/PowerPC -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -analyzer-config stable-report-filename=true -o /tmp/scan-build-2018-07-29-043837-17923-1 -x c++ /build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp -faddrsig

/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp

1//===-- PPCTargetTransformInfo.cpp - PPC specific TTI ---------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "PPCTargetTransformInfo.h"
11#include "llvm/Analysis/TargetTransformInfo.h"
12#include "llvm/CodeGen/BasicTTIImpl.h"
13#include "llvm/CodeGen/CostTable.h"
14#include "llvm/CodeGen/TargetLowering.h"
15#include "llvm/Support/CommandLine.h"
16#include "llvm/Support/Debug.h"
17using namespace llvm;
18
19#define DEBUG_TYPE"ppctti" "ppctti"
20
21static cl::opt<bool> DisablePPCConstHoist("disable-ppc-constant-hoisting",
22cl::desc("disable constant hoisting on PPC"), cl::init(false), cl::Hidden);
23
24// This is currently only used for the data prefetch pass which is only enabled
25// for BG/Q by default.
26static cl::opt<unsigned>
27CacheLineSize("ppc-loop-prefetch-cache-line", cl::Hidden, cl::init(64),
28 cl::desc("The loop prefetch cache line size"));
29
30static cl::opt<bool>
31EnablePPCColdCC("ppc-enable-coldcc", cl::Hidden, cl::init(false),
32 cl::desc("Enable using coldcc calling conv for cold "
33 "internal functions"));
34
35//===----------------------------------------------------------------------===//
36//
37// PPC cost model.
38//
39//===----------------------------------------------------------------------===//
40
41TargetTransformInfo::PopcntSupportKind
42PPCTTIImpl::getPopcntSupport(unsigned TyWidth) {
43 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2")(static_cast <bool> (isPowerOf2_32(TyWidth) && "Ty width must be power of 2"
) ? void (0) : __assert_fail ("isPowerOf2_32(TyWidth) && \"Ty width must be power of 2\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 43, __extension__ __PRETTY_FUNCTION__))
;
44 if (ST->hasPOPCNTD() != PPCSubtarget::POPCNTD_Unavailable && TyWidth <= 64)
45 return ST->hasPOPCNTD() == PPCSubtarget::POPCNTD_Slow ?
46 TTI::PSK_SlowHardware : TTI::PSK_FastHardware;
47 return TTI::PSK_Software;
48}
49
50int PPCTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty) {
51 if (DisablePPCConstHoist)
52 return BaseT::getIntImmCost(Imm, Ty);
53
54 assert(Ty->isIntegerTy())(static_cast <bool> (Ty->isIntegerTy()) ? void (0) :
__assert_fail ("Ty->isIntegerTy()", "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 54, __extension__ __PRETTY_FUNCTION__))
;
55
56 unsigned BitSize = Ty->getPrimitiveSizeInBits();
57 if (BitSize == 0)
58 return ~0U;
59
60 if (Imm == 0)
61 return TTI::TCC_Free;
62
63 if (Imm.getBitWidth() <= 64) {
64 if (isInt<16>(Imm.getSExtValue()))
65 return TTI::TCC_Basic;
66
67 if (isInt<32>(Imm.getSExtValue())) {
68 // A constant that can be materialized using lis.
69 if ((Imm.getZExtValue() & 0xFFFF) == 0)
70 return TTI::TCC_Basic;
71
72 return 2 * TTI::TCC_Basic;
73 }
74 }
75
76 return 4 * TTI::TCC_Basic;
77}
78
79int PPCTTIImpl::getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
80 Type *Ty) {
81 if (DisablePPCConstHoist)
82 return BaseT::getIntImmCost(IID, Idx, Imm, Ty);
83
84 assert(Ty->isIntegerTy())(static_cast <bool> (Ty->isIntegerTy()) ? void (0) :
__assert_fail ("Ty->isIntegerTy()", "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 84, __extension__ __PRETTY_FUNCTION__))
;
85
86 unsigned BitSize = Ty->getPrimitiveSizeInBits();
87 if (BitSize == 0)
88 return ~0U;
89
90 switch (IID) {
91 default:
92 return TTI::TCC_Free;
93 case Intrinsic::sadd_with_overflow:
94 case Intrinsic::uadd_with_overflow:
95 case Intrinsic::ssub_with_overflow:
96 case Intrinsic::usub_with_overflow:
97 if ((Idx == 1) && Imm.getBitWidth() <= 64 && isInt<16>(Imm.getSExtValue()))
98 return TTI::TCC_Free;
99 break;
100 case Intrinsic::experimental_stackmap:
101 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
102 return TTI::TCC_Free;
103 break;
104 case Intrinsic::experimental_patchpoint_void:
105 case Intrinsic::experimental_patchpoint_i64:
106 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
107 return TTI::TCC_Free;
108 break;
109 }
110 return PPCTTIImpl::getIntImmCost(Imm, Ty);
111}
112
113int PPCTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
114 Type *Ty) {
115 if (DisablePPCConstHoist)
116 return BaseT::getIntImmCost(Opcode, Idx, Imm, Ty);
117
118 assert(Ty->isIntegerTy())(static_cast <bool> (Ty->isIntegerTy()) ? void (0) :
__assert_fail ("Ty->isIntegerTy()", "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 118, __extension__ __PRETTY_FUNCTION__))
;
119
120 unsigned BitSize = Ty->getPrimitiveSizeInBits();
121 if (BitSize == 0)
122 return ~0U;
123
124 unsigned ImmIdx = ~0U;
125 bool ShiftedFree = false, RunFree = false, UnsignedFree = false,
126 ZeroFree = false;
127 switch (Opcode) {
128 default:
129 return TTI::TCC_Free;
130 case Instruction::GetElementPtr:
131 // Always hoist the base address of a GetElementPtr. This prevents the
132 // creation of new constants for every base constant that gets constant
133 // folded with the offset.
134 if (Idx == 0)
135 return 2 * TTI::TCC_Basic;
136 return TTI::TCC_Free;
137 case Instruction::And:
138 RunFree = true; // (for the rotate-and-mask instructions)
139 LLVM_FALLTHROUGH[[clang::fallthrough]];
140 case Instruction::Add:
141 case Instruction::Or:
142 case Instruction::Xor:
143 ShiftedFree = true;
144 LLVM_FALLTHROUGH[[clang::fallthrough]];
145 case Instruction::Sub:
146 case Instruction::Mul:
147 case Instruction::Shl:
148 case Instruction::LShr:
149 case Instruction::AShr:
150 ImmIdx = 1;
151 break;
152 case Instruction::ICmp:
153 UnsignedFree = true;
154 ImmIdx = 1;
155 // Zero comparisons can use record-form instructions.
156 LLVM_FALLTHROUGH[[clang::fallthrough]];
157 case Instruction::Select:
158 ZeroFree = true;
159 break;
160 case Instruction::PHI:
161 case Instruction::Call:
162 case Instruction::Ret:
163 case Instruction::Load:
164 case Instruction::Store:
165 break;
166 }
167
168 if (ZeroFree && Imm == 0)
169 return TTI::TCC_Free;
170
171 if (Idx == ImmIdx && Imm.getBitWidth() <= 64) {
172 if (isInt<16>(Imm.getSExtValue()))
173 return TTI::TCC_Free;
174
175 if (RunFree) {
176 if (Imm.getBitWidth() <= 32 &&
177 (isShiftedMask_32(Imm.getZExtValue()) ||
178 isShiftedMask_32(~Imm.getZExtValue())))
179 return TTI::TCC_Free;
180
181 if (ST->isPPC64() &&
182 (isShiftedMask_64(Imm.getZExtValue()) ||
183 isShiftedMask_64(~Imm.getZExtValue())))
184 return TTI::TCC_Free;
185 }
186
187 if (UnsignedFree && isUInt<16>(Imm.getZExtValue()))
188 return TTI::TCC_Free;
189
190 if (ShiftedFree && (Imm.getZExtValue() & 0xFFFF) == 0)
191 return TTI::TCC_Free;
192 }
193
194 return PPCTTIImpl::getIntImmCost(Imm, Ty);
195}
196
197unsigned PPCTTIImpl::getUserCost(const User *U,
198 ArrayRef<const Value *> Operands) {
199 if (U->getType()->isVectorTy()) {
1
Taking false branch
200 // Instructions that need to be split should cost more.
201 std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, U->getType());
202 return LT.first * BaseT::getUserCost(U, Operands);
203 }
204
205 return BaseT::getUserCost(U, Operands);
2
Calling 'TargetTransformInfoImplCRTPBase::getUserCost'
206}
207
208void PPCTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
209 TTI::UnrollingPreferences &UP) {
210 if (ST->getDarwinDirective() == PPC::DIR_A2) {
211 // The A2 is in-order with a deep pipeline, and concatenation unrolling
212 // helps expose latency-hiding opportunities to the instruction scheduler.
213 UP.Partial = UP.Runtime = true;
214
215 // We unroll a lot on the A2 (hundreds of instructions), and the benefits
216 // often outweigh the cost of a division to compute the trip count.
217 UP.AllowExpensiveTripCount = true;
218 }
219
220 BaseT::getUnrollingPreferences(L, SE, UP);
221}
222
223// This function returns true to allow using coldcc calling convention.
224// Returning true results in coldcc being used for functions which are cold at
225// all call sites when the callers of the functions are not calling any other
226// non coldcc functions.
227bool PPCTTIImpl::useColdCCForColdCall(Function &F) {
228 return EnablePPCColdCC;
229}
230
231bool PPCTTIImpl::enableAggressiveInterleaving(bool LoopHasReductions) {
232 // On the A2, always unroll aggressively. For QPX unaligned loads, we depend
233 // on combining the loads generated for consecutive accesses, and failure to
234 // do so is particularly expensive. This makes it much more likely (compared
235 // to only using concatenation unrolling).
236 if (ST->getDarwinDirective() == PPC::DIR_A2)
237 return true;
238
239 return LoopHasReductions;
240}
241
242const PPCTTIImpl::TTI::MemCmpExpansionOptions *
243PPCTTIImpl::enableMemCmpExpansion(bool IsZeroCmp) const {
244 static const auto Options = []() {
245 TTI::MemCmpExpansionOptions Options;
246 Options.LoadSizes.push_back(8);
247 Options.LoadSizes.push_back(4);
248 Options.LoadSizes.push_back(2);
249 Options.LoadSizes.push_back(1);
250 return Options;
251 }();
252 return &Options;
253}
254
255bool PPCTTIImpl::enableInterleavedAccessVectorization() {
256 return true;
257}
258
259unsigned PPCTTIImpl::getNumberOfRegisters(bool Vector) {
260 if (Vector && !ST->hasAltivec() && !ST->hasQPX())
261 return 0;
262 return ST->hasVSX() ? 64 : 32;
263}
264
265unsigned PPCTTIImpl::getRegisterBitWidth(bool Vector) const {
266 if (Vector) {
267 if (ST->hasQPX()) return 256;
268 if (ST->hasAltivec()) return 128;
269 return 0;
270 }
271
272 if (ST->isPPC64())
273 return 64;
274 return 32;
275
276}
277
278unsigned PPCTTIImpl::getCacheLineSize() {
279 // Check first if the user specified a custom line size.
280 if (CacheLineSize.getNumOccurrences() > 0)
281 return CacheLineSize;
282
283 // On P7, P8 or P9 we have a cache line size of 128.
284 unsigned Directive = ST->getDarwinDirective();
285 if (Directive == PPC::DIR_PWR7 || Directive == PPC::DIR_PWR8 ||
286 Directive == PPC::DIR_PWR9)
287 return 128;
288
289 // On other processors return a default of 64 bytes.
290 return 64;
291}
292
293unsigned PPCTTIImpl::getPrefetchDistance() {
294 // This seems like a reasonable default for the BG/Q (this pass is enabled, by
295 // default, only on the BG/Q).
296 return 300;
297}
298
299unsigned PPCTTIImpl::getMaxInterleaveFactor(unsigned VF) {
300 unsigned Directive = ST->getDarwinDirective();
301 // The 440 has no SIMD support, but floating-point instructions
302 // have a 5-cycle latency, so unroll by 5x for latency hiding.
303 if (Directive == PPC::DIR_440)
304 return 5;
305
306 // The A2 has no SIMD support, but floating-point instructions
307 // have a 6-cycle latency, so unroll by 6x for latency hiding.
308 if (Directive == PPC::DIR_A2)
309 return 6;
310
311 // FIXME: For lack of any better information, do no harm...
312 if (Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500)
313 return 1;
314
315 // For P7 and P8, floating-point instructions have a 6-cycle latency and
316 // there are two execution units, so unroll by 12x for latency hiding.
317 // FIXME: the same for P9 as previous gen until POWER9 scheduling is ready
318 if (Directive == PPC::DIR_PWR7 || Directive == PPC::DIR_PWR8 ||
319 Directive == PPC::DIR_PWR9)
320 return 12;
321
322 // For most things, modern systems have two execution units (and
323 // out-of-order execution).
324 return 2;
325}
326
327int PPCTTIImpl::getArithmeticInstrCost(
328 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info,
329 TTI::OperandValueKind Op2Info, TTI::OperandValueProperties Opd1PropInfo,
330 TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value *> Args) {
331 assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode")(static_cast <bool> (TLI->InstructionOpcodeToISD(Opcode
) && "Invalid opcode") ? void (0) : __assert_fail ("TLI->InstructionOpcodeToISD(Opcode) && \"Invalid opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 331, __extension__ __PRETTY_FUNCTION__))
;
332
333 // Fallback to the default implementation.
334 return BaseT::getArithmeticInstrCost(Opcode, Ty, Op1Info, Op2Info,
335 Opd1PropInfo, Opd2PropInfo);
336}
337
338int PPCTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
339 Type *SubTp) {
340 // Legalize the type.
341 std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Tp);
342
343 // PPC, for both Altivec/VSX and QPX, support cheap arbitrary permutations
344 // (at least in the sense that there need only be one non-loop-invariant
345 // instruction). We need one such shuffle instruction for each actual
346 // register (this is not true for arbitrary shuffles, but is true for the
347 // structured types of shuffles covered by TTI::ShuffleKind).
348 return LT.first;
349}
350
351int PPCTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
352 const Instruction *I) {
353 assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode")(static_cast <bool> (TLI->InstructionOpcodeToISD(Opcode
) && "Invalid opcode") ? void (0) : __assert_fail ("TLI->InstructionOpcodeToISD(Opcode) && \"Invalid opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 353, __extension__ __PRETTY_FUNCTION__))
;
354
355 return BaseT::getCastInstrCost(Opcode, Dst, Src);
356}
357
358int PPCTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
359 const Instruction *I) {
360 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
361}
362
363int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
364 assert(Val->isVectorTy() && "This must be a vector type")(static_cast <bool> (Val->isVectorTy() && "This must be a vector type"
) ? void (0) : __assert_fail ("Val->isVectorTy() && \"This must be a vector type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 364, __extension__ __PRETTY_FUNCTION__))
;
365
366 int ISD = TLI->InstructionOpcodeToISD(Opcode);
367 assert(ISD && "Invalid opcode")(static_cast <bool> (ISD && "Invalid opcode") ?
void (0) : __assert_fail ("ISD && \"Invalid opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 367, __extension__ __PRETTY_FUNCTION__))
;
368
369 if (ST->hasVSX() && Val->getScalarType()->isDoubleTy()) {
370 // Double-precision scalars are already located in index #0.
371 if (Index == 0)
372 return 0;
373
374 return BaseT::getVectorInstrCost(Opcode, Val, Index);
375 } else if (ST->hasQPX() && Val->getScalarType()->isFloatingPointTy()) {
376 // Floating point scalars are already located in index #0.
377 if (Index == 0)
378 return 0;
379
380 return BaseT::getVectorInstrCost(Opcode, Val, Index);
381 }
382
383 // Estimated cost of a load-hit-store delay. This was obtained
384 // experimentally as a minimum needed to prevent unprofitable
385 // vectorization for the paq8p benchmark. It may need to be
386 // raised further if other unprofitable cases remain.
387 unsigned LHSPenalty = 2;
388 if (ISD == ISD::INSERT_VECTOR_ELT)
389 LHSPenalty += 7;
390
391 // Vector element insert/extract with Altivec is very expensive,
392 // because they require store and reload with the attendant
393 // processor stall for load-hit-store. Until VSX is available,
394 // these need to be estimated as very costly.
395 if (ISD == ISD::EXTRACT_VECTOR_ELT ||
396 ISD == ISD::INSERT_VECTOR_ELT)
397 return LHSPenalty + BaseT::getVectorInstrCost(Opcode, Val, Index);
398
399 return BaseT::getVectorInstrCost(Opcode, Val, Index);
400}
401
402int PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
403 unsigned AddressSpace, const Instruction *I) {
404 // Legalize the type.
405 std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Src);
406 assert((Opcode == Instruction::Load || Opcode == Instruction::Store) &&(static_cast <bool> ((Opcode == Instruction::Load || Opcode
== Instruction::Store) && "Invalid Opcode") ? void (
0) : __assert_fail ("(Opcode == Instruction::Load || Opcode == Instruction::Store) && \"Invalid Opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 407, __extension__ __PRETTY_FUNCTION__))
407 "Invalid Opcode")(static_cast <bool> ((Opcode == Instruction::Load || Opcode
== Instruction::Store) && "Invalid Opcode") ? void (
0) : __assert_fail ("(Opcode == Instruction::Load || Opcode == Instruction::Store) && \"Invalid Opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 407, __extension__ __PRETTY_FUNCTION__))
;
408
409 int Cost = BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
410
411 bool IsAltivecType = ST->hasAltivec() &&
412 (LT.second == MVT::v16i8 || LT.second == MVT::v8i16 ||
413 LT.second == MVT::v4i32 || LT.second == MVT::v4f32);
414 bool IsVSXType = ST->hasVSX() &&
415 (LT.second == MVT::v2f64 || LT.second == MVT::v2i64);
416 bool IsQPXType = ST->hasQPX() &&
417 (LT.second == MVT::v4f64 || LT.second == MVT::v4f32);
418
419 // VSX has 32b/64b load instructions. Legalization can handle loading of
420 // 32b/64b to VSR correctly and cheaply. But BaseT::getMemoryOpCost and
421 // PPCTargetLowering can't compute the cost appropriately. So here we
422 // explicitly check this case.
423 unsigned MemBytes = Src->getPrimitiveSizeInBits();
424 if (Opcode == Instruction::Load && ST->hasVSX() && IsAltivecType &&
425 (MemBytes == 64 || (ST->hasP8Vector() && MemBytes == 32)))
426 return 1;
427
428 // Aligned loads and stores are easy.
429 unsigned SrcBytes = LT.second.getStoreSize();
430 if (!SrcBytes || !Alignment || Alignment >= SrcBytes)
431 return Cost;
432
433 // If we can use the permutation-based load sequence, then this is also
434 // relatively cheap (not counting loop-invariant instructions): one load plus
435 // one permute (the last load in a series has extra cost, but we're
436 // neglecting that here). Note that on the P7, we could do unaligned loads
437 // for Altivec types using the VSX instructions, but that's more expensive
438 // than using the permutation-based load sequence. On the P8, that's no
439 // longer true.
440 if (Opcode == Instruction::Load &&
441 ((!ST->hasP8Vector() && IsAltivecType) || IsQPXType) &&
442 Alignment >= LT.second.getScalarType().getStoreSize())
443 return Cost + LT.first; // Add the cost of the permutations.
444
445 // For VSX, we can do unaligned loads and stores on Altivec/VSX types. On the
446 // P7, unaligned vector loads are more expensive than the permutation-based
447 // load sequence, so that might be used instead, but regardless, the net cost
448 // is about the same (not counting loop-invariant instructions).
449 if (IsVSXType || (ST->hasVSX() && IsAltivecType))
450 return Cost;
451
452 // Newer PPC supports unaligned memory access.
453 if (TLI->allowsMisalignedMemoryAccesses(LT.second, 0))
454 return Cost;
455
456 // PPC in general does not support unaligned loads and stores. They'll need
457 // to be decomposed based on the alignment factor.
458
459 // Add the cost of each scalar load or store.
460 Cost += LT.first*(SrcBytes/Alignment-1);
461
462 // For a vector type, there is also scalarization overhead (only for
463 // stores, loads are expanded using the vector-load + permutation sequence,
464 // which is much less expensive).
465 if (Src->isVectorTy() && Opcode == Instruction::Store)
466 for (int i = 0, e = Src->getVectorNumElements(); i < e; ++i)
467 Cost += getVectorInstrCost(Instruction::ExtractElement, Src, i);
468
469 return Cost;
470}
471
472int PPCTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
473 unsigned Factor,
474 ArrayRef<unsigned> Indices,
475 unsigned Alignment,
476 unsigned AddressSpace) {
477 assert(isa<VectorType>(VecTy) &&(static_cast <bool> (isa<VectorType>(VecTy) &&
"Expect a vector type for interleaved memory op") ? void (0)
: __assert_fail ("isa<VectorType>(VecTy) && \"Expect a vector type for interleaved memory op\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 478, __extension__ __PRETTY_FUNCTION__))
478 "Expect a vector type for interleaved memory op")(static_cast <bool> (isa<VectorType>(VecTy) &&
"Expect a vector type for interleaved memory op") ? void (0)
: __assert_fail ("isa<VectorType>(VecTy) && \"Expect a vector type for interleaved memory op\""
, "/build/llvm-toolchain-snapshot-7~svn338205/lib/Target/PowerPC/PPCTargetTransformInfo.cpp"
, 478, __extension__ __PRETTY_FUNCTION__))
;
479
480 // Legalize the type.
481 std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, VecTy);
482
483 // Firstly, the cost of load/store operation.
484 int Cost = getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace);
485
486 // PPC, for both Altivec/VSX and QPX, support cheap arbitrary permutations
487 // (at least in the sense that there need only be one non-loop-invariant
488 // instruction). For each result vector, we need one shuffle per incoming
489 // vector (except that the first shuffle can take two incoming vectors
490 // because it does not need to take itself).
491 Cost += Factor*(LT.first-1);
492
493 return Cost;
494}
495

/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h

1//===- TargetTransformInfoImpl.h --------------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file provides helpers for the implementation of
11/// a TargetTransformInfo-conforming class.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
16#define LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
17
18#include "llvm/Analysis/ScalarEvolutionExpressions.h"
19#include "llvm/Analysis/TargetTransformInfo.h"
20#include "llvm/Analysis/VectorUtils.h"
21#include "llvm/IR/CallSite.h"
22#include "llvm/IR/DataLayout.h"
23#include "llvm/IR/Function.h"
24#include "llvm/IR/GetElementPtrTypeIterator.h"
25#include "llvm/IR/Operator.h"
26#include "llvm/IR/Type.h"
27
28namespace llvm {
29
30/// Base class for use as a mix-in that aids implementing
31/// a TargetTransformInfo-compatible class.
32class TargetTransformInfoImplBase {
33protected:
34 typedef TargetTransformInfo TTI;
35
36 const DataLayout &DL;
37
38 explicit TargetTransformInfoImplBase(const DataLayout &DL) : DL(DL) {}
39
40public:
41 // Provide value semantics. MSVC requires that we spell all of these out.
42 TargetTransformInfoImplBase(const TargetTransformInfoImplBase &Arg)
43 : DL(Arg.DL) {}
44 TargetTransformInfoImplBase(TargetTransformInfoImplBase &&Arg) : DL(Arg.DL) {}
45
46 const DataLayout &getDataLayout() const { return DL; }
47
48 unsigned getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) {
49 switch (Opcode) {
50 default:
51 // By default, just classify everything as 'basic'.
52 return TTI::TCC_Basic;
53
54 case Instruction::GetElementPtr:
55 llvm_unreachable("Use getGEPCost for GEP operations!")::llvm::llvm_unreachable_internal("Use getGEPCost for GEP operations!"
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 55)
;
56
57 case Instruction::BitCast:
58 assert(OpTy && "Cast instructions must provide the operand type")(static_cast <bool> (OpTy && "Cast instructions must provide the operand type"
) ? void (0) : __assert_fail ("OpTy && \"Cast instructions must provide the operand type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 58, __extension__ __PRETTY_FUNCTION__))
;
59 if (Ty == OpTy || (Ty->isPointerTy() && OpTy->isPointerTy()))
60 // Identity and pointer-to-pointer casts are free.
61 return TTI::TCC_Free;
62
63 // Otherwise, the default basic cost is used.
64 return TTI::TCC_Basic;
65
66 case Instruction::FDiv:
67 case Instruction::FRem:
68 case Instruction::SDiv:
69 case Instruction::SRem:
70 case Instruction::UDiv:
71 case Instruction::URem:
72 return TTI::TCC_Expensive;
73
74 case Instruction::IntToPtr: {
75 // An inttoptr cast is free so long as the input is a legal integer type
76 // which doesn't contain values outside the range of a pointer.
77 unsigned OpSize = OpTy->getScalarSizeInBits();
78 if (DL.isLegalInteger(OpSize) &&
79 OpSize <= DL.getPointerTypeSizeInBits(Ty))
80 return TTI::TCC_Free;
81
82 // Otherwise it's not a no-op.
83 return TTI::TCC_Basic;
84 }
85 case Instruction::PtrToInt: {
86 // A ptrtoint cast is free so long as the result is large enough to store
87 // the pointer, and a legal integer type.
88 unsigned DestSize = Ty->getScalarSizeInBits();
89 if (DL.isLegalInteger(DestSize) &&
90 DestSize >= DL.getPointerTypeSizeInBits(OpTy))
91 return TTI::TCC_Free;
92
93 // Otherwise it's not a no-op.
94 return TTI::TCC_Basic;
95 }
96 case Instruction::Trunc:
97 // trunc to a native type is free (assuming the target has compare and
98 // shift-right of the same width).
99 if (DL.isLegalInteger(DL.getTypeSizeInBits(Ty)))
100 return TTI::TCC_Free;
101
102 return TTI::TCC_Basic;
103 }
104 }
105
106 int getGEPCost(Type *PointeeType, const Value *Ptr,
107 ArrayRef<const Value *> Operands) {
108 // In the basic model, we just assume that all-constant GEPs will be folded
109 // into their uses via addressing modes.
110 for (unsigned Idx = 0, Size = Operands.size(); Idx != Size; ++Idx)
111 if (!isa<Constant>(Operands[Idx]))
112 return TTI::TCC_Basic;
113
114 return TTI::TCC_Free;
115 }
116
117 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
118 unsigned &JTSize) {
119 JTSize = 0;
120 return SI.getNumCases();
121 }
122
123 int getExtCost(const Instruction *I, const Value *Src) {
124 return TTI::TCC_Basic;
125 }
126
127 unsigned getCallCost(FunctionType *FTy, int NumArgs) {
128 assert(FTy && "FunctionType must be provided to this routine.")(static_cast <bool> (FTy && "FunctionType must be provided to this routine."
) ? void (0) : __assert_fail ("FTy && \"FunctionType must be provided to this routine.\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 128, __extension__ __PRETTY_FUNCTION__))
;
129
130 // The target-independent implementation just measures the size of the
131 // function by approximating that each argument will take on average one
132 // instruction to prepare.
133
134 if (NumArgs < 0)
135 // Set the argument number to the number of explicit arguments in the
136 // function.
137 NumArgs = FTy->getNumParams();
138
139 return TTI::TCC_Basic * (NumArgs + 1);
140 }
141
142 unsigned getInliningThresholdMultiplier() { return 1; }
143
144 unsigned getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
145 ArrayRef<Type *> ParamTys) {
146 switch (IID) {
147 default:
148 // Intrinsics rarely (if ever) have normal argument setup constraints.
149 // Model them as having a basic instruction cost.
150 // FIXME: This is wrong for libc intrinsics.
151 return TTI::TCC_Basic;
152
153 case Intrinsic::annotation:
154 case Intrinsic::assume:
155 case Intrinsic::sideeffect:
156 case Intrinsic::dbg_declare:
157 case Intrinsic::dbg_value:
158 case Intrinsic::dbg_label:
159 case Intrinsic::invariant_start:
160 case Intrinsic::invariant_end:
161 case Intrinsic::lifetime_start:
162 case Intrinsic::lifetime_end:
163 case Intrinsic::objectsize:
164 case Intrinsic::ptr_annotation:
165 case Intrinsic::var_annotation:
166 case Intrinsic::experimental_gc_result:
167 case Intrinsic::experimental_gc_relocate:
168 case Intrinsic::coro_alloc:
169 case Intrinsic::coro_begin:
170 case Intrinsic::coro_free:
171 case Intrinsic::coro_end:
172 case Intrinsic::coro_frame:
173 case Intrinsic::coro_size:
174 case Intrinsic::coro_suspend:
175 case Intrinsic::coro_param:
176 case Intrinsic::coro_subfn_addr:
177 // These intrinsics don't actually represent code after lowering.
178 return TTI::TCC_Free;
179 }
180 }
181
182 bool hasBranchDivergence() { return false; }
183
184 bool isSourceOfDivergence(const Value *V) { return false; }
185
186 bool isAlwaysUniform(const Value *V) { return false; }
187
188 unsigned getFlatAddressSpace () {
189 return -1;
190 }
191
192 bool isLoweredToCall(const Function *F) {
193 assert(F && "A concrete function must be provided to this routine.")(static_cast <bool> (F && "A concrete function must be provided to this routine."
) ? void (0) : __assert_fail ("F && \"A concrete function must be provided to this routine.\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 193, __extension__ __PRETTY_FUNCTION__))
;
194
195 // FIXME: These should almost certainly not be handled here, and instead
196 // handled with the help of TLI or the target itself. This was largely
197 // ported from existing analysis heuristics here so that such refactorings
198 // can take place in the future.
199
200 if (F->isIntrinsic())
201 return false;
202
203 if (F->hasLocalLinkage() || !F->hasName())
204 return true;
205
206 StringRef Name = F->getName();
207
208 // These will all likely lower to a single selection DAG node.
209 if (Name == "copysign" || Name == "copysignf" || Name == "copysignl" ||
210 Name == "fabs" || Name == "fabsf" || Name == "fabsl" || Name == "sin" ||
211 Name == "fmin" || Name == "fminf" || Name == "fminl" ||
212 Name == "fmax" || Name == "fmaxf" || Name == "fmaxl" ||
213 Name == "sinf" || Name == "sinl" || Name == "cos" || Name == "cosf" ||
214 Name == "cosl" || Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl")
215 return false;
216
217 // These are all likely to be optimized into something smaller.
218 if (Name == "pow" || Name == "powf" || Name == "powl" || Name == "exp2" ||
219 Name == "exp2l" || Name == "exp2f" || Name == "floor" ||
220 Name == "floorf" || Name == "ceil" || Name == "round" ||
221 Name == "ffs" || Name == "ffsl" || Name == "abs" || Name == "labs" ||
222 Name == "llabs")
223 return false;
224
225 return true;
226 }
227
228 void getUnrollingPreferences(Loop *, ScalarEvolution &,
229 TTI::UnrollingPreferences &) {}
230
231 bool isLegalAddImmediate(int64_t Imm) { return false; }
232
233 bool isLegalICmpImmediate(int64_t Imm) { return false; }
234
235 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
236 bool HasBaseReg, int64_t Scale,
237 unsigned AddrSpace, Instruction *I = nullptr) {
238 // Guess that only reg and reg+reg addressing is allowed. This heuristic is
239 // taken from the implementation of LSR.
240 return !BaseGV && BaseOffset == 0 && (Scale == 0 || Scale == 1);
241 }
242
243 bool isLSRCostLess(TTI::LSRCost &C1, TTI::LSRCost &C2) {
244 return std::tie(C1.NumRegs, C1.AddRecCost, C1.NumIVMuls, C1.NumBaseAdds,
245 C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
246 std::tie(C2.NumRegs, C2.AddRecCost, C2.NumIVMuls, C2.NumBaseAdds,
247 C2.ScaleCost, C2.ImmCost, C2.SetupCost);
248 }
249
250 bool canMacroFuseCmp() { return false; }
251
252 bool shouldFavorPostInc() const { return false; }
253
254 bool isLegalMaskedStore(Type *DataType) { return false; }
255
256 bool isLegalMaskedLoad(Type *DataType) { return false; }
257
258 bool isLegalMaskedScatter(Type *DataType) { return false; }
259
260 bool isLegalMaskedGather(Type *DataType) { return false; }
261
262 bool hasDivRemOp(Type *DataType, bool IsSigned) { return false; }
263
264 bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) { return false; }
265
266 bool prefersVectorizedAddressing() { return true; }
267
268 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
269 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
270 // Guess that all legal addressing mode are free.
271 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
272 Scale, AddrSpace))
273 return 0;
274 return -1;
275 }
276
277 bool LSRWithInstrQueries() { return false; }
278
279 bool isTruncateFree(Type *Ty1, Type *Ty2) { return false; }
280
281 bool isProfitableToHoist(Instruction *I) { return true; }
282
283 bool useAA() { return false; }
284
285 bool isTypeLegal(Type *Ty) { return false; }
286
287 unsigned getJumpBufAlignment() { return 0; }
288
289 unsigned getJumpBufSize() { return 0; }
290
291 bool shouldBuildLookupTables() { return true; }
292 bool shouldBuildLookupTablesForConstant(Constant *C) { return true; }
293
294 bool useColdCCForColdCall(Function &F) { return false; }
295
296 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) {
297 return 0;
298 }
299
300 unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
301 unsigned VF) { return 0; }
302
303 bool supportsEfficientVectorElementLoadStore() { return false; }
304
305 bool enableAggressiveInterleaving(bool LoopHasReductions) { return false; }
306
307 const TTI::MemCmpExpansionOptions *enableMemCmpExpansion(
308 bool IsZeroCmp) const {
309 return nullptr;
310 }
311
312 bool enableInterleavedAccessVectorization() { return false; }
313
314 bool isFPVectorizationPotentiallyUnsafe() { return false; }
315
316 bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
317 unsigned BitWidth,
318 unsigned AddressSpace,
319 unsigned Alignment,
320 bool *Fast) { return false; }
321
322 TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) {
323 return TTI::PSK_Software;
324 }
325
326 bool haveFastSqrt(Type *Ty) { return false; }
327
328 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) { return true; }
329
330 unsigned getFPOpCost(Type *Ty) { return TargetTransformInfo::TCC_Basic; }
331
332 int getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
333 Type *Ty) {
334 return 0;
335 }
336
337 unsigned getIntImmCost(const APInt &Imm, Type *Ty) { return TTI::TCC_Basic; }
338
339 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
340 Type *Ty) {
341 return TTI::TCC_Free;
342 }
343
344 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
345 Type *Ty) {
346 return TTI::TCC_Free;
347 }
348
349 unsigned getNumberOfRegisters(bool Vector) { return 8; }
350
351 unsigned getRegisterBitWidth(bool Vector) const { return 32; }
352
353 unsigned getMinVectorRegisterBitWidth() { return 128; }
354
355 bool shouldMaximizeVectorBandwidth(bool OptSize) const { return false; }
356
357 unsigned getMinimumVF(unsigned ElemWidth) const { return 0; }
358
359 bool
360 shouldConsiderAddressTypePromotion(const Instruction &I,
361 bool &AllowPromotionWithoutCommonHeader) {
362 AllowPromotionWithoutCommonHeader = false;
363 return false;
364 }
365
366 unsigned getCacheLineSize() { return 0; }
367
368 llvm::Optional<unsigned> getCacheSize(TargetTransformInfo::CacheLevel Level) {
369 switch (Level) {
370 case TargetTransformInfo::CacheLevel::L1D:
371 LLVM_FALLTHROUGH[[clang::fallthrough]];
372 case TargetTransformInfo::CacheLevel::L2D:
373 return llvm::Optional<unsigned>();
374 }
375
376 llvm_unreachable("Unknown TargetTransformInfo::CacheLevel")::llvm::llvm_unreachable_internal("Unknown TargetTransformInfo::CacheLevel"
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 376)
;
377 }
378
379 llvm::Optional<unsigned> getCacheAssociativity(
380 TargetTransformInfo::CacheLevel Level) {
381 switch (Level) {
382 case TargetTransformInfo::CacheLevel::L1D:
383 LLVM_FALLTHROUGH[[clang::fallthrough]];
384 case TargetTransformInfo::CacheLevel::L2D:
385 return llvm::Optional<unsigned>();
386 }
387
388 llvm_unreachable("Unknown TargetTransformInfo::CacheLevel")::llvm::llvm_unreachable_internal("Unknown TargetTransformInfo::CacheLevel"
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 388)
;
389 }
390
391 unsigned getPrefetchDistance() { return 0; }
392
393 unsigned getMinPrefetchStride() { return 1; }
394
395 unsigned getMaxPrefetchIterationsAhead() { return UINT_MAX(2147483647 *2U +1U); }
396
397 unsigned getMaxInterleaveFactor(unsigned VF) { return 1; }
398
399 unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
400 TTI::OperandValueKind Opd1Info,
401 TTI::OperandValueKind Opd2Info,
402 TTI::OperandValueProperties Opd1PropInfo,
403 TTI::OperandValueProperties Opd2PropInfo,
404 ArrayRef<const Value *> Args) {
405 return 1;
406 }
407
408 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Ty, int Index,
409 Type *SubTp) {
410 return 1;
411 }
412
413 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
414 const Instruction *I) { return 1; }
415
416 unsigned getExtractWithExtendCost(unsigned Opcode, Type *Dst,
417 VectorType *VecTy, unsigned Index) {
418 return 1;
419 }
420
421 unsigned getCFInstrCost(unsigned Opcode) { return 1; }
422
423 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
424 const Instruction *I) {
425 return 1;
426 }
427
428 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
429 return 1;
430 }
431
432 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
433 unsigned AddressSpace, const Instruction *I) {
434 return 1;
435 }
436
437 unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
438 unsigned AddressSpace) {
439 return 1;
440 }
441
442 unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr,
443 bool VariableMask,
444 unsigned Alignment) {
445 return 1;
446 }
447
448 unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
449 unsigned Factor,
450 ArrayRef<unsigned> Indices,
451 unsigned Alignment,
452 unsigned AddressSpace) {
453 return 1;
454 }
455
456 unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
457 ArrayRef<Type *> Tys, FastMathFlags FMF,
458 unsigned ScalarizationCostPassed) {
459 return 1;
460 }
461 unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
462 ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) {
463 return 1;
464 }
465
466 unsigned getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type *> Tys) {
467 return 1;
468 }
469
470 unsigned getNumberOfParts(Type *Tp) { return 0; }
471
472 unsigned getAddressComputationCost(Type *Tp, ScalarEvolution *,
473 const SCEV *) {
474 return 0;
475 }
476
477 unsigned getArithmeticReductionCost(unsigned, Type *, bool) { return 1; }
478
479 unsigned getMinMaxReductionCost(Type *, Type *, bool, bool) { return 1; }
480
481 unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) { return 0; }
482
483 bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) {
484 return false;
485 }
486
487 unsigned getAtomicMemIntrinsicMaxElementSize() const {
488 // Note for overrides: You must ensure for all element unordered-atomic
489 // memory intrinsics that all power-of-2 element sizes up to, and
490 // including, the return value of this method have a corresponding
491 // runtime lib call. These runtime lib call definitions can be found
492 // in RuntimeLibcalls.h
493 return 0;
494 }
495
496 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
497 Type *ExpectedType) {
498 return nullptr;
499 }
500
501 Type *getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length,
502 unsigned SrcAlign, unsigned DestAlign) const {
503 return Type::getInt8Ty(Context);
504 }
505
506 void getMemcpyLoopResidualLoweringType(SmallVectorImpl<Type *> &OpsOut,
507 LLVMContext &Context,
508 unsigned RemainingBytes,
509 unsigned SrcAlign,
510 unsigned DestAlign) const {
511 for (unsigned i = 0; i != RemainingBytes; ++i)
512 OpsOut.push_back(Type::getInt8Ty(Context));
513 }
514
515 bool areInlineCompatible(const Function *Caller,
516 const Function *Callee) const {
517 return (Caller->getFnAttribute("target-cpu") ==
518 Callee->getFnAttribute("target-cpu")) &&
519 (Caller->getFnAttribute("target-features") ==
520 Callee->getFnAttribute("target-features"));
521 }
522
523 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty,
524 const DataLayout &DL) const {
525 return false;
526 }
527
528 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty,
529 const DataLayout &DL) const {
530 return false;
531 }
532
533 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { return 128; }
534
535 bool isLegalToVectorizeLoad(LoadInst *LI) const { return true; }
536
537 bool isLegalToVectorizeStore(StoreInst *SI) const { return true; }
538
539 bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
540 unsigned Alignment,
541 unsigned AddrSpace) const {
542 return true;
543 }
544
545 bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
546 unsigned Alignment,
547 unsigned AddrSpace) const {
548 return true;
549 }
550
551 unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
552 unsigned ChainSizeInBytes,
553 VectorType *VecTy) const {
554 return VF;
555 }
556
557 unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
558 unsigned ChainSizeInBytes,
559 VectorType *VecTy) const {
560 return VF;
561 }
562
563 bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
564 TTI::ReductionFlags Flags) const {
565 return false;
566 }
567
568 bool shouldExpandReduction(const IntrinsicInst *II) const {
569 return true;
570 }
571
572protected:
573 // Obtain the minimum required size to hold the value (without the sign)
574 // In case of a vector it returns the min required size for one element.
575 unsigned minRequiredElementSize(const Value* Val, bool &isSigned) {
576 if (isa<ConstantDataVector>(Val) || isa<ConstantVector>(Val)) {
577 const auto* VectorValue = cast<Constant>(Val);
578
579 // In case of a vector need to pick the max between the min
580 // required size for each element
581 auto *VT = cast<VectorType>(Val->getType());
582
583 // Assume unsigned elements
584 isSigned = false;
585
586 // The max required size is the total vector width divided by num
587 // of elements in the vector
588 unsigned MaxRequiredSize = VT->getBitWidth() / VT->getNumElements();
589
590 unsigned MinRequiredSize = 0;
591 for(unsigned i = 0, e = VT->getNumElements(); i < e; ++i) {
592 if (auto* IntElement =
593 dyn_cast<ConstantInt>(VectorValue->getAggregateElement(i))) {
594 bool signedElement = IntElement->getValue().isNegative();
595 // Get the element min required size.
596 unsigned ElementMinRequiredSize =
597 IntElement->getValue().getMinSignedBits() - 1;
598 // In case one element is signed then all the vector is signed.
599 isSigned |= signedElement;
600 // Save the max required bit size between all the elements.
601 MinRequiredSize = std::max(MinRequiredSize, ElementMinRequiredSize);
602 }
603 else {
604 // not an int constant element
605 return MaxRequiredSize;
606 }
607 }
608 return MinRequiredSize;
609 }
610
611 if (const auto* CI = dyn_cast<ConstantInt>(Val)) {
612 isSigned = CI->getValue().isNegative();
613 return CI->getValue().getMinSignedBits() - 1;
614 }
615
616 if (const auto* Cast = dyn_cast<SExtInst>(Val)) {
617 isSigned = true;
618 return Cast->getSrcTy()->getScalarSizeInBits() - 1;
619 }
620
621 if (const auto* Cast = dyn_cast<ZExtInst>(Val)) {
622 isSigned = false;
623 return Cast->getSrcTy()->getScalarSizeInBits();
624 }
625
626 isSigned = false;
627 return Val->getType()->getScalarSizeInBits();
628 }
629
630 bool isStridedAccess(const SCEV *Ptr) {
631 return Ptr && isa<SCEVAddRecExpr>(Ptr);
632 }
633
634 const SCEVConstant *getConstantStrideStep(ScalarEvolution *SE,
635 const SCEV *Ptr) {
636 if (!isStridedAccess(Ptr))
637 return nullptr;
638 const SCEVAddRecExpr *AddRec = cast<SCEVAddRecExpr>(Ptr);
639 return dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(*SE));
640 }
641
642 bool isConstantStridedAccessLessThan(ScalarEvolution *SE, const SCEV *Ptr,
643 int64_t MergeDistance) {
644 const SCEVConstant *Step = getConstantStrideStep(SE, Ptr);
645 if (!Step)
646 return false;
647 APInt StrideVal = Step->getAPInt();
648 if (StrideVal.getBitWidth() > 64)
649 return false;
650 // FIXME: Need to take absolute value for negative stride case.
651 return StrideVal.getSExtValue() < MergeDistance;
652 }
653};
654
655/// CRTP base class for use as a mix-in that aids implementing
656/// a TargetTransformInfo-compatible class.
657template <typename T>
658class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
659private:
660 typedef TargetTransformInfoImplBase BaseT;
661
662protected:
663 explicit TargetTransformInfoImplCRTPBase(const DataLayout &DL) : BaseT(DL) {}
664
665public:
666 using BaseT::getCallCost;
667
668 unsigned getCallCost(const Function *F, int NumArgs) {
669 assert(F && "A concrete function must be provided to this routine.")(static_cast <bool> (F && "A concrete function must be provided to this routine."
) ? void (0) : __assert_fail ("F && \"A concrete function must be provided to this routine.\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 669, __extension__ __PRETTY_FUNCTION__))
;
670
671 if (NumArgs < 0)
672 // Set the argument number to the number of explicit arguments in the
673 // function.
674 NumArgs = F->arg_size();
675
676 if (Intrinsic::ID IID = F->getIntrinsicID()) {
677 FunctionType *FTy = F->getFunctionType();
678 SmallVector<Type *, 8> ParamTys(FTy->param_begin(), FTy->param_end());
679 return static_cast<T *>(this)
680 ->getIntrinsicCost(IID, FTy->getReturnType(), ParamTys);
681 }
682
683 if (!static_cast<T *>(this)->isLoweredToCall(F))
684 return TTI::TCC_Basic; // Give a basic cost if it will be lowered
685 // directly.
686
687 return static_cast<T *>(this)->getCallCost(F->getFunctionType(), NumArgs);
688 }
689
690 unsigned getCallCost(const Function *F, ArrayRef<const Value *> Arguments) {
691 // Simply delegate to generic handling of the call.
692 // FIXME: We should use instsimplify or something else to catch calls which
693 // will constant fold with these arguments.
694 return static_cast<T *>(this)->getCallCost(F, Arguments.size());
695 }
696
697 using BaseT::getGEPCost;
698
699 int getGEPCost(Type *PointeeType, const Value *Ptr,
700 ArrayRef<const Value *> Operands) {
701 const GlobalValue *BaseGV = nullptr;
702 if (Ptr != nullptr) {
10
Assuming pointer value is null
11
Taking false branch
703 // TODO: will remove this when pointers have an opaque type.
704 assert(Ptr->getType()->getScalarType()->getPointerElementType() ==(static_cast <bool> (Ptr->getType()->getScalarType
()->getPointerElementType() == PointeeType && "explicit pointee type doesn't match operand's pointee type"
) ? void (0) : __assert_fail ("Ptr->getType()->getScalarType()->getPointerElementType() == PointeeType && \"explicit pointee type doesn't match operand's pointee type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 706, __extension__ __PRETTY_FUNCTION__))
705 PointeeType &&(static_cast <bool> (Ptr->getType()->getScalarType
()->getPointerElementType() == PointeeType && "explicit pointee type doesn't match operand's pointee type"
) ? void (0) : __assert_fail ("Ptr->getType()->getScalarType()->getPointerElementType() == PointeeType && \"explicit pointee type doesn't match operand's pointee type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 706, __extension__ __PRETTY_FUNCTION__))
706 "explicit pointee type doesn't match operand's pointee type")(static_cast <bool> (Ptr->getType()->getScalarType
()->getPointerElementType() == PointeeType && "explicit pointee type doesn't match operand's pointee type"
) ? void (0) : __assert_fail ("Ptr->getType()->getScalarType()->getPointerElementType() == PointeeType && \"explicit pointee type doesn't match operand's pointee type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 706, __extension__ __PRETTY_FUNCTION__))
;
707 BaseGV = dyn_cast<GlobalValue>(Ptr->stripPointerCasts());
708 }
709 bool HasBaseReg = (BaseGV == nullptr);
710
711 auto PtrSizeBits = DL.getPointerTypeSizeInBits(Ptr->getType());
12
Called C++ object pointer is null
712 APInt BaseOffset(PtrSizeBits, 0);
713 int64_t Scale = 0;
714
715 auto GTI = gep_type_begin(PointeeType, Operands);
716 Type *TargetType = nullptr;
717
718 // Handle the case where the GEP instruction has a single operand,
719 // the basis, therefore TargetType is a nullptr.
720 if (Operands.empty())
721 return !BaseGV ? TTI::TCC_Free : TTI::TCC_Basic;
722
723 for (auto I = Operands.begin(); I != Operands.end(); ++I, ++GTI) {
724 TargetType = GTI.getIndexedType();
725 // We assume that the cost of Scalar GEP with constant index and the
726 // cost of Vector GEP with splat constant index are the same.
727 const ConstantInt *ConstIdx = dyn_cast<ConstantInt>(*I);
728 if (!ConstIdx)
729 if (auto Splat = getSplatValue(*I))
730 ConstIdx = dyn_cast<ConstantInt>(Splat);
731 if (StructType *STy = GTI.getStructTypeOrNull()) {
732 // For structures the index is always splat or scalar constant
733 assert(ConstIdx && "Unexpected GEP index")(static_cast <bool> (ConstIdx && "Unexpected GEP index"
) ? void (0) : __assert_fail ("ConstIdx && \"Unexpected GEP index\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/Analysis/TargetTransformInfoImpl.h"
, 733, __extension__ __PRETTY_FUNCTION__))
;
734 uint64_t Field = ConstIdx->getZExtValue();
735 BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
736 } else {
737 int64_t ElementSize = DL.getTypeAllocSize(GTI.getIndexedType());
738 if (ConstIdx) {
739 BaseOffset +=
740 ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;
741 } else {
742 // Needs scale register.
743 if (Scale != 0)
744 // No addressing mode takes two scale registers.
745 return TTI::TCC_Basic;
746 Scale = ElementSize;
747 }
748 }
749 }
750
751 // Assumes the address space is 0 when Ptr is nullptr.
752 unsigned AS =
753 (Ptr == nullptr ? 0 : Ptr->getType()->getPointerAddressSpace());
754
755 if (static_cast<T *>(this)->isLegalAddressingMode(
756 TargetType, const_cast<GlobalValue *>(BaseGV),
757 BaseOffset.sextOrTrunc(64).getSExtValue(), HasBaseReg, Scale, AS))
758 return TTI::TCC_Free;
759 return TTI::TCC_Basic;
760 }
761
762 using BaseT::getIntrinsicCost;
763
764 unsigned getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
765 ArrayRef<const Value *> Arguments) {
766 // Delegate to the generic intrinsic handling code. This mostly provides an
767 // opportunity for targets to (for example) special case the cost of
768 // certain intrinsics based on constants used as arguments.
769 SmallVector<Type *, 8> ParamTys;
770 ParamTys.reserve(Arguments.size());
771 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx)
772 ParamTys.push_back(Arguments[Idx]->getType());
773 return static_cast<T *>(this)->getIntrinsicCost(IID, RetTy, ParamTys);
774 }
775
776 unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands) {
777 if (isa<PHINode>(U))
3
Taking false branch
778 return TTI::TCC_Free; // Model all PHI nodes as free.
779
780 // Static alloca doesn't generate target instructions.
781 if (auto *A = dyn_cast<AllocaInst>(U))
4
Taking false branch
782 if (A->isStaticAlloca())
783 return TTI::TCC_Free;
784
785 if (const GEPOperator *GEP = dyn_cast<GEPOperator>(U)) {
5
Assuming 'GEP' is non-null
6
Taking true branch
786 return static_cast<T *>(this)->getGEPCost(GEP->getSourceElementType(),
7
Calling 'BasicTTIImplBase::getGEPCost'
787 GEP->getPointerOperand(),
788 Operands.drop_front());
789 }
790
791 if (auto CS = ImmutableCallSite(U)) {
792 const Function *F = CS.getCalledFunction();
793 if (!F) {
794 // Just use the called value type.
795 Type *FTy = CS.getCalledValue()->getType()->getPointerElementType();
796 return static_cast<T *>(this)
797 ->getCallCost(cast<FunctionType>(FTy), CS.arg_size());
798 }
799
800 SmallVector<const Value *, 8> Arguments(CS.arg_begin(), CS.arg_end());
801 return static_cast<T *>(this)->getCallCost(F, Arguments);
802 }
803
804 if (const CastInst *CI = dyn_cast<CastInst>(U)) {
805 // Result of a cmp instruction is often extended (to be used by other
806 // cmp instructions, logical or return instructions). These are usually
807 // nop on most sane targets.
808 if (isa<CmpInst>(CI->getOperand(0)))
809 return TTI::TCC_Free;
810 if (isa<SExtInst>(CI) || isa<ZExtInst>(CI) || isa<FPExtInst>(CI))
811 return static_cast<T *>(this)->getExtCost(CI, Operands.back());
812 }
813
814 return static_cast<T *>(this)->getOperationCost(
815 Operator::getOpcode(U), U->getType(),
816 U->getNumOperands() == 1 ? U->getOperand(0)->getType() : nullptr);
817 }
818
819 int getInstructionLatency(const Instruction *I) {
820 SmallVector<const Value *, 4> Operands(I->value_op_begin(),
821 I->value_op_end());
822 if (getUserCost(I, Operands) == TTI::TCC_Free)
823 return 0;
824
825 if (isa<LoadInst>(I))
826 return 4;
827
828 Type *DstTy = I->getType();
829
830 // Usually an intrinsic is a simple instruction.
831 // A real function call is much slower.
832 if (auto *CI = dyn_cast<CallInst>(I)) {
833 const Function *F = CI->getCalledFunction();
834 if (!F || static_cast<T *>(this)->isLoweredToCall(F))
835 return 40;
836 // Some intrinsics return a value and a flag, we use the value type
837 // to decide its latency.
838 if (StructType* StructTy = dyn_cast<StructType>(DstTy))
839 DstTy = StructTy->getElementType(0);
840 // Fall through to simple instructions.
841 }
842
843 if (VectorType *VectorTy = dyn_cast<VectorType>(DstTy))
844 DstTy = VectorTy->getElementType();
845 if (DstTy->isFloatingPointTy())
846 return 3;
847
848 return 1;
849 }
850};
851}
852
853#endif

/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h

1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// This file provides a helper that implements much of the TTI interface in
12/// terms of the target-independent code generator and TargetLowering
13/// interfaces.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
18#define LLVM_CODEGEN_BASICTTIIMPL_H
19
20#include "llvm/ADT/APInt.h"
21#include "llvm/ADT/ArrayRef.h"
22#include "llvm/ADT/BitVector.h"
23#include "llvm/ADT/SmallPtrSet.h"
24#include "llvm/ADT/SmallVector.h"
25#include "llvm/Analysis/LoopInfo.h"
26#include "llvm/Analysis/TargetTransformInfo.h"
27#include "llvm/Analysis/TargetTransformInfoImpl.h"
28#include "llvm/CodeGen/ISDOpcodes.h"
29#include "llvm/CodeGen/TargetLowering.h"
30#include "llvm/CodeGen/TargetSubtargetInfo.h"
31#include "llvm/CodeGen/ValueTypes.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/CallSite.h"
34#include "llvm/IR/Constant.h"
35#include "llvm/IR/Constants.h"
36#include "llvm/IR/DataLayout.h"
37#include "llvm/IR/DerivedTypes.h"
38#include "llvm/IR/InstrTypes.h"
39#include "llvm/IR/Instruction.h"
40#include "llvm/IR/Instructions.h"
41#include "llvm/IR/Intrinsics.h"
42#include "llvm/IR/Operator.h"
43#include "llvm/IR/Type.h"
44#include "llvm/IR/Value.h"
45#include "llvm/MC/MCSchedule.h"
46#include "llvm/Support/Casting.h"
47#include "llvm/Support/CommandLine.h"
48#include "llvm/Support/ErrorHandling.h"
49#include "llvm/Support/MachineValueType.h"
50#include "llvm/Support/MathExtras.h"
51#include <algorithm>
52#include <cassert>
53#include <cstdint>
54#include <limits>
55#include <utility>
56
57namespace llvm {
58
59class Function;
60class GlobalValue;
61class LLVMContext;
62class ScalarEvolution;
63class SCEV;
64class TargetMachine;
65
66extern cl::opt<unsigned> PartialUnrollingThreshold;
67
68/// Base class which can be used to help build a TTI implementation.
69///
70/// This class provides as much implementation of the TTI interface as is
71/// possible using the target independent parts of the code generator.
72///
73/// In order to subclass it, your class must implement a getST() method to
74/// return the subtarget, and a getTLI() method to return the target lowering.
75/// We need these methods implemented in the derived class so that this class
76/// doesn't have to duplicate storage for them.
77template <typename T>
78class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
79private:
80 using BaseT = TargetTransformInfoImplCRTPBase<T>;
81 using TTI = TargetTransformInfo;
82
83 /// Estimate a cost of shuffle as a sequence of extract and insert
84 /// operations.
85 unsigned getPermuteShuffleOverhead(Type *Ty) {
86 assert(Ty->isVectorTy() && "Can only shuffle vectors")(static_cast <bool> (Ty->isVectorTy() && "Can only shuffle vectors"
) ? void (0) : __assert_fail ("Ty->isVectorTy() && \"Can only shuffle vectors\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 86, __extension__ __PRETTY_FUNCTION__))
;
87 unsigned Cost = 0;
88 // Shuffle cost is equal to the cost of extracting element from its argument
89 // plus the cost of inserting them onto the result vector.
90
91 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
92 // index 0 of first vector, index 1 of second vector,index 2 of first
93 // vector and finally index 3 of second vector and insert them at index
94 // <0,1,2,3> of result vector.
95 for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
96 Cost += static_cast<T *>(this)
97 ->getVectorInstrCost(Instruction::InsertElement, Ty, i);
98 Cost += static_cast<T *>(this)
99 ->getVectorInstrCost(Instruction::ExtractElement, Ty, i);
100 }
101 return Cost;
102 }
103
104 /// Local query method delegates up to T which *must* implement this!
105 const TargetSubtargetInfo *getST() const {
106 return static_cast<const T *>(this)->getST();
107 }
108
109 /// Local query method delegates up to T which *must* implement this!
110 const TargetLoweringBase *getTLI() const {
111 return static_cast<const T *>(this)->getTLI();
112 }
113
114 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
115 switch (M) {
116 case TTI::MIM_Unindexed:
117 return ISD::UNINDEXED;
118 case TTI::MIM_PreInc:
119 return ISD::PRE_INC;
120 case TTI::MIM_PreDec:
121 return ISD::PRE_DEC;
122 case TTI::MIM_PostInc:
123 return ISD::POST_INC;
124 case TTI::MIM_PostDec:
125 return ISD::POST_DEC;
126 }
127 llvm_unreachable("Unexpected MemIndexedMode")::llvm::llvm_unreachable_internal("Unexpected MemIndexedMode"
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 127)
;
128 }
129
130protected:
131 explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
132 : BaseT(DL) {}
133
134 using TargetTransformInfoImplBase::DL;
135
136public:
137 /// \name Scalar TTI Implementations
138 /// @{
139 bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
140 unsigned BitWidth, unsigned AddressSpace,
141 unsigned Alignment, bool *Fast) const {
142 EVT E = EVT::getIntegerVT(Context, BitWidth);
143 return getTLI()->allowsMisalignedMemoryAccesses(E, AddressSpace, Alignment, Fast);
144 }
145
146 bool hasBranchDivergence() { return false; }
147
148 bool isSourceOfDivergence(const Value *V) { return false; }
149
150 bool isAlwaysUniform(const Value *V) { return false; }
151
152 unsigned getFlatAddressSpace() {
153 // Return an invalid address space.
154 return -1;
155 }
156
157 bool isLegalAddImmediate(int64_t imm) {
158 return getTLI()->isLegalAddImmediate(imm);
159 }
160
161 bool isLegalICmpImmediate(int64_t imm) {
162 return getTLI()->isLegalICmpImmediate(imm);
163 }
164
165 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
166 bool HasBaseReg, int64_t Scale,
167 unsigned AddrSpace, Instruction *I = nullptr) {
168 TargetLoweringBase::AddrMode AM;
169 AM.BaseGV = BaseGV;
170 AM.BaseOffs = BaseOffset;
171 AM.HasBaseReg = HasBaseReg;
172 AM.Scale = Scale;
173 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
174 }
175
176 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty,
177 const DataLayout &DL) const {
178 EVT VT = getTLI()->getValueType(DL, Ty);
179 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
180 }
181
182 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty,
183 const DataLayout &DL) const {
184 EVT VT = getTLI()->getValueType(DL, Ty);
185 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
186 }
187
188 bool isLSRCostLess(TTI::LSRCost C1, TTI::LSRCost C2) {
189 return TargetTransformInfoImplBase::isLSRCostLess(C1, C2);
190 }
191
192 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
193 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
194 TargetLoweringBase::AddrMode AM;
195 AM.BaseGV = BaseGV;
196 AM.BaseOffs = BaseOffset;
197 AM.HasBaseReg = HasBaseReg;
198 AM.Scale = Scale;
199 return getTLI()->getScalingFactorCost(DL, AM, Ty, AddrSpace);
200 }
201
202 bool isTruncateFree(Type *Ty1, Type *Ty2) {
203 return getTLI()->isTruncateFree(Ty1, Ty2);
204 }
205
206 bool isProfitableToHoist(Instruction *I) {
207 return getTLI()->isProfitableToHoist(I);
208 }
209
210 bool useAA() const { return getST()->useAA(); }
211
212 bool isTypeLegal(Type *Ty) {
213 EVT VT = getTLI()->getValueType(DL, Ty);
214 return getTLI()->isTypeLegal(VT);
215 }
216
217 int getGEPCost(Type *PointeeType, const Value *Ptr,
218 ArrayRef<const Value *> Operands) {
219 return BaseT::getGEPCost(PointeeType, Ptr, Operands);
8
Passing value via 2nd parameter 'Ptr'
9
Calling 'TargetTransformInfoImplCRTPBase::getGEPCost'
220 }
221
222 int getExtCost(const Instruction *I, const Value *Src) {
223 if (getTLI()->isExtFree(I))
224 return TargetTransformInfo::TCC_Free;
225
226 if (isa<ZExtInst>(I) || isa<SExtInst>(I))
227 if (const LoadInst *LI = dyn_cast<LoadInst>(Src))
228 if (getTLI()->isExtLoad(LI, I, DL))
229 return TargetTransformInfo::TCC_Free;
230
231 return TargetTransformInfo::TCC_Basic;
232 }
233
234 unsigned getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
235 ArrayRef<const Value *> Arguments) {
236 return BaseT::getIntrinsicCost(IID, RetTy, Arguments);
237 }
238
239 unsigned getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
240 ArrayRef<Type *> ParamTys) {
241 if (IID == Intrinsic::cttz) {
242 if (getTLI()->isCheapToSpeculateCttz())
243 return TargetTransformInfo::TCC_Basic;
244 return TargetTransformInfo::TCC_Expensive;
245 }
246
247 if (IID == Intrinsic::ctlz) {
248 if (getTLI()->isCheapToSpeculateCtlz())
249 return TargetTransformInfo::TCC_Basic;
250 return TargetTransformInfo::TCC_Expensive;
251 }
252
253 return BaseT::getIntrinsicCost(IID, RetTy, ParamTys);
254 }
255
256 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
257 unsigned &JumpTableSize) {
258 /// Try to find the estimated number of clusters. Note that the number of
259 /// clusters identified in this function could be different from the actural
260 /// numbers found in lowering. This function ignore switches that are
261 /// lowered with a mix of jump table / bit test / BTree. This function was
262 /// initially intended to be used when estimating the cost of switch in
263 /// inline cost heuristic, but it's a generic cost model to be used in other
264 /// places (e.g., in loop unrolling).
265 unsigned N = SI.getNumCases();
266 const TargetLoweringBase *TLI = getTLI();
267 const DataLayout &DL = this->getDataLayout();
268
269 JumpTableSize = 0;
270 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
271
272 // Early exit if both a jump table and bit test are not allowed.
273 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
274 return N;
275
276 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
277 APInt MinCaseVal = MaxCaseVal;
278 for (auto CI : SI.cases()) {
279 const APInt &CaseVal = CI.getCaseValue()->getValue();
280 if (CaseVal.sgt(MaxCaseVal))
281 MaxCaseVal = CaseVal;
282 if (CaseVal.slt(MinCaseVal))
283 MinCaseVal = CaseVal;
284 }
285
286 // Check if suitable for a bit test
287 if (N <= DL.getIndexSizeInBits(0u)) {
288 SmallPtrSet<const BasicBlock *, 4> Dests;
289 for (auto I : SI.cases())
290 Dests.insert(I.getCaseSuccessor());
291
292 if (TLI->isSuitableForBitTests(Dests.size(), N, MinCaseVal, MaxCaseVal,
293 DL))
294 return 1;
295 }
296
297 // Check if suitable for a jump table.
298 if (IsJTAllowed) {
299 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
300 return N;
301 uint64_t Range =
302 (MaxCaseVal - MinCaseVal)
303 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
304 // Check whether a range of clusters is dense enough for a jump table
305 if (TLI->isSuitableForJumpTable(&SI, N, Range)) {
306 JumpTableSize = Range;
307 return 1;
308 }
309 }
310 return N;
311 }
312
313 unsigned getJumpBufAlignment() { return getTLI()->getJumpBufAlignment(); }
314
315 unsigned getJumpBufSize() { return getTLI()->getJumpBufSize(); }
316
317 bool shouldBuildLookupTables() {
318 const TargetLoweringBase *TLI = getTLI();
319 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
320 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
321 }
322
323 bool haveFastSqrt(Type *Ty) {
324 const TargetLoweringBase *TLI = getTLI();
325 EVT VT = TLI->getValueType(DL, Ty);
326 return TLI->isTypeLegal(VT) &&
327 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
328 }
329
330 bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) {
331 return true;
332 }
333
334 unsigned getFPOpCost(Type *Ty) {
335 // Check whether FADD is available, as a proxy for floating-point in
336 // general.
337 const TargetLoweringBase *TLI = getTLI();
338 EVT VT = TLI->getValueType(DL, Ty);
339 if (TLI->isOperationLegalOrCustomOrPromote(ISD::FADD, VT))
340 return TargetTransformInfo::TCC_Basic;
341 return TargetTransformInfo::TCC_Expensive;
342 }
343
344 unsigned getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) {
345 const TargetLoweringBase *TLI = getTLI();
346 switch (Opcode) {
347 default: break;
348 case Instruction::Trunc:
349 if (TLI->isTruncateFree(OpTy, Ty))
350 return TargetTransformInfo::TCC_Free;
351 return TargetTransformInfo::TCC_Basic;
352 case Instruction::ZExt:
353 if (TLI->isZExtFree(OpTy, Ty))
354 return TargetTransformInfo::TCC_Free;
355 return TargetTransformInfo::TCC_Basic;
356 }
357
358 return BaseT::getOperationCost(Opcode, Ty, OpTy);
359 }
360
361 unsigned getInliningThresholdMultiplier() { return 1; }
362
363 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
364 TTI::UnrollingPreferences &UP) {
365 // This unrolling functionality is target independent, but to provide some
366 // motivation for its intended use, for x86:
367
368 // According to the Intel 64 and IA-32 Architectures Optimization Reference
369 // Manual, Intel Core models and later have a loop stream detector (and
370 // associated uop queue) that can benefit from partial unrolling.
371 // The relevant requirements are:
372 // - The loop must have no more than 4 (8 for Nehalem and later) branches
373 // taken, and none of them may be calls.
374 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
375
376 // According to the Software Optimization Guide for AMD Family 15h
377 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
378 // and loop buffer which can benefit from partial unrolling.
379 // The relevant requirements are:
380 // - The loop must have fewer than 16 branches
381 // - The loop must have less than 40 uops in all executed loop branches
382
383 // The number of taken branches in a loop is hard to estimate here, and
384 // benchmarking has revealed that it is better not to be conservative when
385 // estimating the branch count. As a result, we'll ignore the branch limits
386 // until someone finds a case where it matters in practice.
387
388 unsigned MaxOps;
389 const TargetSubtargetInfo *ST = getST();
390 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
391 MaxOps = PartialUnrollingThreshold;
392 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
393 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
394 else
395 return;
396
397 // Scan the loop: don't unroll loops with calls.
398 for (Loop::block_iterator I = L->block_begin(), E = L->block_end(); I != E;
399 ++I) {
400 BasicBlock *BB = *I;
401
402 for (BasicBlock::iterator J = BB->begin(), JE = BB->end(); J != JE; ++J)
403 if (isa<CallInst>(J) || isa<InvokeInst>(J)) {
404 ImmutableCallSite CS(&*J);
405 if (const Function *F = CS.getCalledFunction()) {
406 if (!static_cast<T *>(this)->isLoweredToCall(F))
407 continue;
408 }
409
410 return;
411 }
412 }
413
414 // Enable runtime and partial unrolling up to the specified size.
415 // Enable using trip count upper bound to unroll loops.
416 UP.Partial = UP.Runtime = UP.UpperBound = true;
417 UP.PartialThreshold = MaxOps;
418
419 // Avoid unrolling when optimizing for size.
420 UP.OptSizeThreshold = 0;
421 UP.PartialOptSizeThreshold = 0;
422
423 // Set number of instructions optimized when "back edge"
424 // becomes "fall through" to default value of 2.
425 UP.BEInsns = 2;
426 }
427
428 int getInstructionLatency(const Instruction *I) {
429 if (isa<LoadInst>(I))
430 return getST()->getSchedModel().DefaultLoadLatency;
431
432 return BaseT::getInstructionLatency(I);
433 }
434
435 /// @}
436
437 /// \name Vector TTI Implementations
438 /// @{
439
440 unsigned getNumberOfRegisters(bool Vector) { return Vector ? 0 : 1; }
441
442 unsigned getRegisterBitWidth(bool Vector) const { return 32; }
443
444 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
445 /// are set if the result needs to be inserted and/or extracted from vectors.
446 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) {
447 assert(Ty->isVectorTy() && "Can only scalarize vectors")(static_cast <bool> (Ty->isVectorTy() && "Can only scalarize vectors"
) ? void (0) : __assert_fail ("Ty->isVectorTy() && \"Can only scalarize vectors\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 447, __extension__ __PRETTY_FUNCTION__))
;
448 unsigned Cost = 0;
449
450 for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
451 if (Insert)
452 Cost += static_cast<T *>(this)
453 ->getVectorInstrCost(Instruction::InsertElement, Ty, i);
454 if (Extract)
455 Cost += static_cast<T *>(this)
456 ->getVectorInstrCost(Instruction::ExtractElement, Ty, i);
457 }
458
459 return Cost;
460 }
461
462 /// Estimate the overhead of scalarizing an instructions unique
463 /// non-constant operands. The types of the arguments are ordinarily
464 /// scalar, in which case the costs are multiplied with VF.
465 unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
466 unsigned VF) {
467 unsigned Cost = 0;
468 SmallPtrSet<const Value*, 4> UniqueOperands;
469 for (const Value *A : Args) {
470 if (!isa<Constant>(A) && UniqueOperands.insert(A).second) {
471 Type *VecTy = nullptr;
472 if (A->getType()->isVectorTy()) {
473 VecTy = A->getType();
474 // If A is a vector operand, VF should be 1 or correspond to A.
475 assert((VF == 1 || VF == VecTy->getVectorNumElements()) &&(static_cast <bool> ((VF == 1 || VF == VecTy->getVectorNumElements
()) && "Vector argument does not match VF") ? void (0
) : __assert_fail ("(VF == 1 || VF == VecTy->getVectorNumElements()) && \"Vector argument does not match VF\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 476, __extension__ __PRETTY_FUNCTION__))
476 "Vector argument does not match VF")(static_cast <bool> ((VF == 1 || VF == VecTy->getVectorNumElements
()) && "Vector argument does not match VF") ? void (0
) : __assert_fail ("(VF == 1 || VF == VecTy->getVectorNumElements()) && \"Vector argument does not match VF\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 476, __extension__ __PRETTY_FUNCTION__))
;
477 }
478 else
479 VecTy = VectorType::get(A->getType(), VF);
480
481 Cost += getScalarizationOverhead(VecTy, false, true);
482 }
483 }
484
485 return Cost;
486 }
487
488 unsigned getScalarizationOverhead(Type *VecTy, ArrayRef<const Value *> Args) {
489 assert(VecTy->isVectorTy())(static_cast <bool> (VecTy->isVectorTy()) ? void (0)
: __assert_fail ("VecTy->isVectorTy()", "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 489, __extension__ __PRETTY_FUNCTION__))
;
490
491 unsigned Cost = 0;
492
493 Cost += getScalarizationOverhead(VecTy, true, false);
494 if (!Args.empty())
495 Cost += getOperandsScalarizationOverhead(Args,
496 VecTy->getVectorNumElements());
497 else
498 // When no information on arguments is provided, we add the cost
499 // associated with one argument as a heuristic.
500 Cost += getScalarizationOverhead(VecTy, false, true);
501
502 return Cost;
503 }
504
505 unsigned getMaxInterleaveFactor(unsigned VF) { return 1; }
506
507 unsigned getArithmeticInstrCost(
508 unsigned Opcode, Type *Ty,
509 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
510 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
511 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
512 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
513 ArrayRef<const Value *> Args = ArrayRef<const Value *>()) {
514 // Check if any of the operands are vector operands.
515 const TargetLoweringBase *TLI = getTLI();
516 int ISD = TLI->InstructionOpcodeToISD(Opcode);
517 assert(ISD && "Invalid opcode")(static_cast <bool> (ISD && "Invalid opcode") ?
void (0) : __assert_fail ("ISD && \"Invalid opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 517, __extension__ __PRETTY_FUNCTION__))
;
518
519 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(DL, Ty);
520
521 bool IsFloat = Ty->isFPOrFPVectorTy();
522 // Assume that floating point arithmetic operations cost twice as much as
523 // integer operations.
524 unsigned OpCost = (IsFloat ? 2 : 1);
525
526 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
527 // The operation is legal. Assume it costs 1.
528 // TODO: Once we have extract/insert subvector cost we need to use them.
529 return LT.first * OpCost;
530 }
531
532 if (!TLI->isOperationExpand(ISD, LT.second)) {
533 // If the operation is custom lowered, then assume that the code is twice
534 // as expensive.
535 return LT.first * 2 * OpCost;
536 }
537
538 // Else, assume that we need to scalarize this op.
539 // TODO: If one of the types get legalized by splitting, handle this
540 // similarly to what getCastInstrCost() does.
541 if (Ty->isVectorTy()) {
542 unsigned Num = Ty->getVectorNumElements();
543 unsigned Cost = static_cast<T *>(this)
544 ->getArithmeticInstrCost(Opcode, Ty->getScalarType());
545 // Return the cost of multiple scalar invocation plus the cost of
546 // inserting and extracting the values.
547 return getScalarizationOverhead(Ty, Args) + Num * Cost;
548 }
549
550 // We don't know anything about this scalar instruction.
551 return OpCost;
552 }
553
554 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
555 Type *SubTp) {
556 switch (Kind) {
557 case TTI::SK_Select:
558 case TTI::SK_Transpose:
559 case TTI::SK_PermuteSingleSrc:
560 case TTI::SK_PermuteTwoSrc:
561 return getPermuteShuffleOverhead(Tp);
562 default:
563 return 1;
564 }
565 }
566
567 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
568 const Instruction *I = nullptr) {
569 const TargetLoweringBase *TLI = getTLI();
570 int ISD = TLI->InstructionOpcodeToISD(Opcode);
571 assert(ISD && "Invalid opcode")(static_cast <bool> (ISD && "Invalid opcode") ?
void (0) : __assert_fail ("ISD && \"Invalid opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 571, __extension__ __PRETTY_FUNCTION__))
;
572 std::pair<unsigned, MVT> SrcLT = TLI->getTypeLegalizationCost(DL, Src);
573 std::pair<unsigned, MVT> DstLT = TLI->getTypeLegalizationCost(DL, Dst);
574
575 // Check for NOOP conversions.
576 if (SrcLT.first == DstLT.first &&
577 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
578
579 // Bitcast between types that are legalized to the same type are free.
580 if (Opcode == Instruction::BitCast || Opcode == Instruction::Trunc)
581 return 0;
582 }
583
584 if (Opcode == Instruction::Trunc &&
585 TLI->isTruncateFree(SrcLT.second, DstLT.second))
586 return 0;
587
588 if (Opcode == Instruction::ZExt &&
589 TLI->isZExtFree(SrcLT.second, DstLT.second))
590 return 0;
591
592 if (Opcode == Instruction::AddrSpaceCast &&
593 TLI->isNoopAddrSpaceCast(Src->getPointerAddressSpace(),
594 Dst->getPointerAddressSpace()))
595 return 0;
596
597 // If this is a zext/sext of a load, return 0 if the corresponding
598 // extending load exists on target.
599 if ((Opcode == Instruction::ZExt || Opcode == Instruction::SExt) &&
600 I && isa<LoadInst>(I->getOperand(0))) {
601 EVT ExtVT = EVT::getEVT(Dst);
602 EVT LoadVT = EVT::getEVT(Src);
603 unsigned LType =
604 ((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
605 if (TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
606 return 0;
607 }
608
609 // If the cast is marked as legal (or promote) then assume low cost.
610 if (SrcLT.first == DstLT.first &&
611 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
612 return 1;
613
614 // Handle scalar conversions.
615 if (!Src->isVectorTy() && !Dst->isVectorTy()) {
616 // Scalar bitcasts are usually free.
617 if (Opcode == Instruction::BitCast)
618 return 0;
619
620 // Just check the op cost. If the operation is legal then assume it costs
621 // 1.
622 if (!TLI->isOperationExpand(ISD, DstLT.second))
623 return 1;
624
625 // Assume that illegal scalar instruction are expensive.
626 return 4;
627 }
628
629 // Check vector-to-vector casts.
630 if (Dst->isVectorTy() && Src->isVectorTy()) {
631 // If the cast is between same-sized registers, then the check is simple.
632 if (SrcLT.first == DstLT.first &&
633 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
634
635 // Assume that Zext is done using AND.
636 if (Opcode == Instruction::ZExt)
637 return 1;
638
639 // Assume that sext is done using SHL and SRA.
640 if (Opcode == Instruction::SExt)
641 return 2;
642
643 // Just check the op cost. If the operation is legal then assume it
644 // costs
645 // 1 and multiply by the type-legalization overhead.
646 if (!TLI->isOperationExpand(ISD, DstLT.second))
647 return SrcLT.first * 1;
648 }
649
650 // If we are legalizing by splitting, query the concrete TTI for the cost
651 // of casting the original vector twice. We also need to factor in the
652 // cost of the split itself. Count that as 1, to be consistent with
653 // TLI->getTypeLegalizationCost().
654 if ((TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
655 TargetLowering::TypeSplitVector) ||
656 (TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
657 TargetLowering::TypeSplitVector)) {
658 Type *SplitDst = VectorType::get(Dst->getVectorElementType(),
659 Dst->getVectorNumElements() / 2);
660 Type *SplitSrc = VectorType::get(Src->getVectorElementType(),
661 Src->getVectorNumElements() / 2);
662 T *TTI = static_cast<T *>(this);
663 return TTI->getVectorSplitCost() +
664 (2 * TTI->getCastInstrCost(Opcode, SplitDst, SplitSrc, I));
665 }
666
667 // In other cases where the source or destination are illegal, assume
668 // the operation will get scalarized.
669 unsigned Num = Dst->getVectorNumElements();
670 unsigned Cost = static_cast<T *>(this)->getCastInstrCost(
671 Opcode, Dst->getScalarType(), Src->getScalarType(), I);
672
673 // Return the cost of multiple scalar invocation plus the cost of
674 // inserting and extracting the values.
675 return getScalarizationOverhead(Dst, true, true) + Num * Cost;
676 }
677
678 // We already handled vector-to-vector and scalar-to-scalar conversions.
679 // This
680 // is where we handle bitcast between vectors and scalars. We need to assume
681 // that the conversion is scalarized in one way or another.
682 if (Opcode == Instruction::BitCast)
683 // Illegal bitcasts are done by storing and loading from a stack slot.
684 return (Src->isVectorTy() ? getScalarizationOverhead(Src, false, true)
685 : 0) +
686 (Dst->isVectorTy() ? getScalarizationOverhead(Dst, true, false)
687 : 0);
688
689 llvm_unreachable("Unhandled cast")::llvm::llvm_unreachable_internal("Unhandled cast", "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 689)
;
690 }
691
692 unsigned getExtractWithExtendCost(unsigned Opcode, Type *Dst,
693 VectorType *VecTy, unsigned Index) {
694 return static_cast<T *>(this)->getVectorInstrCost(
695 Instruction::ExtractElement, VecTy, Index) +
696 static_cast<T *>(this)->getCastInstrCost(Opcode, Dst,
697 VecTy->getElementType());
698 }
699
700 unsigned getCFInstrCost(unsigned Opcode) {
701 // Branches are assumed to be predicted.
702 return 0;
703 }
704
705 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
706 const Instruction *I) {
707 const TargetLoweringBase *TLI = getTLI();
708 int ISD = TLI->InstructionOpcodeToISD(Opcode);
709 assert(ISD && "Invalid opcode")(static_cast <bool> (ISD && "Invalid opcode") ?
void (0) : __assert_fail ("ISD && \"Invalid opcode\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 709, __extension__ __PRETTY_FUNCTION__))
;
710
711 // Selects on vectors are actually vector selects.
712 if (ISD == ISD::SELECT) {
713 assert(CondTy && "CondTy must exist")(static_cast <bool> (CondTy && "CondTy must exist"
) ? void (0) : __assert_fail ("CondTy && \"CondTy must exist\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 713, __extension__ __PRETTY_FUNCTION__))
;
714 if (CondTy->isVectorTy())
715 ISD = ISD::VSELECT;
716 }
717 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(DL, ValTy);
718
719 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
720 !TLI->isOperationExpand(ISD, LT.second)) {
721 // The operation is legal. Assume it costs 1. Multiply
722 // by the type-legalization overhead.
723 return LT.first * 1;
724 }
725
726 // Otherwise, assume that the cast is scalarized.
727 // TODO: If one of the types get legalized by splitting, handle this
728 // similarly to what getCastInstrCost() does.
729 if (ValTy->isVectorTy()) {
730 unsigned Num = ValTy->getVectorNumElements();
731 if (CondTy)
732 CondTy = CondTy->getScalarType();
733 unsigned Cost = static_cast<T *>(this)->getCmpSelInstrCost(
734 Opcode, ValTy->getScalarType(), CondTy, I);
735
736 // Return the cost of multiple scalar invocation plus the cost of
737 // inserting and extracting the values.
738 return getScalarizationOverhead(ValTy, true, false) + Num * Cost;
739 }
740
741 // Unknown scalar opcode.
742 return 1;
743 }
744
745 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
746 std::pair<unsigned, MVT> LT =
747 getTLI()->getTypeLegalizationCost(DL, Val->getScalarType());
748
749 return LT.first;
750 }
751
752 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
753 unsigned AddressSpace, const Instruction *I = nullptr) {
754 assert(!Src->isVoidTy() && "Invalid type")(static_cast <bool> (!Src->isVoidTy() && "Invalid type"
) ? void (0) : __assert_fail ("!Src->isVoidTy() && \"Invalid type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 754, __extension__ __PRETTY_FUNCTION__))
;
755 std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(DL, Src);
756
757 // Assuming that all loads of legal types cost 1.
758 unsigned Cost = LT.first;
759
760 if (Src->isVectorTy() &&
761 Src->getPrimitiveSizeInBits() < LT.second.getSizeInBits()) {
762 // This is a vector load that legalizes to a larger type than the vector
763 // itself. Unless the corresponding extending load or truncating store is
764 // legal, then this will scalarize.
765 TargetLowering::LegalizeAction LA = TargetLowering::Expand;
766 EVT MemVT = getTLI()->getValueType(DL, Src);
767 if (Opcode == Instruction::Store)
768 LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
769 else
770 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
771
772 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
773 // This is a vector load/store for some illegal type that is scalarized.
774 // We must account for the cost of building or decomposing the vector.
775 Cost += getScalarizationOverhead(Src, Opcode != Instruction::Store,
776 Opcode == Instruction::Store);
777 }
778 }
779
780 return Cost;
781 }
782
783 unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
784 unsigned Factor,
785 ArrayRef<unsigned> Indices,
786 unsigned Alignment,
787 unsigned AddressSpace) {
788 VectorType *VT = dyn_cast<VectorType>(VecTy);
789 assert(VT && "Expect a vector type for interleaved memory op")(static_cast <bool> (VT && "Expect a vector type for interleaved memory op"
) ? void (0) : __assert_fail ("VT && \"Expect a vector type for interleaved memory op\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 789, __extension__ __PRETTY_FUNCTION__))
;
790
791 unsigned NumElts = VT->getNumElements();
792 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor")(static_cast <bool> (Factor > 1 && NumElts %
Factor == 0 && "Invalid interleave factor") ? void (
0) : __assert_fail ("Factor > 1 && NumElts % Factor == 0 && \"Invalid interleave factor\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 792, __extension__ __PRETTY_FUNCTION__))
;
793
794 unsigned NumSubElts = NumElts / Factor;
795 VectorType *SubVT = VectorType::get(VT->getElementType(), NumSubElts);
796
797 // Firstly, the cost of load/store operation.
798 unsigned Cost = static_cast<T *>(this)->getMemoryOpCost(
799 Opcode, VecTy, Alignment, AddressSpace);
800
801 // Legalize the vector type, and get the legalized and unlegalized type
802 // sizes.
803 MVT VecTyLT = getTLI()->getTypeLegalizationCost(DL, VecTy).second;
804 unsigned VecTySize =
805 static_cast<T *>(this)->getDataLayout().getTypeStoreSize(VecTy);
806 unsigned VecTyLTSize = VecTyLT.getStoreSize();
807
808 // Return the ceiling of dividing A by B.
809 auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
810
811 // Scale the cost of the memory operation by the fraction of legalized
812 // instructions that will actually be used. We shouldn't account for the
813 // cost of dead instructions since they will be removed.
814 //
815 // E.g., An interleaved load of factor 8:
816 // %vec = load <16 x i64>, <16 x i64>* %ptr
817 // %v0 = shufflevector %vec, undef, <0, 8>
818 //
819 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
820 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
821 // type). The other loads are unused.
822 //
823 // We only scale the cost of loads since interleaved store groups aren't
824 // allowed to have gaps.
825 if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) {
826 // The number of loads of a legal type it will take to represent a load
827 // of the unlegalized vector type.
828 unsigned NumLegalInsts = ceil(VecTySize, VecTyLTSize);
829
830 // The number of elements of the unlegalized type that correspond to a
831 // single legal instruction.
832 unsigned NumEltsPerLegalInst = ceil(NumElts, NumLegalInsts);
833
834 // Determine which legal instructions will be used.
835 BitVector UsedInsts(NumLegalInsts, false);
836 for (unsigned Index : Indices)
837 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
838 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
839
840 // Scale the cost of the load by the fraction of legal instructions that
841 // will be used.
842 Cost *= UsedInsts.count() / NumLegalInsts;
843 }
844
845 // Then plus the cost of interleave operation.
846 if (Opcode == Instruction::Load) {
847 // The interleave cost is similar to extract sub vectors' elements
848 // from the wide vector, and insert them into sub vectors.
849 //
850 // E.g. An interleaved load of factor 2 (with one member of index 0):
851 // %vec = load <8 x i32>, <8 x i32>* %ptr
852 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
853 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
854 // <8 x i32> vector and insert them into a <4 x i32> vector.
855
856 assert(Indices.size() <= Factor &&(static_cast <bool> (Indices.size() <= Factor &&
"Interleaved memory op has too many members") ? void (0) : __assert_fail
("Indices.size() <= Factor && \"Interleaved memory op has too many members\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 857, __extension__ __PRETTY_FUNCTION__))
857 "Interleaved memory op has too many members")(static_cast <bool> (Indices.size() <= Factor &&
"Interleaved memory op has too many members") ? void (0) : __assert_fail
("Indices.size() <= Factor && \"Interleaved memory op has too many members\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 857, __extension__ __PRETTY_FUNCTION__))
;
858
859 for (unsigned Index : Indices) {
860 assert(Index < Factor && "Invalid index for interleaved memory op")(static_cast <bool> (Index < Factor && "Invalid index for interleaved memory op"
) ? void (0) : __assert_fail ("Index < Factor && \"Invalid index for interleaved memory op\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 860, __extension__ __PRETTY_FUNCTION__))
;
861
862 // Extract elements from loaded vector for each sub vector.
863 for (unsigned i = 0; i < NumSubElts; i++)
864 Cost += static_cast<T *>(this)->getVectorInstrCost(
865 Instruction::ExtractElement, VT, Index + i * Factor);
866 }
867
868 unsigned InsSubCost = 0;
869 for (unsigned i = 0; i < NumSubElts; i++)
870 InsSubCost += static_cast<T *>(this)->getVectorInstrCost(
871 Instruction::InsertElement, SubVT, i);
872
873 Cost += Indices.size() * InsSubCost;
874 } else {
875 // The interleave cost is extract all elements from sub vectors, and
876 // insert them into the wide vector.
877 //
878 // E.g. An interleaved store of factor 2:
879 // %v0_v1 = shuffle %v0, %v1, <0, 4, 1, 5, 2, 6, 3, 7>
880 // store <8 x i32> %interleaved.vec, <8 x i32>* %ptr
881 // The cost is estimated as extract all elements from both <4 x i32>
882 // vectors and insert into the <8 x i32> vector.
883
884 unsigned ExtSubCost = 0;
885 for (unsigned i = 0; i < NumSubElts; i++)
886 ExtSubCost += static_cast<T *>(this)->getVectorInstrCost(
887 Instruction::ExtractElement, SubVT, i);
888 Cost += ExtSubCost * Factor;
889
890 for (unsigned i = 0; i < NumElts; i++)
891 Cost += static_cast<T *>(this)
892 ->getVectorInstrCost(Instruction::InsertElement, VT, i);
893 }
894
895 return Cost;
896 }
897
898 /// Get intrinsic cost based on arguments.
899 unsigned getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
900 ArrayRef<Value *> Args, FastMathFlags FMF,
901 unsigned VF = 1) {
902 unsigned RetVF = (RetTy->isVectorTy() ? RetTy->getVectorNumElements() : 1);
903 assert((RetVF == 1 || VF == 1) && "VF > 1 and RetVF is a vector type")(static_cast <bool> ((RetVF == 1 || VF == 1) &&
"VF > 1 and RetVF is a vector type") ? void (0) : __assert_fail
("(RetVF == 1 || VF == 1) && \"VF > 1 and RetVF is a vector type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 903, __extension__ __PRETTY_FUNCTION__))
;
904
905 switch (IID) {
906 default: {
907 // Assume that we need to scalarize this intrinsic.
908 SmallVector<Type *, 4> Types;
909 for (Value *Op : Args) {
910 Type *OpTy = Op->getType();
911 assert(VF == 1 || !OpTy->isVectorTy())(static_cast <bool> (VF == 1 || !OpTy->isVectorTy())
? void (0) : __assert_fail ("VF == 1 || !OpTy->isVectorTy()"
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 911, __extension__ __PRETTY_FUNCTION__))
;
912 Types.push_back(VF == 1 ? OpTy : VectorType::get(OpTy, VF));
913 }
914
915 if (VF > 1 && !RetTy->isVoidTy())
916 RetTy = VectorType::get(RetTy, VF);
917
918 // Compute the scalarization overhead based on Args for a vector
919 // intrinsic. A vectorizer will pass a scalar RetTy and VF > 1, while
920 // CostModel will pass a vector RetTy and VF is 1.
921 unsigned ScalarizationCost = std::numeric_limits<unsigned>::max();
922 if (RetVF > 1 || VF > 1) {
923 ScalarizationCost = 0;
924 if (!RetTy->isVoidTy())
925 ScalarizationCost += getScalarizationOverhead(RetTy, true, false);
926 ScalarizationCost += getOperandsScalarizationOverhead(Args, VF);
927 }
928
929 return static_cast<T *>(this)->
930 getIntrinsicInstrCost(IID, RetTy, Types, FMF, ScalarizationCost);
931 }
932 case Intrinsic::masked_scatter: {
933 assert(VF == 1 && "Can't vectorize types here.")(static_cast <bool> (VF == 1 && "Can't vectorize types here."
) ? void (0) : __assert_fail ("VF == 1 && \"Can't vectorize types here.\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 933, __extension__ __PRETTY_FUNCTION__))
;
934 Value *Mask = Args[3];
935 bool VarMask = !isa<Constant>(Mask);
936 unsigned Alignment = cast<ConstantInt>(Args[2])->getZExtValue();
937 return
938 static_cast<T *>(this)->getGatherScatterOpCost(Instruction::Store,
939 Args[0]->getType(),
940 Args[1], VarMask,
941 Alignment);
942 }
943 case Intrinsic::masked_gather: {
944 assert(VF == 1 && "Can't vectorize types here.")(static_cast <bool> (VF == 1 && "Can't vectorize types here."
) ? void (0) : __assert_fail ("VF == 1 && \"Can't vectorize types here.\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 944, __extension__ __PRETTY_FUNCTION__))
;
945 Value *Mask = Args[2];
946 bool VarMask = !isa<Constant>(Mask);
947 unsigned Alignment = cast<ConstantInt>(Args[1])->getZExtValue();
948 return
949 static_cast<T *>(this)->getGatherScatterOpCost(Instruction::Load,
950 RetTy, Args[0], VarMask,
951 Alignment);
952 }
953 case Intrinsic::experimental_vector_reduce_add:
954 case Intrinsic::experimental_vector_reduce_mul:
955 case Intrinsic::experimental_vector_reduce_and:
956 case Intrinsic::experimental_vector_reduce_or:
957 case Intrinsic::experimental_vector_reduce_xor:
958 case Intrinsic::experimental_vector_reduce_fadd:
959 case Intrinsic::experimental_vector_reduce_fmul:
960 case Intrinsic::experimental_vector_reduce_smax:
961 case Intrinsic::experimental_vector_reduce_smin:
962 case Intrinsic::experimental_vector_reduce_fmax:
963 case Intrinsic::experimental_vector_reduce_fmin:
964 case Intrinsic::experimental_vector_reduce_umax:
965 case Intrinsic::experimental_vector_reduce_umin:
966 return getIntrinsicInstrCost(IID, RetTy, Args[0]->getType(), FMF);
967 }
968 }
969
970 /// Get intrinsic cost based on argument types.
971 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
972 /// cost of scalarizing the arguments and the return value will be computed
973 /// based on types.
974 unsigned getIntrinsicInstrCost(
975 Intrinsic::ID IID, Type *RetTy, ArrayRef<Type *> Tys, FastMathFlags FMF,
976 unsigned ScalarizationCostPassed = std::numeric_limits<unsigned>::max()) {
977 SmallVector<unsigned, 2> ISDs;
978 unsigned SingleCallCost = 10; // Library call cost. Make it expensive.
979 switch (IID) {
980 default: {
981 // Assume that we need to scalarize this intrinsic.
982 unsigned ScalarizationCost = ScalarizationCostPassed;
983 unsigned ScalarCalls = 1;
984 Type *ScalarRetTy = RetTy;
985 if (RetTy->isVectorTy()) {
986 if (ScalarizationCostPassed == std::numeric_limits<unsigned>::max())
987 ScalarizationCost = getScalarizationOverhead(RetTy, true, false);
988 ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
989 ScalarRetTy = RetTy->getScalarType();
990 }
991 SmallVector<Type *, 4> ScalarTys;
992 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
993 Type *Ty = Tys[i];
994 if (Ty->isVectorTy()) {
995 if (ScalarizationCostPassed == std::numeric_limits<unsigned>::max())
996 ScalarizationCost += getScalarizationOverhead(Ty, false, true);
997 ScalarCalls = std::max(ScalarCalls, Ty->getVectorNumElements());
998 Ty = Ty->getScalarType();
999 }
1000 ScalarTys.push_back(Ty);
1001 }
1002 if (ScalarCalls == 1)
1003 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
1004
1005 unsigned ScalarCost = static_cast<T *>(this)->getIntrinsicInstrCost(
1006 IID, ScalarRetTy, ScalarTys, FMF);
1007
1008 return ScalarCalls * ScalarCost + ScalarizationCost;
1009 }
1010 // Look for intrinsics that can be lowered directly or turned into a scalar
1011 // intrinsic call.
1012 case Intrinsic::sqrt:
1013 ISDs.push_back(ISD::FSQRT);
1014 break;
1015 case Intrinsic::sin:
1016 ISDs.push_back(ISD::FSIN);
1017 break;
1018 case Intrinsic::cos:
1019 ISDs.push_back(ISD::FCOS);
1020 break;
1021 case Intrinsic::exp:
1022 ISDs.push_back(ISD::FEXP);
1023 break;
1024 case Intrinsic::exp2:
1025 ISDs.push_back(ISD::FEXP2);
1026 break;
1027 case Intrinsic::log:
1028 ISDs.push_back(ISD::FLOG);
1029 break;
1030 case Intrinsic::log10:
1031 ISDs.push_back(ISD::FLOG10);
1032 break;
1033 case Intrinsic::log2:
1034 ISDs.push_back(ISD::FLOG2);
1035 break;
1036 case Intrinsic::fabs:
1037 ISDs.push_back(ISD::FABS);
1038 break;
1039 case Intrinsic::minnum:
1040 ISDs.push_back(ISD::FMINNUM);
1041 if (FMF.noNaNs())
1042 ISDs.push_back(ISD::FMINNAN);
1043 break;
1044 case Intrinsic::maxnum:
1045 ISDs.push_back(ISD::FMAXNUM);
1046 if (FMF.noNaNs())
1047 ISDs.push_back(ISD::FMAXNAN);
1048 break;
1049 case Intrinsic::copysign:
1050 ISDs.push_back(ISD::FCOPYSIGN);
1051 break;
1052 case Intrinsic::floor:
1053 ISDs.push_back(ISD::FFLOOR);
1054 break;
1055 case Intrinsic::ceil:
1056 ISDs.push_back(ISD::FCEIL);
1057 break;
1058 case Intrinsic::trunc:
1059 ISDs.push_back(ISD::FTRUNC);
1060 break;
1061 case Intrinsic::nearbyint:
1062 ISDs.push_back(ISD::FNEARBYINT);
1063 break;
1064 case Intrinsic::rint:
1065 ISDs.push_back(ISD::FRINT);
1066 break;
1067 case Intrinsic::round:
1068 ISDs.push_back(ISD::FROUND);
1069 break;
1070 case Intrinsic::pow:
1071 ISDs.push_back(ISD::FPOW);
1072 break;
1073 case Intrinsic::fma:
1074 ISDs.push_back(ISD::FMA);
1075 break;
1076 case Intrinsic::fmuladd:
1077 ISDs.push_back(ISD::FMA);
1078 break;
1079 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
1080 case Intrinsic::lifetime_start:
1081 case Intrinsic::lifetime_end:
1082 case Intrinsic::sideeffect:
1083 return 0;
1084 case Intrinsic::masked_store:
1085 return static_cast<T *>(this)
1086 ->getMaskedMemoryOpCost(Instruction::Store, Tys[0], 0, 0);
1087 case Intrinsic::masked_load:
1088 return static_cast<T *>(this)
1089 ->getMaskedMemoryOpCost(Instruction::Load, RetTy, 0, 0);
1090 case Intrinsic::experimental_vector_reduce_add:
1091 return static_cast<T *>(this)->getArithmeticReductionCost(
1092 Instruction::Add, Tys[0], /*IsPairwiseForm=*/false);
1093 case Intrinsic::experimental_vector_reduce_mul:
1094 return static_cast<T *>(this)->getArithmeticReductionCost(
1095 Instruction::Mul, Tys[0], /*IsPairwiseForm=*/false);
1096 case Intrinsic::experimental_vector_reduce_and:
1097 return static_cast<T *>(this)->getArithmeticReductionCost(
1098 Instruction::And, Tys[0], /*IsPairwiseForm=*/false);
1099 case Intrinsic::experimental_vector_reduce_or:
1100 return static_cast<T *>(this)->getArithmeticReductionCost(
1101 Instruction::Or, Tys[0], /*IsPairwiseForm=*/false);
1102 case Intrinsic::experimental_vector_reduce_xor:
1103 return static_cast<T *>(this)->getArithmeticReductionCost(
1104 Instruction::Xor, Tys[0], /*IsPairwiseForm=*/false);
1105 case Intrinsic::experimental_vector_reduce_fadd:
1106 return static_cast<T *>(this)->getArithmeticReductionCost(
1107 Instruction::FAdd, Tys[0], /*IsPairwiseForm=*/false);
1108 case Intrinsic::experimental_vector_reduce_fmul:
1109 return static_cast<T *>(this)->getArithmeticReductionCost(
1110 Instruction::FMul, Tys[0], /*IsPairwiseForm=*/false);
1111 case Intrinsic::experimental_vector_reduce_smax:
1112 case Intrinsic::experimental_vector_reduce_smin:
1113 case Intrinsic::experimental_vector_reduce_fmax:
1114 case Intrinsic::experimental_vector_reduce_fmin:
1115 return static_cast<T *>(this)->getMinMaxReductionCost(
1116 Tys[0], CmpInst::makeCmpResultType(Tys[0]), /*IsPairwiseForm=*/false,
1117 /*IsSigned=*/true);
1118 case Intrinsic::experimental_vector_reduce_umax:
1119 case Intrinsic::experimental_vector_reduce_umin:
1120 return static_cast<T *>(this)->getMinMaxReductionCost(
1121 Tys[0], CmpInst::makeCmpResultType(Tys[0]), /*IsPairwiseForm=*/false,
1122 /*IsSigned=*/false);
1123 case Intrinsic::ctpop:
1124 ISDs.push_back(ISD::CTPOP);
1125 // In case of legalization use TCC_Expensive. This is cheaper than a
1126 // library call but still not a cheap instruction.
1127 SingleCallCost = TargetTransformInfo::TCC_Expensive;
1128 break;
1129 // FIXME: ctlz, cttz, ...
1130 }
1131
1132 const TargetLoweringBase *TLI = getTLI();
1133 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(DL, RetTy);
1134
1135 SmallVector<unsigned, 2> LegalCost;
1136 SmallVector<unsigned, 2> CustomCost;
1137 for (unsigned ISD : ISDs) {
1138 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
1139 if (IID == Intrinsic::fabs && TLI->isFAbsFree(LT.second)) {
1140 return 0;
1141 }
1142
1143 // The operation is legal. Assume it costs 1.
1144 // If the type is split to multiple registers, assume that there is some
1145 // overhead to this.
1146 // TODO: Once we have extract/insert subvector cost we need to use them.
1147 if (LT.first > 1)
1148 LegalCost.push_back(LT.first * 2);
1149 else
1150 LegalCost.push_back(LT.first * 1);
1151 } else if (!TLI->isOperationExpand(ISD, LT.second)) {
1152 // If the operation is custom lowered then assume
1153 // that the code is twice as expensive.
1154 CustomCost.push_back(LT.first * 2);
1155 }
1156 }
1157
1158 auto MinLegalCostI = std::min_element(LegalCost.begin(), LegalCost.end());
1159 if (MinLegalCostI != LegalCost.end())
1160 return *MinLegalCostI;
1161
1162 auto MinCustomCostI = std::min_element(CustomCost.begin(), CustomCost.end());
1163 if (MinCustomCostI != CustomCost.end())
1164 return *MinCustomCostI;
1165
1166 // If we can't lower fmuladd into an FMA estimate the cost as a floating
1167 // point mul followed by an add.
1168 if (IID == Intrinsic::fmuladd)
1169 return static_cast<T *>(this)
1170 ->getArithmeticInstrCost(BinaryOperator::FMul, RetTy) +
1171 static_cast<T *>(this)
1172 ->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy);
1173
1174 // Else, assume that we need to scalarize this intrinsic. For math builtins
1175 // this will emit a costly libcall, adding call overhead and spills. Make it
1176 // very expensive.
1177 if (RetTy->isVectorTy()) {
1178 unsigned ScalarizationCost =
1179 ((ScalarizationCostPassed != std::numeric_limits<unsigned>::max())
1180 ? ScalarizationCostPassed
1181 : getScalarizationOverhead(RetTy, true, false));
1182 unsigned ScalarCalls = RetTy->getVectorNumElements();
1183 SmallVector<Type *, 4> ScalarTys;
1184 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
1185 Type *Ty = Tys[i];
1186 if (Ty->isVectorTy())
1187 Ty = Ty->getScalarType();
1188 ScalarTys.push_back(Ty);
1189 }
1190 unsigned ScalarCost = static_cast<T *>(this)->getIntrinsicInstrCost(
1191 IID, RetTy->getScalarType(), ScalarTys, FMF);
1192 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
1193 if (Tys[i]->isVectorTy()) {
1194 if (ScalarizationCostPassed == std::numeric_limits<unsigned>::max())
1195 ScalarizationCost += getScalarizationOverhead(Tys[i], false, true);
1196 ScalarCalls = std::max(ScalarCalls, Tys[i]->getVectorNumElements());
1197 }
1198 }
1199
1200 return ScalarCalls * ScalarCost + ScalarizationCost;
1201 }
1202
1203 // This is going to be turned into a library call, make it expensive.
1204 return SingleCallCost;
1205 }
1206
1207 /// Compute a cost of the given call instruction.
1208 ///
1209 /// Compute the cost of calling function F with return type RetTy and
1210 /// argument types Tys. F might be nullptr, in this case the cost of an
1211 /// arbitrary call with the specified signature will be returned.
1212 /// This is used, for instance, when we estimate call of a vector
1213 /// counterpart of the given function.
1214 /// \param F Called function, might be nullptr.
1215 /// \param RetTy Return value types.
1216 /// \param Tys Argument types.
1217 /// \returns The cost of Call instruction.
1218 unsigned getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type *> Tys) {
1219 return 10;
1220 }
1221
1222 unsigned getNumberOfParts(Type *Tp) {
1223 std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(DL, Tp);
1224 return LT.first;
1225 }
1226
1227 unsigned getAddressComputationCost(Type *Ty, ScalarEvolution *,
1228 const SCEV *) {
1229 return 0;
1230 }
1231
1232 /// Try to calculate arithmetic and shuffle op costs for reduction operations.
1233 /// We're assuming that reduction operation are performing the following way:
1234 /// 1. Non-pairwise reduction
1235 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
1236 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
1237 /// \----------------v-------------/ \----------v------------/
1238 /// n/2 elements n/2 elements
1239 /// %red1 = op <n x t> %val, <n x t> val1
1240 /// After this operation we have a vector %red1 where only the first n/2
1241 /// elements are meaningful, the second n/2 elements are undefined and can be
1242 /// dropped. All other operations are actually working with the vector of
1243 /// length n/2, not n, though the real vector length is still n.
1244 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
1245 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
1246 /// \----------------v-------------/ \----------v------------/
1247 /// n/4 elements 3*n/4 elements
1248 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
1249 /// length n/2, the resulting vector has length n/4 etc.
1250 /// 2. Pairwise reduction:
1251 /// Everything is the same except for an additional shuffle operation which
1252 /// is used to produce operands for pairwise kind of reductions.
1253 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
1254 /// <n x i32> <i32 0, i32 2, ..., i32 n-2, i32 undef, ..., i32 undef>
1255 /// \-------------v----------/ \----------v------------/
1256 /// n/2 elements n/2 elements
1257 /// %val2 = shufflevector<n x t> %val, <n x t> %undef,
1258 /// <n x i32> <i32 1, i32 3, ..., i32 n-1, i32 undef, ..., i32 undef>
1259 /// \-------------v----------/ \----------v------------/
1260 /// n/2 elements n/2 elements
1261 /// %red1 = op <n x t> %val1, <n x t> val2
1262 /// Again, the operation is performed on <n x t> vector, but the resulting
1263 /// vector %red1 is <n/2 x t> vector.
1264 ///
1265 /// The cost model should take into account that the actual length of the
1266 /// vector is reduced on each iteration.
1267 unsigned getArithmeticReductionCost(unsigned Opcode, Type *Ty,
1268 bool IsPairwise) {
1269 assert(Ty->isVectorTy() && "Expect a vector type")(static_cast <bool> (Ty->isVectorTy() && "Expect a vector type"
) ? void (0) : __assert_fail ("Ty->isVectorTy() && \"Expect a vector type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 1269, __extension__ __PRETTY_FUNCTION__))
;
1270 Type *ScalarTy = Ty->getVectorElementType();
1271 unsigned NumVecElts = Ty->getVectorNumElements();
1272 unsigned NumReduxLevels = Log2_32(NumVecElts);
1273 unsigned ArithCost = 0;
1274 unsigned ShuffleCost = 0;
1275 auto *ConcreteTTI = static_cast<T *>(this);
1276 std::pair<unsigned, MVT> LT =
1277 ConcreteTTI->getTLI()->getTypeLegalizationCost(DL, Ty);
1278 unsigned LongVectorCount = 0;
1279 unsigned MVTLen =
1280 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
1281 while (NumVecElts > MVTLen) {
1282 NumVecElts /= 2;
1283 // Assume the pairwise shuffles add a cost.
1284 ShuffleCost += (IsPairwise + 1) *
1285 ConcreteTTI->getShuffleCost(TTI::SK_ExtractSubvector, Ty,
1286 NumVecElts, Ty);
1287 ArithCost += ConcreteTTI->getArithmeticInstrCost(Opcode, Ty);
1288 Ty = VectorType::get(ScalarTy, NumVecElts);
1289 ++LongVectorCount;
1290 }
1291 // The minimal length of the vector is limited by the real length of vector
1292 // operations performed on the current platform. That's why several final
1293 // reduction operations are performed on the vectors with the same
1294 // architecture-dependent length.
1295 ShuffleCost += (NumReduxLevels - LongVectorCount) * (IsPairwise + 1) *
1296 ConcreteTTI->getShuffleCost(TTI::SK_ExtractSubvector, Ty,
1297 NumVecElts, Ty);
1298 ArithCost += (NumReduxLevels - LongVectorCount) *
1299 ConcreteTTI->getArithmeticInstrCost(Opcode, Ty);
1300 return ShuffleCost + ArithCost + getScalarizationOverhead(Ty, false, true);
1301 }
1302
1303 /// Try to calculate op costs for min/max reduction operations.
1304 /// \param CondTy Conditional type for the Select instruction.
1305 unsigned getMinMaxReductionCost(Type *Ty, Type *CondTy, bool IsPairwise,
1306 bool) {
1307 assert(Ty->isVectorTy() && "Expect a vector type")(static_cast <bool> (Ty->isVectorTy() && "Expect a vector type"
) ? void (0) : __assert_fail ("Ty->isVectorTy() && \"Expect a vector type\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 1307, __extension__ __PRETTY_FUNCTION__))
;
1308 Type *ScalarTy = Ty->getVectorElementType();
1309 Type *ScalarCondTy = CondTy->getVectorElementType();
1310 unsigned NumVecElts = Ty->getVectorNumElements();
1311 unsigned NumReduxLevels = Log2_32(NumVecElts);
1312 unsigned CmpOpcode;
1313 if (Ty->isFPOrFPVectorTy()) {
1314 CmpOpcode = Instruction::FCmp;
1315 } else {
1316 assert(Ty->isIntOrIntVectorTy() &&(static_cast <bool> (Ty->isIntOrIntVectorTy() &&
"expecting floating point or integer type for min/max reduction"
) ? void (0) : __assert_fail ("Ty->isIntOrIntVectorTy() && \"expecting floating point or integer type for min/max reduction\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 1317, __extension__ __PRETTY_FUNCTION__))
1317 "expecting floating point or integer type for min/max reduction")(static_cast <bool> (Ty->isIntOrIntVectorTy() &&
"expecting floating point or integer type for min/max reduction"
) ? void (0) : __assert_fail ("Ty->isIntOrIntVectorTy() && \"expecting floating point or integer type for min/max reduction\""
, "/build/llvm-toolchain-snapshot-7~svn338205/include/llvm/CodeGen/BasicTTIImpl.h"
, 1317, __extension__ __PRETTY_FUNCTION__))
;
1318 CmpOpcode = Instruction::ICmp;
1319 }
1320 unsigned MinMaxCost = 0;
1321 unsigned ShuffleCost = 0;
1322 auto *ConcreteTTI = static_cast<T *>(this);
1323 std::pair<unsigned, MVT> LT =
1324 ConcreteTTI->getTLI()->getTypeLegalizationCost(DL, Ty);
1325 unsigned LongVectorCount = 0;
1326 unsigned MVTLen =
1327 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
1328 while (NumVecElts > MVTLen) {
1329 NumVecElts /= 2;
1330 // Assume the pairwise shuffles add a cost.
1331 ShuffleCost += (IsPairwise + 1) *
1332 ConcreteTTI->getShuffleCost(TTI::SK_ExtractSubvector, Ty,
1333 NumVecElts, Ty);
1334 MinMaxCost +=
1335 ConcreteTTI->getCmpSelInstrCost(CmpOpcode, Ty, CondTy, nullptr) +
1336 ConcreteTTI->getCmpSelInstrCost(Instruction::Select, Ty, CondTy,
1337 nullptr);
1338 Ty = VectorType::get(ScalarTy, NumVecElts);
1339 CondTy = VectorType::get(ScalarCondTy, NumVecElts);
1340 ++LongVectorCount;
1341 }
1342 // The minimal length of the vector is limited by the real length of vector
1343 // operations performed on the current platform. That's why several final
1344 // reduction opertions are perfomed on the vectors with the same
1345 // architecture-dependent length.
1346 ShuffleCost += (NumReduxLevels - LongVectorCount) * (IsPairwise + 1) *
1347 ConcreteTTI->getShuffleCost(TTI::SK_ExtractSubvector, Ty,
1348 NumVecElts, Ty);
1349 MinMaxCost +=
1350 (NumReduxLevels - LongVectorCount) *
1351 (ConcreteTTI->getCmpSelInstrCost(CmpOpcode, Ty, CondTy, nullptr) +
1352 ConcreteTTI->getCmpSelInstrCost(Instruction::Select, Ty, CondTy,
1353 nullptr));
1354 // Need 3 extractelement instructions for scalarization + an additional
1355 // scalar select instruction.
1356 return ShuffleCost + MinMaxCost +
1357 3 * getScalarizationOverhead(Ty, /*Insert=*/false,
1358 /*Extract=*/true) +
1359 ConcreteTTI->getCmpSelInstrCost(Instruction::Select, ScalarTy,
1360 ScalarCondTy, nullptr);
1361 }
1362
1363 unsigned getVectorSplitCost() { return 1; }
1364
1365 /// @}
1366};
1367
1368/// Concrete BasicTTIImpl that can be used if no further customization
1369/// is needed.
1370class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
1371 using BaseT = BasicTTIImplBase<BasicTTIImpl>;
1372
1373 friend class BasicTTIImplBase<BasicTTIImpl>;
1374
1375 const TargetSubtargetInfo *ST;
1376 const TargetLoweringBase *TLI;
1377
1378 const TargetSubtargetInfo *getST() const { return ST; }
1379 const TargetLoweringBase *getTLI() const { return TLI; }
1380
1381public:
1382 explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
1383};
1384
1385} // end namespace llvm
1386
1387#endif // LLVM_CODEGEN_BASICTTIIMPL_H