Bug Summary

File:build-llvm/lib/Target/X86/X86GenAsmMatcher.inc
Warning:line 6911, column 10
Excessive padding in 'struct (anonymous namespace)::MatchEntry' (5 padding bytes, where 1 is optimal). Optimal fields order: RequiredFeatures, Mnemonic, Opcode, ConvertFn, Classes, consider reordering the fields or adding explicit padding members

Annotated Source Code

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1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9
10#ifdef GET_ASSEMBLER_HEADER
11#undef GET_ASSEMBLER_HEADER
12 // This should be included into the middle of the declaration of
13 // your subclasses implementation of MCTargetAsmParser.
14 uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
15 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16 const OperandVector &Operands);
17 void convertToMapAndConstraints(unsigned Kind,
18 const OperandVector &Operands) override;
19 unsigned MatchInstructionImpl(const OperandVector &Operands,
20 MCInst &Inst,
21 uint64_t &ErrorInfo,
22 bool matchingInlineAsm,
23 unsigned VariantID = 0);
24#endif // GET_ASSEMBLER_HEADER_INFO
25
26
27#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
28#undef GET_OPERAND_DIAGNOSTIC_TYPES
29
30#endif // GET_OPERAND_DIAGNOSTIC_TYPES
31
32
33#ifdef GET_REGISTER_MATCHER
34#undef GET_REGISTER_MATCHER
35
36// Flags for subtarget features that participate in instruction matching.
37enum SubtargetFeatureFlag : uint32_t {
38 Feature_HasAVX512 = (1ULL << 0),
39 Feature_HasCDI = (1ULL << 3),
40 Feature_HasVPOPCNTDQ = (1ULL << 12),
41 Feature_HasPFI = (1ULL << 7),
42 Feature_HasERI = (1ULL << 5),
43 Feature_HasDQI = (1ULL << 4),
44 Feature_HasBWI = (1ULL << 2),
45 Feature_HasVLX = (1ULL << 10),
46 Feature_HasVNNI = (1ULL << 11),
47 Feature_HasBITALG = (1ULL << 1),
48 Feature_HasVBMI = (1ULL << 8),
49 Feature_HasVBMI2 = (1ULL << 9),
50 Feature_HasIFMA = (1ULL << 6),
51 Feature_Not64BitMode = (1ULL << 17),
52 Feature_In64BitMode = (1ULL << 15),
53 Feature_In16BitMode = (1ULL << 13),
54 Feature_Not16BitMode = (1ULL << 16),
55 Feature_In32BitMode = (1ULL << 14),
56 Feature_None = 0
57};
58
59static unsigned MatchRegisterName(StringRef Name) {
60 switch (Name.size()) {
61 default: break;
62 case 2: // 33 strings to match.
63 switch (Name[0]) {
64 default: break;
65 case 'a': // 3 strings to match.
66 switch (Name[1]) {
67 default: break;
68 case 'h': // 1 string to match.
69 return 1; // "ah"
70 case 'l': // 1 string to match.
71 return 2; // "al"
72 case 'x': // 1 string to match.
73 return 3; // "ax"
74 }
75 break;
76 case 'b': // 4 strings to match.
77 switch (Name[1]) {
78 default: break;
79 case 'h': // 1 string to match.
80 return 4; // "bh"
81 case 'l': // 1 string to match.
82 return 5; // "bl"
83 case 'p': // 1 string to match.
84 return 6; // "bp"
85 case 'x': // 1 string to match.
86 return 8; // "bx"
87 }
88 break;
89 case 'c': // 4 strings to match.
90 switch (Name[1]) {
91 default: break;
92 case 'h': // 1 string to match.
93 return 9; // "ch"
94 case 'l': // 1 string to match.
95 return 10; // "cl"
96 case 's': // 1 string to match.
97 return 11; // "cs"
98 case 'x': // 1 string to match.
99 return 12; // "cx"
100 }
101 break;
102 case 'd': // 5 strings to match.
103 switch (Name[1]) {
104 default: break;
105 case 'h': // 1 string to match.
106 return 13; // "dh"
107 case 'i': // 1 string to match.
108 return 14; // "di"
109 case 'l': // 1 string to match.
110 return 16; // "dl"
111 case 's': // 1 string to match.
112 return 17; // "ds"
113 case 'x': // 1 string to match.
114 return 18; // "dx"
115 }
116 break;
117 case 'e': // 1 string to match.
118 if (Name[1] != 's')
119 break;
120 return 28; // "es"
121 case 'f': // 1 string to match.
122 if (Name[1] != 's')
123 break;
124 return 32; // "fs"
125 case 'g': // 1 string to match.
126 if (Name[1] != 's')
127 break;
128 return 33; // "gs"
129 case 'i': // 1 string to match.
130 if (Name[1] != 'p')
131 break;
132 return 34; // "ip"
133 case 'k': // 8 strings to match.
134 switch (Name[1]) {
135 default: break;
136 case '0': // 1 string to match.
137 return 95; // "k0"
138 case '1': // 1 string to match.
139 return 96; // "k1"
140 case '2': // 1 string to match.
141 return 97; // "k2"
142 case '3': // 1 string to match.
143 return 98; // "k3"
144 case '4': // 1 string to match.
145 return 99; // "k4"
146 case '5': // 1 string to match.
147 return 100; // "k5"
148 case '6': // 1 string to match.
149 return 101; // "k6"
150 case '7': // 1 string to match.
151 return 102; // "k7"
152 }
153 break;
154 case 'r': // 2 strings to match.
155 switch (Name[1]) {
156 default: break;
157 case '8': // 1 string to match.
158 return 111; // "r8"
159 case '9': // 1 string to match.
160 return 112; // "r9"
161 }
162 break;
163 case 's': // 3 strings to match.
164 switch (Name[1]) {
165 default: break;
166 case 'i': // 1 string to match.
167 return 45; // "si"
168 case 'p': // 1 string to match.
169 return 47; // "sp"
170 case 's': // 1 string to match.
171 return 49; // "ss"
172 }
173 break;
174 }
175 break;
176 case 3: // 73 strings to match.
177 switch (Name[0]) {
178 default: break;
179 case 'b': // 1 string to match.
180 if (memcmp(Name.data()+1, "pl", 2) != 0)
181 break;
182 return 7; // "bpl"
183 case 'c': // 10 strings to match.
184 if (Name[1] != 'r')
185 break;
186 switch (Name[2]) {
187 default: break;
188 case '0': // 1 string to match.
189 return 55; // "cr0"
190 case '1': // 1 string to match.
191 return 56; // "cr1"
192 case '2': // 1 string to match.
193 return 57; // "cr2"
194 case '3': // 1 string to match.
195 return 58; // "cr3"
196 case '4': // 1 string to match.
197 return 59; // "cr4"
198 case '5': // 1 string to match.
199 return 60; // "cr5"
200 case '6': // 1 string to match.
201 return 61; // "cr6"
202 case '7': // 1 string to match.
203 return 62; // "cr7"
204 case '8': // 1 string to match.
205 return 63; // "cr8"
206 case '9': // 1 string to match.
207 return 64; // "cr9"
208 }
209 break;
210 case 'd': // 11 strings to match.
211 switch (Name[1]) {
212 default: break;
213 case 'i': // 1 string to match.
214 if (Name[2] != 'l')
215 break;
216 return 15; // "dil"
217 case 'r': // 10 strings to match.
218 switch (Name[2]) {
219 default: break;
220 case '0': // 1 string to match.
221 return 71; // "dr0"
222 case '1': // 1 string to match.
223 return 72; // "dr1"
224 case '2': // 1 string to match.
225 return 73; // "dr2"
226 case '3': // 1 string to match.
227 return 74; // "dr3"
228 case '4': // 1 string to match.
229 return 75; // "dr4"
230 case '5': // 1 string to match.
231 return 76; // "dr5"
232 case '6': // 1 string to match.
233 return 77; // "dr6"
234 case '7': // 1 string to match.
235 return 78; // "dr7"
236 case '8': // 1 string to match.
237 return 79; // "dr8"
238 case '9': // 1 string to match.
239 return 80; // "dr9"
240 }
241 break;
242 }
243 break;
244 case 'e': // 10 strings to match.
245 switch (Name[1]) {
246 default: break;
247 case 'a': // 1 string to match.
248 if (Name[2] != 'x')
249 break;
250 return 19; // "eax"
251 case 'b': // 2 strings to match.
252 switch (Name[2]) {
253 default: break;
254 case 'p': // 1 string to match.
255 return 20; // "ebp"
256 case 'x': // 1 string to match.
257 return 21; // "ebx"
258 }
259 break;
260 case 'c': // 1 string to match.
261 if (Name[2] != 'x')
262 break;
263 return 22; // "ecx"
264 case 'd': // 2 strings to match.
265 switch (Name[2]) {
266 default: break;
267 case 'i': // 1 string to match.
268 return 23; // "edi"
269 case 'x': // 1 string to match.
270 return 24; // "edx"
271 }
272 break;
273 case 'i': // 2 strings to match.
274 switch (Name[2]) {
275 default: break;
276 case 'p': // 1 string to match.
277 return 26; // "eip"
278 case 'z': // 1 string to match.
279 return 27; // "eiz"
280 }
281 break;
282 case 's': // 2 strings to match.
283 switch (Name[2]) {
284 default: break;
285 case 'i': // 1 string to match.
286 return 29; // "esi"
287 case 'p': // 1 string to match.
288 return 30; // "esp"
289 }
290 break;
291 }
292 break;
293 case 'f': // 8 strings to match.
294 if (Name[1] != 'p')
295 break;
296 switch (Name[2]) {
297 default: break;
298 case '0': // 1 string to match.
299 return 87; // "fp0"
300 case '1': // 1 string to match.
301 return 88; // "fp1"
302 case '2': // 1 string to match.
303 return 89; // "fp2"
304 case '3': // 1 string to match.
305 return 90; // "fp3"
306 case '4': // 1 string to match.
307 return 91; // "fp4"
308 case '5': // 1 string to match.
309 return 92; // "fp5"
310 case '6': // 1 string to match.
311 return 93; // "fp6"
312 case '7': // 1 string to match.
313 return 94; // "fp7"
314 }
315 break;
316 case 'm': // 8 strings to match.
317 if (Name[1] != 'm')
318 break;
319 switch (Name[2]) {
320 default: break;
321 case '0': // 1 string to match.
322 return 103; // "mm0"
323 case '1': // 1 string to match.
324 return 104; // "mm1"
325 case '2': // 1 string to match.
326 return 105; // "mm2"
327 case '3': // 1 string to match.
328 return 106; // "mm3"
329 case '4': // 1 string to match.
330 return 107; // "mm4"
331 case '5': // 1 string to match.
332 return 108; // "mm5"
333 case '6': // 1 string to match.
334 return 109; // "mm6"
335 case '7': // 1 string to match.
336 return 110; // "mm7"
337 }
338 break;
339 case 'r': // 22 strings to match.
340 switch (Name[1]) {
341 default: break;
342 case '1': // 6 strings to match.
343 switch (Name[2]) {
344 default: break;
345 case '0': // 1 string to match.
346 return 113; // "r10"
347 case '1': // 1 string to match.
348 return 114; // "r11"
349 case '2': // 1 string to match.
350 return 115; // "r12"
351 case '3': // 1 string to match.
352 return 116; // "r13"
353 case '4': // 1 string to match.
354 return 117; // "r14"
355 case '5': // 1 string to match.
356 return 118; // "r15"
357 }
358 break;
359 case '8': // 3 strings to match.
360 switch (Name[2]) {
361 default: break;
362 case 'b': // 1 string to match.
363 return 223; // "r8b"
364 case 'd': // 1 string to match.
365 return 231; // "r8d"
366 case 'w': // 1 string to match.
367 return 239; // "r8w"
368 }
369 break;
370 case '9': // 3 strings to match.
371 switch (Name[2]) {
372 default: break;
373 case 'b': // 1 string to match.
374 return 224; // "r9b"
375 case 'd': // 1 string to match.
376 return 232; // "r9d"
377 case 'w': // 1 string to match.
378 return 240; // "r9w"
379 }
380 break;
381 case 'a': // 1 string to match.
382 if (Name[2] != 'x')
383 break;
384 return 35; // "rax"
385 case 'b': // 2 strings to match.
386 switch (Name[2]) {
387 default: break;
388 case 'p': // 1 string to match.
389 return 36; // "rbp"
390 case 'x': // 1 string to match.
391 return 37; // "rbx"
392 }
393 break;
394 case 'c': // 1 string to match.
395 if (Name[2] != 'x')
396 break;
397 return 38; // "rcx"
398 case 'd': // 2 strings to match.
399 switch (Name[2]) {
400 default: break;
401 case 'i': // 1 string to match.
402 return 39; // "rdi"
403 case 'x': // 1 string to match.
404 return 40; // "rdx"
405 }
406 break;
407 case 'i': // 2 strings to match.
408 switch (Name[2]) {
409 default: break;
410 case 'p': // 1 string to match.
411 return 41; // "rip"
412 case 'z': // 1 string to match.
413 return 42; // "riz"
414 }
415 break;
416 case 's': // 2 strings to match.
417 switch (Name[2]) {
418 default: break;
419 case 'i': // 1 string to match.
420 return 43; // "rsi"
421 case 'p': // 1 string to match.
422 return 44; // "rsp"
423 }
424 break;
425 }
426 break;
427 case 's': // 3 strings to match.
428 switch (Name[1]) {
429 default: break;
430 case 'i': // 1 string to match.
431 if (Name[2] != 'l')
432 break;
433 return 46; // "sil"
434 case 'p': // 1 string to match.
435 if (Name[2] != 'l')
436 break;
437 return 48; // "spl"
438 case 's': // 1 string to match.
439 if (Name[2] != 'p')
440 break;
441 return 50; // "ssp"
442 }
443 break;
444 }
445 break;
446 case 4: // 65 strings to match.
447 switch (Name[0]) {
448 default: break;
449 case 'b': // 4 strings to match.
450 if (memcmp(Name.data()+1, "nd", 2) != 0)
451 break;
452 switch (Name[3]) {
453 default: break;
454 case '0': // 1 string to match.
455 return 51; // "bnd0"
456 case '1': // 1 string to match.
457 return 52; // "bnd1"
458 case '2': // 1 string to match.
459 return 53; // "bnd2"
460 case '3': // 1 string to match.
461 return 54; // "bnd3"
462 }
463 break;
464 case 'c': // 6 strings to match.
465 if (memcmp(Name.data()+1, "r1", 2) != 0)
466 break;
467 switch (Name[3]) {
468 default: break;
469 case '0': // 1 string to match.
470 return 65; // "cr10"
471 case '1': // 1 string to match.
472 return 66; // "cr11"
473 case '2': // 1 string to match.
474 return 67; // "cr12"
475 case '3': // 1 string to match.
476 return 68; // "cr13"
477 case '4': // 1 string to match.
478 return 69; // "cr14"
479 case '5': // 1 string to match.
480 return 70; // "cr15"
481 }
482 break;
483 case 'd': // 6 strings to match.
484 if (memcmp(Name.data()+1, "r1", 2) != 0)
485 break;
486 switch (Name[3]) {
487 default: break;
488 case '0': // 1 string to match.
489 return 81; // "dr10"
490 case '1': // 1 string to match.
491 return 82; // "dr11"
492 case '2': // 1 string to match.
493 return 83; // "dr12"
494 case '3': // 1 string to match.
495 return 84; // "dr13"
496 case '4': // 1 string to match.
497 return 85; // "dr14"
498 case '5': // 1 string to match.
499 return 86; // "dr15"
500 }
501 break;
502 case 'f': // 1 string to match.
503 if (memcmp(Name.data()+1, "psw", 3) != 0)
504 break;
505 return 31; // "fpsw"
506 case 'r': // 18 strings to match.
507 if (Name[1] != '1')
508 break;
509 switch (Name[2]) {
510 default: break;
511 case '0': // 3 strings to match.
512 switch (Name[3]) {
513 default: break;
514 case 'b': // 1 string to match.
515 return 225; // "r10b"
516 case 'd': // 1 string to match.
517 return 233; // "r10d"
518 case 'w': // 1 string to match.
519 return 241; // "r10w"
520 }
521 break;
522 case '1': // 3 strings to match.
523 switch (Name[3]) {
524 default: break;
525 case 'b': // 1 string to match.
526 return 226; // "r11b"
527 case 'd': // 1 string to match.
528 return 234; // "r11d"
529 case 'w': // 1 string to match.
530 return 242; // "r11w"
531 }
532 break;
533 case '2': // 3 strings to match.
534 switch (Name[3]) {
535 default: break;
536 case 'b': // 1 string to match.
537 return 227; // "r12b"
538 case 'd': // 1 string to match.
539 return 235; // "r12d"
540 case 'w': // 1 string to match.
541 return 243; // "r12w"
542 }
543 break;
544 case '3': // 3 strings to match.
545 switch (Name[3]) {
546 default: break;
547 case 'b': // 1 string to match.
548 return 228; // "r13b"
549 case 'd': // 1 string to match.
550 return 236; // "r13d"
551 case 'w': // 1 string to match.
552 return 244; // "r13w"
553 }
554 break;
555 case '4': // 3 strings to match.
556 switch (Name[3]) {
557 default: break;
558 case 'b': // 1 string to match.
559 return 229; // "r14b"
560 case 'd': // 1 string to match.
561 return 237; // "r14d"
562 case 'w': // 1 string to match.
563 return 245; // "r14w"
564 }
565 break;
566 case '5': // 3 strings to match.
567 switch (Name[3]) {
568 default: break;
569 case 'b': // 1 string to match.
570 return 230; // "r15b"
571 case 'd': // 1 string to match.
572 return 238; // "r15d"
573 case 'w': // 1 string to match.
574 return 246; // "r15w"
575 }
576 break;
577 }
578 break;
579 case 'x': // 10 strings to match.
580 if (memcmp(Name.data()+1, "mm", 2) != 0)
581 break;
582 switch (Name[3]) {
583 default: break;
584 case '0': // 1 string to match.
585 return 127; // "xmm0"
586 case '1': // 1 string to match.
587 return 128; // "xmm1"
588 case '2': // 1 string to match.
589 return 129; // "xmm2"
590 case '3': // 1 string to match.
591 return 130; // "xmm3"
592 case '4': // 1 string to match.
593 return 131; // "xmm4"
594 case '5': // 1 string to match.
595 return 132; // "xmm5"
596 case '6': // 1 string to match.
597 return 133; // "xmm6"
598 case '7': // 1 string to match.
599 return 134; // "xmm7"
600 case '8': // 1 string to match.
601 return 135; // "xmm8"
602 case '9': // 1 string to match.
603 return 136; // "xmm9"
604 }
605 break;
606 case 'y': // 10 strings to match.
607 if (memcmp(Name.data()+1, "mm", 2) != 0)
608 break;
609 switch (Name[3]) {
610 default: break;
611 case '0': // 1 string to match.
612 return 159; // "ymm0"
613 case '1': // 1 string to match.
614 return 160; // "ymm1"
615 case '2': // 1 string to match.
616 return 161; // "ymm2"
617 case '3': // 1 string to match.
618 return 162; // "ymm3"
619 case '4': // 1 string to match.
620 return 163; // "ymm4"
621 case '5': // 1 string to match.
622 return 164; // "ymm5"
623 case '6': // 1 string to match.
624 return 165; // "ymm6"
625 case '7': // 1 string to match.
626 return 166; // "ymm7"
627 case '8': // 1 string to match.
628 return 167; // "ymm8"
629 case '9': // 1 string to match.
630 return 168; // "ymm9"
631 }
632 break;
633 case 'z': // 10 strings to match.
634 if (memcmp(Name.data()+1, "mm", 2) != 0)
635 break;
636 switch (Name[3]) {
637 default: break;
638 case '0': // 1 string to match.
639 return 191; // "zmm0"
640 case '1': // 1 string to match.
641 return 192; // "zmm1"
642 case '2': // 1 string to match.
643 return 193; // "zmm2"
644 case '3': // 1 string to match.
645 return 194; // "zmm3"
646 case '4': // 1 string to match.
647 return 195; // "zmm4"
648 case '5': // 1 string to match.
649 return 196; // "zmm5"
650 case '6': // 1 string to match.
651 return 197; // "zmm6"
652 case '7': // 1 string to match.
653 return 198; // "zmm7"
654 case '8': // 1 string to match.
655 return 199; // "zmm8"
656 case '9': // 1 string to match.
657 return 200; // "zmm9"
658 }
659 break;
660 }
661 break;
662 case 5: // 75 strings to match.
663 switch (Name[0]) {
664 default: break;
665 case 'f': // 1 string to match.
666 if (memcmp(Name.data()+1, "lags", 4) != 0)
667 break;
668 return 25; // "flags"
669 case 's': // 8 strings to match.
670 if (memcmp(Name.data()+1, "t(", 2) != 0)
671 break;
672 switch (Name[3]) {
673 default: break;
674 case '0': // 1 string to match.
675 if (Name[4] != ')')
676 break;
677 return 119; // "st(0)"
678 case '1': // 1 string to match.
679 if (Name[4] != ')')
680 break;
681 return 120; // "st(1)"
682 case '2': // 1 string to match.
683 if (Name[4] != ')')
684 break;
685 return 121; // "st(2)"
686 case '3': // 1 string to match.
687 if (Name[4] != ')')
688 break;
689 return 122; // "st(3)"
690 case '4': // 1 string to match.
691 if (Name[4] != ')')
692 break;
693 return 123; // "st(4)"
694 case '5': // 1 string to match.
695 if (Name[4] != ')')
696 break;
697 return 124; // "st(5)"
698 case '6': // 1 string to match.
699 if (Name[4] != ')')
700 break;
701 return 125; // "st(6)"
702 case '7': // 1 string to match.
703 if (Name[4] != ')')
704 break;
705 return 126; // "st(7)"
706 }
707 break;
708 case 'x': // 22 strings to match.
709 if (memcmp(Name.data()+1, "mm", 2) != 0)
710 break;
711 switch (Name[3]) {
712 default: break;
713 case '1': // 10 strings to match.
714 switch (Name[4]) {
715 default: break;
716 case '0': // 1 string to match.
717 return 137; // "xmm10"
718 case '1': // 1 string to match.
719 return 138; // "xmm11"
720 case '2': // 1 string to match.
721 return 139; // "xmm12"
722 case '3': // 1 string to match.
723 return 140; // "xmm13"
724 case '4': // 1 string to match.
725 return 141; // "xmm14"
726 case '5': // 1 string to match.
727 return 142; // "xmm15"
728 case '6': // 1 string to match.
729 return 143; // "xmm16"
730 case '7': // 1 string to match.
731 return 144; // "xmm17"
732 case '8': // 1 string to match.
733 return 145; // "xmm18"
734 case '9': // 1 string to match.
735 return 146; // "xmm19"
736 }
737 break;
738 case '2': // 10 strings to match.
739 switch (Name[4]) {
740 default: break;
741 case '0': // 1 string to match.
742 return 147; // "xmm20"
743 case '1': // 1 string to match.
744 return 148; // "xmm21"
745 case '2': // 1 string to match.
746 return 149; // "xmm22"
747 case '3': // 1 string to match.
748 return 150; // "xmm23"
749 case '4': // 1 string to match.
750 return 151; // "xmm24"
751 case '5': // 1 string to match.
752 return 152; // "xmm25"
753 case '6': // 1 string to match.
754 return 153; // "xmm26"
755 case '7': // 1 string to match.
756 return 154; // "xmm27"
757 case '8': // 1 string to match.
758 return 155; // "xmm28"
759 case '9': // 1 string to match.
760 return 156; // "xmm29"
761 }
762 break;
763 case '3': // 2 strings to match.
764 switch (Name[4]) {
765 default: break;
766 case '0': // 1 string to match.
767 return 157; // "xmm30"
768 case '1': // 1 string to match.
769 return 158; // "xmm31"
770 }
771 break;
772 }
773 break;
774 case 'y': // 22 strings to match.
775 if (memcmp(Name.data()+1, "mm", 2) != 0)
776 break;
777 switch (Name[3]) {
778 default: break;
779 case '1': // 10 strings to match.
780 switch (Name[4]) {
781 default: break;
782 case '0': // 1 string to match.
783 return 169; // "ymm10"
784 case '1': // 1 string to match.
785 return 170; // "ymm11"
786 case '2': // 1 string to match.
787 return 171; // "ymm12"
788 case '3': // 1 string to match.
789 return 172; // "ymm13"
790 case '4': // 1 string to match.
791 return 173; // "ymm14"
792 case '5': // 1 string to match.
793 return 174; // "ymm15"
794 case '6': // 1 string to match.
795 return 175; // "ymm16"
796 case '7': // 1 string to match.
797 return 176; // "ymm17"
798 case '8': // 1 string to match.
799 return 177; // "ymm18"
800 case '9': // 1 string to match.
801 return 178; // "ymm19"
802 }
803 break;
804 case '2': // 10 strings to match.
805 switch (Name[4]) {
806 default: break;
807 case '0': // 1 string to match.
808 return 179; // "ymm20"
809 case '1': // 1 string to match.
810 return 180; // "ymm21"
811 case '2': // 1 string to match.
812 return 181; // "ymm22"
813 case '3': // 1 string to match.
814 return 182; // "ymm23"
815 case '4': // 1 string to match.
816 return 183; // "ymm24"
817 case '5': // 1 string to match.
818 return 184; // "ymm25"
819 case '6': // 1 string to match.
820 return 185; // "ymm26"
821 case '7': // 1 string to match.
822 return 186; // "ymm27"
823 case '8': // 1 string to match.
824 return 187; // "ymm28"
825 case '9': // 1 string to match.
826 return 188; // "ymm29"
827 }
828 break;
829 case '3': // 2 strings to match.
830 switch (Name[4]) {
831 default: break;
832 case '0': // 1 string to match.
833 return 189; // "ymm30"
834 case '1': // 1 string to match.
835 return 190; // "ymm31"
836 }
837 break;
838 }
839 break;
840 case 'z': // 22 strings to match.
841 if (memcmp(Name.data()+1, "mm", 2) != 0)
842 break;
843 switch (Name[3]) {
844 default: break;
845 case '1': // 10 strings to match.
846 switch (Name[4]) {
847 default: break;
848 case '0': // 1 string to match.
849 return 201; // "zmm10"
850 case '1': // 1 string to match.
851 return 202; // "zmm11"
852 case '2': // 1 string to match.
853 return 203; // "zmm12"
854 case '3': // 1 string to match.
855 return 204; // "zmm13"
856 case '4': // 1 string to match.
857 return 205; // "zmm14"
858 case '5': // 1 string to match.
859 return 206; // "zmm15"
860 case '6': // 1 string to match.
861 return 207; // "zmm16"
862 case '7': // 1 string to match.
863 return 208; // "zmm17"
864 case '8': // 1 string to match.
865 return 209; // "zmm18"
866 case '9': // 1 string to match.
867 return 210; // "zmm19"
868 }
869 break;
870 case '2': // 10 strings to match.
871 switch (Name[4]) {
872 default: break;
873 case '0': // 1 string to match.
874 return 211; // "zmm20"
875 case '1': // 1 string to match.
876 return 212; // "zmm21"
877 case '2': // 1 string to match.
878 return 213; // "zmm22"
879 case '3': // 1 string to match.
880 return 214; // "zmm23"
881 case '4': // 1 string to match.
882 return 215; // "zmm24"
883 case '5': // 1 string to match.
884 return 216; // "zmm25"
885 case '6': // 1 string to match.
886 return 217; // "zmm26"
887 case '7': // 1 string to match.
888 return 218; // "zmm27"
889 case '8': // 1 string to match.
890 return 219; // "zmm28"
891 case '9': // 1 string to match.
892 return 220; // "zmm29"
893 }
894 break;
895 case '3': // 2 strings to match.
896 switch (Name[4]) {
897 default: break;
898 case '0': // 1 string to match.
899 return 221; // "zmm30"
900 case '1': // 1 string to match.
901 return 222; // "zmm31"
902 }
903 break;
904 }
905 break;
906 }
907 break;
908 }
909 return 0;
910}
911
912#endif // GET_REGISTER_MATCHER
913
914
915#ifdef GET_SUBTARGET_FEATURE_NAME
916#undef GET_SUBTARGET_FEATURE_NAME
917
918// User-level names for subtarget features that participate in
919// instruction matching.
920static const char *getSubtargetFeatureName(uint64_t Val) {
921 switch(Val) {
922 case Feature_HasAVX512: return "AVX-512 ISA";
923 case Feature_HasCDI: return "AVX-512 CD ISA";
924 case Feature_HasVPOPCNTDQ: return "AVX-512 VPOPCNTDQ ISA";
925 case Feature_HasPFI: return "AVX-512 PF ISA";
926 case Feature_HasERI: return "AVX-512 ER ISA";
927 case Feature_HasDQI: return "AVX-512 DQ ISA";
928 case Feature_HasBWI: return "AVX-512 BW ISA";
929 case Feature_HasVLX: return "AVX-512 VL ISA";
930 case Feature_HasVNNI: return "AVX-512 VNNI ISA";
931 case Feature_HasBITALG: return "AVX-512 BITALG ISA";
932 case Feature_HasVBMI: return "AVX-512 VBMI ISA";
933 case Feature_HasVBMI2: return "AVX-512 VBMI2 ISA";
934 case Feature_HasIFMA: return "AVX-512 IFMA ISA";
935 case Feature_Not64BitMode: return "Not 64-bit mode";
936 case Feature_In64BitMode: return "64-bit mode";
937 case Feature_In16BitMode: return "16-bit mode";
938 case Feature_Not16BitMode: return "Not 16-bit mode";
939 case Feature_In32BitMode: return "32-bit mode";
940 default: return "(unknown)";
941 }
942}
943
944#endif // GET_SUBTARGET_FEATURE_NAME
945
946
947#ifdef GET_MATCHER_IMPLEMENTATION
948#undef GET_MATCHER_IMPLEMENTATION
949
950static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
951 switch (VariantID) {
952 case 0:
953 switch (Mnemonic.size()) {
954 default: break;
955 case 3: // 6 strings to match.
956 switch (Mnemonic[0]) {
957 default: break;
958 case 'c': // 4 strings to match.
959 switch (Mnemonic[1]) {
960 default: break;
961 case 'b': // 1 string to match.
962 if (Mnemonic[2] != 'w')
963 break;
964 Mnemonic = "cbtw"; // "cbw"
965 return;
966 case 'd': // 1 string to match.
967 if (Mnemonic[2] != 'q')
968 break;
969 Mnemonic = "cltd"; // "cdq"
970 return;
971 case 'q': // 1 string to match.
972 if (Mnemonic[2] != 'o')
973 break;
974 Mnemonic = "cqto"; // "cqo"
975 return;
976 case 'w': // 1 string to match.
977 if (Mnemonic[2] != 'd')
978 break;
979 Mnemonic = "cwtd"; // "cwd"
980 return;
981 }
982 break;
983 case 'p': // 1 string to match.
984 if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
985 break;
986 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pop"
987 Mnemonic = "popw";
988 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
989 Mnemonic = "popl";
990 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
991 Mnemonic = "popq";
992 return;
993 case 'r': // 1 string to match.
994 if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
995 break;
996 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "ret"
997 Mnemonic = "retw";
998 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
999 Mnemonic = "retl";
1000 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1001 Mnemonic = "retq";
1002 return;
1003 }
1004 break;
1005 case 4: // 18 strings to match.
1006 switch (Mnemonic[0]) {
1007 default: break;
1008 case 'c': // 3 strings to match.
1009 switch (Mnemonic[1]) {
1010 default: break;
1011 case 'a': // 1 string to match.
1012 if (memcmp(Mnemonic.data()+2, "ll", 2) != 0)
1013 break;
1014 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "call"
1015 Mnemonic = "callw";
1016 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1017 Mnemonic = "calll";
1018 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1019 Mnemonic = "callq";
1020 return;
1021 case 'd': // 1 string to match.
1022 if (memcmp(Mnemonic.data()+2, "qe", 2) != 0)
1023 break;
1024 Mnemonic = "cltq"; // "cdqe"
1025 return;
1026 case 'w': // 1 string to match.
1027 if (memcmp(Mnemonic.data()+2, "de", 2) != 0)
1028 break;
1029 Mnemonic = "cwtl"; // "cwde"
1030 return;
1031 }
1032 break;
1033 case 'i': // 1 string to match.
1034 if (memcmp(Mnemonic.data()+1, "ret", 3) != 0)
1035 break;
1036 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "iret"
1037 Mnemonic = "iretw";
1038 else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
1039 Mnemonic = "iretl";
1040 return;
1041 case 'l': // 3 strings to match.
1042 switch (Mnemonic[1]) {
1043 default: break;
1044 case 'g': // 1 string to match.
1045 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1046 break;
1047 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lgdt"
1048 Mnemonic = "lgdtw";
1049 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1050 Mnemonic = "lgdtl";
1051 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1052 Mnemonic = "lgdtq";
1053 return;
1054 case 'i': // 1 string to match.
1055 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1056 break;
1057 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lidt"
1058 Mnemonic = "lidtw";
1059 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1060 Mnemonic = "lidtl";
1061 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1062 Mnemonic = "lidtq";
1063 return;
1064 case 'r': // 1 string to match.
1065 if (memcmp(Mnemonic.data()+2, "et", 2) != 0)
1066 break;
1067 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lret"
1068 Mnemonic = "lretw";
1069 else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
1070 Mnemonic = "lretl";
1071 return;
1072 }
1073 break;
1074 case 'p': // 3 strings to match.
1075 switch (Mnemonic[1]) {
1076 default: break;
1077 case 'o': // 2 strings to match.
1078 if (Mnemonic[2] != 'p')
1079 break;
1080 switch (Mnemonic[3]) {
1081 default: break;
1082 case 'a': // 1 string to match.
1083 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "popa"
1084 Mnemonic = "popaw";
1085 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1086 Mnemonic = "popal";
1087 return;
1088 case 'f': // 1 string to match.
1089 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "popf"
1090 Mnemonic = "popfw";
1091 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1092 Mnemonic = "popfl";
1093 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1094 Mnemonic = "popfq";
1095 return;
1096 }
1097 break;
1098 case 'u': // 1 string to match.
1099 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1100 break;
1101 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "push"
1102 Mnemonic = "pushw";
1103 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1104 Mnemonic = "pushl";
1105 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1106 Mnemonic = "pushq";
1107 return;
1108 }
1109 break;
1110 case 'r': // 1 string to match.
1111 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1112 break;
1113 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "retn"
1114 Mnemonic = "retw";
1115 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1116 Mnemonic = "retl";
1117 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1118 Mnemonic = "retq";
1119 return;
1120 case 's': // 6 strings to match.
1121 switch (Mnemonic[1]) {
1122 default: break;
1123 case 'a': // 4 strings to match.
1124 if (Mnemonic[2] != 'l')
1125 break;
1126 switch (Mnemonic[3]) {
1127 default: break;
1128 case 'b': // 1 string to match.
1129 Mnemonic = "shlb"; // "salb"
1130 return;
1131 case 'l': // 1 string to match.
1132 Mnemonic = "shll"; // "sall"
1133 return;
1134 case 'q': // 1 string to match.
1135 Mnemonic = "shlq"; // "salq"
1136 return;
1137 case 'w': // 1 string to match.
1138 Mnemonic = "shlw"; // "salw"
1139 return;
1140 }
1141 break;
1142 case 'g': // 1 string to match.
1143 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1144 break;
1145 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "sgdt"
1146 Mnemonic = "sgdtw";
1147 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1148 Mnemonic = "sgdtl";
1149 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1150 Mnemonic = "sgdtq";
1151 return;
1152 case 'i': // 1 string to match.
1153 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1154 break;
1155 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "sidt"
1156 Mnemonic = "sidtw";
1157 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1158 Mnemonic = "sidtl";
1159 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1160 Mnemonic = "sidtq";
1161 return;
1162 }
1163 break;
1164 case 'u': // 1 string to match.
1165 if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0)
1166 break;
1167 Mnemonic = "ud2"; // "ud2a"
1168 return;
1169 }
1170 break;
1171 case 5: // 9 strings to match.
1172 switch (Mnemonic[0]) {
1173 default: break;
1174 case 'f': // 1 string to match.
1175 if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0)
1176 break;
1177 Mnemonic = "fildll"; // "fildq"
1178 return;
1179 case 'p': // 3 strings to match.
1180 switch (Mnemonic[1]) {
1181 default: break;
1182 case 'o': // 1 string to match.
1183 if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0)
1184 break;
1185 Mnemonic = "popfl"; // "popfd"
1186 return;
1187 case 'u': // 2 strings to match.
1188 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1189 break;
1190 switch (Mnemonic[4]) {
1191 default: break;
1192 case 'a': // 1 string to match.
1193 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pusha"
1194 Mnemonic = "pushaw";
1195 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1196 Mnemonic = "pushal";
1197 return;
1198 case 'f': // 1 string to match.
1199 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pushf"
1200 Mnemonic = "pushfw";
1201 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1202 Mnemonic = "pushfl";
1203 else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1204 Mnemonic = "pushfq";
1205 return;
1206 }
1207 break;
1208 }
1209 break;
1210 case 's': // 4 strings to match.
1211 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1212 break;
1213 switch (Mnemonic[4]) {
1214 default: break;
1215 case 'b': // 1 string to match.
1216 Mnemonic = "movsb"; // "smovb"
1217 return;
1218 case 'l': // 1 string to match.
1219 Mnemonic = "movsl"; // "smovl"
1220 return;
1221 case 'q': // 1 string to match.
1222 Mnemonic = "movsq"; // "smovq"
1223 return;
1224 case 'w': // 1 string to match.
1225 Mnemonic = "movsw"; // "smovw"
1226 return;
1227 }
1228 break;
1229 case 'v': // 1 string to match.
1230 if (memcmp(Mnemonic.data()+1, "errw", 4) != 0)
1231 break;
1232 Mnemonic = "verr"; // "verrw"
1233 return;
1234 }
1235 break;
1236 case 6: // 15 strings to match.
1237 switch (Mnemonic[0]) {
1238 default: break;
1239 case 'c': // 6 strings to match.
1240 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1241 break;
1242 switch (Mnemonic[4]) {
1243 default: break;
1244 case 'c': // 3 strings to match.
1245 switch (Mnemonic[5]) {
1246 default: break;
1247 case 'l': // 1 string to match.
1248 Mnemonic = "cmovbl"; // "cmovcl"
1249 return;
1250 case 'q': // 1 string to match.
1251 Mnemonic = "cmovbq"; // "cmovcq"
1252 return;
1253 case 'w': // 1 string to match.
1254 Mnemonic = "cmovbw"; // "cmovcw"
1255 return;
1256 }
1257 break;
1258 case 'z': // 3 strings to match.
1259 switch (Mnemonic[5]) {
1260 default: break;
1261 case 'l': // 1 string to match.
1262 Mnemonic = "cmovel"; // "cmovzl"
1263 return;
1264 case 'q': // 1 string to match.
1265 Mnemonic = "cmoveq"; // "cmovzq"
1266 return;
1267 case 'w': // 1 string to match.
1268 Mnemonic = "cmovew"; // "cmovzw"
1269 return;
1270 }
1271 break;
1272 }
1273 break;
1274 case 'f': // 4 strings to match.
1275 switch (Mnemonic[1]) {
1276 default: break;
1277 case 'c': // 2 strings to match.
1278 if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1279 break;
1280 switch (Mnemonic[5]) {
1281 default: break;
1282 case 'a': // 1 string to match.
1283 Mnemonic = "fcmovnbe"; // "fcmova"
1284 return;
1285 case 'z': // 1 string to match.
1286 Mnemonic = "fcmove"; // "fcmovz"
1287 return;
1288 }
1289 break;
1290 case 'i': // 1 string to match.
1291 if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0)
1292 break;
1293 Mnemonic = "fistpll"; // "fistpq"
1294 return;
1295 case 'l': // 1 string to match.
1296 if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0)
1297 break;
1298 Mnemonic = "fldcw"; // "fldcww"
1299 return;
1300 }
1301 break;
1302 case 'l': // 2 strings to match.
1303 if (memcmp(Mnemonic.data()+1, "eave", 4) != 0)
1304 break;
1305 switch (Mnemonic[5]) {
1306 default: break;
1307 case 'l': // 1 string to match.
1308 if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode) // "leavel"
1309 Mnemonic = "leave";
1310 return;
1311 case 'q': // 1 string to match.
1312 if ((Features & Feature_In64BitMode) == Feature_In64BitMode) // "leaveq"
1313 Mnemonic = "leave";
1314 return;
1315 }
1316 break;
1317 case 'p': // 1 string to match.
1318 if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0)
1319 break;
1320 Mnemonic = "pushfl"; // "pushfd"
1321 return;
1322 case 's': // 1 string to match.
1323 if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0)
1324 break;
1325 Mnemonic = "sysretl"; // "sysret"
1326 return;
1327 case 'x': // 1 string to match.
1328 if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0)
1329 break;
1330 Mnemonic = "xsave64"; // "xsaveq"
1331 return;
1332 }
1333 break;
1334 case 7: // 34 strings to match.
1335 switch (Mnemonic[0]) {
1336 default: break;
1337 case 'c': // 24 strings to match.
1338 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1339 break;
1340 switch (Mnemonic[4]) {
1341 default: break;
1342 case 'n': // 18 strings to match.
1343 switch (Mnemonic[5]) {
1344 default: break;
1345 case 'a': // 3 strings to match.
1346 switch (Mnemonic[6]) {
1347 default: break;
1348 case 'l': // 1 string to match.
1349 Mnemonic = "cmovbel"; // "cmovnal"
1350 return;
1351 case 'q': // 1 string to match.
1352 Mnemonic = "cmovbeq"; // "cmovnaq"
1353 return;
1354 case 'w': // 1 string to match.
1355 Mnemonic = "cmovbew"; // "cmovnaw"
1356 return;
1357 }
1358 break;
1359 case 'b': // 3 strings to match.
1360 switch (Mnemonic[6]) {
1361 default: break;
1362 case 'l': // 1 string to match.
1363 Mnemonic = "cmovael"; // "cmovnbl"
1364 return;
1365 case 'q': // 1 string to match.
1366 Mnemonic = "cmovaeq"; // "cmovnbq"
1367 return;
1368 case 'w': // 1 string to match.
1369 Mnemonic = "cmovaew"; // "cmovnbw"
1370 return;
1371 }
1372 break;
1373 case 'c': // 3 strings to match.
1374 switch (Mnemonic[6]) {
1375 default: break;
1376 case 'l': // 1 string to match.
1377 Mnemonic = "cmovael"; // "cmovncl"
1378 return;
1379 case 'q': // 1 string to match.
1380 Mnemonic = "cmovaeq"; // "cmovncq"
1381 return;
1382 case 'w': // 1 string to match.
1383 Mnemonic = "cmovaew"; // "cmovncw"
1384 return;
1385 }
1386 break;
1387 case 'g': // 3 strings to match.
1388 switch (Mnemonic[6]) {
1389 default: break;
1390 case 'l': // 1 string to match.
1391 Mnemonic = "cmovlel"; // "cmovngl"
1392 return;
1393 case 'q': // 1 string to match.
1394 Mnemonic = "cmovleq"; // "cmovngq"
1395 return;
1396 case 'w': // 1 string to match.
1397 Mnemonic = "cmovlew"; // "cmovngw"
1398 return;
1399 }
1400 break;
1401 case 'l': // 3 strings to match.
1402 switch (Mnemonic[6]) {
1403 default: break;
1404 case 'l': // 1 string to match.
1405 Mnemonic = "cmovgel"; // "cmovnll"
1406 return;
1407 case 'q': // 1 string to match.
1408 Mnemonic = "cmovgeq"; // "cmovnlq"
1409 return;
1410 case 'w': // 1 string to match.
1411 Mnemonic = "cmovgew"; // "cmovnlw"
1412 return;
1413 }
1414 break;
1415 case 'z': // 3 strings to match.
1416 switch (Mnemonic[6]) {
1417 default: break;
1418 case 'l': // 1 string to match.
1419 Mnemonic = "cmovnel"; // "cmovnzl"
1420 return;
1421 case 'q': // 1 string to match.
1422 Mnemonic = "cmovneq"; // "cmovnzq"
1423 return;
1424 case 'w': // 1 string to match.
1425 Mnemonic = "cmovnew"; // "cmovnzw"
1426 return;
1427 }
1428 break;
1429 }
1430 break;
1431 case 'p': // 6 strings to match.
1432 switch (Mnemonic[5]) {
1433 default: break;
1434 case 'e': // 3 strings to match.
1435 switch (Mnemonic[6]) {
1436 default: break;
1437 case 'l': // 1 string to match.
1438 Mnemonic = "cmovpl"; // "cmovpel"
1439 return;
1440 case 'q': // 1 string to match.
1441 Mnemonic = "cmovpq"; // "cmovpeq"
1442 return;
1443 case 'w': // 1 string to match.
1444 Mnemonic = "cmovpw"; // "cmovpew"
1445 return;
1446 }
1447 break;
1448 case 'o': // 3 strings to match.
1449 switch (Mnemonic[6]) {
1450 default: break;
1451 case 'l': // 1 string to match.
1452 Mnemonic = "cmovnpl"; // "cmovpol"
1453 return;
1454 case 'q': // 1 string to match.
1455 Mnemonic = "cmovnpq"; // "cmovpoq"
1456 return;
1457 case 'w': // 1 string to match.
1458 Mnemonic = "cmovnpw"; // "cmovpow"
1459 return;
1460 }
1461 break;
1462 }
1463 break;
1464 }
1465 break;
1466 case 'f': // 6 strings to match.
1467 switch (Mnemonic[1]) {
1468 default: break;
1469 case 'c': // 2 strings to match.
1470 if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1471 break;
1472 switch (Mnemonic[5]) {
1473 default: break;
1474 case 'a': // 1 string to match.
1475 if (Mnemonic[6] != 'e')
1476 break;
1477 Mnemonic = "fcmovnb"; // "fcmovae"
1478 return;
1479 case 'n': // 1 string to match.
1480 if (Mnemonic[6] != 'a')
1481 break;
1482 Mnemonic = "fcmovbe"; // "fcmovna"
1483 return;
1484 }
1485 break;
1486 case 'i': // 1 string to match.
1487 if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0)
1488 break;
1489 Mnemonic = "fisttpll"; // "fisttpq"
1490 return;
1491 case 'n': // 2 strings to match.
1492 if (memcmp(Mnemonic.data()+2, "st", 2) != 0)
1493 break;
1494 switch (Mnemonic[4]) {
1495 default: break;
1496 case 'c': // 1 string to match.
1497 if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1498 break;
1499 Mnemonic = "fnstcw"; // "fnstcww"
1500 return;
1501 case 's': // 1 string to match.
1502 if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1503 break;
1504 Mnemonic = "fnstsw"; // "fnstsww"
1505 return;
1506 }
1507 break;
1508 case 'x': // 1 string to match.
1509 if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0)
1510 break;
1511 Mnemonic = "fxsave64"; // "fxsaveq"
1512 return;
1513 }
1514 break;
1515 case 's': // 1 string to match.
1516 if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0)
1517 break;
1518 Mnemonic = "sysexitl"; // "sysexit"
1519 return;
1520 case 'x': // 3 strings to match.
1521 switch (Mnemonic[1]) {
1522 default: break;
1523 case 'r': // 1 string to match.
1524 if (memcmp(Mnemonic.data()+2, "storq", 5) != 0)
1525 break;
1526 Mnemonic = "xrstor64"; // "xrstorq"
1527 return;
1528 case 's': // 2 strings to match.
1529 if (memcmp(Mnemonic.data()+2, "ave", 3) != 0)
1530 break;
1531 switch (Mnemonic[5]) {
1532 default: break;
1533 case 'c': // 1 string to match.
1534 if (Mnemonic[6] != 'q')
1535 break;
1536 Mnemonic = "xsavec64"; // "xsavecq"
1537 return;
1538 case 's': // 1 string to match.
1539 if (Mnemonic[6] != 'q')
1540 break;
1541 Mnemonic = "xsaves64"; // "xsavesq"
1542 return;
1543 }
1544 break;
1545 }
1546 break;
1547 }
1548 break;
1549 case 8: // 15 strings to match.
1550 switch (Mnemonic[0]) {
1551 default: break;
1552 case 'c': // 12 strings to match.
1553 if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1554 break;
1555 switch (Mnemonic[5]) {
1556 default: break;
1557 case 'a': // 3 strings to match.
1558 if (Mnemonic[6] != 'e')
1559 break;
1560 switch (Mnemonic[7]) {
1561 default: break;
1562 case 'l': // 1 string to match.
1563 Mnemonic = "cmovbl"; // "cmovnael"
1564 return;
1565 case 'q': // 1 string to match.
1566 Mnemonic = "cmovbq"; // "cmovnaeq"
1567 return;
1568 case 'w': // 1 string to match.
1569 Mnemonic = "cmovbw"; // "cmovnaew"
1570 return;
1571 }
1572 break;
1573 case 'b': // 3 strings to match.
1574 if (Mnemonic[6] != 'e')
1575 break;
1576 switch (Mnemonic[7]) {
1577 default: break;
1578 case 'l': // 1 string to match.
1579 Mnemonic = "cmoval"; // "cmovnbel"
1580 return;
1581 case 'q': // 1 string to match.
1582 Mnemonic = "cmovaq"; // "cmovnbeq"
1583 return;
1584 case 'w': // 1 string to match.
1585 Mnemonic = "cmovaw"; // "cmovnbew"
1586 return;
1587 }
1588 break;
1589 case 'g': // 3 strings to match.
1590 if (Mnemonic[6] != 'e')
1591 break;
1592 switch (Mnemonic[7]) {
1593 default: break;
1594 case 'l': // 1 string to match.
1595 Mnemonic = "cmovll"; // "cmovngel"
1596 return;
1597 case 'q': // 1 string to match.
1598 Mnemonic = "cmovlq"; // "cmovngeq"
1599 return;
1600 case 'w': // 1 string to match.
1601 Mnemonic = "cmovlw"; // "cmovngew"
1602 return;
1603 }
1604 break;
1605 case 'l': // 3 strings to match.
1606 if (Mnemonic[6] != 'e')
1607 break;
1608 switch (Mnemonic[7]) {
1609 default: break;
1610 case 'l': // 1 string to match.
1611 Mnemonic = "cmovgl"; // "cmovnlel"
1612 return;
1613 case 'q': // 1 string to match.
1614 Mnemonic = "cmovgq"; // "cmovnleq"
1615 return;
1616 case 'w': // 1 string to match.
1617 Mnemonic = "cmovgw"; // "cmovnlew"
1618 return;
1619 }
1620 break;
1621 }
1622 break;
1623 case 'f': // 2 strings to match.
1624 switch (Mnemonic[1]) {
1625 default: break;
1626 case 'c': // 1 string to match.
1627 if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0)
1628 break;
1629 Mnemonic = "fcmovb"; // "fcmovnae"
1630 return;
1631 case 'x': // 1 string to match.
1632 if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0)
1633 break;
1634 Mnemonic = "fxrstor64"; // "fxrstorq"
1635 return;
1636 }
1637 break;
1638 case 'x': // 1 string to match.
1639 if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0)
1640 break;
1641 Mnemonic = "xrstors64"; // "xrstorsq"
1642 return;
1643 }
1644 break;
1645 case 9: // 1 string to match.
1646 if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0)
1647 break;
1648 Mnemonic = "xsaveopt64"; // "xsaveoptq"
1649 return;
1650 }
1651 break;
1652 case 1:
1653 switch (Mnemonic.size()) {
1654 default: break;
1655 case 3: // 1 string to match.
1656 if (memcmp(Mnemonic.data()+0, "sal", 3) != 0)
1657 break;
1658 Mnemonic = "shl"; // "sal"
1659 return;
1660 case 4: // 3 strings to match.
1661 switch (Mnemonic[0]) {
1662 default: break;
1663 case 'p': // 2 strings to match.
1664 if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
1665 break;
1666 switch (Mnemonic[3]) {
1667 default: break;
1668 case 'a': // 1 string to match.
1669 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "popa"
1670 Mnemonic = "popaw";
1671 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1672 Mnemonic = "popal";
1673 return;
1674 case 'f': // 1 string to match.
1675 if ((Features & Feature_In64BitMode) == Feature_In64BitMode) // "popf"
1676 Mnemonic = "popfq";
1677 return;
1678 }
1679 break;
1680 case 'r': // 1 string to match.
1681 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1682 break;
1683 Mnemonic = "ret"; // "retn"
1684 return;
1685 }
1686 break;
1687 case 5: // 5 strings to match.
1688 switch (Mnemonic[0]) {
1689 default: break;
1690 case 'c': // 2 strings to match.
1691 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1692 break;
1693 switch (Mnemonic[4]) {
1694 default: break;
1695 case 'c': // 1 string to match.
1696 Mnemonic = "cmovb"; // "cmovc"
1697 return;
1698 case 'z': // 1 string to match.
1699 Mnemonic = "cmove"; // "cmovz"
1700 return;
1701 }
1702 break;
1703 case 'p': // 3 strings to match.
1704 switch (Mnemonic[1]) {
1705 default: break;
1706 case 'o': // 1 string to match.
1707 if (memcmp(Mnemonic.data()+2, "pad", 3) != 0)
1708 break;
1709 if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode) // "popad"
1710 Mnemonic = "popal";
1711 return;
1712 case 'u': // 2 strings to match.
1713 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1714 break;
1715 switch (Mnemonic[4]) {
1716 default: break;
1717 case 'a': // 1 string to match.
1718 if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pusha"
1719 Mnemonic = "pushaw";
1720 else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1721 Mnemonic = "pushal";
1722 return;
1723 case 'f': // 1 string to match.
1724 if ((Features & Feature_In64BitMode) == Feature_In64BitMode) // "pushf"
1725 Mnemonic = "pushfq";
1726 return;
1727 }
1728 break;
1729 }
1730 break;
1731 }
1732 break;
1733 case 6: // 9 strings to match.
1734 switch (Mnemonic[0]) {
1735 default: break;
1736 case 'c': // 8 strings to match.
1737 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1738 break;
1739 switch (Mnemonic[4]) {
1740 default: break;
1741 case 'n': // 6 strings to match.
1742 switch (Mnemonic[5]) {
1743 default: break;
1744 case 'a': // 1 string to match.
1745 Mnemonic = "cmovbe"; // "cmovna"
1746 return;
1747 case 'b': // 1 string to match.
1748 Mnemonic = "cmovae"; // "cmovnb"
1749 return;
1750 case 'c': // 1 string to match.
1751 Mnemonic = "cmovae"; // "cmovnc"
1752 return;
1753 case 'g': // 1 string to match.
1754 Mnemonic = "cmovle"; // "cmovng"
1755 return;
1756 case 'l': // 1 string to match.
1757 Mnemonic = "cmovge"; // "cmovnl"
1758 return;
1759 case 'z': // 1 string to match.
1760 Mnemonic = "cmovne"; // "cmovnz"
1761 return;
1762 }
1763 break;
1764 case 'p': // 2 strings to match.
1765 switch (Mnemonic[5]) {
1766 default: break;
1767 case 'e': // 1 string to match.
1768 Mnemonic = "cmovp"; // "cmovpe"
1769 return;
1770 case 'o': // 1 string to match.
1771 Mnemonic = "cmovnp"; // "cmovpo"
1772 return;
1773 }
1774 break;
1775 }
1776 break;
1777 case 'p': // 1 string to match.
1778 if (memcmp(Mnemonic.data()+1, "ushad", 5) != 0)
1779 break;
1780 if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode) // "pushad"
1781 Mnemonic = "pushal";
1782 return;
1783 }
1784 break;
1785 case 7: // 6 strings to match.
1786 switch (Mnemonic[0]) {
1787 default: break;
1788 case 'a': // 1 string to match.
1789 if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0)
1790 break;
1791 Mnemonic = "xacquire"; // "acquire"
1792 return;
1793 case 'c': // 4 strings to match.
1794 if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1795 break;
1796 switch (Mnemonic[5]) {
1797 default: break;
1798 case 'a': // 1 string to match.
1799 if (Mnemonic[6] != 'e')
1800 break;
1801 Mnemonic = "cmovb"; // "cmovnae"
1802 return;
1803 case 'b': // 1 string to match.
1804 if (Mnemonic[6] != 'e')
1805 break;
1806 Mnemonic = "cmova"; // "cmovnbe"
1807 return;
1808 case 'g': // 1 string to match.
1809 if (Mnemonic[6] != 'e')
1810 break;
1811 Mnemonic = "cmovl"; // "cmovnge"
1812 return;
1813 case 'l': // 1 string to match.
1814 if (Mnemonic[6] != 'e')
1815 break;
1816 Mnemonic = "cmovg"; // "cmovnle"
1817 return;
1818 }
1819 break;
1820 case 'r': // 1 string to match.
1821 if (memcmp(Mnemonic.data()+1, "elease", 6) != 0)
1822 break;
1823 Mnemonic = "xrelease"; // "release"
1824 return;
1825 }
1826 break;
1827 }
1828 break;
1829 }
1830 switch (Mnemonic.size()) {
1831 default: break;
1832 case 2: // 2 strings to match.
1833 if (Mnemonic[0] != 'j')
1834 break;
1835 switch (Mnemonic[1]) {
1836 default: break;
1837 case 'c': // 1 string to match.
1838 Mnemonic = "jb"; // "jc"
1839 return;
1840 case 'z': // 1 string to match.
1841 Mnemonic = "je"; // "jz"
1842 return;
1843 }
1844 break;
1845 case 3: // 8 strings to match.
1846 if (Mnemonic[0] != 'j')
1847 break;
1848 switch (Mnemonic[1]) {
1849 default: break;
1850 case 'n': // 6 strings to match.
1851 switch (Mnemonic[2]) {
1852 default: break;
1853 case 'a': // 1 string to match.
1854 Mnemonic = "jbe"; // "jna"
1855 return;
1856 case 'b': // 1 string to match.
1857 Mnemonic = "jae"; // "jnb"
1858 return;
1859 case 'c': // 1 string to match.
1860 Mnemonic = "jae"; // "jnc"
1861 return;
1862 case 'g': // 1 string to match.
1863 Mnemonic = "jle"; // "jng"
1864 return;
1865 case 'l': // 1 string to match.
1866 Mnemonic = "jge"; // "jnl"
1867 return;
1868 case 'z': // 1 string to match.
1869 Mnemonic = "jne"; // "jnz"
1870 return;
1871 }
1872 break;
1873 case 'p': // 2 strings to match.
1874 switch (Mnemonic[2]) {
1875 default: break;
1876 case 'e': // 1 string to match.
1877 Mnemonic = "jp"; // "jpe"
1878 return;
1879 case 'o': // 1 string to match.
1880 Mnemonic = "jnp"; // "jpo"
1881 return;
1882 }
1883 break;
1884 }
1885 break;
1886 case 4: // 8 strings to match.
1887 switch (Mnemonic[0]) {
1888 default: break;
1889 case 'j': // 4 strings to match.
1890 if (Mnemonic[1] != 'n')
1891 break;
1892 switch (Mnemonic[2]) {
1893 default: break;
1894 case 'a': // 1 string to match.
1895 if (Mnemonic[3] != 'e')
1896 break;
1897 Mnemonic = "jb"; // "jnae"
1898 return;
1899 case 'b': // 1 string to match.
1900 if (Mnemonic[3] != 'e')
1901 break;
1902 Mnemonic = "ja"; // "jnbe"
1903 return;
1904 case 'g': // 1 string to match.
1905 if (Mnemonic[3] != 'e')
1906 break;
1907 Mnemonic = "jl"; // "jnge"
1908 return;
1909 case 'l': // 1 string to match.
1910 if (Mnemonic[3] != 'e')
1911 break;
1912 Mnemonic = "jg"; // "jnle"
1913 return;
1914 }
1915 break;
1916 case 'r': // 2 strings to match.
1917 if (memcmp(Mnemonic.data()+1, "ep", 2) != 0)
1918 break;
1919 switch (Mnemonic[3]) {
1920 default: break;
1921 case 'e': // 1 string to match.
1922 Mnemonic = "rep"; // "repe"
1923 return;
1924 case 'z': // 1 string to match.
1925 Mnemonic = "rep"; // "repz"
1926 return;
1927 }
1928 break;
1929 case 's': // 2 strings to match.
1930 if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1931 break;
1932 switch (Mnemonic[3]) {
1933 default: break;
1934 case 'c': // 1 string to match.
1935 Mnemonic = "setb"; // "setc"
1936 return;
1937 case 'z': // 1 string to match.
1938 Mnemonic = "sete"; // "setz"
1939 return;
1940 }
1941 break;
1942 }
1943 break;
1944 case 5: // 11 strings to match.
1945 switch (Mnemonic[0]) {
1946 default: break;
1947 case 'f': // 1 string to match.
1948 if (memcmp(Mnemonic.data()+1, "wait", 4) != 0)
1949 break;
1950 Mnemonic = "wait"; // "fwait"
1951 return;
1952 case 'l': // 1 string to match.
1953 if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0)
1954 break;
1955 Mnemonic = "loope"; // "loopz"
1956 return;
1957 case 'r': // 1 string to match.
1958 if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0)
1959 break;
1960 Mnemonic = "repne"; // "repnz"
1961 return;
1962 case 's': // 8 strings to match.
1963 if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1964 break;
1965 switch (Mnemonic[3]) {
1966 default: break;
1967 case 'n': // 6 strings to match.
1968 switch (Mnemonic[4]) {
1969 default: break;
1970 case 'a': // 1 string to match.
1971 Mnemonic = "setbe"; // "setna"
1972 return;
1973 case 'b': // 1 string to match.
1974 Mnemonic = "setae"; // "setnb"
1975 return;
1976 case 'c': // 1 string to match.
1977 Mnemonic = "setae"; // "setnc"
1978 return;
1979 case 'g': // 1 string to match.
1980 Mnemonic = "setle"; // "setng"
1981 return;
1982 case 'l': // 1 string to match.
1983 Mnemonic = "setge"; // "setnl"
1984 return;
1985 case 'z': // 1 string to match.
1986 Mnemonic = "setne"; // "setnz"
1987 return;
1988 }
1989 break;
1990 case 'p': // 2 strings to match.
1991 switch (Mnemonic[4]) {
1992 default: break;
1993 case 'e': // 1 string to match.
1994 Mnemonic = "setp"; // "setpe"
1995 return;
1996 case 'o': // 1 string to match.
1997 Mnemonic = "setnp"; // "setpo"
1998 return;
1999 }
2000 break;
2001 }
2002 break;
2003 }
2004 break;
2005 case 6: // 6 strings to match.
2006 switch (Mnemonic[0]) {
2007 default: break;
2008 case 'f': // 1 string to match.
2009 if (memcmp(Mnemonic.data()+1, "comip", 5) != 0)
2010 break;
2011 Mnemonic = "fcompi"; // "fcomip"
2012 return;
2013 case 'l': // 1 string to match.
2014 if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0)
2015 break;
2016 Mnemonic = "loopne"; // "loopnz"
2017 return;
2018 case 's': // 4 strings to match.
2019 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
2020 break;
2021 switch (Mnemonic[4]) {
2022 default: break;
2023 case 'a': // 1 string to match.
2024 if (Mnemonic[5] != 'e')
2025 break;
2026 Mnemonic = "setb"; // "setnae"
2027 return;
2028 case 'b': // 1 string to match.
2029 if (Mnemonic[5] != 'e')
2030 break;
2031 Mnemonic = "seta"; // "setnbe"
2032 return;
2033 case 'g': // 1 string to match.
2034 if (Mnemonic[5] != 'e')
2035 break;
2036 Mnemonic = "setl"; // "setnge"
2037 return;
2038 case 'l': // 1 string to match.
2039 if (Mnemonic[5] != 'e')
2040 break;
2041 Mnemonic = "setg"; // "setnle"
2042 return;
2043 }
2044 break;
2045 }
2046 break;
2047 case 7: // 1 string to match.
2048 if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0)
2049 break;
2050 Mnemonic = "fucompi"; // "fucomip"
2051 return;
2052 }
2053}
2054
2055namespace {
2056enum OperatorConversionKind {
2057 CVT_Done,
2058 CVT_Reg,
2059 CVT_Tied,
2060 CVT_imm_95_10,
2061 CVT_95_addImmOperands,
2062 CVT_regAX,
2063 CVT_regEAX,
2064 CVT_regRAX,
2065 CVT_95_Reg,
2066 CVT_95_addMemOperands,
2067 CVT_95_addAbsMemOperands,
2068 CVT_95_addDstIdxOperands,
2069 CVT_95_addSrcIdxOperands,
2070 CVT_95_addGR32orGR64Operands,
2071 CVT_regST1,
2072 CVT_regST0,
2073 CVT_95_addMemOffsOperands,
2074 CVT_imm_95_17,
2075 CVT_imm_95_1,
2076 CVT_imm_95_16,
2077 CVT_imm_95_0,
2078 CVT_95_addAVX512RCOperands,
2079 CVT_NUM_CONVERTERS
2080};
2081
2082enum InstructionConversionKind {
2083 Convert_NoOperands,
2084 Convert__imm_95_10,
2085 Convert__Imm1_0,
2086 Convert__Imm1_1,
2087 Convert__regAX__Tie0__ImmSExti16i81_1,
2088 Convert__regEAX__Tie0__ImmSExti32i81_1,
2089 Convert__regRAX__Tie0__ImmSExti64i81_1,
2090 Convert__ImmSExti64i321_1,
2091 Convert__Reg1_0__Tie0__Reg1_1,
2092 Convert__Reg1_0__Tie0__ImmSExti16i81_1,
2093 Convert__Reg1_0__Tie0__Imm1_1,
2094 Convert__Reg1_0__Tie0__Mem165_1,
2095 Convert__Reg1_0__Tie0__ImmSExti32i81_1,
2096 Convert__Reg1_0__Tie0__Mem325_1,
2097 Convert__Reg1_0__Tie0__ImmSExti64i81_1,
2098 Convert__Reg1_0__Tie0__ImmSExti64i321_1,
2099 Convert__Reg1_0__Tie0__Mem645_1,
2100 Convert__Reg1_0__Tie0__Mem85_1,
2101 Convert__Mem165_0__Reg1_1,
2102 Convert__Mem165_0__ImmSExti16i81_1,
2103 Convert__Mem165_0__Imm1_1,
2104 Convert__Mem325_0__Reg1_1,
2105 Convert__Mem325_0__ImmSExti32i81_1,
2106 Convert__Mem325_0__Imm1_1,
2107 Convert__Mem645_0__Reg1_1,
2108 Convert__Mem645_0__ImmSExti64i81_1,
2109 Convert__Mem645_0__ImmSExti64i321_1,
2110 Convert__Mem85_0__Reg1_1,
2111 Convert__Mem85_0__Imm1_1,
2112 Convert__Reg1_1__Tie0__Reg1_0,
2113 Convert__Mem85_1__Reg1_0,
2114 Convert__Reg1_1__Tie0__Imm1_0,
2115 Convert__Mem85_1__Imm1_0,
2116 Convert__Reg1_1__Tie0__Mem85_0,
2117 Convert__Mem325_1__Reg1_0,
2118 Convert__regEAX__Tie0__ImmSExti32i81_0,
2119 Convert__Reg1_1__Tie0__ImmSExti32i81_0,
2120 Convert__Mem325_1__ImmSExti32i81_0,
2121 Convert__Mem325_1__Imm1_0,
2122 Convert__Reg1_1__Tie0__Mem325_0,
2123 Convert__Mem645_1__Reg1_0,
2124 Convert__regRAX__Tie0__ImmSExti64i81_0,
2125 Convert__Reg1_1__Tie0__ImmSExti64i81_0,
2126 Convert__Mem645_1__ImmSExti64i81_0,
2127 Convert__ImmSExti64i321_0,
2128 Convert__Reg1_1__Tie0__ImmSExti64i321_0,
2129 Convert__Mem645_1__ImmSExti64i321_0,
2130 Convert__Reg1_1__Tie0__Mem645_0,
2131 Convert__Mem165_1__Reg1_0,
2132 Convert__regAX__Tie0__ImmSExti16i81_0,
2133 Convert__Reg1_1__Tie0__ImmSExti16i81_0,
2134 Convert__Mem165_1__ImmSExti16i81_0,
2135 Convert__Mem165_1__Imm1_0,
2136 Convert__Reg1_1__Tie0__Mem165_0,
2137 Convert__Reg1_0__Tie0__Mem1285_1,
2138 Convert__Reg1_1__Tie0__Mem1285_0,
2139 Convert__Reg1_0__Reg1_1,
2140 Convert__Reg1_0__Mem325_1,
2141 Convert__Reg1_0__Mem645_1,
2142 Convert__Reg1_1__Reg1_0,
2143 Convert__Reg1_1__Mem325_0,
2144 Convert__Reg1_1__Mem645_0,
2145 Convert__Reg1_0__Mem1285_1,
2146 Convert__Reg1_1__Mem1285_0,
2147 Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
2148 Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
2149 Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2150 Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2151 Convert__Reg1_0__Reg1_1__Reg1_2,
2152 Convert__Reg1_0__Reg1_1__Mem325_2,
2153 Convert__Reg1_0__Reg1_1__Mem645_2,
2154 Convert__Reg1_2__Reg1_1__Reg1_0,
2155 Convert__Reg1_2__Reg1_1__Mem325_0,
2156 Convert__Reg1_2__Reg1_1__Mem645_0,
2157 Convert__Reg1_0__Reg1_1__Imm1_2,
2158 Convert__Reg1_0__Mem325_1__Reg1_2,
2159 Convert__Reg1_0__Mem325_1__Imm1_2,
2160 Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
2161 Convert__Reg1_0__Mem645_1__Reg1_2,
2162 Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
2163 Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
2164 Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
2165 Convert__Reg1_2__Reg1_1__Imm1_0,
2166 Convert__Reg1_2__Mem325_1__Imm1_0,
2167 Convert__Reg1_2__Mem325_1__Reg1_0,
2168 Convert__Reg1_2__Mem645_1__Reg1_0,
2169 Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2,
2170 Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2,
2171 Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0,
2172 Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0,
2173 Convert__Reg1_2__Tie0__Reg1_1,
2174 Convert__Reg1_2__Tie0__Mem1285_1,
2175 Convert__Reg1_0__Mem5_1,
2176 Convert__Reg1_1__Mem5_0,
2177 Convert__Mem1285_1__Reg1_0,
2178 Convert__Mem1285_0__Reg1_1,
2179 Convert__Reg1_0__Mem165_1,
2180 Convert__Reg1_1__Mem165_0,
2181 Convert__Reg1_0__Tie0,
2182 Convert__Reg1_0__ImmSExti16i81_1,
2183 Convert__Reg1_0__ImmSExti32i81_1,
2184 Convert__Reg1_0__ImmSExti64i81_1,
2185 Convert__Reg1_1__ImmSExti32i81_0,
2186 Convert__Reg1_1__ImmSExti64i81_0,
2187 Convert__Reg1_1__ImmSExti16i81_0,
2188 Convert__Reg1_0,
2189 Convert__AbsMem1_0,
2190 Convert__Mem165_0,
2191 Convert__Mem325_0,
2192 Convert__Mem645_0,
2193 Convert__Mem5_0,
2194 Convert__Mem165_1,
2195 Convert__Mem325_1,
2196 Convert__Mem645_1,
2197 Convert__Imm1_1__Imm1_0,
2198 Convert__Reg1_1,
2199 Convert__Mem85_0,
2200 Convert__Reg1_0__Tie0__Reg1_0,
2201 Convert__regAX__ImmSExti16i81_1,
2202 Convert__regEAX__ImmSExti32i81_1,
2203 Convert__regRAX__ImmSExti64i81_1,
2204 Convert__Reg1_0__Imm1_1,
2205 Convert__Reg1_0__ImmSExti64i321_1,
2206 Convert__Reg1_0__Mem85_1,
2207 Convert__Reg1_3__Tie0__Reg1_2__Imm1_0,
2208 Convert__Reg1_2__Tie0__Reg1_3__Imm1_0,
2209 Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0,
2210 Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0,
2211 Convert__Reg1_2__Tie0__Mem645_3__Imm1_0,
2212 Convert__Reg1_3__Tie0__Mem645_2__Imm1_0,
2213 Convert__Reg1_2__Tie0__Mem325_3__Imm1_0,
2214 Convert__Reg1_3__Tie0__Mem325_2__Imm1_0,
2215 Convert__Reg1_1__Imm1_0,
2216 Convert__Reg1_1__Mem85_0,
2217 Convert__regEAX__ImmSExti32i81_0,
2218 Convert__regRAX__ImmSExti64i81_0,
2219 Convert__Reg1_1__ImmSExti64i321_0,
2220 Convert__DstIdx161_0__SrcIdx162_1,
2221 Convert__DstIdx321_0__SrcIdx322_1,
2222 Convert__DstIdx641_0__SrcIdx642_1,
2223 Convert__DstIdx81_0__SrcIdx82_1,
2224 Convert__DstIdx161_1__SrcIdx162_0,
2225 Convert__DstIdx321_1__SrcIdx322_0,
2226 Convert__DstIdx641_1__SrcIdx642_0,
2227 Convert__DstIdx81_1__SrcIdx82_0,
2228 Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2,
2229 Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0,
2230 Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2,
2231 Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0,
2232 Convert__regAX__ImmSExti16i81_0,
2233 Convert__Mem1285_0,
2234 Convert__Mem85_1,
2235 Convert__Imm1_0__Imm1_1,
2236 Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
2237 Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
2238 Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
2239 Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
2240 Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2,
2241 Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0,
2242 Convert__regST1,
2243 Convert__regST0,
2244 Convert__Mem805_0,
2245 Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
2246 Convert__Reg1_0__Reg1_0__Imm1_1,
2247 Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
2248 Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
2249 Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
2250 Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
2251 Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
2252 Convert__Reg1_0__Mem165_1__Imm1_2,
2253 Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
2254 Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
2255 Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
2256 Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
2257 Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
2258 Convert__Reg1_1__Reg1_1__Imm1_0,
2259 Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
2260 Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
2261 Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
2262 Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
2263 Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
2264 Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
2265 Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
2266 Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
2267 Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
2268 Convert__Reg1_2__Mem165_1__Imm1_0,
2269 Convert__ImmUnsignedi81_1,
2270 Convert__ImmUnsignedi81_0,
2271 Convert__DstIdx161_1,
2272 Convert__DstIdx321_1,
2273 Convert__DstIdx81_1,
2274 Convert__DstIdx161_0,
2275 Convert__DstIdx321_0,
2276 Convert__DstIdx81_0,
2277 Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
2278 Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
2279 Convert__Mem5_1,
2280 Convert__SrcIdx162_0,
2281 Convert__SrcIdx322_0,
2282 Convert__SrcIdx642_0,
2283 Convert__SrcIdx82_0,
2284 Convert__SrcIdx82_1,
2285 Convert__SrcIdx162_1,
2286 Convert__SrcIdx322_1,
2287 Convert__SrcIdx642_1,
2288 Convert__MemOffs16_82_1,
2289 Convert__MemOffs32_82_1,
2290 Convert__MemOffs16_162_1,
2291 Convert__MemOffs32_162_1,
2292 Convert__MemOffs16_322_1,
2293 Convert__MemOffs32_322_1,
2294 Convert__MemOffs32_642_1,
2295 Convert__MemOffs16_162_0,
2296 Convert__MemOffs16_322_0,
2297 Convert__MemOffs16_82_0,
2298 Convert__MemOffs32_162_0,
2299 Convert__MemOffs32_322_0,
2300 Convert__MemOffs32_642_0,
2301 Convert__MemOffs32_82_0,
2302 Convert__MemOffs64_82_1,
2303 Convert__MemOffs64_162_1,
2304 Convert__MemOffs64_322_1,
2305 Convert__MemOffs64_642_1,
2306 Convert__MemOffs64_162_0,
2307 Convert__MemOffs64_322_0,
2308 Convert__MemOffs64_642_0,
2309 Convert__MemOffs64_82_0,
2310 Convert__GR32orGR641_1__Reg1_0,
2311 Convert__GR32orGR641_0__Reg1_1,
2312 Convert__Reg1_1__Tie0__Reg1_0__imm_95_17,
2313 Convert__Reg1_0__Tie0__Reg1_1__imm_95_17,
2314 Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17,
2315 Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17,
2316 Convert__Reg1_1__Tie0__Reg1_0__imm_95_1,
2317 Convert__Reg1_0__Tie0__Reg1_1__imm_95_1,
2318 Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1,
2319 Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1,
2320 Convert__Reg1_1__Tie0__Reg1_0__imm_95_16,
2321 Convert__Reg1_0__Tie0__Reg1_1__imm_95_16,
2322 Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16,
2323 Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16,
2324 Convert__Reg1_1__Tie0__Reg1_0__imm_95_0,
2325 Convert__Reg1_0__Tie0__Reg1_1__imm_95_0,
2326 Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0,
2327 Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0,
2328 Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
2329 Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
2330 Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
2331 Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
2332 Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
2333 Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
2334 Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2,
2335 Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2,
2336 Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0,
2337 Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0,
2338 Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2,
2339 Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0,
2340 Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
2341 Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2342 Convert__Reg1_0__Tie0__ImmUnsignedi81_1,
2343 Convert__Reg1_1__Tie0__ImmUnsignedi81_0,
2344 Convert__ImmSExti64i81_0,
2345 Convert__ImmSExti16i81_0,
2346 Convert__ImmSExti32i81_0,
2347 Convert__Mem165_0__ImmUnsignedi81_1,
2348 Convert__Mem325_0__ImmUnsignedi81_1,
2349 Convert__Mem645_0__ImmUnsignedi81_1,
2350 Convert__Mem85_0__ImmUnsignedi81_1,
2351 Convert__Reg1_1__Tie0,
2352 Convert__Mem85_1__ImmUnsignedi81_0,
2353 Convert__Mem325_1__ImmUnsignedi81_0,
2354 Convert__Mem645_1__ImmUnsignedi81_0,
2355 Convert__Mem165_1__ImmUnsignedi81_0,
2356 Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
2357 Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2358 Convert__DstIdx641_0,
2359 Convert__DstIdx641_1,
2360 Convert__Mem325_2__Reg1_1,
2361 Convert__Mem645_2__Reg1_1,
2362 Convert__Mem165_2__Reg1_1,
2363 Convert__Reg1_0__Reg1_1__Mem1285_2,
2364 Convert__Reg1_0__Reg1_1__Mem2565_2,
2365 Convert__Reg1_0__Reg1_1__Mem5125_2,
2366 Convert__Reg1_2__Reg1_1__Mem1285_0,
2367 Convert__Reg1_2__Reg1_1__Mem2565_0,
2368 Convert__Reg1_2__Reg1_1__Mem5125_0,
2369 Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
2370 Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
2371 Convert__Reg1_3__Reg1_2__Mem645_0,
2372 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5,
2373 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5,
2374 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0,
2375 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5,
2376 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5,
2377 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0,
2378 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0,
2379 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0,
2380 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
2381 Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
2382 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5,
2383 Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
2384 Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
2385 Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
2386 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
2387 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2388 Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
2389 Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
2390 Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
2391 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0,
2392 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
2393 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2394 Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2395 Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
2396 Convert__Reg1_3__Reg1_2__Mem325_0,
2397 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5,
2398 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0,
2399 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
2400 Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
2401 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0,
2402 Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0,
2403 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0,
2404 Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0,
2405 Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2406 Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2407 Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2408 Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2409 Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2410 Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2411 Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2412 Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2413 Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2414 Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2415 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2416 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2417 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2418 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2419 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2420 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2421 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2422 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2423 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2424 Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2425 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2426 Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2427 Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2428 Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2429 Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2430 Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2431 Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2432 Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2433 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2434 Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2435 Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2436 Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2437 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2438 Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2439 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2440 Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2441 Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
2442 Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
2443 Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
2444 Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
2445 Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
2446 Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
2447 Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
2448 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
2449 Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
2450 Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
2451 Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
2452 Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
2453 Convert__Reg1_1__Tie0__Reg1_3__Reg1_0,
2454 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4,
2455 Convert__Reg1_0__Tie0__Reg1_2__Mem645_4,
2456 Convert__Reg1_1__Tie0__Reg1_3__Mem645_0,
2457 Convert__Reg1_1__Reg1_3__Reg1_0,
2458 Convert__Reg1_0__Reg1_2__Reg1_5,
2459 Convert__Reg1_0__Reg1_2__Mem645_5,
2460 Convert__Reg1_1__Reg1_3__Mem645_0,
2461 Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4,
2462 Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0,
2463 Convert__Reg1_0__Reg1_2__Mem1285_5,
2464 Convert__Reg1_1__Reg1_3__Mem1285_0,
2465 Convert__Reg1_0__Mem2565_1,
2466 Convert__Reg1_1__Mem2565_0,
2467 Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4,
2468 Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0,
2469 Convert__Reg1_0__Reg1_2__Mem2565_5,
2470 Convert__Reg1_1__Reg1_3__Mem2565_0,
2471 Convert__Reg1_0__Tie0__Reg1_2__Mem325_4,
2472 Convert__Reg1_1__Tie0__Reg1_3__Mem325_0,
2473 Convert__Reg1_0__Reg1_2__Mem325_5,
2474 Convert__Reg1_1__Reg1_3__Mem325_0,
2475 Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0,
2476 Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0,
2477 Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0,
2478 Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0,
2479 Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0,
2480 Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0,
2481 Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0,
2482 Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0,
2483 Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0,
2484 Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0,
2485 Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0,
2486 Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0,
2487 Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0,
2488 Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0,
2489 Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0,
2490 Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0,
2491 Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0,
2492 Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0,
2493 Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0,
2494 Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0,
2495 Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0,
2496 Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0,
2497 Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0,
2498 Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0,
2499 Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0,
2500 Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0,
2501 Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0,
2502 Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0,
2503 Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0,
2504 Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0,
2505 Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2506 Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2507 Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2508 Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2509 Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2510 Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2511 Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2512 Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2513 Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2514 Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2515 Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2516 Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2517 Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2518 Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2519 Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2520 Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2521 Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2522 Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2523 Convert__Reg1_2__Reg1_1,
2524 Convert__Mem2565_1__Reg1_0,
2525 Convert__Mem5125_1__Reg1_0,
2526 Convert__Mem2565_0__Reg1_1,
2527 Convert__Mem5125_0__Reg1_1,
2528 Convert__Mem1285_1__Reg1_3__Reg1_0,
2529 Convert__Mem2565_1__Reg1_3__Reg1_0,
2530 Convert__Mem5125_1__Reg1_3__Reg1_0,
2531 Convert__Mem1285_0__Reg1_2__Reg1_4,
2532 Convert__Mem2565_0__Reg1_2__Reg1_4,
2533 Convert__Mem5125_0__Reg1_2__Reg1_4,
2534 Convert__Reg1_2__Mem325_0,
2535 Convert__Reg1_2__Tie0__Reg1_4__Mem325_0,
2536 Convert__Reg1_2__Reg1_4__Mem325_0,
2537 Convert__Reg1_0__Mem5125_1,
2538 Convert__Reg1_1__Mem5125_0,
2539 Convert__Reg1_0__Reg1_1__AVX512RC1_2,
2540 Convert__Reg1_2__Reg1_1__AVX512RC1_0,
2541 Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4,
2542 Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0,
2543 Convert__Reg1_0__Reg1_2__Mem5125_5,
2544 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5,
2545 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0,
2546 Convert__Reg1_1__Reg1_3__Mem5125_0,
2547 Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
2548 Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
2549 Convert__Reg1_2__Mem645_0,
2550 Convert__Reg1_2__Tie0__Reg1_4__Mem645_0,
2551 Convert__Reg1_2__Reg1_4__Mem645_0,
2552 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1,
2553 Convert__Reg1_2__Reg1_4__Reg1_1,
2554 Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2555 Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2556 Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
2557 Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
2558 Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
2559 Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2560 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2561 Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2562 Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2563 Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2564 Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2565 Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2566 Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2567 Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2568 Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
2569 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6,
2570 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2571 Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2572 Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
2573 Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2574 Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
2575 Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
2576 Convert__Reg1_3__Reg1_2__Reg1_1,
2577 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1,
2578 Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
2579 Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2580 Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2581 Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2582 Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2583 Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2584 Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2585 Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2586 Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2587 Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2588 Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2589 Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2590 Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2591 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2592 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2593 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2594 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2595 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2596 Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2597 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2598 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2599 Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2600 Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2601 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2602 Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2603 Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2604 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2605 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2606 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2607 Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2608 Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2609 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2610 Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2611 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2612 Convert__Reg1_2__Tie0__Reg1_1__Reg1_0,
2613 Convert__Reg1_0__Tie0__Reg1_1__Reg1_2,
2614 Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2,
2615 Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2,
2616 Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2,
2617 Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0,
2618 Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0,
2619 Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0,
2620 Convert__Reg1_0__Tie0__Reg1_1__Mem645_2,
2621 Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3,
2622 Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0,
2623 Convert__Reg1_3__Tie0__Reg1_2__Mem645_0,
2624 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6,
2625 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6,
2626 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6,
2627 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6,
2628 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6,
2629 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2630 Convert__Reg1_0__Tie0__Reg1_1__Mem325_2,
2631 Convert__Reg1_3__Tie0__Reg1_2__Mem325_0,
2632 Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6,
2633 Convert__Reg1_2__Tie0__Reg1_1__Mem645_0,
2634 Convert__Reg1_2__Tie0__Reg1_1__Mem325_0,
2635 Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
2636 Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
2637 Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
2638 Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
2639 Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
2640 Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
2641 Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
2642 Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
2643 Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
2644 Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
2645 Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
2646 Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
2647 Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
2648 Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
2649 Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
2650 Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2651 Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2652 Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2653 Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2654 Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2655 Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2656 Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2657 Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2658 Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2659 Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2660 Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2661 Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2662 Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
2663 Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2664 Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2665 Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2666 Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5,
2667 Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0,
2668 Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5,
2669 Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0,
2670 Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1,
2671 Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1,
2672 Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC1285_1__Tie1,
2673 Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC1285_1__Tie1,
2674 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4,
2675 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC128X5_4,
2676 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC256X5_4,
2677 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0,
2678 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC128X5_0,
2679 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC256X5_0,
2680 Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1,
2681 Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1,
2682 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4,
2683 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4,
2684 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0,
2685 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0,
2686 Convert__Reg1_1__Mem512_RC256X5_3,
2687 Convert__Reg1_2__Mem512_RC256X5_0,
2688 Convert__Reg1_1__Mem512_RC5125_3,
2689 Convert__Reg1_2__Mem512_RC5125_0,
2690 Convert__Reg1_1__Mem256_RC5125_3,
2691 Convert__Reg1_2__Mem256_RC5125_0,
2692 Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC2565_1__Tie1,
2693 Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC2565_1__Tie1,
2694 Convert__Reg1_2__Reg1_0__Tie0__Mem64_RC1285_1__Tie1,
2695 Convert__Reg1_0__Reg1_2__Tie0__Mem64_RC1285_1__Tie1,
2696 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC256X5_4,
2697 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem64_RC128X5_4,
2698 Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC5125_4,
2699 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC256X5_0,
2700 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC5125_0,
2701 Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem64_RC128X5_0,
2702 Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2703 Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2704 Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2705 Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2706 Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2707 Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2708 Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
2709 Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2710 Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
2711 Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
2712 Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2713 Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
2714 Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2715 Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2716 Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
2717 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2718 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2719 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2720 Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4,
2721 Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2722 Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7,
2723 Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2724 Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8,
2725 Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2726 Convert__Mem1285_2__Reg1_1__Reg1_0,
2727 Convert__Mem2565_2__Reg1_1__Reg1_0,
2728 Convert__Mem1285_0__Reg1_1__Reg1_2,
2729 Convert__Mem2565_0__Reg1_1__Reg1_2,
2730 Convert__Reg1_0__Reg1_2__Reg1_4,
2731 Convert__Mem645_1__Reg1_3__Reg1_0,
2732 Convert__Mem645_0__Reg1_2__Reg1_4,
2733 Convert__Mem325_1__Reg1_3__Reg1_0,
2734 Convert__Mem325_0__Reg1_2__Reg1_4,
2735 Convert__Reg1_0__Tie0__Reg1_2__Mem85_4,
2736 Convert__Reg1_1__Tie0__Reg1_3__Mem85_0,
2737 Convert__Reg1_0__Reg1_2__Mem85_5,
2738 Convert__Reg1_1__Reg1_3__Mem85_0,
2739 Convert__Reg1_0__Tie0__Reg1_2__Mem165_4,
2740 Convert__Reg1_1__Tie0__Reg1_3__Mem165_0,
2741 Convert__Reg1_0__Reg1_2__Mem165_5,
2742 Convert__Reg1_1__Reg1_3__Mem165_0,
2743 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
2744 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
2745 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
2746 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17,
2747 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17,
2748 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
2749 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17,
2750 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17,
2751 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
2752 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
2753 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
2754 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1,
2755 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1,
2756 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
2757 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1,
2758 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1,
2759 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
2760 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
2761 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
2762 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16,
2763 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16,
2764 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
2765 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16,
2766 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16,
2767 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
2768 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
2769 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
2770 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0,
2771 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0,
2772 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
2773 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0,
2774 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0,
2775 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4,
2776 Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4,
2777 Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4,
2778 Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4,
2779 Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4,
2780 Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2781 Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2782 Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2783 Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2784 Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2785 Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
2786 Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
2787 Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
2788 Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
2789 Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
2790 Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
2791 Convert__Mem165_1__Reg1_3__Reg1_0,
2792 Convert__Mem165_0__Reg1_2__Reg1_4,
2793 Convert__Reg1_2__Mem1285_1__Reg1_0,
2794 Convert__Reg1_0__Mem1285_1__Reg1_2,
2795 Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0,
2796 Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0,
2797 Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0,
2798 Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4,
2799 Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4,
2800 Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4,
2801 Convert__Reg1_3__Mem256_RC128X5_1__Tie0__Reg1_0,
2802 Convert__Reg1_3__Mem512_RC256X5_1__Tie0__Reg1_0,
2803 Convert__Reg1_2__Mem256_RC128X5_0__Tie0__Reg1_4,
2804 Convert__Reg1_2__Mem512_RC256X5_0__Tie0__Reg1_4,
2805 Convert__Reg1_3__Mem128_RC256X5_1__Tie0__Reg1_0,
2806 Convert__Reg1_3__Mem64_RC128X5_1__Tie0__Reg1_0,
2807 Convert__Reg1_3__Mem256_RC5125_1__Tie0__Reg1_0,
2808 Convert__Reg1_2__Mem128_RC256X5_0__Tie0__Reg1_4,
2809 Convert__Reg1_2__Mem256_RC5125_0__Tie0__Reg1_4,
2810 Convert__Reg1_2__Mem64_RC128X5_0__Tie0__Reg1_4,
2811 Convert__AbsMem161_0,
2812 CVT_NUM_SIGNATURES
2813};
2814
2815} // end anonymous namespace
2816
2817static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
2818 // Convert_NoOperands
2819 { CVT_Done },
2820 // Convert__imm_95_10
2821 { CVT_imm_95_10, 0, CVT_Done },
2822 // Convert__Imm1_0
2823 { CVT_95_addImmOperands, 1, CVT_Done },
2824 // Convert__Imm1_1
2825 { CVT_95_addImmOperands, 2, CVT_Done },
2826 // Convert__regAX__Tie0__ImmSExti16i81_1
2827 { CVT_regAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2828 // Convert__regEAX__Tie0__ImmSExti32i81_1
2829 { CVT_regEAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2830 // Convert__regRAX__Tie0__ImmSExti64i81_1
2831 { CVT_regRAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2832 // Convert__ImmSExti64i321_1
2833 { CVT_95_addImmOperands, 2, CVT_Done },
2834 // Convert__Reg1_0__Tie0__Reg1_1
2835 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done },
2836 // Convert__Reg1_0__Tie0__ImmSExti16i81_1
2837 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2838 // Convert__Reg1_0__Tie0__Imm1_1
2839 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2840 // Convert__Reg1_0__Tie0__Mem165_1
2841 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
2842 // Convert__Reg1_0__Tie0__ImmSExti32i81_1
2843 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2844 // Convert__Reg1_0__Tie0__Mem325_1
2845 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
2846 // Convert__Reg1_0__Tie0__ImmSExti64i81_1
2847 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2848 // Convert__Reg1_0__Tie0__ImmSExti64i321_1
2849 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
2850 // Convert__Reg1_0__Tie0__Mem645_1
2851 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
2852 // Convert__Reg1_0__Tie0__Mem85_1
2853 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
2854 // Convert__Mem165_0__Reg1_1
2855 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2856 // Convert__Mem165_0__ImmSExti16i81_1
2857 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2858 // Convert__Mem165_0__Imm1_1
2859 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2860 // Convert__Mem325_0__Reg1_1
2861 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2862 // Convert__Mem325_0__ImmSExti32i81_1
2863 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2864 // Convert__Mem325_0__Imm1_1
2865 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2866 // Convert__Mem645_0__Reg1_1
2867 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2868 // Convert__Mem645_0__ImmSExti64i81_1
2869 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2870 // Convert__Mem645_0__ImmSExti64i321_1
2871 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2872 // Convert__Mem85_0__Reg1_1
2873 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2874 // Convert__Mem85_0__Imm1_1
2875 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2876 // Convert__Reg1_1__Tie0__Reg1_0
2877 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
2878 // Convert__Mem85_1__Reg1_0
2879 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2880 // Convert__Reg1_1__Tie0__Imm1_0
2881 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2882 // Convert__Mem85_1__Imm1_0
2883 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2884 // Convert__Reg1_1__Tie0__Mem85_0
2885 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
2886 // Convert__Mem325_1__Reg1_0
2887 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2888 // Convert__regEAX__Tie0__ImmSExti32i81_0
2889 { CVT_regEAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2890 // Convert__Reg1_1__Tie0__ImmSExti32i81_0
2891 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2892 // Convert__Mem325_1__ImmSExti32i81_0
2893 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2894 // Convert__Mem325_1__Imm1_0
2895 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2896 // Convert__Reg1_1__Tie0__Mem325_0
2897 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
2898 // Convert__Mem645_1__Reg1_0
2899 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2900 // Convert__regRAX__Tie0__ImmSExti64i81_0
2901 { CVT_regRAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2902 // Convert__Reg1_1__Tie0__ImmSExti64i81_0
2903 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2904 // Convert__Mem645_1__ImmSExti64i81_0
2905 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2906 // Convert__ImmSExti64i321_0
2907 { CVT_95_addImmOperands, 1, CVT_Done },
2908 // Convert__Reg1_1__Tie0__ImmSExti64i321_0
2909 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2910 // Convert__Mem645_1__ImmSExti64i321_0
2911 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2912 // Convert__Reg1_1__Tie0__Mem645_0
2913 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
2914 // Convert__Mem165_1__Reg1_0
2915 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2916 // Convert__regAX__Tie0__ImmSExti16i81_0
2917 { CVT_regAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2918 // Convert__Reg1_1__Tie0__ImmSExti16i81_0
2919 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
2920 // Convert__Mem165_1__ImmSExti16i81_0
2921 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2922 // Convert__Mem165_1__Imm1_0
2923 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2924 // Convert__Reg1_1__Tie0__Mem165_0
2925 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
2926 // Convert__Reg1_0__Tie0__Mem1285_1
2927 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
2928 // Convert__Reg1_1__Tie0__Mem1285_0
2929 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
2930 // Convert__Reg1_0__Reg1_1
2931 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
2932 // Convert__Reg1_0__Mem325_1
2933 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
2934 // Convert__Reg1_0__Mem645_1
2935 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
2936 // Convert__Reg1_1__Reg1_0
2937 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
2938 // Convert__Reg1_1__Mem325_0
2939 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2940 // Convert__Reg1_1__Mem645_0
2941 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2942 // Convert__Reg1_0__Mem1285_1
2943 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
2944 // Convert__Reg1_1__Mem1285_0
2945 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2946 // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
2947 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
2948 // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
2949 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
2950 // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
2951 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
2952 // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
2953 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2954 // Convert__Reg1_0__Reg1_1__Reg1_2
2955 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
2956 // Convert__Reg1_0__Reg1_1__Mem325_2
2957 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
2958 // Convert__Reg1_0__Reg1_1__Mem645_2
2959 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
2960 // Convert__Reg1_2__Reg1_1__Reg1_0
2961 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
2962 // Convert__Reg1_2__Reg1_1__Mem325_0
2963 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2964 // Convert__Reg1_2__Reg1_1__Mem645_0
2965 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2966 // Convert__Reg1_0__Reg1_1__Imm1_2
2967 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
2968 // Convert__Reg1_0__Mem325_1__Reg1_2
2969 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
2970 // Convert__Reg1_0__Mem325_1__Imm1_2
2971 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
2972 // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
2973 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
2974 // Convert__Reg1_0__Mem645_1__Reg1_2
2975 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
2976 // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
2977 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
2978 // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
2979 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
2980 // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
2981 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2982 // Convert__Reg1_2__Reg1_1__Imm1_0
2983 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
2984 // Convert__Reg1_2__Mem325_1__Imm1_0
2985 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2986 // Convert__Reg1_2__Mem325_1__Reg1_0
2987 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2988 // Convert__Reg1_2__Mem645_1__Reg1_0
2989 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2990 // Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2
2991 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
2992 // Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2
2993 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
2994 // Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0
2995 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
2996 // Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0
2997 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2998 // Convert__Reg1_2__Tie0__Reg1_1
2999 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done },
3000 // Convert__Reg1_2__Tie0__Mem1285_1
3001 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
3002 // Convert__Reg1_0__Mem5_1
3003 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3004 // Convert__Reg1_1__Mem5_0
3005 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3006 // Convert__Mem1285_1__Reg1_0
3007 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3008 // Convert__Mem1285_0__Reg1_1
3009 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3010 // Convert__Reg1_0__Mem165_1
3011 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3012 // Convert__Reg1_1__Mem165_0
3013 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3014 // Convert__Reg1_0__Tie0
3015 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_Done },
3016 // Convert__Reg1_0__ImmSExti16i81_1
3017 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3018 // Convert__Reg1_0__ImmSExti32i81_1
3019 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3020 // Convert__Reg1_0__ImmSExti64i81_1
3021 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3022 // Convert__Reg1_1__ImmSExti32i81_0
3023 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3024 // Convert__Reg1_1__ImmSExti64i81_0
3025 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3026 // Convert__Reg1_1__ImmSExti16i81_0
3027 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3028 // Convert__Reg1_0
3029 { CVT_95_Reg, 1, CVT_Done },
3030 // Convert__AbsMem1_0
3031 { CVT_95_addAbsMemOperands, 1, CVT_Done },
3032 // Convert__Mem165_0
3033 { CVT_95_addMemOperands, 1, CVT_Done },
3034 // Convert__Mem325_0
3035 { CVT_95_addMemOperands, 1, CVT_Done },
3036 // Convert__Mem645_0
3037 { CVT_95_addMemOperands, 1, CVT_Done },
3038 // Convert__Mem5_0
3039 { CVT_95_addMemOperands, 1, CVT_Done },
3040 // Convert__Mem165_1
3041 { CVT_95_addMemOperands, 2, CVT_Done },
3042 // Convert__Mem325_1
3043 { CVT_95_addMemOperands, 2, CVT_Done },
3044 // Convert__Mem645_1
3045 { CVT_95_addMemOperands, 2, CVT_Done },
3046 // Convert__Imm1_1__Imm1_0
3047 { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3048 // Convert__Reg1_1
3049 { CVT_95_Reg, 2, CVT_Done },
3050 // Convert__Mem85_0
3051 { CVT_95_addMemOperands, 1, CVT_Done },
3052 // Convert__Reg1_0__Tie0__Reg1_0
3053 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
3054 // Convert__regAX__ImmSExti16i81_1
3055 { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3056 // Convert__regEAX__ImmSExti32i81_1
3057 { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3058 // Convert__regRAX__ImmSExti64i81_1
3059 { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3060 // Convert__Reg1_0__Imm1_1
3061 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3062 // Convert__Reg1_0__ImmSExti64i321_1
3063 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3064 // Convert__Reg1_0__Mem85_1
3065 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3066 // Convert__Reg1_3__Tie0__Reg1_2__Imm1_0
3067 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3068 // Convert__Reg1_2__Tie0__Reg1_3__Imm1_0
3069 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3070 // Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0
3071 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3072 // Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0
3073 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3074 // Convert__Reg1_2__Tie0__Mem645_3__Imm1_0
3075 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3076 // Convert__Reg1_3__Tie0__Mem645_2__Imm1_0
3077 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3078 // Convert__Reg1_2__Tie0__Mem325_3__Imm1_0
3079 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3080 // Convert__Reg1_3__Tie0__Mem325_2__Imm1_0
3081 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3082 // Convert__Reg1_1__Imm1_0
3083 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3084 // Convert__Reg1_1__Mem85_0
3085 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3086 // Convert__regEAX__ImmSExti32i81_0
3087 { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3088 // Convert__regRAX__ImmSExti64i81_0
3089 { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3090 // Convert__Reg1_1__ImmSExti64i321_0
3091 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3092 // Convert__DstIdx161_0__SrcIdx162_1
3093 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3094 // Convert__DstIdx321_0__SrcIdx322_1
3095 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3096 // Convert__DstIdx641_0__SrcIdx642_1
3097 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3098 // Convert__DstIdx81_0__SrcIdx82_1
3099 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3100 // Convert__DstIdx161_1__SrcIdx162_0
3101 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3102 // Convert__DstIdx321_1__SrcIdx322_0
3103 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3104 // Convert__DstIdx641_1__SrcIdx642_0
3105 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3106 // Convert__DstIdx81_1__SrcIdx82_0
3107 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3108 // Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2
3109 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3110 // Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0
3111 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3112 // Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2
3113 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3114 // Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0
3115 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3116 // Convert__regAX__ImmSExti16i81_0
3117 { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3118 // Convert__Mem1285_0
3119 { CVT_95_addMemOperands, 1, CVT_Done },
3120 // Convert__Mem85_1
3121 { CVT_95_addMemOperands, 2, CVT_Done },
3122 // Convert__Imm1_0__Imm1_1
3123 { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3124 // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
3125 { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3126 // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
3127 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3128 // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
3129 { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3130 // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
3131 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3132 // Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2
3133 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3134 // Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0
3135 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3136 // Convert__regST1
3137 { CVT_regST1, 0, CVT_Done },
3138 // Convert__regST0
3139 { CVT_regST0, 0, CVT_Done },
3140 // Convert__Mem805_0
3141 { CVT_95_addMemOperands, 1, CVT_Done },
3142 // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
3143 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3144 // Convert__Reg1_0__Reg1_0__Imm1_1
3145 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3146 // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
3147 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3148 // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
3149 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3150 // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
3151 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3152 // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
3153 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3154 // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
3155 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3156 // Convert__Reg1_0__Mem165_1__Imm1_2
3157 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3158 // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
3159 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3160 // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
3161 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3162 // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
3163 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3164 // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
3165 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3166 // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
3167 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3168 // Convert__Reg1_1__Reg1_1__Imm1_0
3169 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3170 // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
3171 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3172 // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
3173 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3174 // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
3175 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3176 // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
3177 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3178 // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
3179 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3180 // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
3181 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3182 // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
3183 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3184 // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
3185 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3186 // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
3187 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3188 // Convert__Reg1_2__Mem165_1__Imm1_0
3189 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3190 // Convert__ImmUnsignedi81_1
3191 { CVT_95_addImmOperands, 2, CVT_Done },
3192 // Convert__ImmUnsignedi81_0
3193 { CVT_95_addImmOperands, 1, CVT_Done },
3194 // Convert__DstIdx161_1
3195 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3196 // Convert__DstIdx321_1
3197 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3198 // Convert__DstIdx81_1
3199 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3200 // Convert__DstIdx161_0
3201 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3202 // Convert__DstIdx321_0
3203 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3204 // Convert__DstIdx81_0
3205 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3206 // Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
3207 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3208 // Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
3209 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3210 // Convert__Mem5_1
3211 { CVT_95_addMemOperands, 2, CVT_Done },
3212 // Convert__SrcIdx162_0
3213 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3214 // Convert__SrcIdx322_0
3215 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3216 // Convert__SrcIdx642_0
3217 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3218 // Convert__SrcIdx82_0
3219 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3220 // Convert__SrcIdx82_1
3221 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3222 // Convert__SrcIdx162_1
3223 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3224 // Convert__SrcIdx322_1
3225 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3226 // Convert__SrcIdx642_1
3227 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3228 // Convert__MemOffs16_82_1
3229 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3230 // Convert__MemOffs32_82_1
3231 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3232 // Convert__MemOffs16_162_1
3233 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3234 // Convert__MemOffs32_162_1
3235 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3236 // Convert__MemOffs16_322_1
3237 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3238 // Convert__MemOffs32_322_1
3239 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3240 // Convert__MemOffs32_642_1
3241 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3242 // Convert__MemOffs16_162_0
3243 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3244 // Convert__MemOffs16_322_0
3245 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3246 // Convert__MemOffs16_82_0
3247 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3248 // Convert__MemOffs32_162_0
3249 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3250 // Convert__MemOffs32_322_0
3251 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3252 // Convert__MemOffs32_642_0
3253 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3254 // Convert__MemOffs32_82_0
3255 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3256 // Convert__MemOffs64_82_1
3257 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3258 // Convert__MemOffs64_162_1
3259 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3260 // Convert__MemOffs64_322_1
3261 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3262 // Convert__MemOffs64_642_1
3263 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3264 // Convert__MemOffs64_162_0
3265 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3266 // Convert__MemOffs64_322_0
3267 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3268 // Convert__MemOffs64_642_0
3269 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3270 // Convert__MemOffs64_82_0
3271 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3272 // Convert__GR32orGR641_1__Reg1_0
3273 { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
3274 // Convert__GR32orGR641_0__Reg1_1
3275 { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
3276 // Convert__Reg1_1__Tie0__Reg1_0__imm_95_17
3277 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
3278 // Convert__Reg1_0__Tie0__Reg1_1__imm_95_17
3279 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
3280 // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17
3281 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
3282 // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17
3283 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
3284 // Convert__Reg1_1__Tie0__Reg1_0__imm_95_1
3285 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
3286 // Convert__Reg1_0__Tie0__Reg1_1__imm_95_1
3287 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
3288 // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1
3289 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3290 // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1
3291 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3292 // Convert__Reg1_1__Tie0__Reg1_0__imm_95_16
3293 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
3294 // Convert__Reg1_0__Tie0__Reg1_1__imm_95_16
3295 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
3296 // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16
3297 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
3298 // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16
3299 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
3300 // Convert__Reg1_1__Tie0__Reg1_0__imm_95_0
3301 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
3302 // Convert__Reg1_0__Tie0__Reg1_1__imm_95_0
3303 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
3304 // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0
3305 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3306 // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0
3307 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3308 // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
3309 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3310 // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
3311 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3312 // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
3313 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3314 // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
3315 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3316 // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
3317 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3318 // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
3319 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3320 // Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2
3321 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3322 // Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2
3323 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3324 // Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0
3325 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3326 // Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0
3327 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3328 // Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2
3329 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3330 // Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0
3331 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3332 // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
3333 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3334 // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
3335 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3336 // Convert__Reg1_0__Tie0__ImmUnsignedi81_1
3337 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
3338 // Convert__Reg1_1__Tie0__ImmUnsignedi81_0
3339 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
3340 // Convert__ImmSExti64i81_0
3341 { CVT_95_addImmOperands, 1, CVT_Done },
3342 // Convert__ImmSExti16i81_0
3343 { CVT_95_addImmOperands, 1, CVT_Done },
3344 // Convert__ImmSExti32i81_0
3345 { CVT_95_addImmOperands, 1, CVT_Done },
3346 // Convert__Mem165_0__ImmUnsignedi81_1
3347 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3348 // Convert__Mem325_0__ImmUnsignedi81_1
3349 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3350 // Convert__Mem645_0__ImmUnsignedi81_1
3351 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3352 // Convert__Mem85_0__ImmUnsignedi81_1
3353 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3354 // Convert__Reg1_1__Tie0
3355 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_Done },
3356 // Convert__Mem85_1__ImmUnsignedi81_0
3357 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3358 // Convert__Mem325_1__ImmUnsignedi81_0
3359 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3360 // Convert__Mem645_1__ImmUnsignedi81_0
3361 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3362 // Convert__Mem165_1__ImmUnsignedi81_0
3363 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3364 // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
3365 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3366 // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
3367 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3368 // Convert__DstIdx641_0
3369 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3370 // Convert__DstIdx641_1
3371 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3372 // Convert__Mem325_2__Reg1_1
3373 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3374 // Convert__Mem645_2__Reg1_1
3375 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3376 // Convert__Mem165_2__Reg1_1
3377 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3378 // Convert__Reg1_0__Reg1_1__Mem1285_2
3379 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3380 // Convert__Reg1_0__Reg1_1__Mem2565_2
3381 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3382 // Convert__Reg1_0__Reg1_1__Mem5125_2
3383 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3384 // Convert__Reg1_2__Reg1_1__Mem1285_0
3385 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3386 // Convert__Reg1_2__Reg1_1__Mem2565_0
3387 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3388 // Convert__Reg1_2__Reg1_1__Mem5125_0
3389 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3390 // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
3391 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
3392 // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
3393 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3394 // Convert__Reg1_3__Reg1_2__Mem645_0
3395 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3396 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5
3397 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
3398 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5
3399 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3400 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0
3401 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3402 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5
3403 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3404 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5
3405 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3406 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0
3407 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3408 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0
3409 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3410 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0
3411 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3412 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
3413 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3414 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
3415 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3416 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5
3417 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3418 // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
3419 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3420 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
3421 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3422 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
3423 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3424 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
3425 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
3426 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
3427 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3428 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
3429 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3430 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
3431 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3432 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
3433 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3434 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0
3435 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3436 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
3437 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3438 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
3439 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
3440 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
3441 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3442 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
3443 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3444 // Convert__Reg1_3__Reg1_2__Mem325_0
3445 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3446 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5
3447 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3448 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0
3449 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3450 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
3451 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3452 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
3453 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3454 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0
3455 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3456 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0
3457 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3458 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0
3459 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3460 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0
3461 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3462 // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
3463 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
3464 // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
3465 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3466 // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
3467 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3468 // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
3469 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3470 // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
3471 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3472 // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3473 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3474 // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3475 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3476 // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3477 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3478 // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
3479 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3480 // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
3481 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3482 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
3483 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3484 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
3485 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3486 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
3487 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3488 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
3489 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3490 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
3491 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3492 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3493 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3494 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3495 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3496 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3497 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3498 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
3499 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
3500 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
3501 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3502 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
3503 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3504 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
3505 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3506 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
3507 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3508 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
3509 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3510 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3511 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3512 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3513 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3514 // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
3515 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3516 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3517 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3518 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
3519 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3520 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
3521 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3522 // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
3523 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3524 // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
3525 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3526 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
3527 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3528 // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
3529 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3530 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
3531 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3532 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
3533 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3534 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
3535 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
3536 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
3537 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3538 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
3539 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3540 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
3541 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3542 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
3543 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3544 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
3545 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3546 // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
3547 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3548 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
3549 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3550 // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
3551 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3552 // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
3553 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3554 // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
3555 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3556 // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
3557 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3558 // Convert__Reg1_1__Tie0__Reg1_3__Reg1_0
3559 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3560 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4
3561 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3562 // Convert__Reg1_0__Tie0__Reg1_2__Mem645_4
3563 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3564 // Convert__Reg1_1__Tie0__Reg1_3__Mem645_0
3565 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3566 // Convert__Reg1_1__Reg1_3__Reg1_0
3567 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3568 // Convert__Reg1_0__Reg1_2__Reg1_5
3569 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
3570 // Convert__Reg1_0__Reg1_2__Mem645_5
3571 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3572 // Convert__Reg1_1__Reg1_3__Mem645_0
3573 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3574 // Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4
3575 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3576 // Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0
3577 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3578 // Convert__Reg1_0__Reg1_2__Mem1285_5
3579 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3580 // Convert__Reg1_1__Reg1_3__Mem1285_0
3581 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3582 // Convert__Reg1_0__Mem2565_1
3583 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3584 // Convert__Reg1_1__Mem2565_0
3585 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3586 // Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4
3587 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3588 // Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0
3589 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3590 // Convert__Reg1_0__Reg1_2__Mem2565_5
3591 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3592 // Convert__Reg1_1__Reg1_3__Mem2565_0
3593 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3594 // Convert__Reg1_0__Tie0__Reg1_2__Mem325_4
3595 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3596 // Convert__Reg1_1__Tie0__Reg1_3__Mem325_0
3597 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3598 // Convert__Reg1_0__Reg1_2__Mem325_5
3599 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3600 // Convert__Reg1_1__Reg1_3__Mem325_0
3601 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3602 // Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0
3603 { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
3604 // Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0
3605 { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3606 // Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0
3607 { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3608 // Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0
3609 { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3610 // Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0
3611 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3612 // Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0
3613 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3614 // Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0
3615 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3616 // Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0
3617 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3618 // Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0
3619 { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3620 // Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0
3621 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3622 // Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0
3623 { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3624 // Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0
3625 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3626 // Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0
3627 { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3628 // Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0
3629 { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3630 // Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0
3631 { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3632 // Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0
3633 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 1, CVT_Done },
3634 // Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0
3635 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3636 // Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0
3637 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3638 // Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0
3639 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3640 // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0
3641 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3642 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0
3643 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3644 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0
3645 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3646 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0
3647 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3648 // Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0
3649 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3650 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0
3651 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3652 // Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0
3653 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3654 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0
3655 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3656 // Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0
3657 { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3658 // Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0
3659 { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3660 // Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0
3661 { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3662 // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
3663 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
3664 // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
3665 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3666 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
3667 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3668 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
3669 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3670 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
3671 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3672 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
3673 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3674 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
3675 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3676 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
3677 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3678 // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
3679 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3680 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
3681 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3682 // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
3683 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3684 // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
3685 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3686 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
3687 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3688 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
3689 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3690 // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
3691 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3692 // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
3693 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3694 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
3695 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3696 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
3697 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3698 // Convert__Reg1_2__Reg1_1
3699 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3700 // Convert__Mem2565_1__Reg1_0
3701 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3702 // Convert__Mem5125_1__Reg1_0
3703 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3704 // Convert__Mem2565_0__Reg1_1
3705 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3706 // Convert__Mem5125_0__Reg1_1
3707 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3708 // Convert__Mem1285_1__Reg1_3__Reg1_0
3709 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3710 // Convert__Mem2565_1__Reg1_3__Reg1_0
3711 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3712 // Convert__Mem5125_1__Reg1_3__Reg1_0
3713 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3714 // Convert__Mem1285_0__Reg1_2__Reg1_4
3715 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3716 // Convert__Mem2565_0__Reg1_2__Reg1_4
3717 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3718 // Convert__Mem5125_0__Reg1_2__Reg1_4
3719 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3720 // Convert__Reg1_2__Mem325_0
3721 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3722 // Convert__Reg1_2__Tie0__Reg1_4__Mem325_0
3723 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3724 // Convert__Reg1_2__Reg1_4__Mem325_0
3725 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3726 // Convert__Reg1_0__Mem5125_1
3727 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3728 // Convert__Reg1_1__Mem5125_0
3729 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3730 // Convert__Reg1_0__Reg1_1__AVX512RC1_2
3731 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
3732 // Convert__Reg1_2__Reg1_1__AVX512RC1_0
3733 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3734 // Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4
3735 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3736 // Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0
3737 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3738 // Convert__Reg1_0__Reg1_2__Mem5125_5
3739 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3740 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5
3741 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
3742 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0
3743 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3744 // Convert__Reg1_1__Reg1_3__Mem5125_0
3745 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3746 // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
3747 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
3748 // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
3749 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3750 // Convert__Reg1_2__Mem645_0
3751 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3752 // Convert__Reg1_2__Tie0__Reg1_4__Mem645_0
3753 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3754 // Convert__Reg1_2__Reg1_4__Mem645_0
3755 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3756 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1
3757 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
3758 // Convert__Reg1_2__Reg1_4__Reg1_1
3759 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
3760 // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
3761 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3762 // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
3763 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3764 // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
3765 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3766 // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
3767 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3768 // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
3769 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
3770 // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
3771 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3772 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3773 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3774 // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0
3775 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3776 // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3777 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3778 // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3779 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3780 // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3781 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3782 // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3783 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3784 // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3785 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3786 // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3787 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3788 // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
3789 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3790 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6
3791 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
3792 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0
3793 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3794 // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3795 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3796 // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
3797 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3798 // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
3799 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3800 // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
3801 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
3802 // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
3803 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
3804 // Convert__Reg1_3__Reg1_2__Reg1_1
3805 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3806 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1
3807 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3808 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
3809 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3810 // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3
3811 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
3812 // Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
3813 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3814 // Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
3815 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3816 // Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
3817 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3818 // Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0
3819 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3820 // Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3821 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3822 // Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3823 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3824 // Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3825 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3826 // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4
3827 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3828 // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4
3829 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
3830 // Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0
3831 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3832 // Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0
3833 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3834 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
3835 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
3836 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
3837 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3838 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
3839 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3840 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
3841 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3842 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
3843 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3844 // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
3845 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3846 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
3847 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3848 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
3849 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
3850 // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4
3851 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3852 // Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0
3853 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3854 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
3855 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3856 // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3
3857 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3858 // Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0
3859 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3860 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
3861 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3862 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
3863 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3864 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
3865 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3866 // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3
3867 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3868 // Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0
3869 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3870 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
3871 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3872 // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
3873 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3874 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
3875 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3876 // Convert__Reg1_2__Tie0__Reg1_1__Reg1_0
3877 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3878 // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2
3879 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3880 // Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2
3881 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3882 // Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2
3883 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3884 // Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2
3885 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3886 // Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0
3887 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3888 // Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0
3889 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3890 // Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0
3891 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3892 // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2
3893 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3894 // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3
3895 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
3896 // Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0
3897 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3898 // Convert__Reg1_3__Tie0__Reg1_2__Mem645_0
3899 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3900 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6
3901 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3902 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6
3903 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3904 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6
3905 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3906 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6
3907 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3908 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6
3909 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3910 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
3911 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
3912 // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2
3913 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3914 // Convert__Reg1_3__Tie0__Reg1_2__Mem325_0
3915 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3916 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6
3917 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3918 // Convert__Reg1_2__Tie0__Reg1_1__Mem645_0
3919 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3920 // Convert__Reg1_2__Tie0__Reg1_1__Mem325_0
3921 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3922 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
3923 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3924 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
3925 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3926 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
3927 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3928 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
3929 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3930 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
3931 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3932 // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
3933 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3934 // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
3935 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3936 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
3937 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3938 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
3939 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3940 // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
3941 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3942 // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
3943 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3944 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
3945 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3946 // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
3947 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3948 // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
3949 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3950 // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
3951 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
3952 // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3953 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3954 // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
3955 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
3956 // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
3957 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
3958 // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
3959 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
3960 // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
3961 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
3962 // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
3963 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3964 // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
3965 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3966 // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
3967 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3968 // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3969 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3970 // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
3971 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3972 // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3973 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3974 // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
3975 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3976 // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
3977 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
3978 // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
3979 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
3980 // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
3981 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3982 // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
3983 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3984 // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5
3985 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
3986 // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0
3987 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3988 // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5
3989 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
3990 // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0
3991 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3992 // Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1
3993 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
3994 // Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1
3995 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
3996 // Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC1285_1__Tie1
3997 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
3998 // Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC1285_1__Tie1
3999 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4000 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4
4001 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4002 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC128X5_4
4003 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4004 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC256X5_4
4005 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4006 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0
4007 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4008 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC128X5_0
4009 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4010 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC256X5_0
4011 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4012 // Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1
4013 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4014 // Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1
4015 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4016 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4
4017 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4018 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4
4019 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4020 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0
4021 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4022 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0
4023 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4024 // Convert__Reg1_1__Mem512_RC256X5_3
4025 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4026 // Convert__Reg1_2__Mem512_RC256X5_0
4027 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4028 // Convert__Reg1_1__Mem512_RC5125_3
4029 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4030 // Convert__Reg1_2__Mem512_RC5125_0
4031 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4032 // Convert__Reg1_1__Mem256_RC5125_3
4033 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4034 // Convert__Reg1_2__Mem256_RC5125_0
4035 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4036 // Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC2565_1__Tie1
4037 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4038 // Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC2565_1__Tie1
4039 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4040 // Convert__Reg1_2__Reg1_0__Tie0__Mem64_RC1285_1__Tie1
4041 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4042 // Convert__Reg1_0__Reg1_2__Tie0__Mem64_RC1285_1__Tie1
4043 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
4044 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC256X5_4
4045 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4046 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem64_RC128X5_4
4047 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4048 // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC5125_4
4049 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
4050 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC256X5_0
4051 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4052 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC5125_0
4053 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4054 // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem64_RC128X5_0
4055 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
4056 // Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4057 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4058 // Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4059 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4060 // Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4061 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4062 // Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4063 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4064 // Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4065 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4066 // Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4067 { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4068 // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
4069 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4070 // Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6
4071 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4072 // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
4073 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4074 // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
4075 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4076 // Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0
4077 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4078 // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
4079 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4080 // Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6
4081 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4082 // Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0
4083 { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4084 // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
4085 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4086 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
4087 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4088 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
4089 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
4090 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
4091 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4092 // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4
4093 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4094 // Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0
4095 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4096 // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7
4097 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4098 // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4099 { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4100 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8
4101 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4102 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4103 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4104 // Convert__Mem1285_2__Reg1_1__Reg1_0
4105 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4106 // Convert__Mem2565_2__Reg1_1__Reg1_0
4107 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4108 // Convert__Mem1285_0__Reg1_1__Reg1_2
4109 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4110 // Convert__Mem2565_0__Reg1_1__Reg1_2
4111 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4112 // Convert__Reg1_0__Reg1_2__Reg1_4
4113 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4114 // Convert__Mem645_1__Reg1_3__Reg1_0
4115 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4116 // Convert__Mem645_0__Reg1_2__Reg1_4
4117 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4118 // Convert__Mem325_1__Reg1_3__Reg1_0
4119 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4120 // Convert__Mem325_0__Reg1_2__Reg1_4
4121 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4122 // Convert__Reg1_0__Tie0__Reg1_2__Mem85_4
4123 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4124 // Convert__Reg1_1__Tie0__Reg1_3__Mem85_0
4125 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4126 // Convert__Reg1_0__Reg1_2__Mem85_5
4127 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4128 // Convert__Reg1_1__Reg1_3__Mem85_0
4129 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4130 // Convert__Reg1_0__Tie0__Reg1_2__Mem165_4
4131 { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4132 // Convert__Reg1_1__Tie0__Reg1_3__Mem165_0
4133 { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4134 // Convert__Reg1_0__Reg1_2__Mem165_5
4135 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4136 // Convert__Reg1_1__Reg1_3__Mem165_0
4137 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4138 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
4139 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
4140 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
4141 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
4142 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
4143 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4144 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17
4145 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4146 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17
4147 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4148 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
4149 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4150 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17
4151 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4152 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17
4153 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4154 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
4155 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
4156 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
4157 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
4158 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
4159 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4160 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1
4161 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4162 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1
4163 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4164 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
4165 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4166 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1
4167 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4168 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1
4169 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4170 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
4171 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
4172 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
4173 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
4174 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
4175 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4176 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16
4177 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4178 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16
4179 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4180 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
4181 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4182 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16
4183 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4184 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16
4185 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4186 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
4187 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
4188 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
4189 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
4190 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
4191 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4192 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0
4193 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4194 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0
4195 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4196 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
4197 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4198 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0
4199 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4200 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0
4201 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4202 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4
4203 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4204 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4
4205 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4206 // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4
4207 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4208 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4
4209 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4210 // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4
4211 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4212 // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
4213 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4214 // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0
4215 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4216 // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0
4217 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4218 // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4219 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4220 // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4221 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4222 // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
4223 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4224 // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
4225 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4226 // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
4227 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4228 // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
4229 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4230 // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
4231 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4232 // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
4233 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4234 // Convert__Mem165_1__Reg1_3__Reg1_0
4235 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4236 // Convert__Mem165_0__Reg1_2__Reg1_4
4237 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4238 // Convert__Reg1_2__Mem1285_1__Reg1_0
4239 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4240 // Convert__Reg1_0__Mem1285_1__Reg1_2
4241 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
4242 // Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0
4243 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4244 // Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0
4245 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4246 // Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0
4247 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4248 // Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4
4249 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4250 // Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4
4251 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4252 // Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4
4253 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4254 // Convert__Reg1_3__Mem256_RC128X5_1__Tie0__Reg1_0
4255 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4256 // Convert__Reg1_3__Mem512_RC256X5_1__Tie0__Reg1_0
4257 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4258 // Convert__Reg1_2__Mem256_RC128X5_0__Tie0__Reg1_4
4259 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4260 // Convert__Reg1_2__Mem512_RC256X5_0__Tie0__Reg1_4
4261 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4262 // Convert__Reg1_3__Mem128_RC256X5_1__Tie0__Reg1_0
4263 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4264 // Convert__Reg1_3__Mem64_RC128X5_1__Tie0__Reg1_0
4265 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4266 // Convert__Reg1_3__Mem256_RC5125_1__Tie0__Reg1_0
4267 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
4268 // Convert__Reg1_2__Mem128_RC256X5_0__Tie0__Reg1_4
4269 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4270 // Convert__Reg1_2__Mem256_RC5125_0__Tie0__Reg1_4
4271 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4272 // Convert__Reg1_2__Mem64_RC128X5_0__Tie0__Reg1_4
4273 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
4274 // Convert__AbsMem161_0
4275 { CVT_95_addAbsMemOperands, 1, CVT_Done },
4276};
4277
4278void X86AsmParser::
4279convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
4280 const OperandVector &Operands) {
4281 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!")(static_cast <bool> (Kind < CVT_NUM_SIGNATURES &&
"Invalid signature!") ? void (0) : __assert_fail ("Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\""
, "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 4281, __extension__ __PRETTY_FUNCTION__));
4282 const uint8_t *Converter = ConversionTable[Kind];
4283 unsigned OpIdx;
4284 Inst.setOpcode(Opcode);
4285 for (const uint8_t *p = Converter; *p; p+= 2) {
4286 OpIdx = *(p + 1);
4287 switch (*p) {
4288 default: llvm_unreachable("invalid conversion entry!")::llvm::llvm_unreachable_internal("invalid conversion entry!"
, "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 4288);
4289 case CVT_Reg:
4290 static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
4291 break;
4292 case CVT_Tied:
4293 Inst.addOperand(Inst.getOperand(OpIdx));
4294 break;
4295 case CVT_imm_95_10:
4296 Inst.addOperand(MCOperand::createImm(10));
4297 break;
4298 case CVT_95_addImmOperands:
4299 static_cast<X86Operand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
4300 break;
4301 case CVT_regAX:
4302 Inst.addOperand(MCOperand::createReg(X86::AX));
4303 break;
4304 case CVT_regEAX:
4305 Inst.addOperand(MCOperand::createReg(X86::EAX));
4306 break;
4307 case CVT_regRAX:
4308 Inst.addOperand(MCOperand::createReg(X86::RAX));
4309 break;
4310 case CVT_95_Reg:
4311 static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
4312 break;
4313 case CVT_95_addMemOperands:
4314 static_cast<X86Operand&>(*Operands[OpIdx]).addMemOperands(Inst, 5);
4315 break;
4316 case CVT_95_addAbsMemOperands:
4317 static_cast<X86Operand&>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1);
4318 break;
4319 case CVT_95_addDstIdxOperands:
4320 static_cast<X86Operand&>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1);
4321 break;
4322 case CVT_95_addSrcIdxOperands:
4323 static_cast<X86Operand&>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2);
4324 break;
4325 case CVT_95_addGR32orGR64Operands:
4326 static_cast<X86Operand&>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1);
4327 break;
4328 case CVT_regST1:
4329 Inst.addOperand(MCOperand::createReg(X86::ST1));
4330 break;
4331 case CVT_regST0:
4332 Inst.addOperand(MCOperand::createReg(X86::ST0));
4333 break;
4334 case CVT_95_addMemOffsOperands:
4335 static_cast<X86Operand&>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2);
4336 break;
4337 case CVT_imm_95_17:
4338 Inst.addOperand(MCOperand::createImm(17));
4339 break;
4340 case CVT_imm_95_1:
4341 Inst.addOperand(MCOperand::createImm(1));
4342 break;
4343 case CVT_imm_95_16:
4344 Inst.addOperand(MCOperand::createImm(16));
4345 break;
4346 case CVT_imm_95_0:
4347 Inst.addOperand(MCOperand::createImm(0));
4348 break;
4349 case CVT_95_addAVX512RCOperands:
4350 static_cast<X86Operand&>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1);
4351 break;
4352 }
4353 }
4354}
4355
4356void X86AsmParser::
4357convertToMapAndConstraints(unsigned Kind,
4358 const OperandVector &Operands) {
4359 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!")(static_cast <bool> (Kind < CVT_NUM_SIGNATURES &&
"Invalid signature!") ? void (0) : __assert_fail ("Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\""
, "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 4359, __extension__ __PRETTY_FUNCTION__));
4360 unsigned NumMCOperands = 0;
4361 const uint8_t *Converter = ConversionTable[Kind];
4362 for (const uint8_t *p = Converter; *p; p+= 2) {
4363 switch (*p) {
4364 default: llvm_unreachable("invalid conversion entry!")::llvm::llvm_unreachable_internal("invalid conversion entry!"
, "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 4364);
4365 case CVT_Reg:
4366 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4367 Operands[*(p + 1)]->setConstraint("r");
4368 ++NumMCOperands;
4369 break;
4370 case CVT_Tied:
4371 ++NumMCOperands;
4372 break;
4373 case CVT_imm_95_10:
4374 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4375 Operands[*(p + 1)]->setConstraint("");
4376 ++NumMCOperands;
4377 break;
4378 case CVT_95_addImmOperands:
4379 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4380 Operands[*(p + 1)]->setConstraint("m");
4381 NumMCOperands += 1;
4382 break;
4383 case CVT_regAX:
4384 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4385 Operands[*(p + 1)]->setConstraint("m");
4386 ++NumMCOperands;
4387 break;
4388 case CVT_regEAX:
4389 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4390 Operands[*(p + 1)]->setConstraint("m");
4391 ++NumMCOperands;
4392 break;
4393 case CVT_regRAX:
4394 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4395 Operands[*(p + 1)]->setConstraint("m");
4396 ++NumMCOperands;
4397 break;
4398 case CVT_95_Reg:
4399 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4400 Operands[*(p + 1)]->setConstraint("r");
4401 NumMCOperands += 1;
4402 break;
4403 case CVT_95_addMemOperands:
4404 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4405 Operands[*(p + 1)]->setConstraint("m");
4406 NumMCOperands += 5;
4407 break;
4408 case CVT_95_addAbsMemOperands:
4409 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4410 Operands[*(p + 1)]->setConstraint("m");
4411 NumMCOperands += 1;
4412 break;
4413 case CVT_95_addDstIdxOperands:
4414 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4415 Operands[*(p + 1)]->setConstraint("m");
4416 NumMCOperands += 1;
4417 break;
4418 case CVT_95_addSrcIdxOperands:
4419 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4420 Operands[*(p + 1)]->setConstraint("m");
4421 NumMCOperands += 2;
4422 break;
4423 case CVT_95_addGR32orGR64Operands:
4424 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4425 Operands[*(p + 1)]->setConstraint("m");
4426 NumMCOperands += 1;
4427 break;
4428 case CVT_regST1:
4429 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4430 Operands[*(p + 1)]->setConstraint("m");
4431 ++NumMCOperands;
4432 break;
4433 case CVT_regST0:
4434 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4435 Operands[*(p + 1)]->setConstraint("m");
4436 ++NumMCOperands;
4437 break;
4438 case CVT_95_addMemOffsOperands:
4439 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4440 Operands[*(p + 1)]->setConstraint("m");
4441 NumMCOperands += 2;
4442 break;
4443 case CVT_imm_95_17:
4444 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4445 Operands[*(p + 1)]->setConstraint("");
4446 ++NumMCOperands;
4447 break;
4448 case CVT_imm_95_1:
4449 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4450 Operands[*(p + 1)]->setConstraint("");
4451 ++NumMCOperands;
4452 break;
4453 case CVT_imm_95_16:
4454 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4455 Operands[*(p + 1)]->setConstraint("");
4456 ++NumMCOperands;
4457 break;
4458 case CVT_imm_95_0:
4459 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4460 Operands[*(p + 1)]->setConstraint("");
4461 ++NumMCOperands;
4462 break;
4463 case CVT_95_addAVX512RCOperands:
4464 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4465 Operands[*(p + 1)]->setConstraint("m");
4466 NumMCOperands += 1;
4467 break;
4468 }
4469 }
4470}
4471
4472namespace {
4473
4474/// MatchClassKind - The kinds of classes which participate in
4475/// instruction matching.
4476enum MatchClassKind {
4477 InvalidMatchClass = 0,
4478 OptionalMatchClass = 1,
4479 MCK__STAR_, // '*'
4480 MCK_b, // 'b'
4481 MCK_d, // 'd'
4482 MCK_pd, // 'pd'
4483 MCK_ps, // 'ps'
4484 MCK_q, // 'q'
4485 MCK_sae, // 'sae'
4486 MCK_sd, // 'sd'
4487 MCK_ss, // 'ss'
4488 MCK_ub, // 'ub'
4489 MCK_ud, // 'ud'
4490 MCK_uq, // 'uq'
4491 MCK_uw, // 'uw'
4492 MCK_w, // 'w'
4493 MCK__123_, // '{'
4494 MCK__123_1to16_125_, // '{1to16}'
4495 MCK__123_1to2_125_, // '{1to2}'
4496 MCK__123_1to4_125_, // '{1to4}'
4497 MCK__123_1to8_125_, // '{1to8}'
4498 MCK__123_sae_125_, // '{sae}'
4499 MCK__123_z_125_, // '{z}'
4500 MCK__125_, // '}'
4501 MCK_LAST_TOKEN = MCK__125_,
4502 MCK_Reg64, // derived register class
4503 MCK_Reg66, // derived register class
4504 MCK_AL, // register class 'AL'
4505 MCK_AX, // register class 'AX'
4506 MCK_CCR, // register class 'CCR'
4507 MCK_CL, // register class 'CL'
4508 MCK_CS, // register class 'CS'
4509 MCK_DS, // register class 'DS'
4510 MCK_DX, // register class 'DX'
4511 MCK_EAX, // register class 'EAX'
4512 MCK_EBX, // register class 'EBX'
4513 MCK_ECX, // register class 'ECX'
4514 MCK_EDX, // register class 'EDX'
4515 MCK_ES, // register class 'ES'
4516 MCK_FPCCR, // register class 'FPCCR'
4517 MCK_FS, // register class 'FS'
4518 MCK_GS, // register class 'GS'
4519 MCK_RAX, // register class 'RAX'
4520 MCK_RBX, // register class 'RBX'
4521 MCK_RCX, // register class 'RCX'
4522 MCK_RDX, // register class 'RDX'
4523 MCK_SS, // register class 'SS'
4524 MCK_ST0, // register class 'ST0'
4525 MCK_XMM0, // register class 'XMM0'
4526 MCK_Reg24, // derived register class
4527 MCK_Reg52, // derived register class
4528 MCK_Reg65, // derived register class
4529 MCK_GR32_AD, // register class 'GR32_AD'
4530 MCK_GR64_AD, // register class 'GR64_AD'
4531 MCK_Reg25, // derived register class
4532 MCK_Reg34, // derived register class
4533 MCK_Reg53, // derived register class
4534 MCK_GR32_TC, // register class 'GR32_TC'
4535 MCK_Reg50, // derived register class
4536 MCK_Reg58, // derived register class
4537 MCK_BNDR, // register class 'BNDR'
4538 MCK_GR16_ABCD, // register class 'GR16_ABCD'
4539 MCK_GR32_ABCD, // register class 'GR32_ABCD'
4540 MCK_GR64_ABCD, // register class 'GR64_ABCD'
4541 MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
4542 MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
4543 MCK_Reg42, // derived register class
4544 MCK_Reg61, // derived register class
4545 MCK_Reg26, // derived register class
4546 MCK_Reg45, // derived register class
4547 MCK_Reg48, // derived register class
4548 MCK_Reg54, // derived register class
4549 MCK_Reg60, // derived register class
4550 MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
4551 MCK_Reg27, // derived register class
4552 MCK_Reg46, // derived register class
4553 MCK_Reg49, // derived register class
4554 MCK_Reg55, // derived register class
4555 MCK_Reg59, // derived register class
4556 MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
4557 MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
4558 MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
4559 MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM'
4560 MCK_Reg37, // derived register class
4561 MCK_Reg43, // derived register class
4562 MCK_Reg78, // derived register class
4563 MCK_Reg81, // derived register class
4564 MCK_GR16_NOREX, // register class 'GR16_NOREX'
4565 MCK_GR32_NOREX, // register class 'GR32_NOREX'
4566 MCK_GR64_TCW64, // register class 'GR64_TCW64'
4567 MCK_GR8_NOREX, // register class 'GR8_NOREX'
4568 MCK_RST, // register class 'RST'
4569 MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64'
4570 MCK_VR128H, // register class 'VR128H'
4571 MCK_VR128L, // register class 'VR128L'
4572 MCK_VR256H, // register class 'VR256H'
4573 MCK_VR256L, // register class 'VR256L'
4574 MCK_VR64, // register class 'VR64'
4575 MCK_Reg21, // derived register class
4576 MCK_GR64_NOREX, // register class 'GR64_NOREX'
4577 MCK_GR64_TC, // register class 'GR64_TC'
4578 MCK_Reg29, // derived register class
4579 MCK_Reg57, // derived register class
4580 MCK_Reg56, // derived register class
4581 MCK_GR32_NOAX, // register class 'GR32_NOAX'
4582 MCK_GR32_NOSP, // register class 'GR32_NOSP'
4583 MCK_GR64_NOSP, // register class 'GR64_NOSP'
4584 MCK_Reg38, // derived register class
4585 MCK_Reg79, // derived register class
4586 MCK_CONTROL_REG, // register class 'CONTROL_REG'
4587 MCK_DEBUG_REG, // register class 'DEBUG_REG'
4588 MCK_FR32, // register class 'FR32,FR64,FR128,VR128'
4589 MCK_GR16, // register class 'GR16'
4590 MCK_GR32, // register class 'GR32'
4591 MCK_VR256, // register class 'VR256'
4592 MCK_Reg18, // derived register class
4593 MCK_GR64, // register class 'GR64'
4594 MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS'
4595 MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP'
4596 MCK_GR8, // register class 'GR8'
4597 MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
4598 MCK_VR256X, // register class 'VR256X'
4599 MCK_VR512, // register class 'VR512'
4600 MCK_LAST_REGISTER = MCK_VR512,
4601 MCK_AVX512RC, // user defined class 'AVX512RCOperand'
4602 MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
4603 MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
4604 MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
4605 MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
4606 MCK_Imm, // user defined class 'ImmAsmOperand'
4607 MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
4608 MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
4609 MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
4610 MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
4611 MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
4612 MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
4613 MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
4614 MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
4615 MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
4616 MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
4617 MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
4618 MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
4619 MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
4620 MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
4621 MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
4622 MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
4623 MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
4624 MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
4625 MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
4626 MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
4627 MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
4628 MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
4629 MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
4630 MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
4631 MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand'
4632 MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand'
4633 MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand'
4634 MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand'
4635 MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
4636 MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
4637 MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand'
4638 MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand'
4639 MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand'
4640 MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand'
4641 MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand'
4642 MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
4643 MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
4644 MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand'
4645 MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand'
4646 MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
4647 MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand'
4648 MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand'
4649 MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
4650 MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
4651 MCK_Mem, // user defined class 'X86MemAsmOperand'
4652 NumMatchClassKinds
4653};
4654
4655}
4656
4657static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
4658 return MCTargetAsmParser::Match_InvalidOperand;
4659}
4660
4661static MatchClassKind matchTokenString(StringRef Name) {
4662 switch (Name.size()) {
4663 default: break;
4664 case 1: // 7 strings to match.
4665 switch (Name[0]) {
4666 default: break;
4667 case '*': // 1 string to match.
4668 return MCK__STAR_; // "*"
4669 case 'b': // 1 string to match.
4670 return MCK_b; // "b"
4671 case 'd': // 1 string to match.
4672 return MCK_d; // "d"
4673 case 'q': // 1 string to match.
4674 return MCK_q; // "q"
4675 case 'w': // 1 string to match.
4676 return MCK_w; // "w"
4677 case '{': // 1 string to match.
4678 return MCK__123_; // "{"
4679 case '}': // 1 string to match.
4680 return MCK__125_; // "}"
4681 }
4682 break;
4683 case 2: // 8 strings to match.
4684 switch (Name[0]) {
4685 default: break;
4686 case 'p': // 2 strings to match.
4687 switch (Name[1]) {
4688 default: break;
4689 case 'd': // 1 string to match.
4690 return MCK_pd; // "pd"
4691 case 's': // 1 string to match.
4692 return MCK_ps; // "ps"
4693 }
4694 break;
4695 case 's': // 2 strings to match.
4696 switch (Name[1]) {
4697 default: break;
4698 case 'd': // 1 string to match.
4699 return MCK_sd; // "sd"
4700 case 's': // 1 string to match.
4701 return MCK_ss; // "ss"
4702 }
4703 break;
4704 case 'u': // 4 strings to match.
4705 switch (Name[1]) {
4706 default: break;
4707 case 'b': // 1 string to match.
4708 return MCK_ub; // "ub"
4709 case 'd': // 1 string to match.
4710 return MCK_ud; // "ud"
4711 case 'q': // 1 string to match.
4712 return MCK_uq; // "uq"
4713 case 'w': // 1 string to match.
4714 return MCK_uw; // "uw"
4715 }
4716 break;
4717 }
4718 break;
4719 case 3: // 2 strings to match.
4720 switch (Name[0]) {
4721 default: break;
4722 case 's': // 1 string to match.
4723 if (memcmp(Name.data()+1, "ae", 2) != 0)
4724 break;
4725 return MCK_sae; // "sae"
4726 case '{': // 1 string to match.
4727 if (memcmp(Name.data()+1, "z}", 2) != 0)
4728 break;
4729 return MCK__123_z_125_; // "{z}"
4730 }
4731 break;
4732 case 5: // 1 string to match.
4733 if (memcmp(Name.data()+0, "{sae}", 5) != 0)
4734 break;
4735 return MCK__123_sae_125_; // "{sae}"
4736 case 6: // 3 strings to match.
4737 if (memcmp(Name.data()+0, "{1to", 4) != 0)
4738 break;
4739 switch (Name[4]) {
4740 default: break;
4741 case '2': // 1 string to match.
4742 if (Name[5] != '}')
4743 break;
4744 return MCK__123_1to2_125_; // "{1to2}"
4745 case '4': // 1 string to match.
4746 if (Name[5] != '}')
4747 break;
4748 return MCK__123_1to4_125_; // "{1to4}"
4749 case '8': // 1 string to match.
4750 if (Name[5] != '}')
4751 break;
4752 return MCK__123_1to8_125_; // "{1to8}"
4753 }
4754 break;
4755 case 7: // 1 string to match.
4756 if (memcmp(Name.data()+0, "{1to16}", 7) != 0)
4757 break;
4758 return MCK__123_1to16_125_; // "{1to16}"
4759 }
4760 return InvalidMatchClass;
4761}
4762
4763/// isSubclass - Compute whether \p A is a subclass of \p B.
4764static bool isSubclass(MatchClassKind A, MatchClassKind B) {
4765 if (A == B)
4766 return true;
4767
4768 switch (A) {
4769 default:
4770 return false;
4771
4772 case MCK_Reg64:
4773 switch (B) {
4774 default: return false;
4775 case MCK_Reg65: return true;
4776 case MCK_Reg54: return true;
4777 case MCK_Reg55: return true;
4778 case MCK_GR64_NOREX_NOSP: return true;
4779 case MCK_Reg37: return true;
4780 case MCK_Reg21: return true;
4781 case MCK_GR64_NOREX: return true;
4782 case MCK_Reg57: return true;
4783 case MCK_Reg56: return true;
4784 case MCK_GR64_NOSP: return true;
4785 case MCK_Reg38: return true;
4786 case MCK_Reg18: return true;
4787 case MCK_GR64: return true;
4788 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4789 }
4790
4791 case MCK_Reg66:
4792 switch (B) {
4793 default: return false;
4794 case MCK_Reg65: return true;
4795 case MCK_Reg50: return true;
4796 case MCK_Reg45: return true;
4797 case MCK_Reg49: return true;
4798 case MCK_GR64_TCW64: return true;
4799 case MCK_GR64_NOREX: return true;
4800 case MCK_GR64_TC: return true;
4801 case MCK_GR64: return true;
4802 case MCK_LOW32_ADDR_ACCESS: return true;
4803 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4804 }
4805
4806 case MCK_AL:
4807 switch (B) {
4808 default: return false;
4809 case MCK_GR8_ABCD_L: return true;
4810 case MCK_GR8_NOREX: return true;
4811 case MCK_GR8: return true;
4812 }
4813
4814 case MCK_AX:
4815 switch (B) {
4816 default: return false;
4817 case MCK_GR16_ABCD: return true;
4818 case MCK_GR16_NOREX: return true;
4819 case MCK_GR16: return true;
4820 }
4821
4822 case MCK_CL:
4823 switch (B) {
4824 default: return false;
4825 case MCK_GR8_ABCD_L: return true;
4826 case MCK_GR8_NOREX: return true;
4827 case MCK_GR8: return true;
4828 }
4829
4830 case MCK_CS:
4831 return B == MCK_SEGMENT_REG;
4832
4833 case MCK_DS:
4834 return B == MCK_SEGMENT_REG;
4835
4836 case MCK_DX:
4837 switch (B) {
4838 default: return false;
4839 case MCK_GR16_ABCD: return true;
4840 case MCK_GR16_NOREX: return true;
4841 case MCK_GR16: return true;
4842 }
4843
4844 case MCK_EAX:
4845 switch (B) {
4846 default: return false;
4847 case MCK_GR32_AD: return true;
4848 case MCK_GR32_TC: return true;
4849 case MCK_GR32_ABCD: return true;
4850 case MCK_GR32_NOREX_NOSP: return true;
4851 case MCK_GR32_NOREX: return true;
4852 case MCK_Reg21: return true;
4853 case MCK_GR32_NOSP: return true;
4854 case MCK_GR32: return true;
4855 case MCK_Reg18: return true;
4856 case MCK_LOW32_ADDR_ACCESS: return true;
4857 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4858 }
4859
4860 case MCK_EBX:
4861 switch (B) {
4862 default: return false;
4863 case MCK_Reg25: return true;
4864 case MCK_GR32_ABCD: return true;
4865 case MCK_Reg26: return true;
4866 case MCK_Reg27: return true;
4867 case MCK_GR32_NOREX_NOSP: return true;
4868 case MCK_GR32_NOREX: return true;
4869 case MCK_Reg21: return true;
4870 case MCK_Reg29: return true;
4871 case MCK_GR32_NOAX: return true;
4872 case MCK_GR32_NOSP: return true;
4873 case MCK_GR32: return true;
4874 case MCK_Reg18: return true;
4875 case MCK_LOW32_ADDR_ACCESS: return true;
4876 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4877 }
4878
4879 case MCK_ECX:
4880 switch (B) {
4881 default: return false;
4882 case MCK_Reg24: return true;
4883 case MCK_Reg25: return true;
4884 case MCK_GR32_TC: return true;
4885 case MCK_GR32_ABCD: return true;
4886 case MCK_Reg26: return true;
4887 case MCK_Reg27: return true;
4888 case MCK_GR32_NOREX_NOSP: return true;
4889 case MCK_GR32_NOREX: return true;
4890 case MCK_Reg21: return true;
4891 case MCK_Reg29: return true;
4892 case MCK_GR32_NOAX: return true;
4893 case MCK_GR32_NOSP: return true;
4894 case MCK_GR32: return true;
4895 case MCK_Reg18: return true;
4896 case MCK_LOW32_ADDR_ACCESS: return true;
4897 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4898 }
4899
4900 case MCK_EDX:
4901 switch (B) {
4902 default: return false;
4903 case MCK_Reg24: return true;
4904 case MCK_GR32_AD: return true;
4905 case MCK_Reg25: return true;
4906 case MCK_GR32_TC: return true;
4907 case MCK_GR32_ABCD: return true;
4908 case MCK_Reg26: return true;
4909 case MCK_Reg27: return true;
4910 case MCK_GR32_NOREX_NOSP: return true;
4911 case MCK_GR32_NOREX: return true;
4912 case MCK_Reg21: return true;
4913 case MCK_Reg29: return true;
4914 case MCK_GR32_NOAX: return true;
4915 case MCK_GR32_NOSP: return true;
4916 case MCK_GR32: return true;
4917 case MCK_Reg18: return true;
4918 case MCK_LOW32_ADDR_ACCESS: return true;
4919 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4920 }
4921
4922 case MCK_ES:
4923 return B == MCK_SEGMENT_REG;
4924
4925 case MCK_FS:
4926 return B == MCK_SEGMENT_REG;
4927
4928 case MCK_GS:
4929 return B == MCK_SEGMENT_REG;
4930
4931 case MCK_RAX:
4932 switch (B) {
4933 default: return false;
4934 case MCK_GR64_AD: return true;
4935 case MCK_Reg34: return true;
4936 case MCK_Reg50: return true;
4937 case MCK_GR64_ABCD: return true;
4938 case MCK_Reg42: return true;
4939 case MCK_Reg45: return true;
4940 case MCK_Reg48: return true;
4941 case MCK_Reg46: return true;
4942 case MCK_Reg49: return true;
4943 case MCK_GR64_NOREX_NOSP: return true;
4944 case MCK_Reg37: return true;
4945 case MCK_Reg43: return true;
4946 case MCK_GR64_TCW64: return true;
4947 case MCK_GR64_NOREX: return true;
4948 case MCK_GR64_TC: return true;
4949 case MCK_GR64_NOSP: return true;
4950 case MCK_Reg38: return true;
4951 case MCK_GR64: return true;
4952 }
4953
4954 case MCK_RBX:
4955 switch (B) {
4956 default: return false;
4957 case MCK_Reg53: return true;
4958 case MCK_GR64_ABCD: return true;
4959 case MCK_Reg54: return true;
4960 case MCK_Reg55: return true;
4961 case MCK_GR64_NOREX_NOSP: return true;
4962 case MCK_Reg37: return true;
4963 case MCK_GR64_NOREX: return true;
4964 case MCK_Reg57: return true;
4965 case MCK_Reg56: return true;
4966 case MCK_GR64_NOSP: return true;
4967 case MCK_Reg38: return true;
4968 case MCK_GR64: return true;
4969 }
4970
4971 case MCK_RCX:
4972 switch (B) {
4973 default: return false;
4974 case MCK_Reg52: return true;
4975 case MCK_Reg34: return true;
4976 case MCK_Reg53: return true;
4977 case MCK_Reg50: return true;
4978 case MCK_Reg58: return true;
4979 case MCK_GR64_ABCD: return true;
4980 case MCK_Reg42: return true;
4981 case MCK_Reg61: return true;
4982 case MCK_Reg45: return true;
4983 case MCK_Reg48: return true;
4984 case MCK_Reg54: return true;
4985 case MCK_Reg60: return true;
4986 case MCK_Reg46: return true;
4987 case MCK_Reg49: return true;
4988 case MCK_Reg55: return true;
4989 case MCK_Reg59: return true;
4990 case MCK_GR64_NOREX_NOSP: return true;
4991 case MCK_Reg37: return true;
4992 case MCK_Reg43: return true;
4993 case MCK_GR64_TCW64: return true;
4994 case MCK_GR64_NOREX: return true;
4995 case MCK_GR64_TC: return true;
4996 case MCK_Reg57: return true;
4997 case MCK_Reg56: return true;
4998 case MCK_GR64_NOSP: return true;
4999 case MCK_Reg38: return true;
5000 case MCK_GR64: return true;
5001 }
5002
5003 case MCK_RDX:
5004 switch (B) {
5005 default: return false;
5006 case MCK_Reg52: return true;
5007 case MCK_GR64_AD: return true;
5008 case MCK_Reg34: return true;
5009 case MCK_Reg53: return true;
5010 case MCK_Reg50: return true;
5011 case MCK_Reg58: return true;
5012 case MCK_GR64_ABCD: return true;
5013 case MCK_Reg42: return true;
5014 case MCK_Reg61: return true;
5015 case MCK_Reg45: return true;
5016 case MCK_Reg48: return true;
5017 case MCK_Reg54: return true;
5018 case MCK_Reg60: return true;
5019 case MCK_Reg46: return true;
5020 case MCK_Reg49: return true;
5021 case MCK_Reg55: return true;
5022 case MCK_Reg59: return true;
5023 case MCK_GR64_NOREX_NOSP: return true;
5024 case MCK_Reg37: return true;
5025 case MCK_Reg43: return true;
5026 case MCK_GR64_TCW64: return true;
5027 case MCK_GR64_NOREX: return true;
5028 case MCK_GR64_TC: return true;
5029 case MCK_Reg57: return true;
5030 case MCK_Reg56: return true;
5031 case MCK_GR64_NOSP: return true;
5032 case MCK_Reg38: return true;
5033 case MCK_GR64: return true;
5034 }
5035
5036 case MCK_SS:
5037 return B == MCK_SEGMENT_REG;
5038
5039 case MCK_ST0:
5040 return B == MCK_RST;
5041
5042 case MCK_XMM0:
5043 switch (B) {
5044 default: return false;
5045 case MCK_VR128L: return true;
5046 case MCK_FR32: return true;
5047 case MCK_FR32X: return true;
5048 }
5049
5050 case MCK_Reg24:
5051 switch (B) {
5052 default: return false;
5053 case MCK_Reg25: return true;
5054 case MCK_GR32_TC: return true;
5055 case MCK_GR32_ABCD: return true;
5056 case MCK_Reg26: return true;
5057 case MCK_Reg27: return true;
5058 case MCK_GR32_NOREX_NOSP: return true;
5059 case MCK_GR32_NOREX: return true;
5060 case MCK_Reg21: return true;
5061 case MCK_Reg29: return true;
5062 case MCK_GR32_NOAX: return true;
5063 case MCK_GR32_NOSP: return true;
5064 case MCK_GR32: return true;
5065 case MCK_Reg18: return true;
5066 case MCK_LOW32_ADDR_ACCESS: return true;
5067 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5068 }
5069
5070 case MCK_Reg52:
5071 switch (B) {
5072 default: return false;
5073 case MCK_Reg34: return true;
5074 case MCK_Reg53: return true;
5075 case MCK_Reg50: return true;
5076 case MCK_Reg58: return true;
5077 case MCK_GR64_ABCD: return true;
5078 case MCK_Reg42: return true;
5079 case MCK_Reg61: return true;
5080 case MCK_Reg45: return true;
5081 case MCK_Reg48: return true;
5082 case MCK_Reg54: return true;
5083 case MCK_Reg60: return true;
5084 case MCK_Reg46: return true;
5085 case MCK_Reg49: return true;
5086 case MCK_Reg55: return true;
5087 case MCK_Reg59: return true;
5088 case MCK_GR64_NOREX_NOSP: return true;
5089 case MCK_Reg37: return true;
5090 case MCK_Reg43: return true;
5091 case MCK_GR64_TCW64: return true;
5092 case MCK_GR64_NOREX: return true;
5093 case MCK_GR64_TC: return true;
5094 case MCK_Reg57: return true;
5095 case MCK_Reg56: return true;
5096 case MCK_GR64_NOSP: return true;
5097 case MCK_Reg38: return true;
5098 case MCK_GR64: return true;
5099 }
5100
5101 case MCK_Reg65:
5102 switch (B) {
5103 default: return false;
5104 case MCK_GR64_NOREX: return true;
5105 case MCK_GR64: return true;
5106 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5107 }
5108
5109 case MCK_GR32_AD:
5110 switch (B) {
5111 default: return false;
5112 case MCK_GR32_TC: return true;
5113 case MCK_GR32_ABCD: return true;
5114 case MCK_GR32_NOREX_NOSP: return true;
5115 case MCK_GR32_NOREX: return true;
5116 case MCK_Reg21: return true;
5117 case MCK_GR32_NOSP: return true;
5118 case MCK_GR32: return true;
5119 case MCK_Reg18: return true;
5120 case MCK_LOW32_ADDR_ACCESS: return true;
5121 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5122 }
5123
5124 case MCK_GR64_AD:
5125 switch (B) {
5126 default: return false;
5127 case MCK_Reg34: return true;
5128 case MCK_Reg50: return true;
5129 case MCK_GR64_ABCD: return true;
5130 case MCK_Reg42: return true;
5131 case MCK_Reg45: return true;
5132 case MCK_Reg48: return true;
5133 case MCK_Reg46: return true;
5134 case MCK_Reg49: return true;
5135 case MCK_GR64_NOREX_NOSP: return true;
5136 case MCK_Reg37: return true;
5137 case MCK_Reg43: return true;
5138 case MCK_GR64_TCW64: return true;
5139 case MCK_GR64_NOREX: return true;
5140 case MCK_GR64_TC: return true;
5141 case MCK_GR64_NOSP: return true;
5142 case MCK_Reg38: return true;
5143 case MCK_GR64: return true;
5144 }
5145
5146 case MCK_Reg25:
5147 switch (B) {
5148 default: return false;
5149 case MCK_GR32_ABCD: return true;
5150 case MCK_Reg26: return true;
5151 case MCK_Reg27: return true;
5152 case MCK_GR32_NOREX_NOSP: return true;
5153 case MCK_GR32_NOREX: return true;
5154 case MCK_Reg21: return true;
5155 case MCK_Reg29: return true;
5156 case MCK_GR32_NOAX: return true;
5157 case MCK_GR32_NOSP: return true;
5158 case MCK_GR32: return true;
5159 case MCK_Reg18: return true;
5160 case MCK_LOW32_ADDR_ACCESS: return true;
5161 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5162 }
5163
5164 case MCK_Reg34:
5165 switch (B) {
5166 default: return false;
5167 case MCK_Reg50: return true;
5168 case MCK_GR64_ABCD: return true;
5169 case MCK_Reg42: return true;
5170 case MCK_Reg45: return true;
5171 case MCK_Reg48: return true;
5172 case MCK_Reg46: return true;
5173 case MCK_Reg49: return true;
5174 case MCK_GR64_NOREX_NOSP: return true;
5175 case MCK_Reg37: return true;
5176 case MCK_Reg43: return true;
5177 case MCK_GR64_TCW64: return true;
5178 case MCK_GR64_NOREX: return true;
5179 case MCK_GR64_TC: return true;
5180 case MCK_GR64_NOSP: return true;
5181 case MCK_Reg38: return true;
5182 case MCK_GR64: return true;
5183 }
5184
5185 case MCK_Reg53:
5186 switch (B) {
5187 default: return false;
5188 case MCK_GR64_ABCD: return true;
5189 case MCK_Reg54: return true;
5190 case MCK_Reg55: return true;
5191 case MCK_GR64_NOREX_NOSP: return true;
5192 case MCK_Reg37: return true;
5193 case MCK_GR64_NOREX: return true;
5194 case MCK_Reg57: return true;
5195 case MCK_Reg56: return true;
5196 case MCK_GR64_NOSP: return true;
5197 case MCK_Reg38: return true;
5198 case MCK_GR64: return true;
5199 }
5200
5201 case MCK_GR32_TC:
5202 switch (B) {
5203 default: return false;
5204 case MCK_GR32_ABCD: return true;
5205 case MCK_GR32_NOREX_NOSP: return true;
5206 case MCK_GR32_NOREX: return true;
5207 case MCK_Reg21: return true;
5208 case MCK_GR32_NOSP: return true;
5209 case MCK_GR32: return true;
5210 case MCK_Reg18: return true;
5211 case MCK_LOW32_ADDR_ACCESS: return true;
5212 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5213 }
5214
5215 case MCK_Reg50:
5216 switch (B) {
5217 default: return false;
5218 case MCK_Reg45: return true;
5219 case MCK_Reg49: return true;
5220 case MCK_GR64_TCW64: return true;
5221 case MCK_GR64_NOREX: return true;
5222 case MCK_GR64_TC: return true;
5223 case MCK_GR64: return true;
5224 }
5225
5226 case MCK_Reg58:
5227 switch (B) {
5228 default: return false;
5229 case MCK_Reg42: return true;
5230 case MCK_Reg45: return true;
5231 case MCK_Reg54: return true;
5232 case MCK_Reg55: return true;
5233 case MCK_Reg59: return true;
5234 case MCK_GR64_NOREX_NOSP: return true;
5235 case MCK_Reg37: return true;
5236 case MCK_Reg43: return true;
5237 case MCK_GR64_NOREX: return true;
5238 case MCK_GR64_TC: return true;
5239 case MCK_Reg57: return true;
5240 case MCK_Reg56: return true;
5241 case MCK_GR64_NOSP: return true;
5242 case MCK_Reg38: return true;
5243 case MCK_GR64: return true;
5244 }
5245
5246 case MCK_GR16_ABCD:
5247 switch (B) {
5248 default: return false;
5249 case MCK_GR16_NOREX: return true;
5250 case MCK_GR16: return true;
5251 }
5252
5253 case MCK_GR32_ABCD:
5254 switch (B) {
5255 default: return false;
5256 case MCK_GR32_NOREX_NOSP: return true;
5257 case MCK_GR32_NOREX: return true;
5258 case MCK_Reg21: return true;
5259 case MCK_GR32_NOSP: return true;
5260 case MCK_GR32: return true;
5261 case MCK_Reg18: return true;
5262 case MCK_LOW32_ADDR_ACCESS: return true;
5263 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5264 }
5265
5266 case MCK_GR64_ABCD:
5267 switch (B) {
5268 default: return false;
5269 case MCK_GR64_NOREX_NOSP: return true;
5270 case MCK_Reg37: return true;
5271 case MCK_GR64_NOREX: return true;
5272 case MCK_GR64_NOSP: return true;
5273 case MCK_Reg38: return true;
5274 case MCK_GR64: return true;
5275 }
5276
5277 case MCK_GR8_ABCD_H:
5278 switch (B) {
5279 default: return false;
5280 case MCK_GR8_NOREX: return true;
5281 case MCK_GR8: return true;
5282 }
5283
5284 case MCK_GR8_ABCD_L:
5285 switch (B) {
5286 default: return false;
5287 case MCK_GR8_NOREX: return true;
5288 case MCK_GR8: return true;
5289 }
5290
5291 case MCK_Reg42:
5292 switch (B) {
5293 default: return false;
5294 case MCK_Reg45: return true;
5295 case MCK_GR64_NOREX_NOSP: return true;
5296 case MCK_Reg37: return true;
5297 case MCK_Reg43: return true;
5298 case MCK_GR64_NOREX: return true;
5299 case MCK_GR64_TC: return true;
5300 case MCK_GR64_NOSP: return true;
5301 case MCK_Reg38: return true;
5302 case MCK_GR64: return true;
5303 }
5304
5305 case MCK_Reg61:
5306 switch (B) {
5307 default: return false;
5308 case MCK_Reg48: return true;
5309 case MCK_Reg60: return true;
5310 case MCK_Reg46: return true;
5311 case MCK_Reg49: return true;
5312 case MCK_Reg59: return true;
5313 case MCK_Reg43: return true;
5314 case MCK_GR64_TCW64: return true;
5315 case MCK_GR64_TC: return true;
5316 case MCK_Reg57: return true;
5317 case MCK_Reg56: return true;
5318 case MCK_GR64_NOSP: return true;
5319 case MCK_Reg38: return true;
5320 case MCK_GR64: return true;
5321 }
5322
5323 case MCK_Reg26:
5324 switch (B) {
5325 default: return false;
5326 case MCK_Reg27: return true;
5327 case MCK_GR32_NOREX_NOSP: return true;
5328 case MCK_GR32_NOREX: return true;
5329 case MCK_Reg21: return true;
5330 case MCK_Reg29: return true;
5331 case MCK_GR32_NOAX: return true;
5332 case MCK_GR32_NOSP: return true;
5333 case MCK_GR32: return true;
5334 case MCK_Reg18: return true;
5335 case MCK_LOW32_ADDR_ACCESS: return true;
5336 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5337 }
5338
5339 case MCK_Reg45:
5340 switch (B) {
5341 default: return false;
5342 case MCK_GR64_NOREX: return true;
5343 case MCK_GR64_TC: return true;
5344 case MCK_GR64: return true;
5345 }
5346
5347 case MCK_Reg48:
5348 switch (B) {
5349 default: return false;
5350 case MCK_Reg46: return true;
5351 case MCK_Reg49: return true;
5352 case MCK_Reg43: return true;
5353 case MCK_GR64_TCW64: return true;
5354 case MCK_GR64_TC: return true;
5355 case MCK_GR64_NOSP: return true;
5356 case MCK_Reg38: return true;
5357 case MCK_GR64: return true;
5358 }
5359
5360 case MCK_Reg54:
5361 switch (B) {
5362 default: return false;
5363 case MCK_Reg55: return true;
5364 case MCK_GR64_NOREX_NOSP: return true;
5365 case MCK_Reg37: return true;
5366 case MCK_GR64_NOREX: return true;
5367 case MCK_Reg57: return true;
5368 case MCK_Reg56: return true;
5369 case MCK_GR64_NOSP: return true;
5370 case MCK_Reg38: return true;
5371 case MCK_GR64: return true;
5372 }
5373
5374 case MCK_Reg60:
5375 switch (B) {
5376 default: return false;
5377 case MCK_Reg46: return true;
5378 case MCK_GR64_TCW64: return true;
5379 case MCK_Reg57: return true;
5380 case MCK_Reg56: return true;
5381 case MCK_GR64_NOSP: return true;
5382 case MCK_Reg38: return true;
5383 case MCK_GR64: return true;
5384 }
5385
5386 case MCK_Reg27:
5387 switch (B) {
5388 default: return false;
5389 case MCK_GR32_NOREX: return true;
5390 case MCK_Reg21: return true;
5391 case MCK_GR32_NOAX: return true;
5392 case MCK_GR32: return true;
5393 case MCK_Reg18: return true;
5394 case MCK_LOW32_ADDR_ACCESS: return true;
5395 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5396 }
5397
5398 case MCK_Reg46:
5399 switch (B) {
5400 default: return false;
5401 case MCK_GR64_TCW64: return true;
5402 case MCK_GR64_NOSP: return true;
5403 case MCK_Reg38: return true;
5404 case MCK_GR64: return true;
5405 }
5406
5407 case MCK_Reg49:
5408 switch (B) {
5409 default: return false;
5410 case MCK_GR64_TCW64: return true;
5411 case MCK_GR64_TC: return true;
5412 case MCK_GR64: return true;
5413 }
5414
5415 case MCK_Reg55:
5416 switch (B) {
5417 default: return false;
5418 case MCK_Reg37: return true;
5419 case MCK_GR64_NOREX: return true;
5420 case MCK_Reg56: return true;
5421 case MCK_Reg38: return true;
5422 case MCK_GR64: return true;
5423 }
5424
5425 case MCK_Reg59:
5426 switch (B) {
5427 default: return false;
5428 case MCK_Reg43: return true;
5429 case MCK_GR64_TC: return true;
5430 case MCK_Reg57: return true;
5431 case MCK_Reg56: return true;
5432 case MCK_GR64_NOSP: return true;
5433 case MCK_Reg38: return true;
5434 case MCK_GR64: return true;
5435 }
5436
5437 case MCK_GR32_NOREX_NOSP:
5438 switch (B) {
5439 default: return false;
5440 case MCK_GR32_NOREX: return true;
5441 case MCK_Reg21: return true;
5442 case MCK_GR32_NOSP: return true;
5443 case MCK_GR32: return true;
5444 case MCK_Reg18: return true;
5445 case MCK_LOW32_ADDR_ACCESS: return true;
5446 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5447 }
5448
5449 case MCK_GR64_NOREX_NOSP:
5450 switch (B) {
5451 default: return false;
5452 case MCK_Reg37: return true;
5453 case MCK_GR64_NOREX: return true;
5454 case MCK_GR64_NOSP: return true;
5455 case MCK_Reg38: return true;
5456 case MCK_GR64: return true;
5457 }
5458
5459 case MCK_VK16WM:
5460 return B == MCK_VK1;
5461
5462 case MCK_Reg37:
5463 switch (B) {
5464 default: return false;
5465 case MCK_GR64_NOREX: return true;
5466 case MCK_Reg38: return true;
5467 case MCK_GR64: return true;
5468 }
5469
5470 case MCK_Reg43:
5471 switch (B) {
5472 default: return false;
5473 case MCK_GR64_TC: return true;
5474 case MCK_GR64_NOSP: return true;
5475 case MCK_Reg38: return true;
5476 case MCK_GR64: return true;
5477 }
5478
5479 case MCK_Reg78:
5480 switch (B) {
5481 default: return false;
5482 case MCK_Reg79: return true;
5483 case MCK_VR512: return true;
5484 }
5485
5486 case MCK_Reg81:
5487 switch (B) {
5488 default: return false;
5489 case MCK_Reg79: return true;
5490 case MCK_VR512: return true;
5491 }
5492
5493 case MCK_GR16_NOREX:
5494 return B == MCK_GR16;
5495
5496 case MCK_GR32_NOREX:
5497 switch (B) {
5498 default: return false;
5499 case MCK_Reg21: return true;
5500 case MCK_GR32: return true;
5501 case MCK_Reg18: return true;
5502 case MCK_LOW32_ADDR_ACCESS: return true;
5503 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5504 }
5505
5506 case MCK_GR64_TCW64:
5507 return B == MCK_GR64;
5508
5509 case MCK_GR8_NOREX:
5510 return B == MCK_GR8;
5511
5512 case MCK_VR128H:
5513 switch (B) {
5514 default: return false;
5515 case MCK_FR32: return true;
5516 case MCK_FR32X: return true;
5517 }
5518
5519 case MCK_VR128L:
5520 switch (B) {
5521 default: return false;
5522 case MCK_FR32: return true;
5523 case MCK_FR32X: return true;
5524 }
5525
5526 case MCK_VR256H:
5527 switch (B) {
5528 default: return false;
5529 case MCK_VR256: return true;
5530 case MCK_VR256X: return true;
5531 }
5532
5533 case MCK_VR256L:
5534 switch (B) {
5535 default: return false;
5536 case MCK_VR256: return true;
5537 case MCK_VR256X: return true;
5538 }
5539
5540 case MCK_Reg21:
5541 switch (B) {
5542 default: return false;
5543 case MCK_Reg18: return true;
5544 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5545 }
5546
5547 case MCK_GR64_NOREX:
5548 return B == MCK_GR64;
5549
5550 case MCK_GR64_TC:
5551 return B == MCK_GR64;
5552
5553 case MCK_Reg29:
5554 switch (B) {
5555 default: return false;
5556 case MCK_GR32_NOAX: return true;
5557 case MCK_GR32_NOSP: return true;
5558 case MCK_GR32: return true;
5559 case MCK_Reg18: return true;
5560 case MCK_LOW32_ADDR_ACCESS: return true;
5561 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5562 }
5563
5564 case MCK_Reg57:
5565 switch (B) {
5566 default: return false;
5567 case MCK_Reg56: return true;
5568 case MCK_GR64_NOSP: return true;
5569 case MCK_Reg38: return true;
5570 case MCK_GR64: return true;
5571 }
5572
5573 case MCK_Reg56:
5574 switch (B) {
5575 default: return false;
5576 case MCK_Reg38: return true;
5577 case MCK_GR64: return true;
5578 }
5579
5580 case MCK_GR32_NOAX:
5581 switch (B) {
5582 default: return false;
5583 case MCK_GR32: return true;
5584 case MCK_Reg18: return true;
5585 case MCK_LOW32_ADDR_ACCESS: return true;
5586 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5587 }
5588
5589 case MCK_GR32_NOSP:
5590 switch (B) {
5591 default: return false;
5592 case MCK_GR32: return true;
5593 case MCK_Reg18: return true;
5594 case MCK_LOW32_ADDR_ACCESS: return true;
5595 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5596 }
5597
5598 case MCK_GR64_NOSP:
5599 switch (B) {
5600 default: return false;
5601 case MCK_Reg38: return true;
5602 case MCK_GR64: return true;
5603 }
5604
5605 case MCK_Reg38:
5606 return B == MCK_GR64;
5607
5608 case MCK_Reg79:
5609 return B == MCK_VR512;
5610
5611 case MCK_FR32:
5612 return B == MCK_FR32X;
5613
5614 case MCK_GR32:
5615 switch (B) {
5616 default: return false;
5617 case MCK_Reg18: return true;
5618 case MCK_LOW32_ADDR_ACCESS: return true;
5619 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5620 }
5621
5622 case MCK_VR256:
5623 return B == MCK_VR256X;
5624
5625 case MCK_Reg18:
5626 return B == MCK_LOW32_ADDR_ACCESS_RBP;
5627
5628 case MCK_LOW32_ADDR_ACCESS:
5629 return B == MCK_LOW32_ADDR_ACCESS_RBP;
5630
5631 case MCK_ImmSExti64i8:
5632 switch (B) {
5633 default: return false;
5634 case MCK_ImmSExti16i8: return true;
5635 case MCK_ImmSExti32i8: return true;
5636 case MCK_ImmSExti64i32: return true;
5637 case MCK_Imm: return true;
5638 }
5639
5640 case MCK_ImmSExti16i8:
5641 switch (B) {
5642 default: return false;
5643 case MCK_ImmSExti64i32: return true;
5644 case MCK_Imm: return true;
5645 }
5646
5647 case MCK_ImmSExti32i8:
5648 return B == MCK_Imm;
5649
5650 case MCK_ImmSExti64i32:
5651 return B == MCK_Imm;
5652
5653 case MCK_AbsMem16:
5654 switch (B) {
5655 default: return false;
5656 case MCK_AbsMem: return true;
5657 case MCK_Mem: return true;
5658 }
5659
5660 case MCK_DstIdx16:
5661 switch (B) {
5662 default: return false;
5663 case MCK_Mem16: return true;
5664 case MCK_Mem: return true;
5665 }
5666
5667 case MCK_DstIdx32:
5668 switch (B) {
5669 default: return false;
5670 case MCK_Mem32: return true;
5671 case MCK_Mem: return true;
5672 }
5673
5674 case MCK_DstIdx64:
5675 switch (B) {
5676 default: return false;
5677 case MCK_Mem64: return true;
5678 case MCK_Mem: return true;
5679 }
5680
5681 case MCK_DstIdx8:
5682 switch (B) {
5683 default: return false;
5684 case MCK_Mem8: return true;
5685 case MCK_Mem: return true;
5686 }
5687
5688 case MCK_MemOffs16_16:
5689 switch (B) {
5690 default: return false;
5691 case MCK_Mem16: return true;
5692 case MCK_Mem: return true;
5693 }
5694
5695 case MCK_MemOffs16_32:
5696 switch (B) {
5697 default: return false;
5698 case MCK_Mem32: return true;
5699 case MCK_Mem: return true;
5700 }
5701
5702 case MCK_MemOffs16_8:
5703 switch (B) {
5704 default: return false;
5705 case MCK_Mem8: return true;
5706 case MCK_Mem: return true;
5707 }
5708
5709 case MCK_MemOffs32_16:
5710 switch (B) {
5711 default: return false;
5712 case MCK_Mem16: return true;
5713 case MCK_Mem: return true;
5714 }
5715
5716 case MCK_MemOffs32_32:
5717 switch (B) {
5718 default: return false;
5719 case MCK_Mem32: return true;
5720 case MCK_Mem: return true;
5721 }
5722
5723 case MCK_MemOffs32_64:
5724 switch (B) {
5725 default: return false;
5726 case MCK_Mem64: return true;
5727 case MCK_Mem: return true;
5728 }
5729
5730 case MCK_MemOffs32_8:
5731 switch (B) {
5732 default: return false;
5733 case MCK_Mem8: return true;
5734 case MCK_Mem: return true;
5735 }
5736
5737 case MCK_MemOffs64_16:
5738 switch (B) {
5739 default: return false;
5740 case MCK_Mem16: return true;
5741 case MCK_Mem: return true;
5742 }
5743
5744 case MCK_MemOffs64_32:
5745 switch (B) {
5746 default: return false;
5747 case MCK_Mem32: return true;
5748 case MCK_Mem: return true;
5749 }
5750
5751 case MCK_MemOffs64_64:
5752 switch (B) {
5753 default: return false;
5754 case MCK_Mem64: return true;
5755 case MCK_Mem: return true;
5756 }
5757
5758 case MCK_MemOffs64_8:
5759 switch (B) {
5760 default: return false;
5761 case MCK_Mem8: return true;
5762 case MCK_Mem: return true;
5763 }
5764
5765 case MCK_SrcIdx16:
5766 switch (B) {
5767 default: return false;
5768 case MCK_Mem16: return true;
5769 case MCK_Mem: return true;
5770 }
5771
5772 case MCK_SrcIdx32:
5773 switch (B) {
5774 default: return false;
5775 case MCK_Mem32: return true;
5776 case MCK_Mem: return true;
5777 }
5778
5779 case MCK_SrcIdx64:
5780 switch (B) {
5781 default: return false;
5782 case MCK_Mem64: return true;
5783 case MCK_Mem: return true;
5784 }
5785
5786 case MCK_SrcIdx8:
5787 switch (B) {
5788 default: return false;
5789 case MCK_Mem8: return true;
5790 case MCK_Mem: return true;
5791 }
5792
5793 case MCK_AbsMem:
5794 return B == MCK_Mem;
5795
5796 case MCK_Mem128:
5797 return B == MCK_Mem;
5798
5799 case MCK_Mem128_RC128:
5800 return B == MCK_Mem;
5801
5802 case MCK_Mem128_RC128X:
5803 return B == MCK_Mem;
5804
5805 case MCK_Mem128_RC256:
5806 return B == MCK_Mem;
5807
5808 case MCK_Mem128_RC256X:
5809 return B == MCK_Mem;
5810
5811 case MCK_Mem16:
5812 return B == MCK_Mem;
5813
5814 case MCK_Mem256:
5815 return B == MCK_Mem;
5816
5817 case MCK_Mem256_RC128:
5818 return B == MCK_Mem;
5819
5820 case MCK_Mem256_RC128X:
5821 return B == MCK_Mem;
5822
5823 case MCK_Mem256_RC256:
5824 return B == MCK_Mem;
5825
5826 case MCK_Mem256_RC256X:
5827 return B == MCK_Mem;
5828
5829 case MCK_Mem256_RC512:
5830 return B == MCK_Mem;
5831
5832 case MCK_Mem32:
5833 return B == MCK_Mem;
5834
5835 case MCK_Mem512:
5836 return B == MCK_Mem;
5837
5838 case MCK_Mem512_RC256X:
5839 return B == MCK_Mem;
5840
5841 case MCK_Mem512_RC512:
5842 return B == MCK_Mem;
5843
5844 case MCK_Mem64:
5845 return B == MCK_Mem;
5846
5847 case MCK_Mem64_RC128:
5848 return B == MCK_Mem;
5849
5850 case MCK_Mem64_RC128X:
5851 return B == MCK_Mem;
5852
5853 case MCK_Mem80:
5854 return B == MCK_Mem;
5855
5856 case MCK_Mem8:
5857 return B == MCK_Mem;
5858 }
5859}
5860
5861static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
5862 X86Operand &Operand = (X86Operand&)GOp;
5863 if (Kind == InvalidMatchClass)
5864 return MCTargetAsmParser::Match_InvalidOperand;
5865
5866 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
5867 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
5868 MCTargetAsmParser::Match_Success :
5869 MCTargetAsmParser::Match_InvalidOperand;
5870
5871 switch (Kind) {
5872 default: break;
5873 // 'AVX512RC' class
5874 case MCK_AVX512RC:
5875 if (Operand.isAVX512RC())
5876 return MCTargetAsmParser::Match_Success;
5877 break;
5878 // 'ImmSExti64i8' class
5879 case MCK_ImmSExti64i8:
5880 if (Operand.isImmSExti64i8())
5881 return MCTargetAsmParser::Match_Success;
5882 break;
5883 // 'ImmSExti16i8' class
5884 case MCK_ImmSExti16i8:
5885 if (Operand.isImmSExti16i8())
5886 return MCTargetAsmParser::Match_Success;
5887 break;
5888 // 'ImmSExti32i8' class
5889 case MCK_ImmSExti32i8:
5890 if (Operand.isImmSExti32i8())
5891 return MCTargetAsmParser::Match_Success;
5892 break;
5893 // 'ImmSExti64i32' class
5894 case MCK_ImmSExti64i32:
5895 if (Operand.isImmSExti64i32())
5896 return MCTargetAsmParser::Match_Success;
5897 break;
5898 // 'Imm' class
5899 case MCK_Imm:
5900 if (Operand.isImm())
5901 return MCTargetAsmParser::Match_Success;
5902 break;
5903 // 'ImmUnsignedi8' class
5904 case MCK_ImmUnsignedi8:
5905 if (Operand.isImmUnsignedi8())
5906 return MCTargetAsmParser::Match_Success;
5907 break;
5908 // 'GR32orGR64' class
5909 case MCK_GR32orGR64:
5910 if (Operand.isGR32orGR64())
5911 return MCTargetAsmParser::Match_Success;
5912 break;
5913 // 'AbsMem16' class
5914 case MCK_AbsMem16:
5915 if (Operand.isAbsMem16())
5916 return MCTargetAsmParser::Match_Success;
5917 break;
5918 // 'DstIdx16' class
5919 case MCK_DstIdx16:
5920 if (Operand.isDstIdx16())
5921 return MCTargetAsmParser::Match_Success;
5922 break;
5923 // 'DstIdx32' class
5924 case MCK_DstIdx32:
5925 if (Operand.isDstIdx32())
5926 return MCTargetAsmParser::Match_Success;
5927 break;
5928 // 'DstIdx64' class
5929 case MCK_DstIdx64:
5930 if (Operand.isDstIdx64())
5931 return MCTargetAsmParser::Match_Success;
5932 break;
5933 // 'DstIdx8' class
5934 case MCK_DstIdx8:
5935 if (Operand.isDstIdx8())
5936 return MCTargetAsmParser::Match_Success;
5937 break;
5938 // 'MemOffs16_16' class
5939 case MCK_MemOffs16_16:
5940 if (Operand.isMemOffs16_16())
5941 return MCTargetAsmParser::Match_Success;
5942 break;
5943 // 'MemOffs16_32' class
5944 case MCK_MemOffs16_32:
5945 if (Operand.isMemOffs16_32())
5946 return MCTargetAsmParser::Match_Success;
5947 break;
5948 // 'MemOffs16_8' class
5949 case MCK_MemOffs16_8:
5950 if (Operand.isMemOffs16_8())
5951 return MCTargetAsmParser::Match_Success;
5952 break;
5953 // 'MemOffs32_16' class
5954 case MCK_MemOffs32_16:
5955 if (Operand.isMemOffs32_16())
5956 return MCTargetAsmParser::Match_Success;
5957 break;
5958 // 'MemOffs32_32' class
5959 case MCK_MemOffs32_32:
5960 if (Operand.isMemOffs32_32())
5961 return MCTargetAsmParser::Match_Success;
5962 break;
5963 // 'MemOffs32_64' class
5964 case MCK_MemOffs32_64:
5965 if (Operand.isMemOffs32_64())
5966 return MCTargetAsmParser::Match_Success;
5967 break;
5968 // 'MemOffs32_8' class
5969 case MCK_MemOffs32_8:
5970 if (Operand.isMemOffs32_8())
5971 return MCTargetAsmParser::Match_Success;
5972 break;
5973 // 'MemOffs64_16' class
5974 case MCK_MemOffs64_16:
5975 if (Operand.isMemOffs64_16())
5976 return MCTargetAsmParser::Match_Success;
5977 break;
5978 // 'MemOffs64_32' class
5979 case MCK_MemOffs64_32:
5980 if (Operand.isMemOffs64_32())
5981 return MCTargetAsmParser::Match_Success;
5982 break;
5983 // 'MemOffs64_64' class
5984 case MCK_MemOffs64_64:
5985 if (Operand.isMemOffs64_64())
5986 return MCTargetAsmParser::Match_Success;
5987 break;
5988 // 'MemOffs64_8' class
5989 case MCK_MemOffs64_8:
5990 if (Operand.isMemOffs64_8())
5991 return MCTargetAsmParser::Match_Success;
5992 break;
5993 // 'SrcIdx16' class
5994 case MCK_SrcIdx16:
5995 if (Operand.isSrcIdx16())
5996 return MCTargetAsmParser::Match_Success;
5997 break;
5998 // 'SrcIdx32' class
5999 case MCK_SrcIdx32:
6000 if (Operand.isSrcIdx32())
6001 return MCTargetAsmParser::Match_Success;
6002 break;
6003 // 'SrcIdx64' class
6004 case MCK_SrcIdx64:
6005 if (Operand.isSrcIdx64())
6006 return MCTargetAsmParser::Match_Success;
6007 break;
6008 // 'SrcIdx8' class
6009 case MCK_SrcIdx8:
6010 if (Operand.isSrcIdx8())
6011 return MCTargetAsmParser::Match_Success;
6012 break;
6013 // 'AbsMem' class
6014 case MCK_AbsMem:
6015 if (Operand.isAbsMem())
6016 return MCTargetAsmParser::Match_Success;
6017 break;
6018 // 'Mem128' class
6019 case MCK_Mem128:
6020 if (Operand.isMem128())
6021 return MCTargetAsmParser::Match_Success;
6022 break;
6023 // 'Mem128_RC128' class
6024 case MCK_Mem128_RC128:
6025 if (Operand.isMem128_RC128())
6026 return MCTargetAsmParser::Match_Success;
6027 break;
6028 // 'Mem128_RC128X' class
6029 case MCK_Mem128_RC128X:
6030 if (Operand.isMem128_RC128X())
6031 return MCTargetAsmParser::Match_Success;
6032 break;
6033 // 'Mem128_RC256' class
6034 case MCK_Mem128_RC256:
6035 if (Operand.isMem128_RC256())
6036 return MCTargetAsmParser::Match_Success;
6037 break;
6038 // 'Mem128_RC256X' class
6039 case MCK_Mem128_RC256X:
6040 if (Operand.isMem128_RC256X())
6041 return MCTargetAsmParser::Match_Success;
6042 break;
6043 // 'Mem16' class
6044 case MCK_Mem16:
6045 if (Operand.isMem16())
6046 return MCTargetAsmParser::Match_Success;
6047 break;
6048 // 'Mem256' class
6049 case MCK_Mem256:
6050 if (Operand.isMem256())
6051 return MCTargetAsmParser::Match_Success;
6052 break;
6053 // 'Mem256_RC128' class
6054 case MCK_Mem256_RC128:
6055 if (Operand.isMem256_RC128())
6056 return MCTargetAsmParser::Match_Success;
6057 break;
6058 // 'Mem256_RC128X' class
6059 case MCK_Mem256_RC128X:
6060 if (Operand.isMem256_RC128X())
6061 return MCTargetAsmParser::Match_Success;
6062 break;
6063 // 'Mem256_RC256' class
6064 case MCK_Mem256_RC256:
6065 if (Operand.isMem256_RC256())
6066 return MCTargetAsmParser::Match_Success;
6067 break;
6068 // 'Mem256_RC256X' class
6069 case MCK_Mem256_RC256X:
6070 if (Operand.isMem256_RC256X())
6071 return MCTargetAsmParser::Match_Success;
6072 break;
6073 // 'Mem256_RC512' class
6074 case MCK_Mem256_RC512:
6075 if (Operand.isMem256_RC512())
6076 return MCTargetAsmParser::Match_Success;
6077 break;
6078 // 'Mem32' class
6079 case MCK_Mem32:
6080 if (Operand.isMem32())
6081 return MCTargetAsmParser::Match_Success;
6082 break;
6083 // 'Mem512' class
6084 case MCK_Mem512:
6085 if (Operand.isMem512())
6086 return MCTargetAsmParser::Match_Success;
6087 break;
6088 // 'Mem512_RC256X' class
6089 case MCK_Mem512_RC256X:
6090 if (Operand.isMem512_RC256X())
6091 return MCTargetAsmParser::Match_Success;
6092 break;
6093 // 'Mem512_RC512' class
6094 case MCK_Mem512_RC512:
6095 if (Operand.isMem512_RC512())
6096 return MCTargetAsmParser::Match_Success;
6097 break;
6098 // 'Mem64' class
6099 case MCK_Mem64:
6100 if (Operand.isMem64())
6101 return MCTargetAsmParser::Match_Success;
6102 break;
6103 // 'Mem64_RC128' class
6104 case MCK_Mem64_RC128:
6105 if (Operand.isMem64_RC128())
6106 return MCTargetAsmParser::Match_Success;
6107 break;
6108 // 'Mem64_RC128X' class
6109 case MCK_Mem64_RC128X:
6110 if (Operand.isMem64_RC128X())
6111 return MCTargetAsmParser::Match_Success;
6112 break;
6113 // 'Mem80' class
6114 case MCK_Mem80:
6115 if (Operand.isMem80())
6116 return MCTargetAsmParser::Match_Success;
6117 break;
6118 // 'Mem8' class
6119 case MCK_Mem8:
6120 if (Operand.isMem8())
6121 return MCTargetAsmParser::Match_Success;
6122 break;
6123 // 'Mem' class
6124 case MCK_Mem:
6125 if (Operand.isMem())
6126 return MCTargetAsmParser::Match_Success;
6127 break;
6128 } // end switch (Kind)
6129
6130 if (Operand.isReg()) {
6131 MatchClassKind OpKind;
6132 switch (Operand.getReg()) {
6133 default: OpKind = InvalidMatchClass; break;
6134 case X86::AL: OpKind = MCK_AL; break;
6135 case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
6136 case X86::CL: OpKind = MCK_CL; break;
6137 case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
6138 case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
6139 case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
6140 case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
6141 case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
6142 case X86::SIL: OpKind = MCK_GR8; break;
6143 case X86::DIL: OpKind = MCK_GR8; break;
6144 case X86::BPL: OpKind = MCK_GR8; break;
6145 case X86::SPL: OpKind = MCK_GR8; break;
6146 case X86::R8B: OpKind = MCK_GR8; break;
6147 case X86::R9B: OpKind = MCK_GR8; break;
6148 case X86::R10B: OpKind = MCK_GR8; break;
6149 case X86::R11B: OpKind = MCK_GR8; break;
6150 case X86::R12B: OpKind = MCK_GR8; break;
6151 case X86::R13B: OpKind = MCK_GR8; break;
6152 case X86::R14B: OpKind = MCK_GR8; break;
6153 case X86::R15B: OpKind = MCK_GR8; break;
6154 case X86::AX: OpKind = MCK_AX; break;
6155 case X86::DX: OpKind = MCK_DX; break;
6156 case X86::CX: OpKind = MCK_GR16_ABCD; break;
6157 case X86::BX: OpKind = MCK_GR16_ABCD; break;
6158 case X86::SI: OpKind = MCK_GR16_NOREX; break;
6159 case X86::DI: OpKind = MCK_GR16_NOREX; break;
6160 case X86::BP: OpKind = MCK_GR16_NOREX; break;
6161 case X86::SP: OpKind = MCK_GR16_NOREX; break;
6162 case X86::R8W: OpKind = MCK_GR16; break;
6163 case X86::R9W: OpKind = MCK_GR16; break;
6164 case X86::R10W: OpKind = MCK_GR16; break;
6165 case X86::R11W: OpKind = MCK_GR16; break;
6166 case X86::R12W: OpKind = MCK_GR16; break;
6167 case X86::R13W: OpKind = MCK_GR16; break;
6168 case X86::R14W: OpKind = MCK_GR16; break;
6169 case X86::R15W: OpKind = MCK_GR16; break;
6170 case X86::EAX: OpKind = MCK_EAX; break;
6171 case X86::EDX: OpKind = MCK_EDX; break;
6172 case X86::ECX: OpKind = MCK_ECX; break;
6173 case X86::EBX: OpKind = MCK_EBX; break;
6174 case X86::ESI: OpKind = MCK_Reg26; break;
6175 case X86::EDI: OpKind = MCK_Reg26; break;
6176 case X86::EBP: OpKind = MCK_Reg26; break;
6177 case X86::ESP: OpKind = MCK_Reg27; break;
6178 case X86::R8D: OpKind = MCK_Reg29; break;
6179 case X86::R9D: OpKind = MCK_Reg29; break;
6180 case X86::R10D: OpKind = MCK_Reg29; break;
6181 case X86::R11D: OpKind = MCK_Reg29; break;
6182 case X86::R12D: OpKind = MCK_Reg29; break;
6183 case X86::R13D: OpKind = MCK_Reg29; break;
6184 case X86::R14D: OpKind = MCK_Reg29; break;
6185 case X86::R15D: OpKind = MCK_Reg29; break;
6186 case X86::RAX: OpKind = MCK_RAX; break;
6187 case X86::RDX: OpKind = MCK_RDX; break;
6188 case X86::RCX: OpKind = MCK_RCX; break;
6189 case X86::RBX: OpKind = MCK_RBX; break;
6190 case X86::RSI: OpKind = MCK_Reg58; break;
6191 case X86::RDI: OpKind = MCK_Reg58; break;
6192 case X86::RBP: OpKind = MCK_Reg64; break;
6193 case X86::RSP: OpKind = MCK_Reg55; break;
6194 case X86::R8: OpKind = MCK_Reg61; break;
6195 case X86::R9: OpKind = MCK_Reg61; break;
6196 case X86::R10: OpKind = MCK_Reg60; break;
6197 case X86::R11: OpKind = MCK_Reg61; break;
6198 case X86::R12: OpKind = MCK_Reg57; break;
6199 case X86::R13: OpKind = MCK_Reg57; break;
6200 case X86::R14: OpKind = MCK_Reg57; break;
6201 case X86::R15: OpKind = MCK_Reg57; break;
6202 case X86::RIP: OpKind = MCK_Reg66; break;
6203 case X86::MM0: OpKind = MCK_VR64; break;
6204 case X86::MM1: OpKind = MCK_VR64; break;
6205 case X86::MM2: OpKind = MCK_VR64; break;
6206 case X86::MM3: OpKind = MCK_VR64; break;
6207 case X86::MM4: OpKind = MCK_VR64; break;
6208 case X86::MM5: OpKind = MCK_VR64; break;
6209 case X86::MM6: OpKind = MCK_VR64; break;
6210 case X86::MM7: OpKind = MCK_VR64; break;
6211 case X86::FP0: OpKind = MCK_RFP32; break;
6212 case X86::FP1: OpKind = MCK_RFP32; break;
6213 case X86::FP2: OpKind = MCK_RFP32; break;
6214 case X86::FP3: OpKind = MCK_RFP32; break;
6215 case X86::FP4: OpKind = MCK_RFP32; break;
6216 case X86::FP5: OpKind = MCK_RFP32; break;
6217 case X86::FP6: OpKind = MCK_RFP32; break;
6218 case X86::XMM0: OpKind = MCK_XMM0; break;
6219 case X86::XMM1: OpKind = MCK_VR128L; break;
6220 case X86::XMM2: OpKind = MCK_VR128L; break;
6221 case X86::XMM3: OpKind = MCK_VR128L; break;
6222 case X86::XMM4: OpKind = MCK_VR128L; break;
6223 case X86::XMM5: OpKind = MCK_VR128L; break;
6224 case X86::XMM6: OpKind = MCK_VR128L; break;
6225 case X86::XMM7: OpKind = MCK_VR128L; break;
6226 case X86::XMM8: OpKind = MCK_VR128H; break;
6227 case X86::XMM9: OpKind = MCK_VR128H; break;
6228 case X86::XMM10: OpKind = MCK_VR128H; break;
6229 case X86::XMM11: OpKind = MCK_VR128H; break;
6230 case X86::XMM12: OpKind = MCK_VR128H; break;
6231 case X86::XMM13: OpKind = MCK_VR128H; break;
6232 case X86::XMM14: OpKind = MCK_VR128H; break;
6233 case X86::XMM15: OpKind = MCK_VR128H; break;
6234 case X86::XMM16: OpKind = MCK_FR32X; break;
6235 case X86::XMM17: OpKind = MCK_FR32X; break;
6236 case X86::XMM18: OpKind = MCK_FR32X; break;
6237 case X86::XMM19: OpKind = MCK_FR32X; break;
6238 case X86::XMM20: OpKind = MCK_FR32X; break;
6239 case X86::XMM21: OpKind = MCK_FR32X; break;
6240 case X86::XMM22: OpKind = MCK_FR32X; break;
6241 case X86::XMM23: OpKind = MCK_FR32X; break;
6242 case X86::XMM24: OpKind = MCK_FR32X; break;
6243 case X86::XMM25: OpKind = MCK_FR32X; break;
6244 case X86::XMM26: OpKind = MCK_FR32X; break;
6245 case X86::XMM27: OpKind = MCK_FR32X; break;
6246 case X86::XMM28: OpKind = MCK_FR32X; break;
6247 case X86::XMM29: OpKind = MCK_FR32X; break;
6248 case X86::XMM30: OpKind = MCK_FR32X; break;
6249 case X86::XMM31: OpKind = MCK_FR32X; break;
6250 case X86::YMM0: OpKind = MCK_VR256L; break;
6251 case X86::YMM1: OpKind = MCK_VR256L; break;
6252 case X86::YMM2: OpKind = MCK_VR256L; break;
6253 case X86::YMM3: OpKind = MCK_VR256L; break;
6254 case X86::YMM4: OpKind = MCK_VR256L; break;
6255 case X86::YMM5: OpKind = MCK_VR256L; break;
6256 case X86::YMM6: OpKind = MCK_VR256L; break;
6257 case X86::YMM7: OpKind = MCK_VR256L; break;
6258 case X86::YMM8: OpKind = MCK_VR256H; break;
6259 case X86::YMM9: OpKind = MCK_VR256H; break;
6260 case X86::YMM10: OpKind = MCK_VR256H; break;
6261 case X86::YMM11: OpKind = MCK_VR256H; break;
6262 case X86::YMM12: OpKind = MCK_VR256H; break;
6263 case X86::YMM13: OpKind = MCK_VR256H; break;
6264 case X86::YMM14: OpKind = MCK_VR256H; break;
6265 case X86::YMM15: OpKind = MCK_VR256H; break;
6266 case X86::YMM16: OpKind = MCK_VR256X; break;
6267 case X86::YMM17: OpKind = MCK_VR256X; break;
6268 case X86::YMM18: OpKind = MCK_VR256X; break;
6269 case X86::YMM19: OpKind = MCK_VR256X; break;
6270 case X86::YMM20: OpKind = MCK_VR256X; break;
6271 case X86::YMM21: OpKind = MCK_VR256X; break;
6272 case X86::YMM22: OpKind = MCK_VR256X; break;
6273 case X86::YMM23: OpKind = MCK_VR256X; break;
6274 case X86::YMM24: OpKind = MCK_VR256X; break;
6275 case X86::YMM25: OpKind = MCK_VR256X; break;
6276 case X86::YMM26: OpKind = MCK_VR256X; break;
6277 case X86::YMM27: OpKind = MCK_VR256X; break;
6278 case X86::YMM28: OpKind = MCK_VR256X; break;
6279 case X86::YMM29: OpKind = MCK_VR256X; break;
6280 case X86::YMM30: OpKind = MCK_VR256X; break;
6281 case X86::YMM31: OpKind = MCK_VR256X; break;
6282 case X86::ZMM0: OpKind = MCK_Reg78; break;
6283 case X86::ZMM1: OpKind = MCK_Reg78; break;
6284 case X86::ZMM2: OpKind = MCK_Reg78; break;
6285 case X86::ZMM3: OpKind = MCK_Reg78; break;
6286 case X86::ZMM4: OpKind = MCK_Reg78; break;
6287 case X86::ZMM5: OpKind = MCK_Reg78; break;
6288 case X86::ZMM6: OpKind = MCK_Reg78; break;
6289 case X86::ZMM7: OpKind = MCK_Reg78; break;
6290 case X86::ZMM8: OpKind = MCK_Reg81; break;
6291 case X86::ZMM9: OpKind = MCK_Reg81; break;
6292 case X86::ZMM10: OpKind = MCK_Reg81; break;
6293 case X86::ZMM11: OpKind = MCK_Reg81; break;
6294 case X86::ZMM12: OpKind = MCK_Reg81; break;
6295 case X86::ZMM13: OpKind = MCK_Reg81; break;
6296 case X86::ZMM14: OpKind = MCK_Reg81; break;
6297 case X86::ZMM15: OpKind = MCK_Reg81; break;
6298 case X86::ZMM16: OpKind = MCK_VR512; break;
6299 case X86::ZMM17: OpKind = MCK_VR512; break;
6300 case X86::ZMM18: OpKind = MCK_VR512; break;
6301 case X86::ZMM19: OpKind = MCK_VR512; break;
6302 case X86::ZMM20: OpKind = MCK_VR512; break;
6303 case X86::ZMM21: OpKind = MCK_VR512; break;
6304 case X86::ZMM22: OpKind = MCK_VR512; break;
6305 case X86::ZMM23: OpKind = MCK_VR512; break;
6306 case X86::ZMM24: OpKind = MCK_VR512; break;
6307 case X86::ZMM25: OpKind = MCK_VR512; break;
6308 case X86::ZMM26: OpKind = MCK_VR512; break;
6309 case X86::ZMM27: OpKind = MCK_VR512; break;
6310 case X86::ZMM28: OpKind = MCK_VR512; break;
6311 case X86::ZMM29: OpKind = MCK_VR512; break;
6312 case X86::ZMM30: OpKind = MCK_VR512; break;
6313 case X86::ZMM31: OpKind = MCK_VR512; break;
6314 case X86::K0: OpKind = MCK_VK1; break;
6315 case X86::K1: OpKind = MCK_VK16WM; break;
6316 case X86::K2: OpKind = MCK_VK16WM; break;
6317 case X86::K3: OpKind = MCK_VK16WM; break;
6318 case X86::K4: OpKind = MCK_VK16WM; break;
6319 case X86::K5: OpKind = MCK_VK16WM; break;
6320 case X86::K6: OpKind = MCK_VK16WM; break;
6321 case X86::K7: OpKind = MCK_VK16WM; break;
6322 case X86::ST0: OpKind = MCK_ST0; break;
6323 case X86::ST1: OpKind = MCK_RST; break;
6324 case X86::ST2: OpKind = MCK_RST; break;
6325 case X86::ST3: OpKind = MCK_RST; break;
6326 case X86::ST4: OpKind = MCK_RST; break;
6327 case X86::ST5: OpKind = MCK_RST; break;
6328 case X86::ST6: OpKind = MCK_RST; break;
6329 case X86::ST7: OpKind = MCK_RST; break;
6330 case X86::FPSW: OpKind = MCK_FPCCR; break;
6331 case X86::EFLAGS: OpKind = MCK_CCR; break;
6332 case X86::CS: OpKind = MCK_CS; break;
6333 case X86::DS: OpKind = MCK_DS; break;
6334 case X86::SS: OpKind = MCK_SS; break;
6335 case X86::ES: OpKind = MCK_ES; break;
6336 case X86::FS: OpKind = MCK_FS; break;
6337 case X86::GS: OpKind = MCK_GS; break;
6338 case X86::DR0: OpKind = MCK_DEBUG_REG; break;
6339 case X86::DR1: OpKind = MCK_DEBUG_REG; break;
6340 case X86::DR2: OpKind = MCK_DEBUG_REG; break;
6341 case X86::DR3: OpKind = MCK_DEBUG_REG; break;
6342 case X86::DR4: OpKind = MCK_DEBUG_REG; break;
6343 case X86::DR5: OpKind = MCK_DEBUG_REG; break;
6344 case X86::DR6: OpKind = MCK_DEBUG_REG; break;
6345 case X86::DR7: OpKind = MCK_DEBUG_REG; break;
6346 case X86::DR8: OpKind = MCK_DEBUG_REG; break;
6347 case X86::DR9: OpKind = MCK_DEBUG_REG; break;
6348 case X86::DR10: OpKind = MCK_DEBUG_REG; break;
6349 case X86::DR11: OpKind = MCK_DEBUG_REG; break;
6350 case X86::DR12: OpKind = MCK_DEBUG_REG; break;
6351 case X86::DR13: OpKind = MCK_DEBUG_REG; break;
6352 case X86::DR14: OpKind = MCK_DEBUG_REG; break;
6353 case X86::DR15: OpKind = MCK_DEBUG_REG; break;
6354 case X86::CR0: OpKind = MCK_CONTROL_REG; break;
6355 case X86::CR1: OpKind = MCK_CONTROL_REG; break;
6356 case X86::CR2: OpKind = MCK_CONTROL_REG; break;
6357 case X86::CR3: OpKind = MCK_CONTROL_REG; break;
6358 case X86::CR4: OpKind = MCK_CONTROL_REG; break;
6359 case X86::CR5: OpKind = MCK_CONTROL_REG; break;
6360 case X86::CR6: OpKind = MCK_CONTROL_REG; break;
6361 case X86::CR7: OpKind = MCK_CONTROL_REG; break;
6362 case X86::CR8: OpKind = MCK_CONTROL_REG; break;
6363 case X86::CR9: OpKind = MCK_CONTROL_REG; break;
6364 case X86::CR10: OpKind = MCK_CONTROL_REG; break;
6365 case X86::CR11: OpKind = MCK_CONTROL_REG; break;
6366 case X86::CR12: OpKind = MCK_CONTROL_REG; break;
6367 case X86::CR13: OpKind = MCK_CONTROL_REG; break;
6368 case X86::CR14: OpKind = MCK_CONTROL_REG; break;
6369 case X86::CR15: OpKind = MCK_CONTROL_REG; break;
6370 case X86::BND0: OpKind = MCK_BNDR; break;
6371 case X86::BND1: OpKind = MCK_BNDR; break;
6372 case X86::BND2: OpKind = MCK_BNDR; break;
6373 case X86::BND3: OpKind = MCK_BNDR; break;
6374 }
6375 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
6376 getDiagKindFromRegisterClass(Kind);
6377 }
6378
6379 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
6380 return getDiagKindFromRegisterClass(Kind);
6381
6382 return MCTargetAsmParser::Match_InvalidOperand;
6383}
6384
6385#ifndef NDEBUG
6386const char *getMatchClassName(MatchClassKind Kind) {
6387 switch (Kind) {
6388 case InvalidMatchClass: return "InvalidMatchClass";
6389 case OptionalMatchClass: return "OptionalMatchClass";
6390 case MCK__STAR_: return "MCK__STAR_";
6391 case MCK_b: return "MCK_b";
6392 case MCK_d: return "MCK_d";
6393 case MCK_pd: return "MCK_pd";
6394 case MCK_ps: return "MCK_ps";
6395 case MCK_q: return "MCK_q";
6396 case MCK_sae: return "MCK_sae";
6397 case MCK_sd: return "MCK_sd";
6398 case MCK_ss: return "MCK_ss";
6399 case MCK_ub: return "MCK_ub";
6400 case MCK_ud: return "MCK_ud";
6401 case MCK_uq: return "MCK_uq";
6402 case MCK_uw: return "MCK_uw";
6403 case MCK_w: return "MCK_w";
6404 case MCK__123_: return "MCK__123_";
6405 case MCK__123_1to16_125_: return "MCK__123_1to16_125_";
6406 case MCK__123_1to2_125_: return "MCK__123_1to2_125_";
6407 case MCK__123_1to4_125_: return "MCK__123_1to4_125_";
6408 case MCK__123_1to8_125_: return "MCK__123_1to8_125_";
6409 case MCK__123_sae_125_: return "MCK__123_sae_125_";
6410 case MCK__123_z_125_: return "MCK__123_z_125_";
6411 case MCK__125_: return "MCK__125_";
6412 case MCK_Reg64: return "MCK_Reg64";
6413 case MCK_Reg66: return "MCK_Reg66";
6414 case MCK_AL: return "MCK_AL";
6415 case MCK_AX: return "MCK_AX";
6416 case MCK_CCR: return "MCK_CCR";
6417 case MCK_CL: return "MCK_CL";
6418 case MCK_CS: return "MCK_CS";
6419 case MCK_DS: return "MCK_DS";
6420 case MCK_DX: return "MCK_DX";
6421 case MCK_EAX: return "MCK_EAX";
6422 case MCK_EBX: return "MCK_EBX";
6423 case MCK_ECX: return "MCK_ECX";
6424 case MCK_EDX: return "MCK_EDX";
6425 case MCK_ES: return "MCK_ES";
6426 case MCK_FPCCR: return "MCK_FPCCR";
6427 case MCK_FS: return "MCK_FS";
6428 case MCK_GS: return "MCK_GS";
6429 case MCK_RAX: return "MCK_RAX";
6430 case MCK_RBX: return "MCK_RBX";
6431 case MCK_RCX: return "MCK_RCX";
6432 case MCK_RDX: return "MCK_RDX";
6433 case MCK_SS: return "MCK_SS";
6434 case MCK_ST0: return "MCK_ST0";
6435 case MCK_XMM0: return "MCK_XMM0";
6436 case MCK_Reg24: return "MCK_Reg24";
6437 case MCK_Reg52: return "MCK_Reg52";
6438 case MCK_Reg65: return "MCK_Reg65";
6439 case MCK_GR32_AD: return "MCK_GR32_AD";
6440 case MCK_GR64_AD: return "MCK_GR64_AD";
6441 case MCK_Reg25: return "MCK_Reg25";
6442 case MCK_Reg34: return "MCK_Reg34";
6443 case MCK_Reg53: return "MCK_Reg53";
6444 case MCK_GR32_TC: return "MCK_GR32_TC";
6445 case MCK_Reg50: return "MCK_Reg50";
6446 case MCK_Reg58: return "MCK_Reg58";
6447 case MCK_BNDR: return "MCK_BNDR";
6448 case MCK_GR16_ABCD: return "MCK_GR16_ABCD";
6449 case MCK_GR32_ABCD: return "MCK_GR32_ABCD";
6450 case MCK_GR64_ABCD: return "MCK_GR64_ABCD";
6451 case MCK_GR8_ABCD_H: return "MCK_GR8_ABCD_H";
6452 case MCK_GR8_ABCD_L: return "MCK_GR8_ABCD_L";
6453 case MCK_Reg42: return "MCK_Reg42";
6454 case MCK_Reg61: return "MCK_Reg61";
6455 case MCK_Reg26: return "MCK_Reg26";
6456 case MCK_Reg45: return "MCK_Reg45";
6457 case MCK_Reg48: return "MCK_Reg48";
6458 case MCK_Reg54: return "MCK_Reg54";
6459 case MCK_Reg60: return "MCK_Reg60";
6460 case MCK_SEGMENT_REG: return "MCK_SEGMENT_REG";
6461 case MCK_Reg27: return "MCK_Reg27";
6462 case MCK_Reg46: return "MCK_Reg46";
6463 case MCK_Reg49: return "MCK_Reg49";
6464 case MCK_Reg55: return "MCK_Reg55";
6465 case MCK_Reg59: return "MCK_Reg59";
6466 case MCK_GR32_NOREX_NOSP: return "MCK_GR32_NOREX_NOSP";
6467 case MCK_GR64_NOREX_NOSP: return "MCK_GR64_NOREX_NOSP";
6468 case MCK_RFP32: return "MCK_RFP32";
6469 case MCK_VK16WM: return "MCK_VK16WM";
6470 case MCK_Reg37: return "MCK_Reg37";
6471 case MCK_Reg43: return "MCK_Reg43";
6472 case MCK_Reg78: return "MCK_Reg78";
6473 case MCK_Reg81: return "MCK_Reg81";
6474 case MCK_GR16_NOREX: return "MCK_GR16_NOREX";
6475 case MCK_GR32_NOREX: return "MCK_GR32_NOREX";
6476 case MCK_GR64_TCW64: return "MCK_GR64_TCW64";
6477 case MCK_GR8_NOREX: return "MCK_GR8_NOREX";
6478 case MCK_RST: return "MCK_RST";
6479 case MCK_VK1: return "MCK_VK1";
6480 case MCK_VR128H: return "MCK_VR128H";
6481 case MCK_VR128L: return "MCK_VR128L";
6482 case MCK_VR256H: return "MCK_VR256H";
6483 case MCK_VR256L: return "MCK_VR256L";
6484 case MCK_VR64: return "MCK_VR64";
6485 case MCK_Reg21: return "MCK_Reg21";
6486 case MCK_GR64_NOREX: return "MCK_GR64_NOREX";
6487 case MCK_GR64_TC: return "MCK_GR64_TC";
6488 case MCK_Reg29: return "MCK_Reg29";
6489 case MCK_Reg57: return "MCK_Reg57";
6490 case MCK_Reg56: return "MCK_Reg56";
6491 case MCK_GR32_NOAX: return "MCK_GR32_NOAX";
6492 case MCK_GR32_NOSP: return "MCK_GR32_NOSP";
6493 case MCK_GR64_NOSP: return "MCK_GR64_NOSP";
6494 case MCK_Reg38: return "MCK_Reg38";
6495 case MCK_Reg79: return "MCK_Reg79";
6496 case MCK_CONTROL_REG: return "MCK_CONTROL_REG";
6497 case MCK_DEBUG_REG: return "MCK_DEBUG_REG";
6498 case MCK_FR32: return "MCK_FR32";
6499 case MCK_GR16: return "MCK_GR16";
6500 case MCK_GR32: return "MCK_GR32";
6501 case MCK_VR256: return "MCK_VR256";
6502 case MCK_Reg18: return "MCK_Reg18";
6503 case MCK_GR64: return "MCK_GR64";
6504 case MCK_LOW32_ADDR_ACCESS: return "MCK_LOW32_ADDR_ACCESS";
6505 case MCK_LOW32_ADDR_ACCESS_RBP: return "MCK_LOW32_ADDR_ACCESS_RBP";
6506 case MCK_GR8: return "MCK_GR8";
6507 case MCK_FR32X: return "MCK_FR32X";
6508 case MCK_VR256X: return "MCK_VR256X";
6509 case MCK_VR512: return "MCK_VR512";
6510 case MCK_AVX512RC: return "MCK_AVX512RC";
6511 case MCK_ImmSExti64i8: return "MCK_ImmSExti64i8";
6512 case MCK_ImmSExti16i8: return "MCK_ImmSExti16i8";
6513 case MCK_ImmSExti32i8: return "MCK_ImmSExti32i8";
6514 case MCK_ImmSExti64i32: return "MCK_ImmSExti64i32";
6515 case MCK_Imm: return "MCK_Imm";
6516 case MCK_ImmUnsignedi8: return "MCK_ImmUnsignedi8";
6517 case MCK_GR32orGR64: return "MCK_GR32orGR64";
6518 case MCK_AbsMem16: return "MCK_AbsMem16";
6519 case MCK_DstIdx16: return "MCK_DstIdx16";
6520 case MCK_DstIdx32: return "MCK_DstIdx32";
6521 case MCK_DstIdx64: return "MCK_DstIdx64";
6522 case MCK_DstIdx8: return "MCK_DstIdx8";
6523 case MCK_MemOffs16_16: return "MCK_MemOffs16_16";
6524 case MCK_MemOffs16_32: return "MCK_MemOffs16_32";
6525 case MCK_MemOffs16_8: return "MCK_MemOffs16_8";
6526 case MCK_MemOffs32_16: return "MCK_MemOffs32_16";
6527 case MCK_MemOffs32_32: return "MCK_MemOffs32_32";
6528 case MCK_MemOffs32_64: return "MCK_MemOffs32_64";
6529 case MCK_MemOffs32_8: return "MCK_MemOffs32_8";
6530 case MCK_MemOffs64_16: return "MCK_MemOffs64_16";
6531 case MCK_MemOffs64_32: return "MCK_MemOffs64_32";
6532 case MCK_MemOffs64_64: return "MCK_MemOffs64_64";
6533 case MCK_MemOffs64_8: return "MCK_MemOffs64_8";
6534 case MCK_SrcIdx16: return "MCK_SrcIdx16";
6535 case MCK_SrcIdx32: return "MCK_SrcIdx32";
6536 case MCK_SrcIdx64: return "MCK_SrcIdx64";
6537 case MCK_SrcIdx8: return "MCK_SrcIdx8";
6538 case MCK_AbsMem: return "MCK_AbsMem";
6539 case MCK_Mem128: return "MCK_Mem128";
6540 case MCK_Mem128_RC128: return "MCK_Mem128_RC128";
6541 case MCK_Mem128_RC128X: return "MCK_Mem128_RC128X";
6542 case MCK_Mem128_RC256: return "MCK_Mem128_RC256";
6543 case MCK_Mem128_RC256X: return "MCK_Mem128_RC256X";
6544 case MCK_Mem16: return "MCK_Mem16";
6545 case MCK_Mem256: return "MCK_Mem256";
6546 case MCK_Mem256_RC128: return "MCK_Mem256_RC128";
6547 case MCK_Mem256_RC128X: return "MCK_Mem256_RC128X";
6548 case MCK_Mem256_RC256: return "MCK_Mem256_RC256";
6549 case MCK_Mem256_RC256X: return "MCK_Mem256_RC256X";
6550 case MCK_Mem256_RC512: return "MCK_Mem256_RC512";
6551 case MCK_Mem32: return "MCK_Mem32";
6552 case MCK_Mem512: return "MCK_Mem512";
6553 case MCK_Mem512_RC256X: return "MCK_Mem512_RC256X";
6554 case MCK_Mem512_RC512: return "MCK_Mem512_RC512";
6555 case MCK_Mem64: return "MCK_Mem64";
6556 case MCK_Mem64_RC128: return "MCK_Mem64_RC128";
6557 case MCK_Mem64_RC128X: return "MCK_Mem64_RC128X";
6558 case MCK_Mem80: return "MCK_Mem80";
6559 case MCK_Mem8: return "MCK_Mem8";
6560 case MCK_Mem: return "MCK_Mem";
6561 case NumMatchClassKinds: return "NumMatchClassKinds";
6562 }
6563 llvm_unreachable("unhandled MatchClassKind!")::llvm::llvm_unreachable_internal("unhandled MatchClassKind!"
, "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 6563);
6564}
6565
6566#endif // NDEBUG
6567uint64_t X86AsmParser::
6568ComputeAvailableFeatures(const FeatureBitset& FB) const {
6569 uint64_t Features = 0;
6570 if ((FB[X86::FeatureAVX512]))
6571 Features |= Feature_HasAVX512;
6572 if ((FB[X86::FeatureCDI]))
6573 Features |= Feature_HasCDI;
6574 if ((FB[X86::FeatureVPOPCNTDQ]))
6575 Features |= Feature_HasVPOPCNTDQ;
6576 if ((FB[X86::FeaturePFI]))
6577 Features |= Feature_HasPFI;
6578 if ((FB[X86::FeatureERI]))
6579 Features |= Feature_HasERI;
6580 if ((FB[X86::FeatureDQI]))
6581 Features |= Feature_HasDQI;
6582 if ((FB[X86::FeatureBWI]))
6583 Features |= Feature_HasBWI;
6584 if ((FB[X86::FeatureVLX]))
6585 Features |= Feature_HasVLX;
6586 if ((FB[X86::FeatureVNNI]))
6587 Features |= Feature_HasVNNI;
6588 if ((FB[X86::FeatureBITALG]))
6589 Features |= Feature_HasBITALG;
6590 if ((FB[X86::FeatureVBMI]))
6591 Features |= Feature_HasVBMI;
6592 if ((FB[X86::FeatureVBMI2]))
6593 Features |= Feature_HasVBMI2;
6594 if ((FB[X86::FeatureIFMA]))
6595 Features |= Feature_HasIFMA;
6596 if ((!FB[X86::Mode64Bit]))
6597 Features |= Feature_Not64BitMode;
6598 if ((FB[X86::Mode64Bit]))
6599 Features |= Feature_In64BitMode;
6600 if ((FB[X86::Mode16Bit]))
6601 Features |= Feature_In16BitMode;
6602 if ((!FB[X86::Mode16Bit]))
6603 Features |= Feature_Not16BitMode;
6604 if ((FB[X86::Mode32Bit]))
6605 Features |= Feature_In32BitMode;
6606 return Features;
6607}
6608
6609static const char *const MnemonicTable =
6610 "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
6611 "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
6612 "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005"
6613 "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge"
6614 "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005"
6615 "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
6616 "extrq\007blcfill\004blci\005blcic\006blcmsk\004blcs\007blendpd\007blend"
6617 "ps\010blendvpd\010blendvps\007blsfill\004blsi\005blsic\005blsil\005blsi"
6618 "q\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl\005"
6619 "bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003bsf\004"
6620 "bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006bswapl\006"
6621 "bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003btr\004btr"
6622 "l\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzhi\005bzhi"
6623 "l\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003cdq\004"
6624 "cdqe\004clac\003clc\003cld\007clflush\nclflushopt\004clgi\003cli\004clr"
6625 "b\004clrl\004clrq\010clrssbsy\004clrw\004cltd\004cltq\004clts\004clwb\006"
6626 "clzero\003cmc\005cmova\006cmovae\007cmovael\007cmovaeq\007cmovaew\006cm"
6627 "oval\006cmovaq\006cmovaw\005cmovb\006cmovbe\007cmovbel\007cmovbeq\007cm"
6628 "ovbew\006cmovbl\006cmovbq\006cmovbw\005cmove\006cmovel\006cmoveq\006cmo"
6629 "vew\005cmovg\006cmovge\007cmovgel\007cmovgeq\007cmovgew\006cmovgl\006cm"
6630 "ovgq\006cmovgw\005cmovl\006cmovle\007cmovlel\007cmovleq\007cmovlew\006c"
6631 "movll\006cmovlq\006cmovlw\006cmovne\007cmovnel\007cmovneq\007cmovnew\006"
6632 "cmovno\007cmovnol\007cmovnoq\007cmovnow\006cmovnp\007cmovnpl\007cmovnpq"
6633 "\007cmovnpw\006cmovns\007cmovnsl\007cmovnsq\007cmovnsw\005cmovo\006cmov"
6634 "ol\006cmovoq\006cmovow\005cmovp\006cmovpl\006cmovpq\006cmovpw\005cmovs\006"
6635 "cmovsl\006cmovsq\006cmovsw\003cmp\004cmpb\004cmpl\005cmppd\005cmpps\004"
6636 "cmpq\004cmps\005cmpsb\005cmpsd\005cmpsl\005cmpsq\005cmpss\005cmpsw\004c"
6637 "mpw\007cmpxchg\ncmpxchg16b\tcmpxchg8b\010cmpxchgb\010cmpxchgl\010cmpxch"
6638 "gq\010cmpxchgw\006comisd\006comiss\005cpuid\003cqo\004cqto\005crc32\006"
6639 "crc32b\006crc32l\006crc32q\006crc32w\002cs\010cvtdq2pd\010cvtdq2ps\010c"
6640 "vtpd2dq\010cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010cvtpi2ps\010cvtps2dq\010"
6641 "cvtps2pd\010cvtps2pi\010cvtsd2si\tcvtsd2sil\tcvtsd2siq\010cvtsd2ss\010c"
6642 "vtsi2sd\tcvtsi2sdl\tcvtsi2sdq\010cvtsi2ss\tcvtsi2ssl\tcvtsi2ssq\010cvts"
6643 "s2sd\010cvtss2si\tcvtss2sil\tcvtss2siq\tcvttpd2dq\tcvttpd2pi\tcvttps2dq"
6644 "\tcvttps2pi\tcvttsd2si\ncvttsd2sil\ncvttsd2siq\tcvttss2si\ncvttss2sil\n"
6645 "cvttss2siq\003cwd\004cwde\004cwtd\004cwtl\003daa\003das\006data16\006da"
6646 "ta32\003dec\004decb\004decl\004decq\004decw\003div\004divb\004divl\005d"
6647 "ivpd\005divps\004divq\005divsd\005divss\004divw\004dppd\004dpps\002ds\004"
6648 "emms\005encls\005enclu\005enter\002es\textractps\005extrq\005f2xm1\004f"
6649 "abs\004fadd\005faddl\005faddp\005fadds\004fbld\005fbstp\004fchs\006fcmo"
6650 "vb\007fcmovbe\006fcmove\007fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006"
6651 "fcmovu\004fcom\005fcomi\005fcoml\005fcomp\006fcompi\006fcompl\006fcompp"
6652 "\006fcomps\005fcoms\004fcos\007fdecstp\004fdiv\005fdivl\005fdivp\005fdi"
6653 "vr\006fdivrl\006fdivrp\006fdivrs\005fdivs\005femms\005ffree\006ffreep\005"
6654 "fiadd\006fiaddl\006fiadds\005ficom\006ficoml\006ficomp\007ficompl\007fi"
6655 "comps\006ficoms\005fidiv\006fidivl\006fidivr\007fidivrl\007fidivrs\006f"
6656 "idivs\004fild\005fildl\006fildll\005filds\005fimul\006fimull\006fimuls\007"
6657 "fincstp\004fist\005fistl\005fistp\006fistpl\007fistpll\006fistps\005fis"
6658 "ts\006fisttp\007fisttpl\010fisttpll\007fisttps\005fisub\006fisubl\006fi"
6659 "subr\007fisubrl\007fisubrs\006fisubs\003fld\004fld1\005fldcw\006fldenv\004"
6660 "fldl\006fldl2e\006fldl2t\006fldlg2\006fldln2\005fldpi\004flds\004fldt\004"
6661 "fldz\004fmul\005fmull\005fmulp\005fmuls\006fnclex\006fninit\004fnop\006"
6662 "fnsave\006fnstcw\007fnstenv\006fnstsw\006fpatan\005fprem\006fprem1\005f"
6663 "ptan\007frndint\006frstor\002fs\006fscale\004fsin\007fsincos\005fsqrt\003"
6664 "fst\004fstl\004fstp\005fstpl\005fstps\005fstpt\004fsts\004fsub\005fsubl"
6665 "\005fsubp\005fsubr\006fsubrl\006fsubrp\006fsubrs\005fsubs\004ftst\005fu"
6666 "com\006fucomi\006fucomp\007fucompi\007fucompp\004fxam\004fxch\007fxrsto"
6667 "r\tfxrstor64\006fxsave\010fxsave64\007fxtract\005fyl2x\007fyl2xp1\006ge"
6668 "tsec\020gf2p8affineinvqb\015gf2p8affineqb\tgf2p8mulb\002gs\006haddpd\006"
6669 "haddps\003hlt\006hsubpd\006hsubps\004idiv\005idivb\005idivl\005idivq\005"
6670 "idivw\004imul\005imulb\005imull\005imulq\005imulw\002in\003inb\003inc\004"
6671 "incb\004incl\004incq\007incsspd\007incsspq\004incw\003inl\003ins\004ins"
6672 "b\004insd\010insertps\007insertq\004insl\004insw\003int\004int3\004into"
6673 "\004invd\006invept\006invlpg\007invlpga\007invpcid\007invvpid\003inw\004"
6674 "iret\005iretd\005iretl\005iretq\005iretw\002ja\003jae\002jb\003jbe\004j"
6675 "cxz\002je\005jecxz\002jg\003jge\002jl\003jle\003jmp\004jmpl\004jmpq\004"
6676 "jmpw\003jne\003jno\003jnp\003jns\002jo\002jp\005jrcxz\002js\005kaddb\005"
6677 "kaddd\005kaddq\005kaddw\005kandb\005kandd\006kandnb\006kandnd\006kandnq"
6678 "\006kandnw\005kandq\005kandw\005kmovb\005kmovd\005kmovq\005kmovw\005kno"
6679 "tb\005knotd\005knotq\005knotw\004korb\004kord\004korq\010kortestb\010ko"
6680 "rtestd\010kortestq\010kortestw\004korw\010kshiftlb\010kshiftld\010kshif"
6681 "tlq\010kshiftlw\010kshiftrb\010kshiftrd\010kshiftrq\010kshiftrw\006ktes"
6682 "tb\006ktestd\006ktestq\006ktestw\010kunpckbw\010kunpckdq\010kunpckwd\006"
6683 "kxnorb\006kxnord\006kxnorq\006kxnorw\005kxorb\005kxord\005kxorq\005kxor"
6684 "w\004lahf\003lar\004larl\004larq\004larw\005lcall\006lcalll\006lcallq\006"
6685 "lcallw\005lddqu\007ldmxcsr\003lds\004ldsl\004ldsw\003lea\004leal\004lea"
6686 "q\005leave\004leaw\003les\004lesl\004lesw\006lfence\003lfs\004lfsl\004l"
6687 "fsq\004lfsw\004lgdt\005lgdtl\005lgdtq\005lgdtw\003lgs\004lgsl\004lgsq\004"
6688 "lgsw\004lidt\005lidtl\005lidtq\005lidtw\004ljmp\005ljmpl\005ljmpq\005lj"
6689 "mpw\004lldt\005lldtw\006llwpcb\004lmsw\005lmsww\004lock\004lods\005lods"
6690 "b\005lodsd\005lodsl\005lodsq\005lodsw\004loop\005loope\006loopne\005lre"
6691 "tl\005lretq\005lretw\003lsl\004lsll\004lslq\004lslw\003lss\004lssl\004l"
6692 "ssq\004lssw\003ltr\004ltrw\006lwpins\006lwpval\005lzcnt\006lzcntl\006lz"
6693 "cntq\006lzcntw\nmaskmovdqu\010maskmovq\005maxpd\005maxps\005maxsd\005ma"
6694 "xss\006mfence\005minpd\005minps\005minsd\005minss\007monitor\010monitor"
6695 "x\007montmul\003mov\006movabs\007movabsb\007movabsl\007movabsq\007movab"
6696 "sw\006movapd\006movaps\004movb\005movbe\006movbel\006movbeq\006movbew\004"
6697 "movd\007movddup\007movdq2q\006movdqa\006movdqu\007movhlps\006movhpd\006"
6698 "movhps\004movl\007movlhps\006movlpd\006movlps\010movmskpd\010movmskps\007"
6699 "movntdq\010movntdqa\006movnti\007movntil\007movntiq\007movntpd\007movnt"
6700 "ps\006movntq\007movntsd\007movntss\004movq\007movq2dq\004movs\005movsb\006"
6701 "movsbl\006movsbq\006movsbw\005movsd\010movshdup\005movsl\010movsldup\006"
6702 "movslq\005movsq\005movss\005movsw\006movswl\006movswq\005movsx\006movsx"
6703 "d\006movupd\006movups\004movw\006movzbl\006movzbq\006movzbw\006movzwl\006"
6704 "movzwq\005movzx\007mpsadbw\003mul\004mulb\004mull\005mulpd\005mulps\004"
6705 "mulq\005mulsd\005mulss\004mulw\004mulx\005mulxl\005mulxq\005mwait\006mw"
6706 "aitx\003neg\004negb\004negl\004negq\004negw\003nop\004nopl\004nopq\004n"
6707 "opw\003not\004notb\004notl\004notq\004notw\002or\003orb\003orl\004orpd\004"
6708 "orps\003orq\003orw\003out\004outb\004outl\004outs\005outsb\005outsd\005"
6709 "outsl\005outsw\004outw\005pabsb\005pabsd\005pabsw\010packssdw\010packss"
6710 "wb\010packusdw\010packuswb\005paddb\005paddd\005paddq\006paddsb\006padd"
6711 "sw\007paddusb\007paddusw\005paddw\007palignr\004pand\005pandn\005pause\005"
6712 "pavgb\007pavgusb\005pavgw\010pblendvb\007pblendw\014pclmulhqhqdq\014pcl"
6713 "mulhqlqdq\014pclmullqhqdq\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007pcmp"
6714 "eqd\007pcmpeqq\007pcmpeqw\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpgtd\007"
6715 "pcmpgtq\007pcmpgtw\tpcmpistri\tpcmpistrm\004pdep\005pdepl\005pdepq\004p"
6716 "ext\005pextl\005pextq\006pextrb\006pextrd\006pextrq\006pextrw\005pf2id\005"
6717 "pf2iw\005pfacc\005pfadd\007pfcmpeq\007pfcmpge\007pfcmpgt\005pfmax\005pf"
6718 "min\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpit1\010pfrcpit2\010p"
6719 "frsqit1\007pfrsqrt\005pfsub\006pfsubr\006phaddd\007phaddsw\006phaddw\np"
6720 "hminposuw\006phsubd\007phsubsw\006phsubw\005pi2fd\005pi2fw\006pinsrb\006"
6721 "pinsrd\006pinsrq\006pinsrw\tpmaddubsw\007pmaddwd\006pmaxsb\006pmaxsd\006"
6722 "pmaxsw\006pmaxub\006pmaxud\006pmaxuw\006pminsb\006pminsd\006pminsw\006p"
6723 "minub\006pminud\006pminuw\010pmovmskb\010pmovsxbd\010pmovsxbq\010pmovsx"
6724 "bw\010pmovsxdq\010pmovsxwd\010pmovsxwq\010pmovzxbd\010pmovzxbq\010pmovz"
6725 "xbw\010pmovzxdq\010pmovzxwd\010pmovzxwq\006pmuldq\010pmulhrsw\007pmulhr"
6726 "w\007pmulhuw\006pmulhw\006pmulld\006pmullw\007pmuludq\003pop\005popal\005"
6727 "popaw\006popcnt\007popcntl\007popcntq\007popcntw\004popf\005popfd\005po"
6728 "pfl\005popfq\005popfw\004popl\004popq\004popw\003por\010prefetch\013pre"
6729 "fetchnta\nprefetcht0\nprefetcht1\nprefetcht2\tprefetchw\013prefetchwt1\006"
6730 "psadbw\006pshufb\006pshufd\007pshufhw\007pshuflw\006pshufw\006psignb\006"
6731 "psignd\006psignw\005pslld\006pslldq\005psllq\005psllw\005psrad\005psraw"
6732 "\005psrld\006psrldq\005psrlq\005psrlw\005psubb\005psubd\005psubq\006psu"
6733 "bsb\006psubsw\007psubusb\007psubusw\005psubw\006pswapd\005ptest\007ptwr"
6734 "ite\010ptwritel\010ptwriteq\tpunpckhbw\tpunpckhdq\npunpckhqdq\tpunpckhw"
6735 "d\tpunpcklbw\tpunpckldq\npunpcklqdq\tpunpcklwd\004push\006pushal\006pus"
6736 "haw\005pushf\006pushfd\006pushfl\006pushfq\006pushfw\005pushl\005pushq\005"
6737 "pushw\004pxor\003rcl\004rclb\004rcll\004rclq\004rclw\005rcpps\005rcpss\003"
6738 "rcr\004rcrb\004rcrl\004rcrq\004rcrw\010rdfsbase\trdfsbasel\trdfsbaseq\010"
6739 "rdgsbase\trdgsbasel\trdgsbaseq\005rdmsr\005rdpid\006rdpkru\005rdpmc\006"
6740 "rdrand\007rdrandl\007rdrandq\007rdrandw\006rdseed\007rdseedl\007rdseedq"
6741 "\007rdseedw\006rdsspd\006rdsspq\005rdtsc\006rdtscp\003rep\005repne\003r"
6742 "et\004retf\005retfq\004retl\004retq\004retw\005rex64\003rol\004rolb\004"
6743 "roll\004rolq\004rolw\003ror\004rorb\004rorl\004rorq\004rorw\004rorx\005"
6744 "rorxl\005rorxq\007roundpd\007roundps\007roundsd\007roundss\003rsm\007rs"
6745 "qrtps\007rsqrtss\010rstorssp\004sahf\004salc\003sar\004sarb\004sarl\004"
6746 "sarq\004sarw\004sarx\005sarxl\005sarxq\013saveprevssp\003sbb\004sbbb\004"
6747 "sbbl\004sbbq\004sbbw\004scas\005scasb\005scasd\005scasl\005scasq\005sca"
6748 "sw\004seta\005setae\004setb\005setbe\004sete\004setg\005setge\004setl\005"
6749 "setle\005setne\005setno\005setnp\005setns\004seto\004setp\004sets\010se"
6750 "tssbsy\006sfence\004sgdt\005sgdtl\005sgdtq\005sgdtw\010sha1msg1\010sha1"
6751 "msg2\tsha1nexte\tsha1rnds4\nsha256msg1\nsha256msg2\013sha256rnds2\003sh"
6752 "l\004shlb\004shld\005shldl\005shldq\005shldw\004shll\004shlq\004shlw\004"
6753 "shlx\005shlxl\005shlxq\003shr\004shrb\004shrd\005shrdl\005shrdq\005shrd"
6754 "w\004shrl\004shrq\004shrw\004shrx\005shrxl\005shrxq\006shufpd\006shufps"
6755 "\004sidt\005sidtl\005sidtq\005sidtw\006skinit\004sldt\005sldtl\005sldtq"
6756 "\005sldtw\006slwpcb\004smsw\005smswl\005smswq\005smsww\006sqrtpd\006sqr"
6757 "tps\006sqrtsd\006sqrtss\002ss\004stac\003stc\003std\004stgi\003sti\007s"
6758 "tmxcsr\004stos\005stosb\005stosd\005stosl\005stosq\005stosw\003str\004s"
6759 "trl\004strq\004strw\003sub\004subb\004subl\005subpd\005subps\004subq\005"
6760 "subsd\005subss\004subw\006swapgs\007syscall\010sysenter\007sysexit\010s"
6761 "ysexitl\010sysexitq\006sysret\007sysretl\007sysretq\006t1mskc\004test\005"
6762 "testb\005testl\005testq\005testw\005tzcnt\006tzcntl\006tzcntq\006tzcntw"
6763 "\005tzmsk\007ucomisd\007ucomiss\003ud2\004ud2b\010unpckhpd\010unpckhps\010"
6764 "unpcklpd\010unpcklps\006vaddpd\006vaddps\006vaddsd\006vaddss\tvaddsubpd"
6765 "\tvaddsubps\007vaesdec\013vaesdeclast\007vaesenc\013vaesenclast\007vaes"
6766 "imc\020vaeskeygenassist\007valignd\007valignq\007vandnpd\007vandnps\006"
6767 "vandpd\006vandps\tvblendmpd\tvblendmps\010vblendpd\010vblendps\tvblendv"
6768 "pd\tvblendvps\016vbroadcastf128\017vbroadcastf32x2\017vbroadcastf32x4\017"
6769 "vbroadcastf32x8\017vbroadcastf64x2\017vbroadcastf64x4\016vbroadcasti128"
6770 "\017vbroadcasti32x2\017vbroadcasti32x4\017vbroadcasti32x8\017vbroadcast"
6771 "i64x2\017vbroadcasti64x4\014vbroadcastsd\014vbroadcastss\004vcmp\006vcm"
6772 "ppd\006vcmpps\006vcmpsd\006vcmpss\007vcomisd\007vcomiss\013vcompresspd\013"
6773 "vcompressps\tvcvtdq2pd\tvcvtdq2ps\tvcvtpd2dq\nvcvtpd2dqx\nvcvtpd2dqy\tv"
6774 "cvtpd2ps\nvcvtpd2psx\nvcvtpd2psy\tvcvtpd2qq\nvcvtpd2udq\013vcvtpd2udqx\013"
6775 "vcvtpd2udqy\nvcvtpd2uqq\tvcvtph2ps\tvcvtps2dq\tvcvtps2pd\tvcvtps2ph\tvc"
6776 "vtps2qq\nvcvtps2udq\nvcvtps2uqq\tvcvtqq2pd\tvcvtqq2ps\nvcvtqq2psx\nvcvt"
6777 "qq2psy\tvcvtsd2si\nvcvtsd2sil\nvcvtsd2siq\tvcvtsd2ss\nvcvtsd2usi\tvcvts"
6778 "i2sd\nvcvtsi2sdl\nvcvtsi2sdq\tvcvtsi2ss\nvcvtsi2ssl\nvcvtsi2ssq\tvcvtss"
6779 "2sd\tvcvtss2si\nvcvtss2sil\nvcvtss2siq\nvcvtss2usi\nvcvttpd2dq\013vcvtt"
6780 "pd2dqx\013vcvttpd2dqy\nvcvttpd2qq\013vcvttpd2udq\014vcvttpd2udqx\014vcv"
6781 "ttpd2udqy\013vcvttpd2uqq\nvcvttps2dq\nvcvttps2qq\013vcvttps2udq\013vcvt"
6782 "tps2uqq\nvcvttsd2si\013vcvttsd2sil\013vcvttsd2siq\013vcvttsd2usi\014vcv"
6783 "ttsd2usil\014vcvttsd2usiq\nvcvttss2si\013vcvttss2sil\013vcvttss2siq\013"
6784 "vcvttss2usi\014vcvttss2usil\014vcvttss2usiq\nvcvtudq2pd\nvcvtudq2ps\nvc"
6785 "vtuqq2pd\nvcvtuqq2ps\013vcvtuqq2psx\013vcvtuqq2psy\nvcvtusi2sd\013vcvtu"
6786 "si2sdl\013vcvtusi2sdq\nvcvtusi2ss\013vcvtusi2ssl\013vcvtusi2ssq\tvdbpsa"
6787 "dbw\006vdivpd\006vdivps\006vdivsd\006vdivss\005vdppd\005vdpps\004verr\004"
6788 "verw\007vexp2pd\007vexp2ps\tvexpandpd\tvexpandps\014vextractf128\015vex"
6789 "tractf32x4\015vextractf32x8\015vextractf64x2\015vextractf64x4\014vextra"
6790 "cti128\015vextracti32x4\015vextracti32x8\015vextracti64x2\015vextracti6"
6791 "4x4\nvextractps\013vfixupimmpd\013vfixupimmps\013vfixupimmsd\013vfixupi"
6792 "mmss\013vfmadd132pd\013vfmadd132ps\013vfmadd132sd\013vfmadd132ss\013vfm"
6793 "add213pd\013vfmadd213ps\013vfmadd213sd\013vfmadd213ss\013vfmadd231pd\013"
6794 "vfmadd231ps\013vfmadd231sd\013vfmadd231ss\010vfmaddpd\010vfmaddps\010vf"
6795 "maddsd\010vfmaddss\016vfmaddsub132pd\016vfmaddsub132ps\016vfmaddsub213p"
6796 "d\016vfmaddsub213ps\016vfmaddsub231pd\016vfmaddsub231ps\013vfmaddsubpd\013"
6797 "vfmaddsubps\013vfmsub132pd\013vfmsub132ps\013vfmsub132sd\013vfmsub132ss"
6798 "\013vfmsub213pd\013vfmsub213ps\013vfmsub213sd\013vfmsub213ss\013vfmsub2"
6799 "31pd\013vfmsub231ps\013vfmsub231sd\013vfmsub231ss\016vfmsubadd132pd\016"
6800 "vfmsubadd132ps\016vfmsubadd213pd\016vfmsubadd213ps\016vfmsubadd231pd\016"
6801 "vfmsubadd231ps\013vfmsubaddpd\013vfmsubaddps\010vfmsubpd\010vfmsubps\010"
6802 "vfmsubsd\010vfmsubss\014vfnmadd132pd\014vfnmadd132ps\014vfnmadd132sd\014"
6803 "vfnmadd132ss\014vfnmadd213pd\014vfnmadd213ps\014vfnmadd213sd\014vfnmadd"
6804 "213ss\014vfnmadd231pd\014vfnmadd231ps\014vfnmadd231sd\014vfnmadd231ss\t"
6805 "vfnmaddpd\tvfnmaddps\tvfnmaddsd\tvfnmaddss\014vfnmsub132pd\014vfnmsub13"
6806 "2ps\014vfnmsub132sd\014vfnmsub132ss\014vfnmsub213pd\014vfnmsub213ps\014"
6807 "vfnmsub213sd\014vfnmsub213ss\014vfnmsub231pd\014vfnmsub231ps\014vfnmsub"
6808 "231sd\014vfnmsub231ss\tvfnmsubpd\tvfnmsubps\tvfnmsubsd\tvfnmsubss\nvfpc"
6809 "lasspd\013vfpclasspdq\013vfpclasspdx\013vfpclasspdy\013vfpclasspdz\nvfp"
6810 "classps\013vfpclasspsl\013vfpclasspsx\013vfpclasspsy\013vfpclasspsz\nvf"
6811 "pclasssd\nvfpclassss\007vfrczpd\007vfrczps\007vfrczsd\007vfrczss\nvgath"
6812 "erdpd\nvgatherdps\015vgatherpf0dpd\015vgatherpf0dps\015vgatherpf0qpd\015"
6813 "vgatherpf0qps\015vgatherpf1dpd\015vgatherpf1dps\015vgatherpf1qpd\015vga"
6814 "therpf1qps\nvgatherqpd\nvgatherqps\tvgetexppd\tvgetexpps\tvgetexpsd\tvg"
6815 "etexpss\nvgetmantpd\nvgetmantps\nvgetmantsd\nvgetmantss\021vgf2p8affine"
6816 "invqb\016vgf2p8affineqb\nvgf2p8mulb\007vhaddpd\007vhaddps\007vhsubpd\007"
6817 "vhsubps\013vinsertf128\014vinsertf32x4\014vinsertf32x8\014vinsertf64x2\014"
6818 "vinsertf64x4\013vinserti128\014vinserti32x4\014vinserti32x8\014vinserti"
6819 "64x2\014vinserti64x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nv"
6820 "maskmovpd\nvmaskmovps\006vmaxpd\006vmaxps\006vmaxsd\006vmaxss\006vmcall"
6821 "\007vmclear\006vmfunc\006vminpd\006vminps\006vminsd\006vminss\010vmlaun"
6822 "ch\006vmload\007vmmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005"
6823 "vmovd\010vmovddup\007vmovdqa\tvmovdqa32\013vmovdqa32.s\tvmovdqa64\013vm"
6824 "ovdqa64.s\007vmovdqu\tvmovdqu16\013vmovdqu16.s\tvmovdqu32\013vmovdqu32."
6825 "s\tvmovdqu64\013vmovdqu64.s\010vmovdqu8\nvmovdqu8.s\010vmovhlps\007vmov"
6826 "hpd\007vmovhps\010vmovlhps\007vmovlpd\007vmovlps\tvmovmskpd\tvmovmskps\010"
6827 "vmovntdq\tvmovntdqa\010vmovntpd\010vmovntps\005vmovq\007vmovq.s\006vmov"
6828 "sd\010vmovsd.s\tvmovshdup\tvmovsldup\006vmovss\010vmovss.s\007vmovupd\t"
6829 "vmovupd.s\007vmovups\tvmovups.s\010vmpsadbw\007vmptrld\007vmptrst\006vm"
6830 "read\007vmreadl\007vmreadq\010vmresume\005vmrun\006vmsave\006vmulpd\006"
6831 "vmulps\006vmulsd\006vmulss\007vmwrite\010vmwritel\010vmwriteq\006vmxoff"
6832 "\005vmxon\005vorpd\005vorps\006vpabsb\006vpabsd\006vpabsq\006vpabsw\tvp"
6833 "ackssdw\tvpacksswb\tvpackusdw\tvpackuswb\006vpaddb\006vpaddd\006vpaddq\007"
6834 "vpaddsb\007vpaddsw\010vpaddusb\010vpaddusw\006vpaddw\010vpalignr\005vpa"
6835 "nd\006vpandd\006vpandn\007vpandnd\007vpandnq\006vpandq\006vpavgb\006vpa"
6836 "vgw\010vpblendd\tvpblendmb\tvpblendmd\tvpblendmq\tvpblendmw\tvpblendvb\010"
6837 "vpblendw\014vpbroadcastb\014vpbroadcastd\017vpbroadcastmb2q\017vpbroadc"
6838 "astmw2d\014vpbroadcastq\014vpbroadcastw\015vpclmulhqhqdq\015vpclmulhqlq"
6839 "dq\015vpclmullqhqdq\015vpclmullqlqdq\nvpclmulqdq\006vpcmov\005vpcmp\006"
6840 "vpcmpb\006vpcmpd\010vpcmpeqb\010vpcmpeqd\010vpcmpeqq\010vpcmpeqw\nvpcmp"
6841 "estri\nvpcmpestrm\010vpcmpgtb\010vpcmpgtd\010vpcmpgtq\010vpcmpgtw\nvpcm"
6842 "pistri\nvpcmpistrm\006vpcmpq\007vpcmpub\007vpcmpud\007vpcmpuq\007vpcmpu"
6843 "w\006vpcmpw\005vpcom\006vpcomb\006vpcomd\013vpcompressb\013vpcompressd\013"
6844 "vpcompressq\013vpcompressw\006vpcomq\007vpcomub\007vpcomud\007vpcomuq\007"
6845 "vpcomuw\006vpcomw\013vpconflictd\013vpconflictq\010vpdpbusd\tvpdpbusds\010"
6846 "vpdpwssd\tvpdpwssds\nvperm2f128\nvperm2i128\006vpermb\006vpermd\010vper"
6847 "mi2b\010vpermi2d\tvpermi2pd\tvpermi2ps\010vpermi2q\010vpermi2w\nvpermil"
6848 "2pd\nvpermil2ps\tvpermilpd\tvpermilps\007vpermpd\007vpermps\006vpermq\010"
6849 "vpermt2b\010vpermt2d\tvpermt2pd\tvpermt2ps\010vpermt2q\010vpermt2w\006v"
6850 "permw\tvpexpandb\tvpexpandd\tvpexpandq\tvpexpandw\007vpextrb\007vpextrd"
6851 "\007vpextrq\007vpextrw\tvpextrw.s\nvpgatherdd\nvpgatherdq\nvpgatherqd\n"
6852 "vpgatherqq\010vphaddbd\010vphaddbq\010vphaddbw\007vphaddd\010vphadddq\010"
6853 "vphaddsw\tvphaddubd\tvphaddubq\tvphaddubw\tvphaddudq\tvphadduwd\tvphadd"
6854 "uwq\007vphaddw\010vphaddwd\010vphaddwq\013vphminposuw\010vphsubbw\007vp"
6855 "hsubd\010vphsubdq\010vphsubsw\007vphsubw\010vphsubwd\007vpinsrb\007vpin"
6856 "srd\007vpinsrq\007vpinsrw\010vplzcntd\010vplzcntq\010vpmacsdd\tvpmacsdq"
6857 "h\tvpmacsdql\tvpmacssdd\nvpmacssdqh\nvpmacssdql\tvpmacsswd\tvpmacssww\010"
6858 "vpmacswd\010vpmacsww\nvpmadcsswd\tvpmadcswd\013vpmadd52huq\013vpmadd52l"
6859 "uq\nvpmaddubsw\010vpmaddwd\nvpmaskmovd\nvpmaskmovq\007vpmaxsb\007vpmaxs"
6860 "d\007vpmaxsq\007vpmaxsw\007vpmaxub\007vpmaxud\007vpmaxuq\007vpmaxuw\007"
6861 "vpminsb\007vpminsd\007vpminsq\007vpminsw\007vpminub\007vpminud\007vpmin"
6862 "uq\007vpminuw\010vpmovb2m\010vpmovd2m\007vpmovdb\007vpmovdw\010vpmovm2b"
6863 "\010vpmovm2d\010vpmovm2q\010vpmovm2w\tvpmovmskb\010vpmovq2m\007vpmovqb\007"
6864 "vpmovqd\007vpmovqw\010vpmovsdb\010vpmovsdw\010vpmovsqb\010vpmovsqd\010v"
6865 "pmovsqw\010vpmovswb\tvpmovsxbd\tvpmovsxbq\tvpmovsxbw\tvpmovsxdq\tvpmovs"
6866 "xwd\tvpmovsxwq\tvpmovusdb\tvpmovusdw\tvpmovusqb\tvpmovusqd\tvpmovusqw\t"
6867 "vpmovuswb\010vpmovw2m\007vpmovwb\tvpmovzxbd\tvpmovzxbq\tvpmovzxbw\tvpmo"
6868 "vzxdq\tvpmovzxwd\tvpmovzxwq\007vpmuldq\tvpmulhrsw\010vpmulhuw\007vpmulh"
6869 "w\007vpmulld\007vpmullq\007vpmullw\016vpmultishiftqb\010vpmuludq\010vpo"
6870 "pcntb\010vpopcntd\010vpopcntq\010vpopcntw\004vpor\005vpord\005vporq\006"
6871 "vpperm\006vprold\006vprolq\007vprolvd\007vprolvq\006vprord\006vprorq\007"
6872 "vprorvd\007vprorvq\006vprotb\006vprotd\006vprotq\006vprotw\007vpsadbw\013"
6873 "vpscatterdd\013vpscatterdq\013vpscatterqd\013vpscatterqq\006vpshab\006v"
6874 "pshad\006vpshaq\006vpshaw\006vpshlb\006vpshld\007vpshldd\007vpshldq\010"
6875 "vpshldvd\010vpshldvq\010vpshldvw\007vpshldw\006vpshlq\006vpshlw\007vpsh"
6876 "rdd\007vpshrdq\010vpshrdvd\010vpshrdvq\010vpshrdvw\007vpshrdw\007vpshuf"
6877 "b\014vpshufbitqmb\007vpshufd\010vpshufhw\010vpshuflw\007vpsignb\007vpsi"
6878 "gnd\007vpsignw\006vpslld\007vpslldq\006vpsllq\007vpsllvd\007vpsllvq\007"
6879 "vpsllvw\006vpsllw\006vpsrad\006vpsraq\007vpsravd\007vpsravq\007vpsravw\006"
6880 "vpsraw\006vpsrld\007vpsrldq\006vpsrlq\007vpsrlvd\007vpsrlvq\007vpsrlvw\006"
6881 "vpsrlw\006vpsubb\006vpsubd\006vpsubq\007vpsubsb\007vpsubsw\010vpsubusb\010"
6882 "vpsubusw\006vpsubw\nvpternlogd\nvpternlogq\006vptest\010vptestmb\010vpt"
6883 "estmd\010vptestmq\010vptestmw\tvptestnmb\tvptestnmd\tvptestnmq\tvptestn"
6884 "mw\nvpunpckhbw\nvpunpckhdq\013vpunpckhqdq\nvpunpckhwd\nvpunpcklbw\nvpun"
6885 "pckldq\013vpunpcklqdq\nvpunpcklwd\005vpxor\006vpxord\006vpxorq\010vrang"
6886 "epd\010vrangeps\010vrangesd\010vrangess\010vrcp14pd\010vrcp14ps\010vrcp"
6887 "14sd\010vrcp14ss\010vrcp28pd\010vrcp28ps\010vrcp28sd\010vrcp28ss\006vrc"
6888 "pps\006vrcpss\tvreducepd\tvreduceps\tvreducesd\tvreducess\013vrndscalep"
6889 "d\013vrndscaleps\013vrndscalesd\013vrndscaless\010vroundpd\010vroundps\010"
6890 "vroundsd\010vroundss\nvrsqrt14pd\nvrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nv"
6891 "rsqrt28pd\nvrsqrt28ps\nvrsqrt28sd\nvrsqrt28ss\010vrsqrtps\010vrsqrtss\t"
6892 "vscalefpd\tvscalefps\tvscalefsd\tvscalefss\013vscatterdpd\013vscatterdp"
6893 "s\016vscatterpf0dpd\016vscatterpf0dps\016vscatterpf0qpd\016vscatterpf0q"
6894 "ps\016vscatterpf1dpd\016vscatterpf1dps\016vscatterpf1qpd\016vscatterpf1"
6895 "qps\013vscatterqpd\013vscatterqps\nvshuff32x4\nvshuff64x2\nvshufi32x4\n"
6896 "vshufi64x2\007vshufpd\007vshufps\007vsqrtpd\007vsqrtps\007vsqrtsd\007vs"
6897 "qrtss\010vstmxcsr\006vsubpd\006vsubps\006vsubsd\006vsubss\007vtestpd\007"
6898 "vtestps\010vucomisd\010vucomiss\tvunpckhpd\tvunpckhps\tvunpcklpd\tvunpc"
6899 "klps\006vxorpd\006vxorps\010vzeroall\nvzeroupper\004wait\006wbinvd\010w"
6900 "rfsbase\twrfsbasel\twrfsbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrms"
6901 "r\006wrpkru\005wrssd\005wrssq\006wrussd\006wrussq\006xabort\010xacquire"
6902 "\004xadd\005xaddb\005xaddl\005xaddq\005xaddw\006xbegin\004xchg\005xchgb"
6903 "\005xchgl\005xchgq\005xchgw\txcryptcbc\txcryptcfb\txcryptctr\txcryptecb"
6904 "\txcryptofb\004xend\006xgetbv\005xlatb\003xor\004xorb\004xorl\005xorpd\005"
6905 "xorps\004xorq\004xorw\010xrelease\006xrstor\010xrstor64\007xrstors\txrs"
6906 "tors64\005xsave\007xsave64\006xsavec\010xsavec64\010xsaveopt\nxsaveopt6"
6907 "4\006xsaves\010xsaves64\006xsetbv\005xsha1\007xsha256\006xstore\txstore"
6908 "rng\005xtest";
6909
6910namespace {
6911 struct MatchEntry {
Excessive padding in 'struct (anonymous namespace)::MatchEntry' (5 padding bytes, where 1 is optimal). Optimal fields order: RequiredFeatures, Mnemonic, Opcode, ConvertFn, Classes, consider reordering the fields or adding explicit padding members
6912 uint16_t Mnemonic;
6913 uint16_t Opcode;
6914 uint16_t ConvertFn;
6915 uint32_t RequiredFeatures;
6916 uint8_t Classes[9];
6917 StringRef getMnemonic() const {
6918 return StringRef(MnemonicTable + Mnemonic + 1,
6919 MnemonicTable[Mnemonic]);
6920 }
6921 };
6922
6923 // Predicate for searching for an opcode.
6924 struct LessOpcode {
6925 bool operator()(const MatchEntry &LHS, StringRef RHS) {
6926 return LHS.getMnemonic() < RHS;
6927 }
6928 bool operator()(StringRef LHS, const MatchEntry &RHS) {
6929 return LHS < RHS.getMnemonic();
6930 }
6931 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
6932 return LHS.getMnemonic() < RHS.getMnemonic();
6933 }
6934 };
6935} // end anonymous namespace.
6936
6937static const MatchEntry MatchTable0[] = {
6938 { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
6939 { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
6940 { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
6941 { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
6942 { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
6943 { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
6944 { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
6945 { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
6946 { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
6947 { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
6948 { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
6949 { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
6950 { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6951 { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
6952 { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
6953 { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
6954 { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
6955 { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
6956 { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
6957 { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
6958 { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6959 { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6960 { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
6961 { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
6962 { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
6963 { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
6964 { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
6965 { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
6966 { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
6967 { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6968 { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
6969 { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
6970 { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
6971 { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
6972 { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
6973 { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
6974 { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
6975 { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
6976 { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
6977 { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6978 { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6979 { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
6980 { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
6981 { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
6982 { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
6983 { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
6984 { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
6985 { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
6986 { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
6987 { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
6988 { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
6989 { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
6990 { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
6991 { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
6992 { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
6993 { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
6994 { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
6995 { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
6996 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6997 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
6998 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
6999 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7000 { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7001 { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7002 { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7003 { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7004 { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7005 { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7006 { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7007 { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7008 { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7009 { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7010 { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7011 { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7012 { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7013 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7014 { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7015 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7016 { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7017 { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7018 { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7019 { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7020 { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7021 { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7022 { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7023 { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7024 { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7025 { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7026 { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7027 { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7028 { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7029 { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7030 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7031 { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7032 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7033 { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7034 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7035 { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7036 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7037 { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7038 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7039 { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7040 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7041 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7042 { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7043 { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7044 { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7045 { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7046 { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7047 { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7048 { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7049 { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7050 { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7051 { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7052 { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7053 { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7054 { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7055 { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7056 { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7057 { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7058 { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
7059 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7060 { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7061 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7062 { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7063 { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7064 { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
7065 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7066 { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7067 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7068 { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7069 { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7070 { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7071 { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7072 { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7073 { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7074 { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7075 { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7076 { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7077 { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7078 { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7079 { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7080 { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7081 { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7082 { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7083 { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7084 { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7085 { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7086 { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7087 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
7088 { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
7089 { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
7090 { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
7091 { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
7092 { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
7093 { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7094 { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
7095 { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7096 { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
7097 { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7098 { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7099 { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7100 { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7101 { 299 /* blci */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7102 { 299 /* blci */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7103 { 299 /* blci */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7104 { 299 /* blci */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7105 { 304 /* blcic */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7106 { 304 /* blcic */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7107 { 304 /* blcic */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7108 { 304 /* blcic */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7109 { 310 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7110 { 310 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7111 { 310 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7112 { 310 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7113 { 317 /* blcs */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7114 { 317 /* blcs */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7115 { 317 /* blcs */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7116 { 317 /* blcs */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7117 { 322 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7118 { 322 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7119 { 330 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7120 { 330 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7121 { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7122 { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7123 { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
7124 { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
7125 { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7126 { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7127 { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
7128 { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
7129 { 356 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7130 { 356 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7131 { 356 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7132 { 356 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7133 { 369 /* blsic */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7134 { 369 /* blsic */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7135 { 369 /* blsic */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7136 { 369 /* blsic */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7137 { 375 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7138 { 375 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7139 { 381 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7140 { 381 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7141 { 394 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7142 { 394 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7143 { 402 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7144 { 402 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7145 { 415 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7146 { 415 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7147 { 421 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7148 { 421 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7149 { 427 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7150 { 427 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7151 { 427 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
7152 { 427 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
7153 { 433 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7154 { 433 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7155 { 433 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
7156 { 433 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
7157 { 439 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7158 { 439 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7159 { 439 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
7160 { 439 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
7161 { 445 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_BNDR }, },
7162 { 452 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
7163 { 452 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
7164 { 458 /* bndmov */, X86::BNDMOVMRrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
7165 { 458 /* bndmov */, X86::BNDMOVRMrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
7166 { 458 /* bndmov */, X86::BNDMOVMR64mr, Convert__Mem1285_1__Reg1_0, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
7167 { 458 /* bndmov */, X86::BNDMOVMR32mr, Convert__Mem645_1__Reg1_0, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
7168 { 458 /* bndmov */, X86::BNDMOVRM64rm, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
7169 { 458 /* bndmov */, X86::BNDMOVRM32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
7170 { 465 /* bndstx */, X86::BNDSTXmr, Convert__Mem645_1__Reg1_0, 0, { MCK_BNDR, MCK_Mem64 }, },
7171 { 472 /* bound */, X86::BOUNDS16rm, Convert__Reg1_1__Mem165_0, Feature_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
7172 { 472 /* bound */, X86::BOUNDS32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
7173 { 482 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7174 { 482 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7175 { 487 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7176 { 487 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7177 { 492 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7178 { 492 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7179 { 501 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7180 { 501 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7181 { 506 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7182 { 506 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7183 { 511 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7184 { 511 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7185 { 522 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
7186 { 529 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
7187 { 536 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7188 { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7189 { 543 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7190 { 543 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7191 { 543 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7192 { 543 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7193 { 548 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7194 { 548 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7195 { 548 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7196 { 548 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7197 { 553 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7198 { 553 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7199 { 553 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7200 { 553 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7201 { 558 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7202 { 558 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7203 { 558 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7204 { 558 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7205 { 562 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7206 { 562 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7207 { 562 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7208 { 562 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7209 { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7210 { 570 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7211 { 570 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7212 { 570 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7213 { 570 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7214 { 575 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7215 { 575 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7216 { 575 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7217 { 575 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7218 { 580 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7219 { 580 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7220 { 580 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7221 { 580 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7222 { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7223 { 589 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7224 { 589 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7225 { 589 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7226 { 589 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7227 { 594 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7228 { 594 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7229 { 594 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7230 { 594 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7231 { 599 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7232 { 599 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7233 { 599 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7234 { 599 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7235 { 604 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7236 { 604 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7237 { 604 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7238 { 604 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7239 { 613 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7240 { 613 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
7241 { 619 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7242 { 619 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
7243 { 625 /* call */, X86::CALL16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
7244 { 625 /* call */, X86::CALL32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
7245 { 625 /* call */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7246 { 625 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7247 { 625 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7248 { 630 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
7249 { 630 /* calll */, X86::CALL32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
7250 { 630 /* calll */, X86::CALL32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
7251 { 630 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7252 { 636 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
7253 { 636 /* callq */, X86::CALL64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
7254 { 636 /* callq */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7255 { 642 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7256 { 642 /* callw */, X86::CALL16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
7257 { 642 /* callw */, X86::CALL16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
7258 { 642 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7259 { 648 /* cbtw */, X86::CBW, Convert_NoOperands, 0, { }, },
7260 { 666 /* clac */, X86::CLAC, Convert_NoOperands, 0, { }, },
7261 { 671 /* clc */, X86::CLC, Convert_NoOperands, 0, { }, },
7262 { 675 /* cld */, X86::CLD, Convert_NoOperands, 0, { }, },
7263 { 679 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7264 { 687 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7265 { 698 /* clgi */, X86::CLGI, Convert_NoOperands, 0, { }, },
7266 { 703 /* cli */, X86::CLI, Convert_NoOperands, 0, { }, },
7267 { 707 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR8 }, },
7268 { 712 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR32 }, },
7269 { 717 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR64 }, },
7270 { 722 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7271 { 731 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR16 }, },
7272 { 736 /* cltd */, X86::CDQ, Convert_NoOperands, 0, { }, },
7273 { 741 /* cltq */, X86::CDQE, Convert_NoOperands, 0, { }, },
7274 { 746 /* clts */, X86::CLTS, Convert_NoOperands, 0, { }, },
7275 { 751 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7276 { 756 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, { }, },
7277 { 756 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
7278 { 756 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
7279 { 763 /* cmc */, X86::CMC, Convert_NoOperands, 0, { }, },
7280 { 780 /* cmovael */, X86::CMOVAE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7281 { 780 /* cmovael */, X86::CMOVAE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7282 { 788 /* cmovaeq */, X86::CMOVAE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7283 { 788 /* cmovaeq */, X86::CMOVAE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7284 { 796 /* cmovaew */, X86::CMOVAE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7285 { 796 /* cmovaew */, X86::CMOVAE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7286 { 804 /* cmoval */, X86::CMOVA32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7287 { 804 /* cmoval */, X86::CMOVA32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7288 { 811 /* cmovaq */, X86::CMOVA64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7289 { 811 /* cmovaq */, X86::CMOVA64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7290 { 818 /* cmovaw */, X86::CMOVA16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7291 { 818 /* cmovaw */, X86::CMOVA16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7292 { 838 /* cmovbel */, X86::CMOVBE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7293 { 838 /* cmovbel */, X86::CMOVBE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7294 { 846 /* cmovbeq */, X86::CMOVBE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7295 { 846 /* cmovbeq */, X86::CMOVBE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7296 { 854 /* cmovbew */, X86::CMOVBE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7297 { 854 /* cmovbew */, X86::CMOVBE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7298 { 862 /* cmovbl */, X86::CMOVB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7299 { 862 /* cmovbl */, X86::CMOVB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7300 { 869 /* cmovbq */, X86::CMOVB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7301 { 869 /* cmovbq */, X86::CMOVB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7302 { 876 /* cmovbw */, X86::CMOVB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7303 { 876 /* cmovbw */, X86::CMOVB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7304 { 889 /* cmovel */, X86::CMOVE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7305 { 889 /* cmovel */, X86::CMOVE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7306 { 896 /* cmoveq */, X86::CMOVE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7307 { 896 /* cmoveq */, X86::CMOVE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7308 { 903 /* cmovew */, X86::CMOVE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7309 { 903 /* cmovew */, X86::CMOVE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7310 { 923 /* cmovgel */, X86::CMOVGE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7311 { 923 /* cmovgel */, X86::CMOVGE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7312 { 931 /* cmovgeq */, X86::CMOVGE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7313 { 931 /* cmovgeq */, X86::CMOVGE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7314 { 939 /* cmovgew */, X86::CMOVGE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7315 { 939 /* cmovgew */, X86::CMOVGE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7316 { 947 /* cmovgl */, X86::CMOVG32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7317 { 947 /* cmovgl */, X86::CMOVG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7318 { 954 /* cmovgq */, X86::CMOVG64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7319 { 954 /* cmovgq */, X86::CMOVG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7320 { 961 /* cmovgw */, X86::CMOVG16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7321 { 961 /* cmovgw */, X86::CMOVG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7322 { 981 /* cmovlel */, X86::CMOVLE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7323 { 981 /* cmovlel */, X86::CMOVLE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7324 { 989 /* cmovleq */, X86::CMOVLE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7325 { 989 /* cmovleq */, X86::CMOVLE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7326 { 997 /* cmovlew */, X86::CMOVLE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7327 { 997 /* cmovlew */, X86::CMOVLE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7328 { 1005 /* cmovll */, X86::CMOVL32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7329 { 1005 /* cmovll */, X86::CMOVL32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7330 { 1012 /* cmovlq */, X86::CMOVL64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7331 { 1012 /* cmovlq */, X86::CMOVL64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7332 { 1019 /* cmovlw */, X86::CMOVL16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7333 { 1019 /* cmovlw */, X86::CMOVL16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7334 { 1033 /* cmovnel */, X86::CMOVNE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7335 { 1033 /* cmovnel */, X86::CMOVNE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7336 { 1041 /* cmovneq */, X86::CMOVNE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7337 { 1041 /* cmovneq */, X86::CMOVNE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7338 { 1049 /* cmovnew */, X86::CMOVNE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7339 { 1049 /* cmovnew */, X86::CMOVNE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7340 { 1064 /* cmovnol */, X86::CMOVNO32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7341 { 1064 /* cmovnol */, X86::CMOVNO32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7342 { 1072 /* cmovnoq */, X86::CMOVNO64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7343 { 1072 /* cmovnoq */, X86::CMOVNO64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7344 { 1080 /* cmovnow */, X86::CMOVNO16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7345 { 1080 /* cmovnow */, X86::CMOVNO16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7346 { 1095 /* cmovnpl */, X86::CMOVNP32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7347 { 1095 /* cmovnpl */, X86::CMOVNP32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7348 { 1103 /* cmovnpq */, X86::CMOVNP64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7349 { 1103 /* cmovnpq */, X86::CMOVNP64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7350 { 1111 /* cmovnpw */, X86::CMOVNP16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7351 { 1111 /* cmovnpw */, X86::CMOVNP16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7352 { 1126 /* cmovnsl */, X86::CMOVNS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7353 { 1126 /* cmovnsl */, X86::CMOVNS32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7354 { 1134 /* cmovnsq */, X86::CMOVNS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7355 { 1134 /* cmovnsq */, X86::CMOVNS64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7356 { 1142 /* cmovnsw */, X86::CMOVNS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7357 { 1142 /* cmovnsw */, X86::CMOVNS16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7358 { 1156 /* cmovol */, X86::CMOVO32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7359 { 1156 /* cmovol */, X86::CMOVO32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7360 { 1163 /* cmovoq */, X86::CMOVO64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7361 { 1163 /* cmovoq */, X86::CMOVO64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7362 { 1170 /* cmovow */, X86::CMOVO16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7363 { 1170 /* cmovow */, X86::CMOVO16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7364 { 1183 /* cmovpl */, X86::CMOVP32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7365 { 1183 /* cmovpl */, X86::CMOVP32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7366 { 1190 /* cmovpq */, X86::CMOVP64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7367 { 1190 /* cmovpq */, X86::CMOVP64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7368 { 1197 /* cmovpw */, X86::CMOVP16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7369 { 1197 /* cmovpw */, X86::CMOVP16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7370 { 1210 /* cmovsl */, X86::CMOVS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7371 { 1210 /* cmovsl */, X86::CMOVS32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7372 { 1217 /* cmovsq */, X86::CMOVS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7373 { 1217 /* cmovsq */, X86::CMOVS64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7374 { 1224 /* cmovsw */, X86::CMOVS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7375 { 1224 /* cmovsw */, X86::CMOVS16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7376 { 1231 /* cmp */, X86::CMPPDrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
7377 { 1231 /* cmp */, X86::CMPPDrmi, Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32 }, },
7378 { 1231 /* cmp */, X86::CMPPSrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
7379 { 1231 /* cmp */, X86::CMPPSrmi, Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32 }, },
7380 { 1231 /* cmp */, X86::CMPSDrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
7381 { 1231 /* cmp */, X86::CMPSDrm, Convert__Reg1_3__Tie0__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32 }, },
7382 { 1231 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
7383 { 1231 /* cmp */, X86::CMPSSrm, Convert__Reg1_3__Tie0__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32 }, },
7384 { 1235 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7385 { 1235 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7386 { 1235 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7387 { 1235 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7388 { 1235 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7389 { 1235 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7390 { 1240 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7391 { 1240 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7392 { 1240 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7393 { 1240 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7394 { 1240 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7395 { 1240 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7396 { 1240 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7397 { 1240 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7398 { 1240 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7399 { 1245 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7400 { 1245 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7401 { 1251 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7402 { 1251 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7403 { 1257 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7404 { 1257 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7405 { 1257 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7406 { 1257 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7407 { 1257 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7408 { 1257 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7409 { 1257 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7410 { 1257 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7411 { 1257 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7412 { 1262 /* cmps */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
7413 { 1262 /* cmps */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
7414 { 1262 /* cmps */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
7415 { 1262 /* cmps */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
7416 { 1267 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
7417 { 1273 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7418 { 1273 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
7419 { 1279 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
7420 { 1285 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, 0, { MCK_DstIdx64, MCK_SrcIdx64 }, },
7421 { 1291 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7422 { 1291 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
7423 { 1297 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
7424 { 1303 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7425 { 1303 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7426 { 1303 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7427 { 1303 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7428 { 1303 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7429 { 1303 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7430 { 1303 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7431 { 1303 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7432 { 1303 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7433 { 1316 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
7434 { 1327 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7435 { 1337 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7436 { 1337 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7437 { 1346 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7438 { 1346 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7439 { 1355 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7440 { 1355 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7441 { 1364 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7442 { 1364 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7443 { 1373 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7444 { 1373 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7445 { 1380 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7446 { 1380 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7447 { 1387 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, { }, },
7448 { 1397 /* cqto */, X86::CQO, Convert_NoOperands, 0, { }, },
7449 { 1408 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
7450 { 1408 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
7451 { 1408 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
7452 { 1408 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
7453 { 1415 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7454 { 1415 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7455 { 1422 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7456 { 1422 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7457 { 1429 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
7458 { 1429 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
7459 { 1436 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, { }, },
7460 { 1439 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7461 { 1439 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7462 { 1448 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7463 { 1448 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7464 { 1457 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7465 { 1457 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7466 { 1466 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7467 { 1466 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
7468 { 1475 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7469 { 1475 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7470 { 1484 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
7471 { 1484 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7472 { 1493 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
7473 { 1493 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7474 { 1502 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7475 { 1502 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7476 { 1511 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7477 { 1511 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7478 { 1520 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7479 { 1520 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
7480 { 1529 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7481 { 1529 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7482 { 1529 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7483 { 1529 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7484 { 1538 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7485 { 1538 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7486 { 1548 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7487 { 1548 /* cvtsd2siq */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7488 { 1558 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7489 { 1558 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7490 { 1567 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7491 { 1576 /* cvtsi2sdl */, X86::CVTSI2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
7492 { 1576 /* cvtsi2sdl */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7493 { 1586 /* cvtsi2sdq */, X86::CVTSI642SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
7494 { 1586 /* cvtsi2sdq */, X86::CVTSI642SDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7495 { 1596 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7496 { 1605 /* cvtsi2ssl */, X86::CVTSI2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
7497 { 1605 /* cvtsi2ssl */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7498 { 1615 /* cvtsi2ssq */, X86::CVTSI642SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
7499 { 1615 /* cvtsi2ssq */, X86::CVTSI642SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7500 { 1625 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7501 { 1625 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7502 { 1634 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7503 { 1634 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7504 { 1634 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7505 { 1634 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7506 { 1643 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7507 { 1643 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7508 { 1653 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7509 { 1653 /* cvtss2siq */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7510 { 1663 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7511 { 1663 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7512 { 1673 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7513 { 1673 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
7514 { 1683 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7515 { 1683 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7516 { 1693 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7517 { 1693 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
7518 { 1703 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7519 { 1703 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7520 { 1703 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7521 { 1703 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7522 { 1713 /* cvttsd2sil */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7523 { 1713 /* cvttsd2sil */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7524 { 1724 /* cvttsd2siq */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7525 { 1724 /* cvttsd2siq */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7526 { 1735 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7527 { 1735 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7528 { 1735 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7529 { 1735 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7530 { 1745 /* cvttss2sil */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7531 { 1745 /* cvttss2sil */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7532 { 1756 /* cvttss2siq */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7533 { 1756 /* cvttss2siq */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7534 { 1776 /* cwtd */, X86::CWD, Convert_NoOperands, 0, { }, },
7535 { 1781 /* cwtl */, X86::CWDE, Convert_NoOperands, 0, { }, },
7536 { 1786 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
7537 { 1790 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
7538 { 1794 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, Feature_Not16BitMode, { }, },
7539 { 1801 /* data32 */, X86::DATA32_PREFIX, Convert_NoOperands, Feature_In16BitMode, { }, },
7540 { 1812 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
7541 { 1812 /* decb */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7542 { 1817 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
7543 { 1817 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
7544 { 1817 /* decl */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7545 { 1822 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
7546 { 1822 /* decq */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7547 { 1827 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
7548 { 1827 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
7549 { 1827 /* decw */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7550 { 1836 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7551 { 1836 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7552 { 1836 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
7553 { 1836 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
7554 { 1841 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7555 { 1841 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7556 { 1841 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
7557 { 1841 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
7558 { 1846 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7559 { 1846 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7560 { 1852 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7561 { 1852 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7562 { 1858 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7563 { 1858 /* divq */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7564 { 1858 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
7565 { 1858 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
7566 { 1863 /* divsd */, X86::DIVSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7567 { 1863 /* divsd */, X86::DIVSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7568 { 1869 /* divss */, X86::DIVSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7569 { 1869 /* divss */, X86::DIVSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7570 { 1875 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7571 { 1875 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7572 { 1875 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
7573 { 1875 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
7574 { 1880 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7575 { 1880 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7576 { 1885 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7577 { 1885 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7578 { 1890 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, { }, },
7579 { 1893 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, { }, },
7580 { 1898 /* encls */, X86::ENCLS, Convert_NoOperands, 0, { }, },
7581 { 1904 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, { }, },
7582 { 1910 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
7583 { 1916 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, { }, },
7584 { 1919 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
7585 { 1919 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
7586 { 1929 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7587 { 1929 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
7588 { 1935 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, { }, },
7589 { 1941 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, { }, },
7590 { 1946 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
7591 { 1946 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7592 { 1946 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7593 { 1946 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7594 { 1946 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7595 { 1951 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7596 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
7597 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7598 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7599 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7600 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7601 { 1963 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7602 { 1969 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7603 { 1974 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7604 { 1980 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, { }, },
7605 { 1985 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7606 { 1992 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7607 { 2000 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7608 { 2007 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7609 { 2015 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7610 { 2024 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7611 { 2032 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7612 { 2040 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7613 { 2047 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, { }, },
7614 { 2047 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7615 { 2052 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, { }, },
7616 { 2052 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
7617 { 2052 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7618 { 2052 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7619 { 2058 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7620 { 2064 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, { }, },
7621 { 2064 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7622 { 2070 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, { }, },
7623 { 2070 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
7624 { 2070 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7625 { 2070 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7626 { 2077 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7627 { 2084 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, { }, },
7628 { 2091 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7629 { 2098 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7630 { 2104 /* fcos */, X86::COS_F, Convert_NoOperands, 0, { }, },
7631 { 2109 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, { }, },
7632 { 2117 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7633 { 2117 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7634 { 2117 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7635 { 2117 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7636 { 2122 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7637 { 2128 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, 0, { }, },
7638 { 2128 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7639 { 2128 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7640 { 2128 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7641 { 2128 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7642 { 2134 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7643 { 2134 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7644 { 2134 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7645 { 2134 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7646 { 2140 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7647 { 2147 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, 0, { }, },
7648 { 2147 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7649 { 2147 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7650 { 2147 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7651 { 2147 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7652 { 2154 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7653 { 2161 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7654 { 2167 /* femms */, X86::FEMMS, Convert_NoOperands, 0, { }, },
7655 { 2173 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
7656 { 2179 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
7657 { 2192 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7658 { 2199 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7659 { 2212 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7660 { 2226 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7661 { 2234 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7662 { 2242 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7663 { 2255 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7664 { 2269 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7665 { 2277 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7666 { 2285 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7667 { 2297 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7668 { 2303 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7669 { 2310 /* filds */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7670 { 2322 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7671 { 2329 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7672 { 2336 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, { }, },
7673 { 2349 /* fistl */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7674 { 2361 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7675 { 2368 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7676 { 2376 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7677 { 2383 /* fists */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7678 { 2396 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7679 { 2404 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7680 { 2413 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7681 { 2427 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7682 { 2441 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7683 { 2449 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7684 { 2457 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7685 { 2464 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
7686 { 2468 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, { }, },
7687 { 2473 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7688 { 2479 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7689 { 2486 /* fldl */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7690 { 2491 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, { }, },
7691 { 2498 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, { }, },
7692 { 2505 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, { }, },
7693 { 2512 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, { }, },
7694 { 2519 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, { }, },
7695 { 2525 /* flds */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7696 { 2530 /* fldt */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7697 { 2535 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, { }, },
7698 { 2540 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
7699 { 2540 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7700 { 2540 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7701 { 2540 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7702 { 2540 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7703 { 2545 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7704 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
7705 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7706 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7707 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7708 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7709 { 2557 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7710 { 2563 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, { }, },
7711 { 2570 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, { }, },
7712 { 2577 /* fnop */, X86::FNOP, Convert_NoOperands, 0, { }, },
7713 { 2582 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7714 { 2589 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7715 { 2596 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7716 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { }, },
7717 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AL }, },
7718 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
7719 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_EAX }, },
7720 { 2604 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7721 { 2611 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, { }, },
7722 { 2618 /* fprem */, X86::FPREM, Convert_NoOperands, 0, { }, },
7723 { 2624 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, { }, },
7724 { 2631 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, { }, },
7725 { 2637 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, { }, },
7726 { 2645 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7727 { 2652 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, { }, },
7728 { 2655 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, { }, },
7729 { 2662 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, { }, },
7730 { 2667 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, { }, },
7731 { 2675 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, { }, },
7732 { 2681 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
7733 { 2685 /* fstl */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7734 { 2690 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
7735 { 2695 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7736 { 2701 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7737 { 2707 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7738 { 2713 /* fsts */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7739 { 2718 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7740 { 2718 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7741 { 2718 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7742 { 2718 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7743 { 2723 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7744 { 2729 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, 0, { }, },
7745 { 2729 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7746 { 2729 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7747 { 2729 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7748 { 2729 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7749 { 2735 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7750 { 2735 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7751 { 2735 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7752 { 2735 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7753 { 2741 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7754 { 2748 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, 0, { }, },
7755 { 2748 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7756 { 2748 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7757 { 2748 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7758 { 2748 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7759 { 2755 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7760 { 2762 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7761 { 2768 /* ftst */, X86::TST_F, Convert_NoOperands, 0, { }, },
7762 { 2773 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, { }, },
7763 { 2773 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
7764 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, { }, },
7765 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
7766 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7767 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7768 { 2786 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, { }, },
7769 { 2786 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
7770 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, { }, },
7771 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
7772 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7773 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7774 { 2801 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, { }, },
7775 { 2809 /* fxam */, X86::FXAM, Convert_NoOperands, 0, { }, },
7776 { 2814 /* fxch */, X86::XCH_F, Convert__regST1, 0, { }, },
7777 { 2814 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
7778 { 2819 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
7779 { 2827 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7780 { 2837 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
7781 { 2844 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7782 { 2853 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, { }, },
7783 { 2861 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, { }, },
7784 { 2867 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, { }, },
7785 { 2875 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, { }, },
7786 { 2882 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7787 { 2882 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7788 { 2899 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7789 { 2899 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7790 { 2913 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7791 { 2913 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7792 { 2923 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, { }, },
7793 { 2926 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7794 { 2926 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7795 { 2933 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7796 { 2933 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7797 { 2940 /* hlt */, X86::HLT, Convert_NoOperands, 0, { }, },
7798 { 2944 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7799 { 2944 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7800 { 2951 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7801 { 2951 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7802 { 2963 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7803 { 2963 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7804 { 2963 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
7805 { 2963 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
7806 { 2969 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7807 { 2969 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7808 { 2969 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
7809 { 2969 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
7810 { 2975 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7811 { 2975 /* idivq */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7812 { 2975 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
7813 { 2975 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
7814 { 2981 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7815 { 2981 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7816 { 2981 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
7817 { 2981 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
7818 { 2992 /* imulb */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7819 { 2992 /* imulb */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7820 { 2998 /* imull */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7821 { 2998 /* imull */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7822 { 2998 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7823 { 2998 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7824 { 2998 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7825 { 2998 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7826 { 2998 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
7827 { 2998 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
7828 { 2998 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
7829 { 2998 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
7830 { 3004 /* imulq */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7831 { 3004 /* imulq */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7832 { 3004 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7833 { 3004 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7834 { 3004 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7835 { 3004 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7836 { 3004 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
7837 { 3004 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
7838 { 3004 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
7839 { 3004 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
7840 { 3010 /* imulw */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7841 { 3010 /* imulw */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7842 { 3010 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7843 { 3010 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7844 { 3010 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7845 { 3010 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7846 { 3010 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
7847 { 3010 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
7848 { 3010 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
7849 { 3010 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
7850 { 3019 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
7851 { 3019 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7852 { 3019 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
7853 { 3019 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
7854 { 3027 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
7855 { 3027 /* incb */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7856 { 3032 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
7857 { 3032 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
7858 { 3032 /* incl */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7859 { 3037 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
7860 { 3037 /* incq */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7861 { 3042 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
7862 { 3050 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
7863 { 3058 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
7864 { 3058 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
7865 { 3058 /* incw */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7866 { 3063 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
7867 { 3063 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7868 { 3063 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
7869 { 3063 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
7870 { 3067 /* ins */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
7871 { 3067 /* ins */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
7872 { 3067 /* ins */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
7873 { 3071 /* insb */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
7874 { 3081 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7875 { 3081 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
7876 { 3090 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7877 { 3090 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7878 { 3098 /* insl */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
7879 { 3103 /* insw */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
7880 { 3108 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7881 { 3112 /* int3 */, X86::INT3, Convert_NoOperands, 0, { }, },
7882 { 3117 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, { }, },
7883 { 3122 /* invd */, X86::INVD, Convert_NoOperands, 0, { }, },
7884 { 3127 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
7885 { 3127 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
7886 { 3134 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7887 { 3141 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
7888 { 3141 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_ECX, MCK_RAX }, },
7889 { 3149 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
7890 { 3149 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
7891 { 3157 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
7892 { 3157 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
7893 { 3165 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
7894 { 3165 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
7895 { 3165 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
7896 { 3165 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
7897 { 3180 /* iretl */, X86::IRET32, Convert_NoOperands, 0, { }, },
7898 { 3186 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
7899 { 3192 /* iretw */, X86::IRET16, Convert_NoOperands, 0, { }, },
7900 { 3198 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7901 { 3201 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7902 { 3205 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7903 { 3208 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7904 { 3212 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
7905 { 3217 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7906 { 3220 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7907 { 3226 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7908 { 3229 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7909 { 3233 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7910 { 3236 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7911 { 3240 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7912 { 3240 /* jmp */, X86::JMP16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
7913 { 3240 /* jmp */, X86::JMP32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
7914 { 3240 /* jmp */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7915 { 3240 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7916 { 3240 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7917 { 3244 /* jmpl */, X86::JMP32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
7918 { 3244 /* jmpl */, X86::JMP32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
7919 { 3244 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7920 { 3249 /* jmpq */, X86::JMP64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
7921 { 3249 /* jmpq */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7922 { 3254 /* jmpw */, X86::JMP16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
7923 { 3254 /* jmpw */, X86::JMP16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
7924 { 3254 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7925 { 3259 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7926 { 3263 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7927 { 3267 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7928 { 3271 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7929 { 3275 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7930 { 3278 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7931 { 3281 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
7932 { 3287 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7933 { 3290 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7934 { 3296 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7935 { 3302 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7936 { 3308 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7937 { 3314 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7938 { 3320 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7939 { 3326 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7940 { 3333 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7941 { 3340 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7942 { 3347 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7943 { 3354 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7944 { 3360 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7945 { 3366 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
7946 { 3366 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_GR32 }, },
7947 { 3366 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_Mem8 }, },
7948 { 3366 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_GR32, MCK_VK1 }, },
7949 { 3366 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, Feature_HasDQI, { MCK_Mem8, MCK_VK1 }, },
7950 { 3372 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7951 { 3372 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_GR32 }, },
7952 { 3372 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_Mem32 }, },
7953 { 3372 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VK1 }, },
7954 { 3372 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK_VK1 }, },
7955 { 3378 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7956 { 3378 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_GR64 }, },
7957 { 3378 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_Mem64 }, },
7958 { 3378 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR64, MCK_VK1 }, },
7959 { 3378 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, Feature_HasBWI, { MCK_Mem64, MCK_VK1 }, },
7960 { 3384 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
7961 { 3384 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_GR32 }, },
7962 { 3384 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_Mem16 }, },
7963 { 3384 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VK1 }, },
7964 { 3384 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, Feature_HasAVX512, { MCK_Mem16, MCK_VK1 }, },
7965 { 3390 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
7966 { 3396 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7967 { 3402 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7968 { 3408 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
7969 { 3414 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7970 { 3419 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7971 { 3424 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7972 { 3429 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
7973 { 3438 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7974 { 3447 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7975 { 3456 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
7976 { 3465 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7977 { 3470 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7978 { 3479 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7979 { 3488 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7980 { 3497 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7981 { 3506 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7982 { 3515 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7983 { 3524 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7984 { 3533 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
7985 { 3542 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
7986 { 3549 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7987 { 3556 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
7988 { 3563 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
7989 { 3570 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7990 { 3579 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7991 { 3588 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7992 { 3597 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7993 { 3604 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7994 { 3611 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7995 { 3618 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7996 { 3625 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7997 { 3631 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7998 { 3637 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
7999 { 3643 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8000 { 3649 /* lahf */, X86::LAHF, Convert_NoOperands, 0, { }, },
8001 { 3658 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8002 { 3658 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8003 { 3663 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
8004 { 3663 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8005 { 3668 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8006 { 3668 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8007 { 3673 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
8008 { 3673 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
8009 { 3673 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
8010 { 3673 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
8011 { 3679 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8012 { 3679 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8013 { 3686 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8014 { 3693 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8015 { 3693 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8016 { 3700 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8017 { 3706 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8018 { 3718 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
8019 { 3723 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
8020 { 3732 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
8021 { 3732 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_GR32 }, },
8022 { 3737 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8023 { 3742 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, { }, },
8024 { 3742 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, { }, },
8025 { 3748 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8026 { 3757 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
8027 { 3762 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
8028 { 3767 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, { }, },
8029 { 3778 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
8030 { 3783 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8031 { 3788 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8032 { 3798 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8033 { 3804 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
8034 { 3810 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8035 { 3820 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
8036 { 3825 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8037 { 3830 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8038 { 3840 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8039 { 3846 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
8040 { 3852 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8041 { 3858 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
8042 { 3858 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
8043 { 3858 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
8044 { 3858 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
8045 { 3863 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8046 { 3863 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8047 { 3869 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8048 { 3875 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8049 { 3875 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8050 { 3886 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8051 { 3886 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8052 { 3892 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
8053 { 3892 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
8054 { 3904 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8055 { 3904 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8056 { 3910 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, { }, },
8057 { 3915 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
8058 { 3915 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
8059 { 3915 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
8060 { 3915 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
8061 { 3915 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
8062 { 3915 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
8063 { 3915 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
8064 { 3915 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
8065 { 3920 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
8066 { 3920 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
8067 { 3932 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
8068 { 3932 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
8069 { 3938 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
8070 { 3938 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_RAX }, },
8071 { 3944 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
8072 { 3944 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
8073 { 3950 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8074 { 3955 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8075 { 3961 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8076 { 3968 /* lretl */, X86::LRETL, Convert_NoOperands, 0, { }, },
8077 { 3968 /* lretl */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
8078 { 3974 /* lretq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
8079 { 3974 /* lretq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
8080 { 3980 /* lretw */, X86::LRETW, Convert_NoOperands, 0, { }, },
8081 { 3980 /* lretw */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
8082 { 3990 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8083 { 3990 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8084 { 3995 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8085 { 3995 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8086 { 4000 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8087 { 4000 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8088 { 4009 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
8089 { 4014 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8090 { 4019 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8091 { 4028 /* ltrw */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8092 { 4028 /* ltrw */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8093 { 4033 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8094 { 4033 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
8095 { 4033 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8096 { 4033 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
8097 { 4040 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8098 { 4040 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
8099 { 4040 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8100 { 4040 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
8101 { 4053 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8102 { 4053 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8103 { 4060 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8104 { 4060 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8105 { 4067 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8106 { 4067 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8107 { 4074 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
8108 { 4074 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
8109 { 4085 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
8110 { 4085 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
8111 { 4094 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8112 { 4094 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8113 { 4100 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8114 { 4100 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8115 { 4106 /* maxsd */, X86::MAXSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8116 { 4106 /* maxsd */, X86::MAXSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8117 { 4112 /* maxss */, X86::MAXSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8118 { 4112 /* maxss */, X86::MAXSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8119 { 4118 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, { }, },
8120 { 4125 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8121 { 4125 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8122 { 4131 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8123 { 4131 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8124 { 4137 /* minsd */, X86::MINSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8125 { 4137 /* minsd */, X86::MINSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8126 { 4143 /* minss */, X86::MINSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8127 { 4143 /* minss */, X86::MINSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8128 { 4149 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, { }, },
8129 { 4149 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
8130 { 4149 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
8131 { 4157 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, { }, },
8132 { 4157 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
8133 { 4157 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
8134 { 4166 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, { }, },
8135 { 4174 /* mov */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
8136 { 4174 /* mov */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
8137 { 4185 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
8138 { 4185 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
8139 { 4193 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
8140 { 4193 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
8141 { 4201 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
8142 { 4201 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
8143 { 4201 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
8144 { 4209 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
8145 { 4209 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
8146 { 4217 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8147 { 4217 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8148 { 4217 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8149 { 4224 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8150 { 4224 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8151 { 4224 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8152 { 4231 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
8153 { 4231 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
8154 { 4231 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8155 { 4231 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
8156 { 4231 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
8157 { 4231 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
8158 { 4231 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
8159 { 4231 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
8160 { 4231 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
8161 { 4242 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8162 { 4242 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8163 { 4249 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8164 { 4249 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8165 { 4256 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8166 { 4256 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8167 { 4263 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR32 }, },
8168 { 4263 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
8169 { 4263 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR64, MCK_Mem32 }, },
8170 { 4263 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
8171 { 4263 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
8172 { 4263 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8173 { 4263 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR64 }, },
8174 { 4263 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
8175 { 4263 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
8176 { 4263 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
8177 { 4263 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8178 { 4263 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8179 { 4268 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8180 { 4268 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8181 { 4276 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
8182 { 4284 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8183 { 4284 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8184 { 4284 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8185 { 4291 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8186 { 4291 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8187 { 4291 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8188 { 4298 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8189 { 4306 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8190 { 4306 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8191 { 4313 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8192 { 4313 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8193 { 4320 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
8194 { 4320 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
8195 { 4320 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
8196 { 4320 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
8197 { 4320 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
8198 { 4320 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
8199 { 4320 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
8200 { 4320 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
8201 { 4320 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8202 { 4320 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8203 { 4320 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8204 { 4320 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
8205 { 4320 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
8206 { 4320 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
8207 { 4320 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8208 { 4325 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8209 { 4333 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8210 { 4333 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8211 { 4340 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8212 { 4340 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8213 { 4347 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8214 { 4356 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8215 { 4365 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8216 { 4373 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8217 { 4389 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8218 { 4397 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8219 { 4405 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8220 { 4413 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8221 { 4421 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
8222 { 4428 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8223 { 4436 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8224 { 4444 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
8225 { 4444 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
8226 { 4444 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8227 { 4444 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
8228 { 4444 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
8229 { 4444 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
8230 { 4444 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
8231 { 4444 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8232 { 4444 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
8233 { 4444 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8234 { 4444 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
8235 { 4444 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
8236 { 4444 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
8237 { 4444 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
8238 { 4444 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
8239 { 4444 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8240 { 4444 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8241 { 4444 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8242 { 4444 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8243 { 4444 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
8244 { 4444 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
8245 { 4444 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8246 { 4444 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8247 { 4444 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8248 { 4449 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
8249 { 4457 /* movs */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
8250 { 4457 /* movs */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
8251 { 4457 /* movs */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
8252 { 4457 /* movs */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
8253 { 4462 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
8254 { 4468 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8255 { 4468 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
8256 { 4475 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8257 { 4475 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
8258 { 4482 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8259 { 4482 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8260 { 4489 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8261 { 4489 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8262 { 4489 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8263 { 4495 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8264 { 4495 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8265 { 4504 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
8266 { 4510 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8267 { 4510 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8268 { 4519 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR32, MCK_GR64 }, },
8269 { 4519 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, Feature_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
8270 { 4526 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_DstIdx64 }, },
8271 { 4532 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8272 { 4532 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8273 { 4532 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8274 { 4538 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
8275 { 4544 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8276 { 4544 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8277 { 4551 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8278 { 4551 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8279 { 4558 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8280 { 4558 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8281 { 4558 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
8282 { 4558 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8283 { 4558 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8284 { 4558 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8285 { 4558 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8286 { 4571 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8287 { 4571 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8288 { 4571 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8289 { 4578 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8290 { 4578 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8291 { 4578 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8292 { 4585 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
8293 { 4585 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
8294 { 4585 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
8295 { 4585 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
8296 { 4585 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
8297 { 4585 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8298 { 4585 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8299 { 4585 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8300 { 4585 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
8301 { 4585 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
8302 { 4585 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
8303 { 4585 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
8304 { 4585 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8305 { 4590 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8306 { 4590 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
8307 { 4597 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8308 { 4597 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
8309 { 4604 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8310 { 4604 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8311 { 4611 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8312 { 4611 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8313 { 4618 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8314 { 4618 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8315 { 4625 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8316 { 4625 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8317 { 4625 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8318 { 4625 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8319 { 4625 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8320 { 4625 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8321 { 4631 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8322 { 4631 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8323 { 4643 /* mulb */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
8324 { 4643 /* mulb */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8325 { 4648 /* mull */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8326 { 4648 /* mull */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8327 { 4653 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8328 { 4653 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8329 { 4659 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8330 { 4659 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8331 { 4665 /* mulq */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8332 { 4665 /* mulq */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8333 { 4670 /* mulsd */, X86::MULSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8334 { 4670 /* mulsd */, X86::MULSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8335 { 4676 /* mulss */, X86::MULSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8336 { 4676 /* mulss */, X86::MULSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8337 { 4682 /* mulw */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8338 { 4682 /* mulw */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8339 { 4692 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8340 { 4692 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8341 { 4698 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8342 { 4698 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8343 { 4704 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, { }, },
8344 { 4704 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
8345 { 4704 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX }, },
8346 { 4710 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, { }, },
8347 { 4710 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
8348 { 4710 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
8349 { 4721 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
8350 { 4721 /* negb */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8351 { 4726 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
8352 { 4726 /* negl */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8353 { 4731 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
8354 { 4731 /* negq */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8355 { 4736 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
8356 { 4736 /* negw */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8357 { 4741 /* nop */, X86::NOOP, Convert_NoOperands, 0, { }, },
8358 { 4745 /* nopl */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
8359 { 4745 /* nopl */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8360 { 4750 /* nopq */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8361 { 4750 /* nopq */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8362 { 4755 /* nopw */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8363 { 4755 /* nopw */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8364 { 4764 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
8365 { 4764 /* notb */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8366 { 4769 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
8367 { 4769 /* notl */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8368 { 4774 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
8369 { 4774 /* notq */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8370 { 4779 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
8371 { 4779 /* notw */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8372 { 4787 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8373 { 4787 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
8374 { 4787 /* orb */, X86::OR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
8375 { 4787 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
8376 { 4787 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
8377 { 4787 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
8378 { 4791 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8379 { 4791 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8380 { 4791 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
8381 { 4791 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
8382 { 4791 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8383 { 4791 /* orl */, X86::OR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
8384 { 4791 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8385 { 4791 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
8386 { 4791 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8387 { 4795 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8388 { 4795 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8389 { 4800 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8390 { 4800 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8391 { 4805 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8392 { 4805 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8393 { 4805 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
8394 { 4805 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
8395 { 4805 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8396 { 4805 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
8397 { 4805 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8398 { 4805 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8399 { 4805 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8400 { 4809 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8401 { 4809 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8402 { 4809 /* orw */, X86::OR16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
8403 { 4809 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
8404 { 4809 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8405 { 4809 /* orw */, X86::OR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
8406 { 4809 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8407 { 4809 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
8408 { 4809 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8409 { 4817 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
8410 { 4817 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8411 { 4817 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
8412 { 4817 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
8413 { 4822 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
8414 { 4822 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8415 { 4822 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
8416 { 4822 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
8417 { 4827 /* outs */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
8418 { 4827 /* outs */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
8419 { 4827 /* outs */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
8420 { 4832 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
8421 { 4844 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
8422 { 4850 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
8423 { 4856 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
8424 { 4856 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8425 { 4856 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
8426 { 4856 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
8427 { 4861 /* pabsb */, X86::MMX_PABSBrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8428 { 4861 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8429 { 4861 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8430 { 4861 /* pabsb */, X86::MMX_PABSBrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8431 { 4867 /* pabsd */, X86::MMX_PABSDrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8432 { 4867 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8433 { 4867 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8434 { 4867 /* pabsd */, X86::MMX_PABSDrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8435 { 4873 /* pabsw */, X86::MMX_PABSWrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8436 { 4873 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8437 { 4873 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8438 { 4873 /* pabsw */, X86::MMX_PABSWrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8439 { 4879 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8440 { 4879 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8441 { 4879 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8442 { 4879 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8443 { 4888 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8444 { 4888 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8445 { 4888 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8446 { 4888 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8447 { 4897 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8448 { 4897 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8449 { 4906 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8450 { 4906 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8451 { 4906 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8452 { 4906 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8453 { 4915 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8454 { 4915 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8455 { 4915 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8456 { 4915 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8457 { 4921 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8458 { 4921 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8459 { 4921 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8460 { 4921 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8461 { 4927 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8462 { 4927 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8463 { 4927 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8464 { 4927 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8465 { 4933 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8466 { 4933 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8467 { 4933 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8468 { 4933 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8469 { 4940 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8470 { 4940 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8471 { 4940 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8472 { 4940 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8473 { 4947 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8474 { 4947 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8475 { 4947 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8476 { 4947 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8477 { 4955 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8478 { 4955 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8479 { 4955 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8480 { 4955 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8481 { 4963 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8482 { 4963 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8483 { 4963 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8484 { 4963 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8485 { 4969 /* palignr */, X86::MMX_PALIGNR64irr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
8486 { 4969 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8487 { 4969 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8488 { 4969 /* palignr */, X86::MMX_PALIGNR64irm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
8489 { 4977 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8490 { 4977 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8491 { 4977 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8492 { 4977 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8493 { 4982 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8494 { 4982 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8495 { 4982 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8496 { 4982 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8497 { 4988 /* pause */, X86::PAUSE, Convert_NoOperands, 0, { }, },
8498 { 4994 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8499 { 4994 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8500 { 4994 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8501 { 4994 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8502 { 5000 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8503 { 5000 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8504 { 5008 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8505 { 5008 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8506 { 5008 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8507 { 5008 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8508 { 5014 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8509 { 5014 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8510 { 5014 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8511 { 5014 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8512 { 5023 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8513 { 5023 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8514 { 5031 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
8515 { 5031 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32 }, },
8516 { 5044 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
8517 { 5044 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32 }, },
8518 { 5057 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
8519 { 5057 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32 }, },
8520 { 5070 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
8521 { 5070 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32 }, },
8522 { 5083 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8523 { 5083 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8524 { 5093 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8525 { 5093 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8526 { 5093 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8527 { 5093 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8528 { 5101 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8529 { 5101 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8530 { 5101 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8531 { 5101 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8532 { 5109 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8533 { 5109 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8534 { 5117 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8535 { 5117 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8536 { 5117 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8537 { 5117 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8538 { 5125 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8539 { 5125 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8540 { 5135 /* pcmpestrm */, X86::PCMPESTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8541 { 5135 /* pcmpestrm */, X86::PCMPESTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8542 { 5145 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8543 { 5145 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8544 { 5145 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8545 { 5145 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8546 { 5153 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8547 { 5153 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8548 { 5153 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8549 { 5153 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8550 { 5161 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8551 { 5161 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8552 { 5169 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8553 { 5169 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8554 { 5169 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8555 { 5169 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8556 { 5177 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8557 { 5177 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8558 { 5187 /* pcmpistrm */, X86::PCMPISTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8559 { 5187 /* pcmpistrm */, X86::PCMPISTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8560 { 5202 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8561 { 5202 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8562 { 5208 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8563 { 5208 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8564 { 5219 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8565 { 5219 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8566 { 5225 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8567 { 5225 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8568 { 5231 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8569 { 5231 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
8570 { 5238 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
8571 { 5238 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
8572 { 5245 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
8573 { 5245 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
8574 { 5252 /* pextrw */, X86::MMX_PEXTRWirri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
8575 { 5252 /* pextrw */, X86::PEXTRWri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8576 { 5252 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
8577 { 5259 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8578 { 5259 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8579 { 5265 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8580 { 5265 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8581 { 5271 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8582 { 5271 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8583 { 5277 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8584 { 5277 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8585 { 5283 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8586 { 5283 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8587 { 5291 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8588 { 5291 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8589 { 5299 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8590 { 5299 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8591 { 5307 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8592 { 5307 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8593 { 5313 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8594 { 5313 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8595 { 5319 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8596 { 5319 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8597 { 5325 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8598 { 5325 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8599 { 5332 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8600 { 5332 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8601 { 5340 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8602 { 5340 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8603 { 5346 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8604 { 5346 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8605 { 5355 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8606 { 5355 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8607 { 5364 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8608 { 5364 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8609 { 5373 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8610 { 5373 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8611 { 5381 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8612 { 5381 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8613 { 5387 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8614 { 5387 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8615 { 5394 /* phaddd */, X86::MMX_PHADDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8616 { 5394 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8617 { 5394 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8618 { 5394 /* phaddd */, X86::MMX_PHADDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8619 { 5401 /* phaddsw */, X86::MMX_PHADDSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8620 { 5401 /* phaddsw */, X86::PHADDSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8621 { 5401 /* phaddsw */, X86::PHADDSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8622 { 5401 /* phaddsw */, X86::MMX_PHADDSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8623 { 5409 /* phaddw */, X86::MMX_PHADDWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8624 { 5409 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8625 { 5409 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8626 { 5409 /* phaddw */, X86::MMX_PHADDWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8627 { 5416 /* phminposuw */, X86::PHMINPOSUWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8628 { 5416 /* phminposuw */, X86::PHMINPOSUWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8629 { 5427 /* phsubd */, X86::MMX_PHSUBDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8630 { 5427 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8631 { 5427 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8632 { 5427 /* phsubd */, X86::MMX_PHSUBDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8633 { 5434 /* phsubsw */, X86::MMX_PHSUBSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8634 { 5434 /* phsubsw */, X86::PHSUBSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8635 { 5434 /* phsubsw */, X86::PHSUBSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8636 { 5434 /* phsubsw */, X86::MMX_PHSUBSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8637 { 5442 /* phsubw */, X86::MMX_PHSUBWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8638 { 5442 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8639 { 5442 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8640 { 5442 /* phsubw */, X86::MMX_PHSUBWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8641 { 5449 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8642 { 5449 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8643 { 5455 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8644 { 5455 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8645 { 5461 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
8646 { 5461 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
8647 { 5468 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
8648 { 5468 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8649 { 5475 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
8650 { 5475 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
8651 { 5482 /* pinsrw */, X86::MMX_PINSRWirri, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
8652 { 5482 /* pinsrw */, X86::PINSRWrri, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
8653 { 5482 /* pinsrw */, X86::MMX_PINSRWirmi, Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
8654 { 5482 /* pinsrw */, X86::PINSRWrmi, Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
8655 { 5489 /* pmaddubsw */, X86::MMX_PMADDUBSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8656 { 5489 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8657 { 5489 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8658 { 5489 /* pmaddubsw */, X86::MMX_PMADDUBSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8659 { 5499 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8660 { 5499 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8661 { 5499 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8662 { 5499 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8663 { 5507 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8664 { 5507 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8665 { 5514 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8666 { 5514 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8667 { 5521 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8668 { 5521 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8669 { 5521 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8670 { 5521 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8671 { 5528 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8672 { 5528 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8673 { 5528 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8674 { 5528 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8675 { 5535 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8676 { 5535 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8677 { 5542 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8678 { 5542 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8679 { 5549 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8680 { 5549 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8681 { 5556 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8682 { 5556 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8683 { 5563 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8684 { 5563 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8685 { 5563 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8686 { 5563 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8687 { 5570 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8688 { 5570 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8689 { 5570 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8690 { 5570 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8691 { 5577 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8692 { 5577 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8693 { 5584 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8694 { 5584 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8695 { 5591 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR64, MCK_GR32orGR64 }, },
8696 { 5591 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8697 { 5600 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8698 { 5600 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8699 { 5609 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8700 { 5609 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
8701 { 5618 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8702 { 5618 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8703 { 5627 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8704 { 5627 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8705 { 5636 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8706 { 5636 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8707 { 5645 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8708 { 5645 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8709 { 5654 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8710 { 5654 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8711 { 5663 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8712 { 5663 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
8713 { 5672 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8714 { 5672 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8715 { 5681 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8716 { 5681 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8717 { 5690 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8718 { 5690 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8719 { 5699 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8720 { 5699 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8721 { 5708 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8722 { 5708 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8723 { 5715 /* pmulhrsw */, X86::MMX_PMULHRSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8724 { 5715 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8725 { 5715 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8726 { 5715 /* pmulhrsw */, X86::MMX_PMULHRSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8727 { 5724 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8728 { 5724 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8729 { 5732 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8730 { 5732 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8731 { 5732 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8732 { 5732 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8733 { 5740 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8734 { 5740 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8735 { 5740 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8736 { 5740 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8737 { 5747 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8738 { 5747 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8739 { 5754 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8740 { 5754 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8741 { 5754 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8742 { 5754 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8743 { 5761 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8744 { 5761 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8745 { 5761 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8746 { 5761 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8747 { 5773 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
8748 { 5779 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
8749 { 5792 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8750 { 5792 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8751 { 5800 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8752 { 5800 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8753 { 5808 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8754 { 5808 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8755 { 5827 /* popfl */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
8756 { 5833 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, { }, },
8757 { 5839 /* popfw */, X86::POPF16, Convert_NoOperands, 0, { }, },
8758 { 5845 /* popl */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8759 { 5845 /* popl */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8760 { 5845 /* popl */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
8761 { 5845 /* popl */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
8762 { 5845 /* popl */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8763 { 5845 /* popl */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8764 { 5845 /* popl */, X86::POP32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8765 { 5845 /* popl */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
8766 { 5850 /* popq */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
8767 { 5850 /* popq */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
8768 { 5850 /* popq */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8769 { 5850 /* popq */, X86::POP64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8770 { 5850 /* popq */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8771 { 5855 /* popw */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8772 { 5855 /* popw */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8773 { 5855 /* popw */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
8774 { 5855 /* popw */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
8775 { 5855 /* popw */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8776 { 5855 /* popw */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8777 { 5855 /* popw */, X86::POP16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8778 { 5855 /* popw */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8779 { 5860 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8780 { 5860 /* por */, X86::PORrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8781 { 5860 /* por */, X86::PORrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8782 { 5860 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8783 { 5864 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8784 { 5873 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8785 { 5885 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8786 { 5896 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8787 { 5907 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8788 { 5918 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8789 { 5928 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8790 { 5940 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8791 { 5940 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8792 { 5940 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8793 { 5940 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8794 { 5947 /* pshufb */, X86::MMX_PSHUFBrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8795 { 5947 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8796 { 5947 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8797 { 5947 /* pshufb */, X86::MMX_PSHUFBrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8798 { 5954 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8799 { 5954 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8800 { 5961 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8801 { 5961 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8802 { 5969 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8803 { 5969 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8804 { 5977 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
8805 { 5977 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
8806 { 5984 /* psignb */, X86::MMX_PSIGNBrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8807 { 5984 /* psignb */, X86::PSIGNBrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8808 { 5984 /* psignb */, X86::PSIGNBrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8809 { 5984 /* psignb */, X86::MMX_PSIGNBrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8810 { 5991 /* psignd */, X86::MMX_PSIGNDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8811 { 5991 /* psignd */, X86::PSIGNDrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8812 { 5991 /* psignd */, X86::PSIGNDrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8813 { 5991 /* psignd */, X86::MMX_PSIGNDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8814 { 5998 /* psignw */, X86::MMX_PSIGNWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8815 { 5998 /* psignw */, X86::PSIGNWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8816 { 5998 /* psignw */, X86::PSIGNWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8817 { 5998 /* psignw */, X86::MMX_PSIGNWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8818 { 6005 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8819 { 6005 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8820 { 6005 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8821 { 6005 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8822 { 6005 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8823 { 6005 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8824 { 6011 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8825 { 6018 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8826 { 6018 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8827 { 6018 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8828 { 6018 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8829 { 6018 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8830 { 6018 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8831 { 6024 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8832 { 6024 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8833 { 6024 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8834 { 6024 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8835 { 6024 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8836 { 6024 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8837 { 6030 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8838 { 6030 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8839 { 6030 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8840 { 6030 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8841 { 6030 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8842 { 6030 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8843 { 6036 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8844 { 6036 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8845 { 6036 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8846 { 6036 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8847 { 6036 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8848 { 6036 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8849 { 6042 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8850 { 6042 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8851 { 6042 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8852 { 6042 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8853 { 6042 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8854 { 6042 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8855 { 6048 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8856 { 6055 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8857 { 6055 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8858 { 6055 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8859 { 6055 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8860 { 6055 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8861 { 6055 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8862 { 6061 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8863 { 6061 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8864 { 6061 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
8865 { 6061 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
8866 { 6061 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8867 { 6061 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8868 { 6067 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8869 { 6067 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8870 { 6067 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8871 { 6067 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8872 { 6073 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8873 { 6073 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8874 { 6073 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8875 { 6073 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8876 { 6079 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8877 { 6079 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8878 { 6079 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8879 { 6079 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8880 { 6085 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8881 { 6085 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8882 { 6085 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8883 { 6085 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8884 { 6092 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8885 { 6092 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8886 { 6092 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8887 { 6092 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8888 { 6099 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8889 { 6099 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8890 { 6099 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8891 { 6099 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8892 { 6107 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8893 { 6107 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8894 { 6107 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8895 { 6107 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8896 { 6115 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8897 { 6115 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8898 { 6115 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8899 { 6115 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8900 { 6121 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8901 { 6121 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8902 { 6128 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8903 { 6128 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8904 { 6142 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
8905 { 6142 /* ptwritel */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8906 { 6151 /* ptwriteq */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8907 { 6151 /* ptwriteq */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8908 { 6160 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8909 { 6160 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8910 { 6160 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8911 { 6160 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8912 { 6170 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8913 { 6170 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8914 { 6170 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8915 { 6170 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8916 { 6180 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8917 { 6180 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8918 { 6191 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8919 { 6191 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8920 { 6191 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8921 { 6191 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8922 { 6201 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8923 { 6201 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8924 { 6201 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8925 { 6201 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8926 { 6211 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8927 { 6211 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8928 { 6211 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8929 { 6211 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8930 { 6221 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8931 { 6221 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8932 { 6232 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8933 { 6232 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8934 { 6232 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8935 { 6232 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8936 { 6247 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
8937 { 6254 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
8938 { 6274 /* pushfl */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
8939 { 6281 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, { }, },
8940 { 6288 /* pushfw */, X86::PUSHF16, Convert_NoOperands, 0, { }, },
8941 { 6295 /* pushl */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
8942 { 6295 /* pushl */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8943 { 6295 /* pushl */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8944 { 6295 /* pushl */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
8945 { 6295 /* pushl */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
8946 { 6295 /* pushl */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8947 { 6295 /* pushl */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8948 { 6295 /* pushl */, X86::PUSH32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8949 { 6295 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
8950 { 6295 /* pushl */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
8951 { 6295 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
8952 { 6301 /* pushq */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
8953 { 6301 /* pushq */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
8954 { 6301 /* pushq */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8955 { 6301 /* pushq */, X86::PUSH64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8956 { 6301 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
8957 { 6301 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
8958 { 6301 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8959 { 6307 /* pushw */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
8960 { 6307 /* pushw */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8961 { 6307 /* pushw */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8962 { 6307 /* pushw */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
8963 { 6307 /* pushw */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
8964 { 6307 /* pushw */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8965 { 6307 /* pushw */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8966 { 6307 /* pushw */, X86::PUSH16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8967 { 6307 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
8968 { 6307 /* pushw */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
8969 { 6307 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8970 { 6313 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8971 { 6313 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8972 { 6313 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8973 { 6313 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8974 { 6322 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
8975 { 6322 /* rclb */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8976 { 6322 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
8977 { 6322 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
8978 { 6322 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
8979 { 6322 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
8980 { 6327 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
8981 { 6327 /* rcll */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8982 { 6327 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
8983 { 6327 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
8984 { 6327 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8985 { 6327 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8986 { 6332 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
8987 { 6332 /* rclq */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8988 { 6332 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
8989 { 6332 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
8990 { 6332 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8991 { 6332 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8992 { 6337 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
8993 { 6337 /* rclw */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8994 { 6337 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
8995 { 6337 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
8996 { 6337 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8997 { 6337 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8998 { 6342 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8999 { 6342 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9000 { 6348 /* rcpss */, X86::RCPSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9001 { 6348 /* rcpss */, X86::RCPSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9002 { 6358 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
9003 { 6358 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9004 { 6358 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
9005 { 6358 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9006 { 6358 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9007 { 6358 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9008 { 6363 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9009 { 6363 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9010 { 6363 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
9011 { 6363 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9012 { 6363 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9013 { 6363 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9014 { 6368 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9015 { 6368 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9016 { 6368 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
9017 { 6368 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9018 { 6368 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9019 { 6368 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9020 { 6373 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
9021 { 6373 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9022 { 6373 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
9023 { 6373 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9024 { 6373 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9025 { 6373 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9026 { 6387 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
9027 { 6397 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9028 { 6416 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
9029 { 6426 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9030 { 6436 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, { }, },
9031 { 6442 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
9032 { 6442 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9033 { 6448 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, { }, },
9034 { 6455 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, { }, },
9035 { 6468 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9036 { 6476 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9037 { 6484 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9038 { 6499 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9039 { 6507 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9040 { 6515 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9041 { 6523 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9042 { 6530 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9043 { 6537 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, { }, },
9044 { 6543 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, { }, },
9045 { 6550 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, { }, },
9046 { 6554 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, { }, },
9047 { 6575 /* retl */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, { }, },
9048 { 6575 /* retl */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
9049 { 6580 /* retq */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
9050 { 6580 /* retq */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
9051 { 6585 /* retw */, X86::RETW, Convert_NoOperands, 0, { }, },
9052 { 6585 /* retw */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
9053 { 6590 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, { }, },
9054 { 6600 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
9055 { 6600 /* rolb */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9056 { 6600 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
9057 { 6600 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9058 { 6600 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9059 { 6600 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9060 { 6605 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9061 { 6605 /* roll */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9062 { 6605 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
9063 { 6605 /* roll */, X86::ROL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9064 { 6605 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9065 { 6605 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9066 { 6610 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9067 { 6610 /* rolq */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9068 { 6610 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
9069 { 6610 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9070 { 6610 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9071 { 6610 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9072 { 6615 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
9073 { 6615 /* rolw */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9074 { 6615 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
9075 { 6615 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9076 { 6615 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9077 { 6615 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9078 { 6624 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
9079 { 6624 /* rorb */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9080 { 6624 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
9081 { 6624 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9082 { 6624 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9083 { 6624 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9084 { 6629 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9085 { 6629 /* rorl */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9086 { 6629 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
9087 { 6629 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9088 { 6629 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9089 { 6629 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9090 { 6634 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9091 { 6634 /* rorq */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9092 { 6634 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
9093 { 6634 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9094 { 6634 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9095 { 6634 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9096 { 6639 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
9097 { 6639 /* rorw */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9098 { 6639 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
9099 { 6639 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9100 { 6639 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9101 { 6639 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9102 { 6649 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9103 { 6649 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
9104 { 6655 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9105 { 6655 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
9106 { 6661 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9107 { 6661 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9108 { 6669 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9109 { 6669 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9110 { 6677 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9111 { 6677 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
9112 { 6685 /* roundss */, X86::ROUNDSSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9113 { 6685 /* roundss */, X86::ROUNDSSm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
9114 { 6693 /* rsm */, X86::RSM, Convert_NoOperands, 0, { }, },
9115 { 6697 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9116 { 6697 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9117 { 6705 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9118 { 6705 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9119 { 6713 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9120 { 6722 /* sahf */, X86::SAHF, Convert_NoOperands, 0, { }, },
9121 { 6727 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, { }, },
9122 { 6736 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
9123 { 6736 /* sarb */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9124 { 6736 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
9125 { 6736 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9126 { 6736 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9127 { 6736 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9128 { 6741 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9129 { 6741 /* sarl */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9130 { 6741 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
9131 { 6741 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9132 { 6741 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9133 { 6741 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9134 { 6746 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9135 { 6746 /* sarq */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9136 { 6746 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
9137 { 6746 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9138 { 6746 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9139 { 6746 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9140 { 6751 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
9141 { 6751 /* sarw */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9142 { 6751 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
9143 { 6751 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9144 { 6751 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9145 { 6751 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9146 { 6761 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9147 { 6761 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9148 { 6767 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9149 { 6767 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9150 { 6773 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, { }, },
9151 { 6789 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9152 { 6789 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9153 { 6789 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9154 { 6789 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9155 { 6789 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9156 { 6789 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
9157 { 6794 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9158 { 6794 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9159 { 6794 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
9160 { 6794 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
9161 { 6794 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9162 { 6794 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9163 { 6794 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9164 { 6794 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9165 { 6794 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9166 { 6799 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9167 { 6799 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9168 { 6799 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
9169 { 6799 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
9170 { 6799 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9171 { 6799 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9172 { 6799 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
9173 { 6799 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9174 { 6799 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9175 { 6804 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9176 { 6804 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9177 { 6804 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
9178 { 6804 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
9179 { 6804 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9180 { 6804 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9181 { 6804 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9182 { 6804 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9183 { 6804 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9184 { 6809 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9185 { 6809 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9186 { 6809 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9187 { 6809 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9188 { 6809 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
9189 { 6809 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
9190 { 6809 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
9191 { 6809 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
9192 { 6814 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9193 { 6814 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
9194 { 6826 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9195 { 6826 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
9196 { 6832 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9197 { 6832 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, 0, { MCK_DstIdx64, MCK_RAX }, },
9198 { 6838 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9199 { 6838 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
9200 { 6844 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9201 { 6844 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9202 { 6849 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9203 { 6849 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9204 { 6855 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9205 { 6855 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9206 { 6860 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9207 { 6860 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9208 { 6866 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9209 { 6866 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9210 { 6871 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9211 { 6871 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9212 { 6876 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9213 { 6876 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9214 { 6882 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9215 { 6882 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9216 { 6887 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9217 { 6887 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9218 { 6893 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9219 { 6893 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9220 { 6899 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9221 { 6899 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9222 { 6905 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9223 { 6905 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9224 { 6911 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9225 { 6911 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9226 { 6917 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9227 { 6917 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9228 { 6922 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9229 { 6922 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9230 { 6927 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9231 { 6927 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9232 { 6932 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, 0, { }, },
9233 { 6941 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, { }, },
9234 { 6953 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9235 { 6959 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
9236 { 6965 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9237 { 6971 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9238 { 6971 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9239 { 6980 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9240 { 6980 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9241 { 6989 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9242 { 6989 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9243 { 6999 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9244 { 6999 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9245 { 7009 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9246 { 7009 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9247 { 7020 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9248 { 7020 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9249 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9250 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9251 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
9252 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
9253 { 7047 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
9254 { 7047 /* shlb */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9255 { 7047 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
9256 { 7047 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9257 { 7047 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9258 { 7047 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9259 { 7057 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9260 { 7057 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9261 { 7057 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
9262 { 7057 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
9263 { 7057 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9264 { 7057 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
9265 { 7063 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9266 { 7063 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9267 { 7063 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
9268 { 7063 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
9269 { 7063 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9270 { 7063 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
9271 { 7069 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9272 { 7069 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9273 { 7069 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
9274 { 7069 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
9275 { 7069 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
9276 { 7069 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
9277 { 7075 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9278 { 7075 /* shll */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9279 { 7075 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
9280 { 7075 /* shll */, X86::SHL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9281 { 7075 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9282 { 7075 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9283 { 7080 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9284 { 7080 /* shlq */, X86::SHL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9285 { 7080 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
9286 { 7080 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9287 { 7080 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9288 { 7080 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9289 { 7085 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
9290 { 7085 /* shlw */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9291 { 7085 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
9292 { 7085 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9293 { 7085 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9294 { 7085 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9295 { 7095 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9296 { 7095 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9297 { 7101 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9298 { 7101 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9299 { 7111 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
9300 { 7111 /* shrb */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9301 { 7111 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
9302 { 7111 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9303 { 7111 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9304 { 7111 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9305 { 7121 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9306 { 7121 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9307 { 7121 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
9308 { 7121 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
9309 { 7121 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9310 { 7121 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
9311 { 7127 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9312 { 7127 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9313 { 7127 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
9314 { 7127 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
9315 { 7127 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9316 { 7127 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
9317 { 7133 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9318 { 7133 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9319 { 7133 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
9320 { 7133 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
9321 { 7133 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
9322 { 7133 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
9323 { 7139 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
9324 { 7139 /* shrl */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9325 { 7139 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
9326 { 7139 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9327 { 7139 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9328 { 7139 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9329 { 7144 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
9330 { 7144 /* shrq */, X86::SHR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9331 { 7144 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
9332 { 7144 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9333 { 7144 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9334 { 7144 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9335 { 7149 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
9336 { 7149 /* shrw */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9337 { 7149 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
9338 { 7149 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9339 { 7149 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9340 { 7149 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9341 { 7159 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9342 { 7159 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9343 { 7165 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9344 { 7165 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9345 { 7171 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9346 { 7171 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9347 { 7178 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9348 { 7178 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9349 { 7190 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9350 { 7196 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
9351 { 7202 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9352 { 7208 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
9353 { 7215 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9354 { 7220 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9355 { 7226 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9356 { 7226 /* sldtq */, X86::SLDT64m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9357 { 7232 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9358 { 7232 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9359 { 7238 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
9360 { 7238 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
9361 { 7250 /* smswl */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9362 { 7256 /* smswq */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9363 { 7262 /* smsww */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9364 { 7262 /* smsww */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9365 { 7268 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9366 { 7268 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9367 { 7275 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9368 { 7275 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9369 { 7282 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9370 { 7282 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9371 { 7289 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9372 { 7289 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9373 { 7296 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, { }, },
9374 { 7299 /* stac */, X86::STAC, Convert_NoOperands, 0, { }, },
9375 { 7304 /* stc */, X86::STC, Convert_NoOperands, 0, { }, },
9376 { 7308 /* std */, X86::STD, Convert_NoOperands, 0, { }, },
9377 { 7312 /* stgi */, X86::STGI, Convert_NoOperands, 0, { }, },
9378 { 7317 /* sti */, X86::STI, Convert_NoOperands, 0, { }, },
9379 { 7321 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9380 { 7329 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9381 { 7329 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9382 { 7329 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9383 { 7329 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9384 { 7329 /* stos */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
9385 { 7329 /* stos */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
9386 { 7329 /* stos */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
9387 { 7329 /* stos */, X86::STOSQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
9388 { 7334 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9389 { 7334 /* stosb */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
9390 { 7346 /* stosl */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9391 { 7346 /* stosl */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
9392 { 7352 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9393 { 7352 /* stosq */, X86::STOSQ, Convert__DstIdx641_1, 0, { MCK_RAX, MCK_DstIdx64 }, },
9394 { 7358 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9395 { 7358 /* stosw */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
9396 { 7368 /* strl */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9397 { 7373 /* strq */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9398 { 7378 /* strw */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9399 { 7378 /* strw */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9400 { 7387 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9401 { 7387 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9402 { 7387 /* subb */, X86::SUB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9403 { 7387 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9404 { 7387 /* subb */, X86::SUB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9405 { 7387 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
9406 { 7392 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9407 { 7392 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9408 { 7392 /* subl */, X86::SUB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
9409 { 7392 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
9410 { 7392 /* subl */, X86::SUB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9411 { 7392 /* subl */, X86::SUB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9412 { 7392 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9413 { 7392 /* subl */, X86::SUB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9414 { 7392 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9415 { 7397 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9416 { 7397 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9417 { 7403 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9418 { 7403 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9419 { 7409 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9420 { 7409 /* subq */, X86::SUB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9421 { 7409 /* subq */, X86::SUB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
9422 { 7409 /* subq */, X86::SUB64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
9423 { 7409 /* subq */, X86::SUB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9424 { 7409 /* subq */, X86::SUB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9425 { 7409 /* subq */, X86::SUB64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
9426 { 7409 /* subq */, X86::SUB64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9427 { 7409 /* subq */, X86::SUB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9428 { 7414 /* subsd */, X86::SUBSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9429 { 7414 /* subsd */, X86::SUBSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9430 { 7420 /* subss */, X86::SUBSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9431 { 7420 /* subss */, X86::SUBSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9432 { 7426 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9433 { 7426 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9434 { 7426 /* subw */, X86::SUB16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
9435 { 7426 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
9436 { 7426 /* subw */, X86::SUB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9437 { 7426 /* subw */, X86::SUB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9438 { 7426 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9439 { 7426 /* subw */, X86::SUB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9440 { 7426 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9441 { 7431 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, { }, },
9442 { 7438 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, { }, },
9443 { 7446 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, { }, },
9444 { 7463 /* sysexitl */, X86::SYSEXIT, Convert_NoOperands, 0, { }, },
9445 { 7472 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, { }, },
9446 { 7488 /* sysretl */, X86::SYSRET, Convert_NoOperands, 0, { }, },
9447 { 7496 /* sysretq */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
9448 { 7504 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9449 { 7504 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9450 { 7504 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9451 { 7504 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9452 { 7516 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9453 { 7516 /* testb */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9454 { 7516 /* testb */, X86::TEST8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9455 { 7516 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9456 { 7516 /* testb */, X86::TEST8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9457 { 7516 /* testb */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
9458 { 7522 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9459 { 7522 /* testl */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9460 { 7522 /* testl */, X86::TEST32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9461 { 7522 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9462 { 7522 /* testl */, X86::TEST32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9463 { 7522 /* testl */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
9464 { 7528 /* testq */, X86::TEST64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9465 { 7528 /* testq */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9466 { 7528 /* testq */, X86::TEST64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9467 { 7528 /* testq */, X86::TEST64ri32, Convert__Reg1_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_GR64 }, },
9468 { 7528 /* testq */, X86::TEST64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9469 { 7528 /* testq */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
9470 { 7534 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9471 { 7534 /* testw */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9472 { 7534 /* testw */, X86::TEST16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9473 { 7534 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9474 { 7534 /* testw */, X86::TEST16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9475 { 7534 /* testw */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
9476 { 7546 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9477 { 7546 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9478 { 7553 /* tzcntq */, X86::TZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9479 { 7553 /* tzcntq */, X86::TZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9480 { 7560 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9481 { 7560 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9482 { 7567 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9483 { 7567 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9484 { 7567 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9485 { 7567 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9486 { 7573 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9487 { 7573 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9488 { 7581 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9489 { 7581 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9490 { 7589 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, { }, },
9491 { 7593 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, { }, },
9492 { 7598 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9493 { 7598 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9494 { 7607 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9495 { 7607 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9496 { 7616 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9497 { 7616 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9498 { 7625 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9499 { 7625 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9500 { 7634 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9501 { 7634 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9502 { 7634 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9503 { 7634 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9504 { 7634 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9505 { 7634 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9506 { 7634 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9507 { 7634 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9508 { 7634 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9509 { 7634 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9510 { 7634 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9511 { 7634 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9512 { 7634 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9513 { 7634 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9514 { 7634 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9515 { 7634 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9516 { 7634 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9517 { 7634 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9518 { 7634 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9519 { 7634 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9520 { 7634 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9521 { 7634 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9522 { 7634 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9523 { 7634 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9524 { 7634 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9525 { 7634 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9526 { 7634 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9527 { 7634 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9528 { 7634 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9529 { 7634 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9530 { 7634 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9531 { 7634 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9532 { 7634 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9533 { 7634 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9534 { 7641 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9535 { 7641 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9536 { 7641 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9537 { 7641 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9538 { 7641 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9539 { 7641 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9540 { 7641 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9541 { 7641 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9542 { 7641 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9543 { 7641 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9544 { 7641 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9545 { 7641 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9546 { 7641 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9547 { 7641 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9548 { 7641 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9549 { 7641 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9550 { 7641 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9551 { 7641 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9552 { 7641 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9553 { 7641 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9554 { 7641 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9555 { 7641 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9556 { 7641 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9557 { 7641 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9558 { 7641 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9559 { 7641 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9560 { 7641 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9561 { 7641 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9562 { 7641 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9563 { 7641 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9564 { 7641 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9565 { 7641 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9566 { 7641 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9567 { 7641 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9568 { 7648 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9569 { 7648 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9570 { 7648 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
9571 { 7648 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
9572 { 7648 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9573 { 7648 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9574 { 7648 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9575 { 7648 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9576 { 7648 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9577 { 7648 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9578 { 7648 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9579 { 7655 /* vaddss */, X86::VADDSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9580 { 7655 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9581 { 7655 /* vaddss */, X86::VADDSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
9582 { 7655 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
9583 { 7655 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9584 { 7655 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9585 { 7655 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9586 { 7655 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9587 { 7655 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9588 { 7655 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9589 { 7655 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9590 { 7662 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9591 { 7662 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9592 { 7662 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9593 { 7662 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9594 { 7672 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9595 { 7672 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9596 { 7672 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9597 { 7672 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9598 { 7682 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9599 { 7682 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9600 { 7682 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9601 { 7682 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9602 { 7682 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9603 { 7682 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9604 { 7682 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9605 { 7682 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9606 { 7682 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9607 { 7682 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9608 { 7690 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9609 { 7690 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9610 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9611 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9612 { 7690 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9613 { 7690 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9614 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9615 { 7690 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9616 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9617 { 7690 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9618 { 7702 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9619 { 7702 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9620 { 7702 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9621 { 7702 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9622 { 7702 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9623 { 7702 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9624 { 7702 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9625 { 7702 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9626 { 7702 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9627 { 7702 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9628 { 7710 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9629 { 7710 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9630 { 7710 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9631 { 7710 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9632 { 7710 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9633 { 7710 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9634 { 7710 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9635 { 7710 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9636 { 7710 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9637 { 7710 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9638 { 7722 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9639 { 7722 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9640 { 7730 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9641 { 7730 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9642 { 7747 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9643 { 7747 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9644 { 7747 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9645 { 7747 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9646 { 7747 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9647 { 7747 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9648 { 7747 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9649 { 7747 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9650 { 7747 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9651 { 7747 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9652 { 7747 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9653 { 7747 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9654 { 7747 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9655 { 7747 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9656 { 7747 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9657 { 7747 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9658 { 7747 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9659 { 7747 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9660 { 7747 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9661 { 7747 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9662 { 7747 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9663 { 7747 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9664 { 7747 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9665 { 7747 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9666 { 7747 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9667 { 7747 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9668 { 7747 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9669 { 7755 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9670 { 7755 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9671 { 7755 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9672 { 7755 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9673 { 7755 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9674 { 7755 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9675 { 7755 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9676 { 7755 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9677 { 7755 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9678 { 7755 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9679 { 7755 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9680 { 7755 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9681 { 7755 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9682 { 7755 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9683 { 7755 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9684 { 7755 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9685 { 7755 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9686 { 7755 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9687 { 7755 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9688 { 7755 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9689 { 7755 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9690 { 7755 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9691 { 7755 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9692 { 7755 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9693 { 7755 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9694 { 7755 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9695 { 7755 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9696 { 7763 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9697 { 7763 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9698 { 7763 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9699 { 7763 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9700 { 7763 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9701 { 7763 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9702 { 7763 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9703 { 7763 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9704 { 7763 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9705 { 7763 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9706 { 7763 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9707 { 7763 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9708 { 7763 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9709 { 7763 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9710 { 7763 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9711 { 7763 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9712 { 7763 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9713 { 7763 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9714 { 7763 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9715 { 7763 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9716 { 7763 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9717 { 7763 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9718 { 7763 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9719 { 7763 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9720 { 7763 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9721 { 7763 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9722 { 7763 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9723 { 7763 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9724 { 7763 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9725 { 7763 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9726 { 7763 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9727 { 7771 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9728 { 7771 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9729 { 7771 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9730 { 7771 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9731 { 7771 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9732 { 7771 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9733 { 7771 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9734 { 7771 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9735 { 7771 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9736 { 7771 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9737 { 7771 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9738 { 7771 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9739 { 7771 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9740 { 7771 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9741 { 7771 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9742 { 7771 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9743 { 7771 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9744 { 7771 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9745 { 7771 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9746 { 7771 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9747 { 7771 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9748 { 7771 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9749 { 7771 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9750 { 7771 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9751 { 7771 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9752 { 7771 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9753 { 7771 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9754 { 7771 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9755 { 7771 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9756 { 7771 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9757 { 7771 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9758 { 7779 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9759 { 7779 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9760 { 7779 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9761 { 7779 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9762 { 7779 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9763 { 7779 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9764 { 7779 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9765 { 7779 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9766 { 7779 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9767 { 7779 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9768 { 7779 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9769 { 7779 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9770 { 7779 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9771 { 7779 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9772 { 7779 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9773 { 7779 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9774 { 7779 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9775 { 7779 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9776 { 7779 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9777 { 7779 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9778 { 7779 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9779 { 7779 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9780 { 7779 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9781 { 7779 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9782 { 7779 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9783 { 7779 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9784 { 7779 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9785 { 7779 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9786 { 7779 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9787 { 7779 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9788 { 7779 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9789 { 7786 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9790 { 7786 /* vandps */, X86::VANDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9791 { 7786 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9792 { 7786 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9793 { 7786 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9794 { 7786 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9795 { 7786 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9796 { 7786 /* vandps */, X86::VANDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9797 { 7786 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9798 { 7786 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9799 { 7786 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9800 { 7786 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9801 { 7786 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9802 { 7786 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9803 { 7786 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9804 { 7786 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9805 { 7786 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9806 { 7786 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9807 { 7786 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9808 { 7786 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9809 { 7786 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9810 { 7786 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9811 { 7786 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9812 { 7786 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9813 { 7786 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9814 { 7786 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9815 { 7786 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9816 { 7786 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9817 { 7786 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9818 { 7786 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9819 { 7786 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9820 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9821 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9822 { 7793 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9823 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9824 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9825 { 7793 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9826 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9827 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9828 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9829 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9830 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9831 { 7793 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9832 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9833 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9834 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9835 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9836 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9837 { 7793 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9838 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9839 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9840 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9841 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9842 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9843 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9844 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9845 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9846 { 7803 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9847 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9848 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9849 { 7803 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9850 { 7803 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9851 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9852 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9853 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9854 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9855 { 7803 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9856 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9857 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9858 { 7803 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9859 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9860 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9861 { 7803 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9862 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9863 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9864 { 7803 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9865 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9866 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9867 { 7803 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9868 { 7813 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9869 { 7813 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9870 { 7813 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9871 { 7813 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9872 { 7822 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9873 { 7822 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9874 { 7822 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9875 { 7822 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9876 { 7831 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9877 { 7831 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9878 { 7831 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9879 { 7831 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9880 { 7841 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9881 { 7841 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9882 { 7841 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9883 { 7841 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9884 { 7851 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
9885 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
9886 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512 }, },
9887 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_VR256X }, },
9888 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_1__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK_VR512 }, },
9889 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9890 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9891 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9892 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9893 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9894 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9895 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9896 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9897 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
9898 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
9899 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9900 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9901 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9902 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9903 { 7898 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
9904 { 7898 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9905 { 7898 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9906 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X }, },
9907 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512 }, },
9908 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9909 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9910 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9911 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9912 { 7930 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
9913 { 7930 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9914 { 7930 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9915 { 7946 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
9916 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
9917 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
9918 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512 }, },
9919 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
9920 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_VR256X }, },
9921 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_1__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK_VR512 }, },
9922 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9923 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9924 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9925 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9926 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9927 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9928 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9929 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9930 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9931 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9932 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9933 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9934 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
9935 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
9936 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9937 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9938 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9939 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9940 { 7993 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
9941 { 7993 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9942 { 7993 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9943 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X }, },
9944 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512 }, },
9945 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9946 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9947 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9948 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9949 { 8025 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
9950 { 8025 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9951 { 8025 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9952 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
9953 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
9954 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
9955 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
9956 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_VR256X }, },
9957 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
9958 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9959 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9960 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9961 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9962 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9963 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9964 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9965 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9966 { 8054 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9967 { 8054 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
9968 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
9969 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
9970 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
9971 { 8054 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9972 { 8054 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
9973 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_1__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_FR32X }, },
9974 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_1__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_VR256X }, },
9975 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512 }, },
9976 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9977 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9978 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9979 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9980 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9981 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9982 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9983 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9984 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9985 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9986 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9987 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9988 { 8067 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9989 { 8067 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
9990 { 8067 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
9991 { 8067 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
9992 { 8067 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1 }, },
9993 { 8067 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9994 { 8067 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
9995 { 8067 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9996 { 8067 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
9997 { 8067 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
9998 { 8067 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
9999 { 8067 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10000 { 8067 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10001 { 8067 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10002 { 8067 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10003 { 8067 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10004 { 8067 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10005 { 8067 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10006 { 8067 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10007 { 8067 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10008 { 8067 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10009 { 8067 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10010 { 8067 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10011 { 8067 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
10012 { 8067 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10013 { 8067 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10014 { 8067 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10015 { 8067 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
10016 { 8067 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10017 { 8067 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
10018 { 8067 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
10019 { 8067 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
10020 { 8067 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10021 { 8067 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
10022 { 8067 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
10023 { 8067 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
10024 { 8067 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10025 { 8067 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10026 { 8067 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10027 { 8067 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10028 { 8067 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10029 { 8067 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10030 { 8067 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10031 { 8067 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10032 { 8067 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10033 { 8067 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10034 { 8067 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10035 { 8067 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10036 { 8067 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10037 { 8067 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10038 { 8067 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10039 { 8067 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10040 { 8067 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10041 { 8067 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10042 { 8067 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10043 { 8067 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10044 { 8067 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10045 { 8067 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10046 { 8067 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10047 { 8067 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10048 { 8067 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10049 { 8067 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10050 { 8067 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10051 { 8067 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10052 { 8072 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10053 { 8072 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10054 { 8072 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10055 { 8072 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10056 { 8072 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10057 { 8072 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10058 { 8072 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10059 { 8072 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10060 { 8072 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10061 { 8072 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10062 { 8072 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10063 { 8072 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
10064 { 8072 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
10065 { 8072 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
10066 { 8072 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10067 { 8072 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10068 { 8072 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10069 { 8072 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10070 { 8072 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10071 { 8072 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10072 { 8072 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10073 { 8072 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10074 { 8072 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10075 { 8072 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10076 { 8079 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10077 { 8079 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10078 { 8079 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10079 { 8079 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10080 { 8079 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10081 { 8079 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10082 { 8079 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10083 { 8079 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10084 { 8079 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10085 { 8079 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10086 { 8079 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10087 { 8079 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
10088 { 8079 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
10089 { 8079 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
10090 { 8079 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10091 { 8079 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10092 { 8079 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10093 { 8079 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10094 { 8079 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10095 { 8079 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10096 { 8079 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10097 { 8079 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10098 { 8079 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10099 { 8079 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10100 { 8086 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10101 { 8086 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10102 { 8086 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10103 { 8086 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
10104 { 8086 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10105 { 8086 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10106 { 8086 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10107 { 8086 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10108 { 8093 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10109 { 8093 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10110 { 8093 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10111 { 8093 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
10112 { 8093 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10113 { 8093 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10114 { 8093 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10115 { 8093 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10116 { 8100 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10117 { 8100 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
10118 { 8100 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10119 { 8100 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
10120 { 8100 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
10121 { 8108 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10122 { 8108 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
10123 { 8108 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
10124 { 8108 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
10125 { 8108 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
10126 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10127 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
10128 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10129 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
10130 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10131 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
10132 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10133 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10134 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10135 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10136 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10137 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10138 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10139 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10140 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10141 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10142 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
10143 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10144 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
10145 { 8128 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10146 { 8128 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
10147 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10148 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10149 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10150 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10151 { 8128 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10152 { 8128 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10153 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10154 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10155 { 8128 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10156 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10157 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10158 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10159 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10160 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
10161 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10162 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10163 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
10164 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10165 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10166 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10167 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10168 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10169 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10170 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10171 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10172 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10173 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10174 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10175 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10176 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10177 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10178 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10179 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10180 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10181 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10182 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10183 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10184 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10185 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10186 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10187 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10188 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10189 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10190 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10191 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10192 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10193 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10194 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10195 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10196 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
10197 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10198 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10199 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10200 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10201 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10202 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10203 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10204 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10205 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10206 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10207 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10208 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10209 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10210 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10211 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10212 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10213 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10214 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10215 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10216 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10217 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10218 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10219 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10220 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10221 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10222 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10223 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10224 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10225 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
10226 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
10227 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10228 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10229 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10230 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10231 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10232 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10233 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10234 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10235 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10236 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10237 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10238 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10239 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10240 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10241 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10242 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10243 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10244 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10245 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10246 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10247 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10248 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10249 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10250 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10251 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10252 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10253 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10254 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10255 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10256 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10257 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10258 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10259 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10260 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10261 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10262 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10263 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10264 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10265 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10266 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10267 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
10268 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
10269 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10270 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10271 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10272 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10273 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10274 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10275 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10276 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10277 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10278 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10279 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10280 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10281 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10282 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10283 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10284 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10285 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10286 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10287 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10288 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10289 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10290 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10291 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10292 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10293 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10294 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10295 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10296 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10297 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10298 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10299 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10300 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10301 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10302 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10303 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10304 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10305 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10306 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10307 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
10308 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10309 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10310 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
10311 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10312 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10313 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10314 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10315 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10316 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10317 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10318 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10319 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10320 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10321 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10322 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10323 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10324 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10325 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10326 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10327 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10328 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10329 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10330 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10331 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10332 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10333 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10334 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10335 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10336 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10337 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
10338 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
10339 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10340 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10341 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10342 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10343 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10344 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10345 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10346 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10347 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10348 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10349 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10350 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10351 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10352 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10353 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10354 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10355 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10356 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10357 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10358 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10359 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10360 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10361 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10362 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10363 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10364 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10365 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10366 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10367 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10368 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10369 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10370 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10371 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
10372 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10373 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10374 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
10375 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10376 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10377 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10378 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10379 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10380 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10381 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10382 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10383 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10384 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10385 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10386 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10387 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10388 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10389 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10390 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10391 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10392 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10393 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10394 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10395 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10396 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10397 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10398 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10399 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10400 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10401 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10402 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10403 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
10404 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10405 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10406 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
10407 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10408 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10409 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10410 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10411 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10412 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10413 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10414 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10415 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10416 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10417 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10418 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10419 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10420 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10421 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10422 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10423 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10424 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10425 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10426 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10427 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10428 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10429 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10430 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10431 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10432 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10433 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
10434 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10435 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10436 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10437 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10438 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10439 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10440 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10441 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10442 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10443 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10444 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10445 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10446 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10447 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10448 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10449 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10450 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10451 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10452 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10453 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10454 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10455 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10456 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10457 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10458 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10459 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10460 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10461 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10462 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
10463 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10464 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10465 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
10466 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10467 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10468 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10469 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10470 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10471 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10472 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10473 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10474 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10475 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10476 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10477 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10478 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10479 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10480 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10481 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10482 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10483 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10484 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10485 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10486 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10487 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10488 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10489 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10490 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10491 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10492 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10493 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
10494 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
10495 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
10496 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
10497 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
10498 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
10499 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
10500 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
10501 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
10502 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10503 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10504 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10505 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10506 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10507 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10508 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10509 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10510 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10511 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10512 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10513 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10514 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10515 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10516 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
10517 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10518 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
10519 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10520 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
10521 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10522 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10523 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10524 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10525 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10526 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10527 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10528 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10529 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10530 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10531 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10532 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10533 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10534 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10535 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10536 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10537 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10538 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10539 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10540 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10541 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10542 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10543 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10544 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10545 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10546 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10547 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10548 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10549 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
10550 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10551 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10552 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10553 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10554 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10555 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10556 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10557 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10558 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10559 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10560 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10561 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10562 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10563 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10564 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10565 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10566 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10567 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10568 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10569 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10570 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10571 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10572 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10573 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10574 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10575 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10576 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
10577 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10578 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
10579 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10580 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
10581 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10582 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10583 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10584 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10585 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10586 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10587 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10588 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10589 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10590 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10591 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10592 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10593 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10594 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10595 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10596 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10597 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10598 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10599 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10600 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10601 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10602 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10603 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10604 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10605 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10606 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
10607 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10608 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10609 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
10610 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10611 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10612 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10613 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10614 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10615 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10616 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10617 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10618 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10619 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10620 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10621 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10622 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10623 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10624 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10625 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10626 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10627 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10628 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10629 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10630 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10631 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10632 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10633 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10634 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10635 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10636 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
10637 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X }, },
10638 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10639 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10640 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10641 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10642 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10643 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10644 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10645 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10646 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10647 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10648 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10649 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10650 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10651 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10652 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10653 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10654 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10655 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10656 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10657 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10658 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10659 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10660 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10661 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10662 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10663 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10664 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10665 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10666 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10667 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10668 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10669 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10670 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
10671 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
10672 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
10673 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10674 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
10675 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10676 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10677 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10678 { 8404 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10679 { 8404 /* vcvtsd2sil */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10680 { 8415 /* vcvtsd2siq */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10681 { 8415 /* vcvtsd2siq */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10682 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10683 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10684 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10685 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10686 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10687 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10688 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10689 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10690 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10691 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10692 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10693 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
10694 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
10695 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
10696 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
10697 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10698 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10699 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10700 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10701 { 8457 /* vcvtsi2sdl */, X86::VCVTSI2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
10702 { 8457 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
10703 { 8457 /* vcvtsi2sdl */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10704 { 8457 /* vcvtsi2sdl */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10705 { 8457 /* vcvtsi2sdl */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10706 { 8468 /* vcvtsi2sdq */, X86::VCVTSI642SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
10707 { 8468 /* vcvtsi2sdq */, X86::VCVTSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
10708 { 8468 /* vcvtsi2sdq */, X86::VCVTSI642SDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10709 { 8468 /* vcvtsi2sdq */, X86::VCVTSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10710 { 8468 /* vcvtsi2sdq */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10711 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10712 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10713 { 8489 /* vcvtsi2ssl */, X86::VCVTSI2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
10714 { 8489 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
10715 { 8489 /* vcvtsi2ssl */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10716 { 8489 /* vcvtsi2ssl */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10717 { 8489 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10718 { 8500 /* vcvtsi2ssq */, X86::VCVTSI642SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
10719 { 8500 /* vcvtsi2ssq */, X86::VCVTSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
10720 { 8500 /* vcvtsi2ssq */, X86::VCVTSI642SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10721 { 8500 /* vcvtsi2ssq */, X86::VCVTSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10722 { 8500 /* vcvtsi2ssq */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10723 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10724 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10725 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10726 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10727 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10728 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10729 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10730 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10731 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10732 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10733 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10734 { 8521 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10735 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10736 { 8521 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
10737 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
10738 { 8521 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
10739 { 8521 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10740 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
10741 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10742 { 8521 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10743 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10744 { 8531 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10745 { 8531 /* vcvtss2sil */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10746 { 8542 /* vcvtss2siq */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10747 { 8542 /* vcvtss2siq */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10748 { 8553 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
10749 { 8553 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
10750 { 8553 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
10751 { 8553 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
10752 { 8553 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10753 { 8553 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10754 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10755 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10756 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10757 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10758 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
10759 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
10760 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10761 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10762 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10763 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10764 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10765 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10766 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10767 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10768 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10769 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10770 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10771 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10772 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10773 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10774 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10775 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10776 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10777 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10778 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10779 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10780 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10781 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10782 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10783 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10784 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10785 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10786 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10787 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10788 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10789 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10790 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10791 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10792 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10793 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10794 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10795 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10796 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10797 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10798 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
10799 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10800 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10801 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
10802 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10803 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10804 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10805 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10806 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10807 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10808 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10809 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10810 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10811 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10812 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10813 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10814 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10815 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10816 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10817 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10818 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10819 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10820 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10821 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10822 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10823 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10824 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10825 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10826 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10827 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10828 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
10829 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
10830 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10831 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10832 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10833 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10834 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10835 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10836 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10837 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10838 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10839 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10840 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10841 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10842 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10843 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10844 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10845 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10846 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10847 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10848 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10849 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10850 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10851 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10852 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10853 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10854 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10855 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
10856 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10857 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
10858 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10859 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10860 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10861 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10862 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
10863 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10864 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10865 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
10866 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10867 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10868 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10869 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10870 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10871 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10872 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10873 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10874 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10875 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10876 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10877 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10878 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10879 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10880 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10881 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10882 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10883 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10884 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10885 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10886 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10887 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10888 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10889 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10890 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10891 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10892 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10893 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10894 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10895 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10896 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10897 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10898 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10899 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
10900 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10901 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10902 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10903 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10904 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10905 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10906 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10907 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10908 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10909 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10910 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10911 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10912 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10913 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10914 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10915 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10916 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10917 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10918 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10919 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10920 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10921 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10922 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10923 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10924 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10925 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10926 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
10927 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10928 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
10929 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10930 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10931 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10932 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10933 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10934 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10935 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10936 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10937 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10938 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10939 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10940 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10941 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10942 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10943 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10944 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10945 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10946 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10947 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10948 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10949 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10950 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10951 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10952 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10953 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10954 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10955 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
10956 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
10957 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
10958 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
10959 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
10960 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
10961 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10962 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10963 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10964 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10965 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10966 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10967 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10968 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10969 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10970 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10971 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10972 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10973 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10974 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10975 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10976 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10977 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10978 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10979 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10980 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10981 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10982 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10983 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10984 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
10985 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
10986 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
10987 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
10988 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
10989 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
10990 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10991 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10992 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10993 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10994 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10995 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10996 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10997 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10998 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10999 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11000 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11001 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11002 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11003 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11004 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11005 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11006 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11007 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11008 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11009 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11010 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11011 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11012 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11013 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11014 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11015 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11016 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11017 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11018 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
11019 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
11020 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
11021 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
11022 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11023 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11024 { 8717 /* vcvttsd2sil */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11025 { 8717 /* vcvttsd2sil */, X86::VCVTTSD2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11026 { 8717 /* vcvttsd2sil */, X86::VCVTTSD2SIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
11027 { 8717 /* vcvttsd2sil */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
11028 { 8717 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR32 }, },
11029 { 8729 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11030 { 8729 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11031 { 8729 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
11032 { 8729 /* vcvttsd2siq */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
11033 { 8729 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR64 }, },
11034 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11035 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11036 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
11037 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
11038 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11039 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11040 { 8753 /* vcvttsd2usil */, X86::VCVTTSD2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11041 { 8753 /* vcvttsd2usil */, X86::VCVTTSD2USIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
11042 { 8753 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR32 }, },
11043 { 8766 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11044 { 8766 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
11045 { 8766 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR64 }, },
11046 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11047 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11048 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11049 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11050 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
11051 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
11052 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
11053 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
11054 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11055 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11056 { 8790 /* vcvttss2sil */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11057 { 8790 /* vcvttss2sil */, X86::VCVTTSS2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11058 { 8790 /* vcvttss2sil */, X86::VCVTTSS2SIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
11059 { 8790 /* vcvttss2sil */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
11060 { 8790 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR32 }, },
11061 { 8802 /* vcvttss2siq */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11062 { 8802 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11063 { 8802 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
11064 { 8802 /* vcvttss2siq */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
11065 { 8802 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR64 }, },
11066 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11067 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11068 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
11069 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
11070 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11071 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11072 { 8826 /* vcvttss2usil */, X86::VCVTTSS2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
11073 { 8826 /* vcvttss2usil */, X86::VCVTTSS2USIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
11074 { 8826 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR32 }, },
11075 { 8839 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
11076 { 8839 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
11077 { 8839 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK_sae, MCK_FR32X, MCK_GR64 }, },
11078 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11079 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
11080 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
11081 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
11082 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
11083 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
11084 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11085 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11086 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11087 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11088 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11089 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11090 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11091 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11092 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11093 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11094 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11095 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11096 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11097 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11098 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11099 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11100 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11101 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11102 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11103 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11104 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11105 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11106 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
11107 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
11108 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
11109 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
11110 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
11111 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11112 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11113 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11114 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11115 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11116 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11117 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11118 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11119 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11120 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11121 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11122 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11123 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11124 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11125 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11126 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11127 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11128 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11129 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11130 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11131 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11132 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11133 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11134 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11135 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11136 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
11137 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
11138 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
11139 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
11140 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
11141 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11142 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11143 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11144 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11145 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11146 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11147 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11148 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11149 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11150 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11151 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11152 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11153 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11154 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11155 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11156 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11157 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11158 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11159 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11160 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11161 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11162 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11163 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11164 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11165 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11166 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
11167 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
11168 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X }, },
11169 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11170 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11171 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11172 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11173 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11174 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11175 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11176 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11177 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11178 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11179 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11180 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11181 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11182 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11183 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11184 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11185 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11186 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11187 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11188 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11189 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11190 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
11191 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
11192 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11193 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11194 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
11195 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
11196 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
11197 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11198 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11199 { 8920 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11200 { 8931 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11201 { 8931 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11202 { 8943 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11203 { 8943 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11204 { 8943 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11205 { 8955 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11206 { 8966 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11207 { 8966 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11208 { 8966 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11209 { 8978 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11210 { 8978 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11211 { 8978 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11212 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11213 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11214 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11215 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11216 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11217 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11218 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11219 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11220 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11221 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11222 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11223 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11224 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11225 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11226 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11227 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11228 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11229 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11230 { 9000 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11231 { 9000 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11232 { 9000 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11233 { 9000 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11234 { 9000 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11235 { 9000 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11236 { 9000 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11237 { 9000 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11238 { 9000 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11239 { 9000 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11240 { 9000 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11241 { 9000 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11242 { 9000 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11243 { 9000 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11244 { 9000 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11245 { 9000 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11246 { 9000 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11247 { 9000 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11248 { 9000 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11249 { 9000 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11250 { 9000 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11251 { 9000 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11252 { 9000 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11253 { 9000 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11254 { 9000 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11255 { 9000 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11256 { 9000 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11257 { 9000 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11258 { 9000 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11259 { 9000 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11260 { 9000 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11261 { 9000 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11262 { 9000 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11263 { 9000 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11264 { 9007 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11265 { 9007 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11266 { 9007 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11267 { 9007 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11268 { 9007 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11269 { 9007 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11270 { 9007 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11271 { 9007 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11272 { 9007 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11273 { 9007 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11274 { 9007 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11275 { 9007 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11276 { 9007 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11277 { 9007 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11278 { 9007 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11279 { 9007 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11280 { 9007 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11281 { 9007 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11282 { 9007 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11283 { 9007 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11284 { 9007 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11285 { 9007 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11286 { 9007 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11287 { 9007 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11288 { 9007 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11289 { 9007 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11290 { 9007 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11291 { 9007 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11292 { 9007 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11293 { 9007 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11294 { 9007 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11295 { 9007 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11296 { 9007 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11297 { 9007 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11298 { 9014 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11299 { 9014 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11300 { 9014 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11301 { 9014 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11302 { 9014 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11303 { 9014 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11304 { 9014 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11305 { 9014 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11306 { 9014 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11307 { 9014 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11308 { 9014 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11309 { 9021 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11310 { 9021 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11311 { 9021 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11312 { 9021 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11313 { 9021 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11314 { 9021 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11315 { 9021 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11316 { 9021 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11317 { 9021 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11318 { 9021 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11319 { 9021 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11320 { 9028 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11321 { 9028 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11322 { 9034 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11323 { 9034 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11324 { 9034 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11325 { 9034 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11326 { 9040 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
11327 { 9040 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
11328 { 9045 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
11329 { 9045 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
11330 { 9050 /* vexp2pd */, X86::VEXP2PDr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
11331 { 9050 /* vexp2pd */, X86::VEXP2PDm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
11332 { 9050 /* vexp2pd */, X86::VEXP2PDrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11333 { 9050 /* vexp2pd */, X86::VEXP2PDmb, Convert__Reg1_2__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11334 { 9050 /* vexp2pd */, X86::VEXP2PDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11335 { 9050 /* vexp2pd */, X86::VEXP2PDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11336 { 9050 /* vexp2pd */, X86::VEXP2PDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11337 { 9050 /* vexp2pd */, X86::VEXP2PDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11338 { 9050 /* vexp2pd */, X86::VEXP2PDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11339 { 9050 /* vexp2pd */, X86::VEXP2PDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11340 { 9050 /* vexp2pd */, X86::VEXP2PDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11341 { 9050 /* vexp2pd */, X86::VEXP2PDmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11342 { 9058 /* vexp2ps */, X86::VEXP2PSr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
11343 { 9058 /* vexp2ps */, X86::VEXP2PSm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
11344 { 9058 /* vexp2ps */, X86::VEXP2PSrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11345 { 9058 /* vexp2ps */, X86::VEXP2PSmb, Convert__Reg1_2__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11346 { 9058 /* vexp2ps */, X86::VEXP2PSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11347 { 9058 /* vexp2ps */, X86::VEXP2PSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11348 { 9058 /* vexp2ps */, X86::VEXP2PSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11349 { 9058 /* vexp2ps */, X86::VEXP2PSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11350 { 9058 /* vexp2ps */, X86::VEXP2PSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11351 { 9058 /* vexp2ps */, X86::VEXP2PSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11352 { 9058 /* vexp2ps */, X86::VEXP2PSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11353 { 9058 /* vexp2ps */, X86::VEXP2PSmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11354 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11355 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
11356 { 9066 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
11357 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
11358 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
11359 { 9066 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
11360 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11361 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11362 { 9066 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11363 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11364 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11365 { 9066 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11366 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11367 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11368 { 9066 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11369 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11370 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11371 { 9066 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11372 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
11373 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
11374 { 9076 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
11375 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
11376 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
11377 { 9076 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
11378 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11379 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11380 { 9076 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11381 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11382 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11383 { 9076 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11384 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11385 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11386 { 9076 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11387 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11388 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11389 { 9076 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11390 { 9086 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11391 { 9086 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11392 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11393 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11394 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11395 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11396 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11397 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11398 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11399 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11400 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11401 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11402 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11403 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11404 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11405 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11406 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11407 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11408 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11409 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11410 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11411 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11412 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11413 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11414 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11415 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11416 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11417 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11418 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11419 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11420 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11421 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11422 { 9155 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11423 { 9155 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11424 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11425 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11426 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11427 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11428 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11429 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11430 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11431 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11432 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11433 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11434 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11435 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11436 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11437 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11438 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11439 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11440 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11441 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11442 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11443 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11444 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11445 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11446 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11447 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11448 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11449 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11450 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11451 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11452 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11453 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11454 { 9224 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
11455 { 9224 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
11456 { 9224 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
11457 { 9224 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
11458 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11459 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11460 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11461 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11462 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11463 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11464 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11465 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11466 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11467 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11468 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11469 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11470 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11471 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11472 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11473 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11474 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11475 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11476 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11477 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11478 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11479 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11480 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11481 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11482 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11483 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11484 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11485 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11486 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11487 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11488 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11489 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11490 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11491 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11492 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11493 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11494 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11495 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11496 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11497 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11498 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11499 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11500 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11501 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11502 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11503 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11504 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11505 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11506 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11507 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11508 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11509 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11510 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11511 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11512 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11513 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11514 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11515 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11516 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11517 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11518 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11519 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11520 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11521 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11522 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11523 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11524 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11525 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11526 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11527 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11528 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11529 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11530 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11531 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11532 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11533 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11534 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11535 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11536 { 9283 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11537 { 9283 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11538 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11539 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11540 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11541 { 9283 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11542 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11543 { 9283 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11544 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11545 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11546 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11547 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11548 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11549 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11550 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11551 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11552 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11553 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11554 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11555 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11556 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11557 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11558 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11559 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11560 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11561 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11562 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11563 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11564 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11565 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11566 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11567 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11568 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11569 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11570 { 9295 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11571 { 9295 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11572 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11573 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11574 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11575 { 9295 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11576 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11577 { 9295 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11578 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11579 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11580 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11581 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11582 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11583 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11584 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11585 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11586 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11587 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11588 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11589 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11590 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11591 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11592 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11593 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11594 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11595 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11596 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11597 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11598 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11599 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11600 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11601 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11602 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11603 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11604 { 9307 /* vfmadd132sd */, X86::VFMADD132SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11605 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11606 { 9307 /* vfmadd132sd */, X86::VFMADD132SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11607 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11608 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11609 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11610 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11611 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11612 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11613 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11614 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11615 { 9319 /* vfmadd132ss */, X86::VFMADD132SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11616 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11617 { 9319 /* vfmadd132ss */, X86::VFMADD132SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11618 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11619 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11620 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11621 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11622 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11623 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11624 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11625 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11626 { 9331 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11627 { 9331 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11628 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11629 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11630 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11631 { 9331 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11632 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11633 { 9331 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11634 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11635 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11636 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11637 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11638 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11639 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11640 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11641 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11642 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11643 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11644 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11645 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11646 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11647 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11648 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11649 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11650 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11651 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11652 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11653 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11654 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11655 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11656 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11657 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11658 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11659 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11660 { 9343 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11661 { 9343 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11662 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11663 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11664 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11665 { 9343 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11666 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11667 { 9343 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11668 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11669 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11670 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11671 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11672 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11673 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11674 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11675 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11676 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11677 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11678 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11679 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11680 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11681 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11682 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11683 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11684 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11685 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11686 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11687 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11688 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11689 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11690 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11691 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11692 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11693 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11694 { 9355 /* vfmadd213sd */, X86::VFMADD213SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11695 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11696 { 9355 /* vfmadd213sd */, X86::VFMADD213SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11697 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11698 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11699 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11700 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11701 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11702 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11703 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11704 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11705 { 9367 /* vfmadd213ss */, X86::VFMADD213SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11706 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11707 { 9367 /* vfmadd213ss */, X86::VFMADD213SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11708 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11709 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11710 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11711 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11712 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11713 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11714 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11715 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11716 { 9379 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11717 { 9379 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11718 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11719 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11720 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11721 { 9379 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11722 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11723 { 9379 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11724 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11725 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11726 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11727 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11728 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11729 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11730 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11731 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11732 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11733 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11734 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11735 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11736 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11737 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11738 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11739 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11740 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11741 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11742 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11743 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11744 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11745 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11746 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11747 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11748 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11749 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11750 { 9391 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11751 { 9391 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11752 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11753 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11754 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11755 { 9391 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11756 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11757 { 9391 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11758 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11759 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11760 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11761 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11762 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11763 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11764 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11765 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11766 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11767 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11768 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11769 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11770 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11771 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11772 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11773 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11774 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11775 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11776 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11777 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11778 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11779 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11780 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11781 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11782 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11783 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11784 { 9403 /* vfmadd231sd */, X86::VFMADD231SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11785 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11786 { 9403 /* vfmadd231sd */, X86::VFMADD231SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11787 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11788 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11789 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11790 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11791 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11792 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11793 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11794 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11795 { 9415 /* vfmadd231ss */, X86::VFMADD231SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11796 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11797 { 9415 /* vfmadd231ss */, X86::VFMADD231SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11798 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11799 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11800 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11801 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11802 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11803 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11804 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11805 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11806 { 9427 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11807 { 9427 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11808 { 9427 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11809 { 9427 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11810 { 9427 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11811 { 9427 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11812 { 9436 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11813 { 9436 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11814 { 9436 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11815 { 9436 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11816 { 9436 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11817 { 9436 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11818 { 9445 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11819 { 9445 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11820 { 9445 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11821 { 9454 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11822 { 9454 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11823 { 9454 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11824 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11825 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11826 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11827 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11828 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11829 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11830 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11831 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11832 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11833 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11834 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11835 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11836 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11837 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11838 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11839 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11840 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11841 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11842 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11843 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11844 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11845 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11846 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11847 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11848 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11849 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11850 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11851 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11852 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11853 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11854 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11855 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11856 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11857 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11858 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11859 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11860 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11861 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11862 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11863 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11864 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11865 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11866 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11867 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11868 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11869 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11870 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11871 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11872 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11873 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11874 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11875 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11876 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11877 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11878 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11879 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11880 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11881 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11882 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11883 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11884 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11885 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11886 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11887 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11888 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11889 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11890 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11891 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11892 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11893 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11894 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11895 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11896 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11897 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11898 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11899 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11900 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11901 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11902 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11903 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11904 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11905 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11906 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11907 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11908 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11909 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11910 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11911 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11912 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11913 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11914 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11915 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11916 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11917 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11918 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11919 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11920 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11921 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11922 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11923 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11924 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11925 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11926 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11927 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11928 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11929 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11930 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11931 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11932 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11933 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11934 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11935 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11936 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11937 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11938 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11939 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11940 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11941 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11942 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11943 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11944 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11945 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11946 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11947 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11948 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11949 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11950 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11951 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11952 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11953 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11954 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11955 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11956 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11957 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11958 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11959 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11960 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11961 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11962 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11963 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11964 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11965 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11966 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11967 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11968 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11969 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11970 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11971 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11972 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11973 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11974 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11975 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11976 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11977 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11978 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11979 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11980 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11981 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11982 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11983 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11984 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11985 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11986 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11987 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11988 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11989 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11990 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11991 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11992 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11993 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11994 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11995 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11996 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11997 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11998 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11999 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12000 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12001 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12002 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12003 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12004 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12005 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12006 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12007 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12008 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12009 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12010 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12011 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12012 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12013 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12014 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12015 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12016 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12017 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12018 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12019 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12020 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12021 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12022 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12023 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12024 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12025 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12026 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12027 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12028 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12029 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12030 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12031 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12032 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12033 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12034 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12035 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12036 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12037 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12038 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12039 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12040 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12041 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12042 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12043 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12044 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12045 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12046 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12047 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12048 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12049 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12050 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12051 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12052 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12053 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12054 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12055 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12056 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12057 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12058 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12059 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12060 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12061 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12062 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12063 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12064 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12065 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12066 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12067 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12068 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12069 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12070 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12071 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12072 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12073 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12074 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12075 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12076 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12077 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12078 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12079 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12080 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12081 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12082 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12083 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12084 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12085 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12086 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12087 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12088 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12089 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12090 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12091 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12092 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12093 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12094 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12095 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12096 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12097 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12098 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12099 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12100 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12101 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12102 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12103 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12104 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12105 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12106 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12107 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12108 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12109 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12110 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12111 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12112 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12113 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12114 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12115 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12116 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12117 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12118 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12119 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12120 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12121 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12122 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12123 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12124 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12125 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12126 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12127 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12128 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12129 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12130 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12131 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12132 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12133 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12134 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12135 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12136 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12137 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12138 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12139 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12140 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12141 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12142 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12143 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12144 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12145 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12146 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12147 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12148 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12149 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12150 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12151 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12152 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12153 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12154 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12155 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12156 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12157 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12158 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12159 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12160 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12161 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12162 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12163 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12164 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12165 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12166 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12167 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12168 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12169 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12170 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12171 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12172 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12173 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12174 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12175 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12176 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12177 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12178 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12179 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12180 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12181 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12182 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12183 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12184 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12185 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12186 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12187 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12188 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12189 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12190 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12191 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12192 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12193 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12194 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12195 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12196 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12197 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12198 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12199 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12200 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12201 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12202 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12203 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12204 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12205 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12206 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12207 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12208 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12209 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12210 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12211 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12212 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12213 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12214 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12215 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12216 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12217 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12218 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12219 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12220 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12221 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12222 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12223 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12224 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12225 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12226 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12227 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12228 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12229 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12230 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12231 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12232 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12233 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12234 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12235 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12236 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12237 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12238 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12239 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12240 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12241 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12242 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12243 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12244 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12245 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12246 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12247 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12248 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12249 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12250 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12251 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12252 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12253 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12254 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12255 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12256 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12257 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12258 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12259 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12260 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12261 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12262 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12263 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12264 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12265 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12266 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12267 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12268 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12269 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12270 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12271 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12272 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12273 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12274 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12275 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12276 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12277 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12278 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12279 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12280 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12281 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12282 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12283 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12284 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12285 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12286 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12287 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12288 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12289 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12290 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12291 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12292 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12293 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12294 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12295 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12296 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12297 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12298 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12299 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12300 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12301 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12302 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12303 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12304 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12305 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12306 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12307 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12308 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12309 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12310 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12311 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12312 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12313 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12314 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12315 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12316 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12317 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12318 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12319 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12320 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12321 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12322 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12323 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12324 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12325 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12326 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12327 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12328 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12329 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12330 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12331 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12332 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12333 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12334 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12335 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12336 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12337 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12338 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12339 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12340 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12341 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12342 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12343 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12344 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12345 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12346 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12347 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12348 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12349 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12350 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12351 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12352 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12353 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12354 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12355 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12356 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12357 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12358 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12359 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12360 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12361 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12362 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12363 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12364 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12365 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12366 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12367 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12368 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12369 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12370 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12371 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12372 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12373 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12374 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12375 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12376 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12377 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12378 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12379 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12380 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12381 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12382 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12383 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12384 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12385 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12386 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12387 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12388 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12389 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12390 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12391 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12392 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12393 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12394 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12395 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12396 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12397 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12398 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12399 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12400 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12401 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12402 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12403 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12404 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12405 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12406 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12407 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12408 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12409 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12410 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12411 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12412 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12413 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12414 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12415 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12416 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12417 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12418 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12419 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12420 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12421 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12422 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12423 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12424 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12425 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12426 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12427 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12428 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12429 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12430 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12431 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12432 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12433 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12434 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12435 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12436 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12437 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12438 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12439 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12440 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12441 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12442 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12443 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12444 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12445 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12446 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12447 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12448 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12449 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12450 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12451 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12452 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12453 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12454 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12455 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12456 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12457 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12458 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12459 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12460 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12461 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12462 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12463 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12464 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12465 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12466 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12467 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12468 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12469 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12470 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12471 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12472 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12473 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12474 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12475 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12476 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12477 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12478 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12479 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12480 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12481 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12482 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12483 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12484 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12485 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12486 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12487 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12488 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12489 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12490 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12491 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12492 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12493 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12494 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12495 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12496 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12497 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12498 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12499 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12500 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12501 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12502 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12503 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12504 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12505 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12506 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12507 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12508 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12509 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12510 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12511 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12512 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12513 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12514 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12515 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12516 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12517 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12518 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12519 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12520 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12521 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12522 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12523 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12524 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12525 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12526 { 9835 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12527 { 9835 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12528 { 9835 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12529 { 9835 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12530 { 9835 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12531 { 9835 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12532 { 9844 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12533 { 9844 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12534 { 9844 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12535 { 9844 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12536 { 9844 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12537 { 9844 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12538 { 9853 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12539 { 9853 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12540 { 9853 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12541 { 9862 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12542 { 9862 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12543 { 9862 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12544 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12545 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12546 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12547 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12548 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12549 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12550 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12551 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12552 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12553 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12554 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12555 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12556 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12557 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12558 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12559 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12560 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12561 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12562 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12563 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12564 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12565 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12566 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12567 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12568 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12569 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12570 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12571 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12572 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12573 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12574 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12575 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12576 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12577 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12578 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12579 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12580 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12581 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12582 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12583 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12584 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12585 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12586 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12587 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12588 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12589 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12590 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12591 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12592 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12593 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12594 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12595 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12596 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12597 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12598 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12599 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12600 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12601 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12602 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12603 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12604 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12605 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12606 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12607 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12608 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12609 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12610 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12611 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12612 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12613 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12614 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12615 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12616 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12617 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12618 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12619 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12620 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12621 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12622 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12623 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12624 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12625 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12626 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12627 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12628 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12629 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12630 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12631 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12632 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12633 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12634 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12635 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12636 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12637 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12638 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12639 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12640 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12641 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12642 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12643 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12644 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12645 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12646 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12647 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12648 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12649 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12650 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12651 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12652 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12653 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12654 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12655 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12656 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12657 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12658 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12659 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12660 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12661 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12662 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12663 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12664 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12665 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12666 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12667 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12668 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12669 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12670 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12671 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12672 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12673 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12674 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12675 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12676 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12677 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12678 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12679 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12680 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12681 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12682 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12683 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12684 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12685 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12686 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12687 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12688 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12689 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12690 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12691 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12692 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12693 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12694 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12695 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12696 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12697 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12698 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12699 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12700 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12701 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12702 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12703 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12704 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12705 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12706 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12707 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12708 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12709 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12710 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12711 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12712 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12713 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12714 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12715 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12716 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12717 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12718 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12719 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12720 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12721 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12722 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12723 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12724 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12725 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12726 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12727 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12728 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12729 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12730 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12731 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12732 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12733 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12734 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12735 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12736 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12737 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12738 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12739 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12740 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12741 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12742 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12743 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12744 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12745 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12746 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12747 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12748 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12749 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12750 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12751 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12752 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12753 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12754 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12755 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12756 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12757 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12758 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12759 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12760 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12761 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12762 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12763 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12764 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12765 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12766 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12767 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12768 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12769 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12770 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12771 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12772 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12773 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12774 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12775 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12776 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12777 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12778 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12779 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12780 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12781 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12782 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12783 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12784 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12785 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12786 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12787 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12788 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12789 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12790 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12791 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12792 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12793 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12794 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12795 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12796 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12797 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12798 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12799 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12800 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12801 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12802 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12803 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12804 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12805 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12806 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12807 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12808 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12809 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12810 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12811 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12812 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12813 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12814 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12815 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12816 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12817 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12818 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12819 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12820 { 10037 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12821 { 10037 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12822 { 10037 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12823 { 10037 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12824 { 10037 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12825 { 10037 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12826 { 10047 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12827 { 10047 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12828 { 10047 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12829 { 10057 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12830 { 10057 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12831 { 10057 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12832 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12833 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12834 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12835 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12836 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12837 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12838 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12839 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12840 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12841 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12842 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12843 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12844 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12845 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12846 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12847 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12848 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12849 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12850 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12851 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12852 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12853 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12854 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12855 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12856 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12857 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12858 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12859 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12860 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12861 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12862 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12863 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12864 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12865 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12866 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12867 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12868 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12869 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12870 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12871 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12872 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12873 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12874 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12875 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12876 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12877 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12878 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12879 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12880 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12881 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12882 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12883 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12884 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12885 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12886 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12887 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12888 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12889 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12890 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12891 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12892 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12893 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12894 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12895 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12896 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12897 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12898 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12899 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12900 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12901 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12902 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12903 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12904 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12905 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12906 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12907 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12908 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12909 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12910 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12911 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12912 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12913 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12914 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12915 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12916 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12917 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12918 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12919 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12920 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12921 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12922 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12923 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12924 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12925 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12926 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12927 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12928 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12929 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12930 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12931 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12932 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12933 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12934 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12935 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12936 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12937 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12938 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12939 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12940 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12941 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12942 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12943 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12944 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12945 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12946 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12947 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12948 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12949 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12950 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12951 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12952 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12953 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12954 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12955 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12956 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12957 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12958 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12959 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12960 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12961 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12962 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12963 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12964 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12965 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12966 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12967 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12968 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12969 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12970 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12971 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12972 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12973 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12974 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12975 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12976 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12977 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12978 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12979 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12980 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12981 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12982 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12983 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12984 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12985 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12986 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12987 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12988 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12989 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12990 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12991 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12992 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12993 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12994 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12995 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12996 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12997 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12998 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12999 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13000 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13001 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13002 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13003 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13004 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13005 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13006 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13007 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13008 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13009 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13010 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13011 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13012 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13013 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13014 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13015 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13016 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13017 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13018 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13019 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13020 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13021 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13022 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13023 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13024 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13025 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13026 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13027 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13028 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13029 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13030 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13031 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13032 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13033 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13034 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13035 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13036 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13037 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13038 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13039 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13040 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13041 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13042 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13043 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13044 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13045 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13046 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13047 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13048 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13049 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13050 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13051 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13052 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13053 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13054 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13055 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13056 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13057 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13058 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13059 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13060 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13061 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13062 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13063 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13064 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13065 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13066 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13067 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13068 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13069 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13070 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13071 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13072 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13073 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13074 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13075 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13076 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13077 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13078 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13079 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13080 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13081 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13082 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDm, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13083 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13084 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13085 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13086 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13087 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13088 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13089 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13090 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13091 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13092 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13093 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSm, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13094 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13095 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13096 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13097 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13098 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13099 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13100 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13101 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13102 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13103 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13104 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13105 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13106 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13107 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13108 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13109 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13110 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13111 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13112 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13113 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13114 { 10243 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13115 { 10243 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13116 { 10243 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13117 { 10253 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13118 { 10253 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13119 { 10253 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13120 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13121 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
13122 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
13123 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13124 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13125 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13126 { 10274 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, },
13127 { 10274 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, },
13128 { 10274 /* vfpclasspdq */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, },
13129 { 10274 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13130 { 10274 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13131 { 10274 /* vfpclasspdq */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13132 { 10286 /* vfpclasspdx */, X86::VFPCLASSPDZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
13133 { 10286 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13134 { 10298 /* vfpclasspdy */, X86::VFPCLASSPDZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
13135 { 10298 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13136 { 10310 /* vfpclasspdz */, X86::VFPCLASSPDZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
13137 { 10310 /* vfpclasspdz */, X86::VFPCLASSPDZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13138 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13139 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
13140 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
13141 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13142 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13143 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13144 { 10333 /* vfpclasspsl */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, },
13145 { 10333 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, },
13146 { 10333 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, },
13147 { 10333 /* vfpclasspsl */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13148 { 10333 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13149 { 10333 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13150 { 10345 /* vfpclasspsx */, X86::VFPCLASSPSZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
13151 { 10345 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13152 { 10357 /* vfpclasspsy */, X86::VFPCLASSPSZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
13153 { 10357 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13154 { 10369 /* vfpclasspsz */, X86::VFPCLASSPSZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
13155 { 10369 /* vfpclasspsz */, X86::VFPCLASSPSZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13156 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13157 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1 }, },
13158 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13159 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrmk, Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13160 { 10392 /* vfpclassss */, X86::VFPCLASSSSrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13161 { 10392 /* vfpclassss */, X86::VFPCLASSSSrm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1 }, },
13162 { 10392 /* vfpclassss */, X86::VFPCLASSSSrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13163 { 10392 /* vfpclassss */, X86::VFPCLASSSSrmk, Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13164 { 10403 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13165 { 10403 /* vfrczpd */, X86::VFRCZPDrrY, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13166 { 10403 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13167 { 10403 /* vfrczpd */, X86::VFRCZPDrmY, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13168 { 10411 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13169 { 10411 /* vfrczps */, X86::VFRCZPSrrY, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13170 { 10411 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13171 { 10411 /* vfrczps */, X86::VFRCZPSrmY, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13172 { 10419 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13173 { 10419 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
13174 { 10427 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13175 { 10427 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
13176 { 10435 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13177 { 10435 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC1285_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
13178 { 10435 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0, Feature_HasVLX, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13179 { 10435 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC128X5_0, Feature_HasVLX, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13180 { 10435 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC256X5_0, Feature_HasAVX512, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13181 { 10446 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13182 { 10446 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
13183 { 10446 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0, Feature_HasVLX, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13184 { 10446 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0, Feature_HasVLX, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13185 { 10446 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0, Feature_HasAVX512, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13186 { 10457 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, Feature_HasPFI, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13187 { 10471 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13188 { 10485 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13189 { 10499 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, Feature_HasPFI, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13190 { 10513 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, Feature_HasPFI, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13191 { 10527 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13192 { 10541 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13193 { 10555 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, Feature_HasPFI, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13194 { 10569 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13195 { 10569 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
13196 { 10569 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0, Feature_HasVLX, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13197 { 10569 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0, Feature_HasVLX, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13198 { 10569 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0, Feature_HasAVX512, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13199 { 10580 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC2565_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
13200 { 10580 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0__Mem64_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
13201 { 10580 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC256X5_0, Feature_HasVLX, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13202 { 10580 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC5125_0, Feature_HasAVX512, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13203 { 10580 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem64_RC128X5_0, Feature_HasVLX, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13204 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13205 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13206 { 10591 /* vgetexppd */, X86::VGETEXPPDr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13207 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13208 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13209 { 10591 /* vgetexppd */, X86::VGETEXPPDm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13210 { 10591 /* vgetexppd */, X86::VGETEXPPDrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13211 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
13212 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
13213 { 10591 /* vgetexppd */, X86::VGETEXPPDmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
13214 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13215 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13216 { 10591 /* vgetexppd */, X86::VGETEXPPDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13217 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13218 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13219 { 10591 /* vgetexppd */, X86::VGETEXPPDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13220 { 10591 /* vgetexppd */, X86::VGETEXPPDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13221 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13222 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13223 { 10591 /* vgetexppd */, X86::VGETEXPPDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13224 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13225 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13226 { 10591 /* vgetexppd */, X86::VGETEXPPDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13227 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13228 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13229 { 10591 /* vgetexppd */, X86::VGETEXPPDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13230 { 10591 /* vgetexppd */, X86::VGETEXPPDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13231 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13232 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13233 { 10591 /* vgetexppd */, X86::VGETEXPPDmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13234 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13235 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13236 { 10601 /* vgetexpps */, X86::VGETEXPPSr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13237 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13238 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13239 { 10601 /* vgetexpps */, X86::VGETEXPPSm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13240 { 10601 /* vgetexpps */, X86::VGETEXPPSrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13241 { 10601 /* vgetexpps */, X86::VGETEXPPSmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
13242 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
13243 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
13244 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13245 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13246 { 10601 /* vgetexpps */, X86::VGETEXPPSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13247 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13248 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13249 { 10601 /* vgetexpps */, X86::VGETEXPPSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13250 { 10601 /* vgetexpps */, X86::VGETEXPPSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13251 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13252 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13253 { 10601 /* vgetexpps */, X86::VGETEXPPSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13254 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13255 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13256 { 10601 /* vgetexpps */, X86::VGETEXPPSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13257 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13258 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13259 { 10601 /* vgetexpps */, X86::VGETEXPPSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13260 { 10601 /* vgetexpps */, X86::VGETEXPPSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13261 { 10601 /* vgetexpps */, X86::VGETEXPPSmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13262 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13263 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13264 { 10611 /* vgetexpsd */, X86::VGETEXPSDr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13265 { 10611 /* vgetexpsd */, X86::VGETEXPSDm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13266 { 10611 /* vgetexpsd */, X86::VGETEXPSDrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13267 { 10611 /* vgetexpsd */, X86::VGETEXPSDrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13268 { 10611 /* vgetexpsd */, X86::VGETEXPSDmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13269 { 10611 /* vgetexpsd */, X86::VGETEXPSDrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13270 { 10611 /* vgetexpsd */, X86::VGETEXPSDrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13271 { 10611 /* vgetexpsd */, X86::VGETEXPSDmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13272 { 10611 /* vgetexpsd */, X86::VGETEXPSDrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13273 { 10621 /* vgetexpss */, X86::VGETEXPSSr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13274 { 10621 /* vgetexpss */, X86::VGETEXPSSm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13275 { 10621 /* vgetexpss */, X86::VGETEXPSSrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13276 { 10621 /* vgetexpss */, X86::VGETEXPSSrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13277 { 10621 /* vgetexpss */, X86::VGETEXPSSmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13278 { 10621 /* vgetexpss */, X86::VGETEXPSSrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13279 { 10621 /* vgetexpss */, X86::VGETEXPSSrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13280 { 10621 /* vgetexpss */, X86::VGETEXPSSmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13281 { 10621 /* vgetexpss */, X86::VGETEXPSSrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13282 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
13283 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
13284 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
13285 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
13286 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
13287 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
13288 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13289 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
13290 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
13291 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
13292 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13293 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13294 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13295 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13296 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13297 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13298 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13299 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13300 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13301 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13302 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13303 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13304 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13305 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13306 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13307 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13308 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13309 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13310 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13311 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13312 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
13313 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
13314 { 10642 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
13315 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
13316 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
13317 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
13318 { 10642 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13319 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
13320 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
13321 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
13322 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13323 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13324 { 10642 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13325 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13326 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13327 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13328 { 10642 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13329 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13330 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13331 { 10642 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13332 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13333 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13334 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13335 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13336 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13337 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13338 { 10642 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13339 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13340 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13341 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13342 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13343 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13344 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13345 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13346 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13347 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13348 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13349 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13350 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13351 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13352 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13353 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13354 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13355 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13356 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13357 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13358 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13359 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13360 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13361 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13362 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13363 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13364 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13365 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13366 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13367 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13368 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13369 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13370 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13371 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13372 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13373 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13374 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13375 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13376 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13377 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13378 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13379 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13380 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13381 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13382 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13383 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13384 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13385 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13386 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13387 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13388 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13389 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13390 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13391 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13392 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13393 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13394 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13395 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13396 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13397 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13398 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13399 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13400 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13401 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13402 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13403 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13404 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13405 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13406 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13407 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13408 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13409 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13410 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13411 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13412 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13413 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13414 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13415 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13416 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13417 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13418 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13419 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13420 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13421 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13422 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13423 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13424 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13425 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13426 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13427 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13428 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13429 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13430 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13431 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512|Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13432 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13433 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13434 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13435 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13436 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13437 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512|Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13438 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13439 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13440 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13441 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13442 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13443 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512|Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13444 { 10719 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13445 { 10719 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13446 { 10719 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13447 { 10719 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13448 { 10727 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13449 { 10727 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13450 { 10727 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13451 { 10727 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13452 { 10735 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13453 { 10735 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13454 { 10735 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13455 { 10735 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13456 { 10743 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13457 { 10743 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13458 { 10743 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13459 { 10743 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13460 { 10751 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
13461 { 10751 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
13462 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13463 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13464 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13465 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13466 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13467 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13468 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13469 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13470 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13471 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13472 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13473 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13474 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13475 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13476 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13477 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13478 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13479 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13480 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13481 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13482 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13483 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13484 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13485 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13486 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13487 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13488 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13489 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13490 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13491 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13492 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13493 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13494 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13495 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13496 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13497 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13498 { 10815 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
13499 { 10815 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
13500 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13501 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13502 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13503 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13504 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13505 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13506 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13507 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13508 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13509 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13510 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13511 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13512 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13513 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13514 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13515 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13516 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13517 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13518 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13519 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13520 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13521 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13522 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13523 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13524 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13525 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13526 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13527 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13528 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13529 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13530 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13531 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13532 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13533 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13534 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13535 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13536 { 10879 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13537 { 10879 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13538 { 10879 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13539 { 10879 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13540 { 10889 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13541 { 10889 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13542 { 10896 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
13543 { 10905 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
13544 { 10905 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
13545 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
13546 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
13547 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13548 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13549 { 10928 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
13550 { 10928 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
13551 { 10928 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13552 { 10928 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13553 { 10939 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13554 { 10939 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13555 { 10939 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13556 { 10939 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13557 { 10939 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13558 { 10939 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13559 { 10939 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13560 { 10939 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13561 { 10939 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13562 { 10939 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13563 { 10939 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13564 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13565 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13566 { 10939 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13567 { 10939 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13568 { 10939 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13569 { 10939 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13570 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13571 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13572 { 10939 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13573 { 10939 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13574 { 10939 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13575 { 10939 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13576 { 10939 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13577 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13578 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13579 { 10939 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13580 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13581 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13582 { 10939 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13583 { 10939 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13584 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13585 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13586 { 10939 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13587 { 10946 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13588 { 10946 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13589 { 10946 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13590 { 10946 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13591 { 10946 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13592 { 10946 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13593 { 10946 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13594 { 10946 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13595 { 10946 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13596 { 10946 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13597 { 10946 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13598 { 10946 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13599 { 10946 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13600 { 10946 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13601 { 10946 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13602 { 10946 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13603 { 10946 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13604 { 10946 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13605 { 10946 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13606 { 10946 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13607 { 10946 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13608 { 10946 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13609 { 10946 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13610 { 10946 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13611 { 10946 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13612 { 10946 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13613 { 10946 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13614 { 10946 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13615 { 10946 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13616 { 10946 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13617 { 10946 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618 { 10946 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13619 { 10946 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13620 { 10946 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13621 { 10953 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13622 { 10953 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13623 { 10953 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13624 { 10953 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13625 { 10953 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13626 { 10953 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13627 { 10953 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13628 { 10953 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13629 { 10953 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13630 { 10953 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13631 { 10953 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13632 { 10960 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13633 { 10960 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13634 { 10960 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13635 { 10960 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13636 { 10960 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13637 { 10960 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13638 { 10960 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13639 { 10960 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13640 { 10960 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13641 { 10960 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13642 { 10960 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13643 { 10967 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, { }, },
13644 { 10974 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
13645 { 10982 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, { }, },
13646 { 10989 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13647 { 10989 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13648 { 10989 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13649 { 10989 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13650 { 10989 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13651 { 10989 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13652 { 10989 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13653 { 10989 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13654 { 10989 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13655 { 10989 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13656 { 10989 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13657 { 10989 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13658 { 10989 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13659 { 10989 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13660 { 10989 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13661 { 10989 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13662 { 10989 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13663 { 10989 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13664 { 10989 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13665 { 10989 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13666 { 10989 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13667 { 10989 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13668 { 10989 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13669 { 10989 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13670 { 10989 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13671 { 10989 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13672 { 10989 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13673 { 10989 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13674 { 10989 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13675 { 10989 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13676 { 10989 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13677 { 10989 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13678 { 10989 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13679 { 10989 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13680 { 10996 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13681 { 10996 /* vminps */, X86::VMINPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13682 { 10996 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13683 { 10996 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13684 { 10996 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13685 { 10996 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13686 { 10996 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13687 { 10996 /* vminps */, X86::VMINPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13688 { 10996 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13689 { 10996 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13690 { 10996 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13691 { 10996 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13692 { 10996 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13693 { 10996 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13694 { 10996 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13695 { 10996 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13696 { 10996 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13697 { 10996 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13698 { 10996 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13699 { 10996 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13700 { 10996 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13701 { 10996 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13702 { 10996 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13703 { 10996 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13704 { 10996 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13705 { 10996 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13706 { 10996 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13707 { 10996 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13708 { 10996 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13709 { 10996 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13710 { 10996 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13711 { 10996 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13712 { 10996 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13713 { 10996 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13714 { 11003 /* vminsd */, X86::VMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13715 { 11003 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13716 { 11003 /* vminsd */, X86::VMINSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13717 { 11003 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13718 { 11003 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13719 { 11003 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13720 { 11003 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13721 { 11003 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13722 { 11003 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13723 { 11003 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13724 { 11003 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13725 { 11010 /* vminss */, X86::VMINSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13726 { 11010 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13727 { 11010 /* vminss */, X86::VMINSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13728 { 11010 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13729 { 11010 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13730 { 11010 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13731 { 11010 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13732 { 11010 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13733 { 11010 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13734 { 11010 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13735 { 11010 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13736 { 11017 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, { }, },
13737 { 11026 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
13738 { 11026 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
13739 { 11033 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, { }, },
13740 { 11041 /* vmovapd */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13741 { 11041 /* vmovapd */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13742 { 11041 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13743 { 11041 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13744 { 11041 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13745 { 11041 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13746 { 11041 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13747 { 11041 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
13748 { 11041 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13749 { 11041 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
13750 { 11041 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13751 { 11041 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
13752 { 11041 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13753 { 11041 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13754 { 11041 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13755 { 11041 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13756 { 11041 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13757 { 11041 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13758 { 11041 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13759 { 11041 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13760 { 11041 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13761 { 11041 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13762 { 11041 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13763 { 11041 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13764 { 11041 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13765 { 11041 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13766 { 11041 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13767 { 11041 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13768 { 11041 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13769 { 11041 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13770 { 11041 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13771 { 11041 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13772 { 11049 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13773 { 11049 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13774 { 11049 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13775 { 11049 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13776 { 11049 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13777 { 11049 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13778 { 11049 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13779 { 11049 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13780 { 11049 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13781 { 11059 /* vmovaps */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13782 { 11059 /* vmovaps */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13783 { 11059 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13784 { 11059 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13785 { 11059 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13786 { 11059 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13787 { 11059 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13788 { 11059 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
13789 { 11059 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13790 { 11059 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
13791 { 11059 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13792 { 11059 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
13793 { 11059 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13794 { 11059 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13795 { 11059 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13796 { 11059 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13797 { 11059 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13798 { 11059 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13799 { 11059 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13800 { 11059 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13801 { 11059 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13802 { 11059 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13803 { 11059 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13804 { 11059 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13805 { 11059 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13806 { 11059 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13807 { 11059 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13808 { 11059 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13809 { 11059 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13810 { 11059 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13811 { 11059 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13812 { 11059 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13813 { 11067 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13814 { 11067 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13815 { 11067 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13816 { 11067 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13817 { 11067 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13818 { 11067 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13819 { 11067 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13820 { 11067 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13821 { 11067 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13822 { 11077 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
13823 { 11077 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
13824 { 11077 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
13825 { 11077 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
13826 { 11077 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
13827 { 11077 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
13828 { 11077 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
13829 { 11077 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
13830 { 11077 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
13831 { 11077 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
13832 { 11083 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13833 { 11083 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13834 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13835 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13836 { 11083 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13837 { 11083 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13838 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13839 { 11083 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13840 { 11083 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
13841 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
13842 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13843 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13844 { 11083 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13845 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13846 { 11083 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13847 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13848 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13849 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13850 { 11083 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13851 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13852 { 11083 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13853 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13854 { 11092 /* vmovdqa */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13855 { 11092 /* vmovdqa */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13856 { 11092 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13857 { 11092 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13858 { 11092 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13859 { 11092 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13860 { 11092 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13861 { 11092 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13862 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13863 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
13864 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13865 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
13866 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13867 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
13868 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13869 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13870 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13871 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13872 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13873 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13874 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13875 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13876 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13877 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13878 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13879 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13880 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13881 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13882 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13883 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13884 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13885 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13886 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13887 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13888 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13889 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13890 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13891 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13892 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13893 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13894 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13895 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13896 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
13897 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13898 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
13899 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13900 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
13901 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13902 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13903 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13904 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13905 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13906 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13907 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13908 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13909 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13910 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13911 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13912 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13913 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13914 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13915 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13916 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13917 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13918 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13919 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13920 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13921 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13922 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13923 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13924 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13925 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13926 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13927 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13928 { 11144 /* vmovdqu */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13929 { 11144 /* vmovdqu */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13930 { 11144 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13931 { 11144 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13932 { 11144 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13933 { 11144 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13934 { 11144 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13935 { 11144 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13936 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13937 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
13938 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13939 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
13940 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
13941 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
13942 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13943 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13944 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
13945 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13946 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13947 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13948 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13949 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13950 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13951 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13952 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13953 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13954 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13955 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13956 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13957 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13958 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13959 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13960 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13961 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13962 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
13963 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13964 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13965 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13966 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13967 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13968 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13969 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13970 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
13971 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13972 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
13973 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13974 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
13975 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
13976 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
13977 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
13978 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13979 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13980 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13981 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13982 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13983 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13984 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13985 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13986 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13987 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13988 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13989 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13990 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13991 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13992 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13993 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
13994 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
13995 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
13996 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13997 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13998 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13999 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14000 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14001 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14002 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14003 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14004 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14005 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14006 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14007 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
14008 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14009 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14010 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14011 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14012 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14013 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14014 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14015 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14016 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14017 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14018 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14019 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14020 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14021 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14022 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14023 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14024 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14025 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14026 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14027 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14028 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14029 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14030 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14031 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14032 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14033 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14034 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14035 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14036 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14037 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14038 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14039 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
14040 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
14041 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14042 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14043 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
14044 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14045 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14046 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14047 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14048 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14049 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14050 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14051 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14052 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14053 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14054 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14055 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14056 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14057 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14058 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14059 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14060 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14061 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
14062 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14063 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14064 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14065 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14066 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14067 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14068 { 11238 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14069 { 11238 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14070 { 11247 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14071 { 11247 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
14072 { 11247 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14073 { 11247 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14074 { 11255 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14075 { 11255 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
14076 { 11255 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14077 { 11255 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14078 { 11263 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14079 { 11263 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14080 { 11272 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14081 { 11272 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
14082 { 11272 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14083 { 11272 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14084 { 11280 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14085 { 11280 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
14086 { 11280 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14087 { 11280 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14088 { 11288 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
14089 { 11288 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
14090 { 11298 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
14091 { 11298 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
14092 { 11308 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14093 { 11308 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14094 { 11308 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14095 { 11308 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14096 { 11308 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
14097 { 11317 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14098 { 11317 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14099 { 11317 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14100 { 11317 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14101 { 11317 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14102 { 11327 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14103 { 11327 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14104 { 11327 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14105 { 11327 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14106 { 11327 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
14107 { 11336 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14108 { 11336 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14109 { 11336 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14110 { 11336 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14111 { 11336 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
14112 { 11345 /* vmovq */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14113 { 11345 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14114 { 11345 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
14115 { 11345 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14116 { 11345 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
14117 { 11345 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
14118 { 11345 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_In64BitMode, { MCK_FR32X, MCK_GR64 }, },
14119 { 11345 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
14120 { 11345 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512|Feature_In64BitMode, { MCK_FR32X, MCK_Mem64 }, },
14121 { 11345 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14122 { 11345 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
14123 { 11351 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
14124 { 11359 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14125 { 11359 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
14126 { 11359 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14127 { 11359 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
14128 { 11359 /* vmovsd */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_FR32, MCK_VR128L }, },
14129 { 11359 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14130 { 11359 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14131 { 11359 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14132 { 11359 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14133 { 11359 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14134 { 11359 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14135 { 11359 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14136 { 11366 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14137 { 11366 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14138 { 11366 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14139 { 11375 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14140 { 11375 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14141 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14142 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14143 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14144 { 11375 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14145 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14146 { 11375 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14147 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14148 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14149 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14150 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14151 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14152 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14153 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14154 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14155 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14156 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14157 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14158 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14159 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14160 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14161 { 11385 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14162 { 11385 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14163 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14164 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14165 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14166 { 11385 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14167 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14168 { 11385 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14169 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14170 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14171 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14172 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14173 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14174 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14175 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14176 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14177 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14178 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14179 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14180 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14181 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14182 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14183 { 11395 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
14184 { 11395 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
14185 { 11395 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
14186 { 11395 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
14187 { 11395 /* vmovss */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_FR32, MCK_VR128L }, },
14188 { 11395 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14189 { 11395 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14190 { 11395 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14191 { 11395 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14192 { 11395 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14193 { 11395 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14194 { 11395 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14195 { 11402 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14196 { 11402 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14197 { 11402 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14198 { 11411 /* vmovupd */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14199 { 11411 /* vmovupd */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14200 { 11411 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14201 { 11411 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14202 { 11411 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14203 { 11411 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14204 { 11411 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14205 { 11411 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14206 { 11411 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14207 { 11411 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14208 { 11411 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14209 { 11411 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
14210 { 11411 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14211 { 11411 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14212 { 11411 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14213 { 11411 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14214 { 11411 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14215 { 11411 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14216 { 11411 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14217 { 11411 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14218 { 11411 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14219 { 11411 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14220 { 11411 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14221 { 11411 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14222 { 11411 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14223 { 11411 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14224 { 11411 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14225 { 11411 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14226 { 11411 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14227 { 11411 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14228 { 11411 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14229 { 11411 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14230 { 11419 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14231 { 11419 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14232 { 11419 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14233 { 11419 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14234 { 11419 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14235 { 11419 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14236 { 11419 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14237 { 11419 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14238 { 11419 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14239 { 11429 /* vmovups */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14240 { 11429 /* vmovups */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14241 { 11429 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14242 { 11429 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14243 { 11429 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14244 { 11429 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14245 { 11429 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14246 { 11429 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
14247 { 11429 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14248 { 11429 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
14249 { 11429 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14250 { 11429 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
14251 { 11429 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14252 { 11429 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14253 { 11429 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14254 { 11429 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14255 { 11429 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14256 { 11429 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14257 { 11429 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14258 { 11429 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14259 { 11429 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14260 { 11429 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14261 { 11429 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14262 { 11429 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14263 { 11429 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14264 { 11429 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14265 { 11429 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14266 { 11429 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14267 { 11429 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14268 { 11429 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14269 { 11429 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14270 { 11429 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14271 { 11437 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14272 { 11437 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14273 { 11437 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14274 { 11437 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14275 { 11437 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14276 { 11437 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14277 { 11437 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14278 { 11437 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14279 { 11437 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14280 { 11447 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14281 { 11447 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14282 { 11447 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14283 { 11447 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14284 { 11456 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14285 { 11464 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14286 { 11479 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
14287 { 11479 /* vmreadl */, X86::VMREAD32mr, Convert__Mem325_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
14288 { 11487 /* vmreadq */, X86::VMREAD64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
14289 { 11487 /* vmreadq */, X86::VMREAD64mr, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
14290 { 11495 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, { }, },
14291 { 11504 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
14292 { 11504 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
14293 { 11510 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
14294 { 11510 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
14295 { 11517 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14296 { 11517 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14297 { 11517 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14298 { 11517 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14299 { 11517 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14300 { 11517 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14301 { 11517 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14302 { 11517 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14303 { 11517 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14304 { 11517 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14305 { 11517 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14306 { 11517 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14307 { 11517 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14308 { 11517 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14309 { 11517 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14310 { 11517 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14311 { 11517 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14312 { 11517 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14313 { 11517 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14314 { 11517 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14315 { 11517 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14316 { 11517 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14317 { 11517 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14318 { 11517 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14319 { 11517 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14320 { 11517 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14321 { 11517 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14322 { 11517 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14323 { 11517 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14324 { 11517 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14325 { 11517 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14326 { 11517 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14327 { 11517 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14328 { 11517 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14329 { 11524 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14330 { 11524 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14331 { 11524 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14332 { 11524 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14333 { 11524 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14334 { 11524 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14335 { 11524 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14336 { 11524 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14337 { 11524 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14338 { 11524 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14339 { 11524 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14340 { 11524 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14341 { 11524 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14342 { 11524 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14343 { 11524 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14344 { 11524 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14345 { 11524 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14346 { 11524 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14347 { 11524 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14348 { 11524 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14349 { 11524 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14350 { 11524 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14351 { 11524 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14352 { 11524 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14353 { 11524 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14354 { 11524 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14355 { 11524 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14356 { 11524 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14357 { 11524 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14358 { 11524 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14359 { 11524 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14360 { 11524 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14361 { 11524 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14362 { 11524 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14363 { 11531 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14364 { 11531 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14365 { 11531 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14366 { 11531 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14367 { 11531 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14368 { 11531 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14369 { 11531 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14370 { 11531 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14371 { 11531 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14372 { 11531 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14373 { 11531 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14374 { 11538 /* vmulss */, X86::VMULSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14375 { 11538 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14376 { 11538 /* vmulss */, X86::VMULSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14377 { 11538 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14378 { 11538 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14379 { 11538 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14380 { 11538 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14381 { 11538 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14382 { 11538 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14383 { 11538 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14384 { 11538 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14385 { 11553 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
14386 { 11553 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
14387 { 11562 /* vmwriteq */, X86::VMWRITE64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
14388 { 11562 /* vmwriteq */, X86::VMWRITE64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
14389 { 11571 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, { }, },
14390 { 11578 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14391 { 11584 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14392 { 11584 /* vorpd */, X86::VORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14393 { 11584 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14394 { 11584 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14395 { 11584 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14396 { 11584 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14397 { 11584 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14398 { 11584 /* vorpd */, X86::VORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14399 { 11584 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14400 { 11584 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14401 { 11584 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14402 { 11584 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14403 { 11584 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14404 { 11584 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14405 { 11584 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14406 { 11584 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14407 { 11584 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14408 { 11584 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14409 { 11584 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14410 { 11584 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14411 { 11584 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14412 { 11584 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14413 { 11584 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14414 { 11584 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14415 { 11584 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14416 { 11584 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14417 { 11584 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14418 { 11584 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14419 { 11584 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14420 { 11584 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14421 { 11584 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14422 { 11590 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14423 { 11590 /* vorps */, X86::VORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14424 { 11590 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14425 { 11590 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14426 { 11590 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14427 { 11590 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14428 { 11590 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14429 { 11590 /* vorps */, X86::VORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14430 { 11590 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14431 { 11590 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14432 { 11590 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14433 { 11590 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14434 { 11590 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14435 { 11590 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14436 { 11590 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14437 { 11590 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14438 { 11590 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14439 { 11590 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14440 { 11590 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14441 { 11590 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14442 { 11590 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14443 { 11590 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14444 { 11590 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14445 { 11590 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14446 { 11590 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14447 { 11590 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14448 { 11590 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14449 { 11590 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14450 { 11590 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14451 { 11590 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14452 { 11590 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14453 { 11596 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14454 { 11596 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14455 { 11596 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14456 { 11596 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14457 { 11596 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
14458 { 11596 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14459 { 11596 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14460 { 11596 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14461 { 11596 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14462 { 11596 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
14463 { 11596 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14464 { 11596 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14465 { 11596 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14466 { 11596 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14467 { 11596 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14468 { 11596 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14469 { 11596 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14470 { 11596 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14471 { 11596 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14472 { 11596 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14473 { 11596 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14474 { 11596 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14475 { 11603 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14476 { 11603 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14477 { 11603 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14478 { 11603 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14479 { 11603 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14480 { 11603 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14481 { 11603 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14482 { 11603 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14483 { 11603 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14484 { 11603 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14485 { 11603 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14486 { 11603 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
14487 { 11603 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
14488 { 11603 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14489 { 11603 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14490 { 11603 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14491 { 11603 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14492 { 11603 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14493 { 11603 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14494 { 11603 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14495 { 11603 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14496 { 11603 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14497 { 11603 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14498 { 11603 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14499 { 11603 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14500 { 11603 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14501 { 11603 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14502 { 11603 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14503 { 11603 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14504 { 11603 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14505 { 11603 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14506 { 11610 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14507 { 11610 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14508 { 11610 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
14509 { 11610 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14510 { 11610 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14511 { 11610 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
14512 { 11610 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
14513 { 11610 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
14514 { 11610 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14515 { 11610 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14516 { 11610 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14517 { 11610 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14518 { 11610 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14519 { 11610 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14520 { 11610 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14521 { 11610 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14522 { 11610 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14523 { 11610 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14524 { 11610 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14525 { 11610 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14526 { 11610 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14527 { 11610 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14528 { 11610 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14529 { 11610 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14530 { 11610 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14531 { 11610 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14532 { 11610 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14533 { 11617 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14534 { 11617 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14535 { 11617 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
14536 { 11617 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
14537 { 11617 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
14538 { 11617 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14539 { 11617 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
14540 { 11617 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14541 { 11617 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
14542 { 11617 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
14543 { 11617 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14544 { 11617 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14545 { 11617 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14546 { 11617 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14547 { 11617 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14548 { 11617 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14549 { 11617 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14550 { 11617 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14551 { 11617 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14552 { 11617 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14553 { 11617 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14554 { 11617 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14555 { 11624 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14556 { 11624 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14557 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14558 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14559 { 11624 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14560 { 11624 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14561 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14562 { 11624 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14563 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14564 { 11624 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14565 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14566 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14567 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14568 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14569 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14570 { 11624 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14571 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14572 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14573 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14574 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14575 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14576 { 11624 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14577 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14578 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14579 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14580 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14581 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14582 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14583 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14584 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14585 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14586 { 11634 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14587 { 11634 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14588 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14589 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14590 { 11634 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14591 { 11634 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14592 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14593 { 11634 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14594 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14595 { 11634 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14596 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14597 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14598 { 11634 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14599 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14600 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14601 { 11634 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14602 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14603 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14604 { 11634 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14605 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14606 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14607 { 11634 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14608 { 11644 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14609 { 11644 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14610 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14611 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14612 { 11644 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14613 { 11644 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14614 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14615 { 11644 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14616 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14617 { 11644 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14618 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14619 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14620 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14621 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14622 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14623 { 11644 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14624 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14625 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14626 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14627 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14628 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14629 { 11644 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14630 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14631 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14632 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14633 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14634 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14635 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14636 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14637 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14638 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14639 { 11654 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14640 { 11654 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14641 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14642 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14643 { 11654 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14644 { 11654 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14645 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14646 { 11654 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14647 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14648 { 11654 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14649 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14650 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14651 { 11654 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14652 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14653 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14654 { 11654 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14655 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14656 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14657 { 11654 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14658 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14659 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14660 { 11654 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14661 { 11664 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14662 { 11664 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14663 { 11664 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14664 { 11664 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14665 { 11664 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14666 { 11664 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14667 { 11664 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14668 { 11664 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14669 { 11664 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14670 { 11664 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14671 { 11664 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14672 { 11664 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14673 { 11664 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14674 { 11664 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14675 { 11664 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14676 { 11664 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14677 { 11664 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14678 { 11664 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14679 { 11664 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14680 { 11664 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14681 { 11664 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14682 { 11664 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14683 { 11671 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14684 { 11671 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14685 { 11671 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14686 { 11671 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14687 { 11671 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14688 { 11671 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14689 { 11671 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14690 { 11671 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14691 { 11671 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14692 { 11671 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14693 { 11671 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14694 { 11671 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14695 { 11671 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14696 { 11671 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14697 { 11671 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14698 { 11671 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14699 { 11671 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14700 { 11671 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14701 { 11671 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14702 { 11671 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14703 { 11671 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14704 { 11671 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14705 { 11671 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14706 { 11671 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14707 { 11671 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14708 { 11671 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14709 { 11671 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14710 { 11671 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14711 { 11671 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14712 { 11671 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14713 { 11671 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14714 { 11678 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14715 { 11678 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14716 { 11678 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14717 { 11678 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14718 { 11678 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14719 { 11678 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14720 { 11678 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14721 { 11678 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14722 { 11678 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14723 { 11678 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14724 { 11678 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14725 { 11678 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14726 { 11678 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14727 { 11678 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14728 { 11678 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14729 { 11678 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14730 { 11678 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14731 { 11678 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14732 { 11678 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14733 { 11678 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14734 { 11678 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14735 { 11678 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14736 { 11678 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14737 { 11678 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14738 { 11678 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14739 { 11678 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14740 { 11678 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14741 { 11678 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14742 { 11678 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14743 { 11678 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14744 { 11678 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14745 { 11685 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14746 { 11685 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14747 { 11685 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14748 { 11685 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14749 { 11685 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14750 { 11685 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14751 { 11685 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14752 { 11685 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14753 { 11685 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14754 { 11685 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14755 { 11685 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14756 { 11685 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14757 { 11685 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14758 { 11685 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14759 { 11685 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14760 { 11685 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14761 { 11685 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14762 { 11685 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14763 { 11685 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14764 { 11685 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14765 { 11685 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14766 { 11685 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14767 { 11693 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14768 { 11693 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14769 { 11693 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14770 { 11693 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14771 { 11693 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14772 { 11693 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14773 { 11693 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14774 { 11693 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14775 { 11693 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14776 { 11693 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14777 { 11693 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14778 { 11693 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14779 { 11693 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14780 { 11693 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14781 { 11693 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14782 { 11693 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14783 { 11693 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14784 { 11693 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14785 { 11693 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14786 { 11693 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14787 { 11693 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14788 { 11693 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14789 { 11701 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14790 { 11701 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14791 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14792 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14793 { 11701 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14794 { 11701 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14795 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14796 { 11701 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14797 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14798 { 11701 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14799 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14800 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14801 { 11701 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14802 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14803 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14804 { 11701 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14805 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14806 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14807 { 11701 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14808 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14809 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14810 { 11701 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14811 { 11710 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14812 { 11710 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14813 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14814 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14815 { 11710 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14816 { 11710 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14817 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14818 { 11710 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14819 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14820 { 11710 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14821 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14822 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14823 { 11710 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14824 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14825 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14826 { 11710 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14827 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14828 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14829 { 11710 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14830 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14831 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14832 { 11710 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14833 { 11719 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14834 { 11719 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14835 { 11719 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14836 { 11719 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14837 { 11719 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14838 { 11719 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14839 { 11719 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14840 { 11719 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14841 { 11719 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14842 { 11719 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14843 { 11719 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14844 { 11719 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14845 { 11719 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14846 { 11719 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14847 { 11719 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14848 { 11719 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14849 { 11719 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14850 { 11719 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14851 { 11719 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14852 { 11719 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14853 { 11719 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14854 { 11719 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14855 { 11726 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14856 { 11726 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14857 { 11726 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14858 { 11726 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14859 { 11726 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14860 { 11726 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14861 { 11726 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14862 { 11726 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14863 { 11726 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14864 { 11726 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14865 { 11726 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14866 { 11726 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14867 { 11726 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14868 { 11726 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14869 { 11726 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14870 { 11726 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14871 { 11726 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14872 { 11726 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14873 { 11726 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14874 { 11726 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14875 { 11726 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14876 { 11726 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14877 { 11735 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14878 { 11735 /* vpand */, X86::VPANDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14879 { 11735 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14880 { 11735 /* vpand */, X86::VPANDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14881 { 11741 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14882 { 11741 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14883 { 11741 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14884 { 11741 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14885 { 11741 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14886 { 11741 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14887 { 11741 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14888 { 11741 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14889 { 11741 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14890 { 11741 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14891 { 11741 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14892 { 11741 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14893 { 11741 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14894 { 11741 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14895 { 11741 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14896 { 11741 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14897 { 11741 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14898 { 11741 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14899 { 11741 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14900 { 11741 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14901 { 11741 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14902 { 11741 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14903 { 11741 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14904 { 11741 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14905 { 11741 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14906 { 11741 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14907 { 11741 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14908 { 11748 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14909 { 11748 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14910 { 11748 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14911 { 11748 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14912 { 11755 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14913 { 11755 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14914 { 11755 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14915 { 11755 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14916 { 11755 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14917 { 11755 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14918 { 11755 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14919 { 11755 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14920 { 11755 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14921 { 11755 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14922 { 11755 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14923 { 11755 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14924 { 11755 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14925 { 11755 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14926 { 11755 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14927 { 11755 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14928 { 11755 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14929 { 11755 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14930 { 11755 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14931 { 11755 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14932 { 11755 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14933 { 11755 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14934 { 11755 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14935 { 11755 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14936 { 11755 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14937 { 11755 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14938 { 11755 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14939 { 11763 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14940 { 11763 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14941 { 11763 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14942 { 11763 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14943 { 11763 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14944 { 11763 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14945 { 11763 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14946 { 11763 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14947 { 11763 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14948 { 11763 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14949 { 11763 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14950 { 11763 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14951 { 11763 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14952 { 11763 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14953 { 11763 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14954 { 11763 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14955 { 11763 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14956 { 11763 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14957 { 11763 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14958 { 11763 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14959 { 11763 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14960 { 11763 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14961 { 11763 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14962 { 11763 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14963 { 11763 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14964 { 11763 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14965 { 11763 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14966 { 11771 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14967 { 11771 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14968 { 11771 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14969 { 11771 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14970 { 11771 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14971 { 11771 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14972 { 11771 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14973 { 11771 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14974 { 11771 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14975 { 11771 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14976 { 11771 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14977 { 11771 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14978 { 11771 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14979 { 11771 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14980 { 11771 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14981 { 11771 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14982 { 11771 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14983 { 11771 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14984 { 11771 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14985 { 11771 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14986 { 11771 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14987 { 11771 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14988 { 11771 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14989 { 11771 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14990 { 11771 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14991 { 11771 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14992 { 11771 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14993 { 11778 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14994 { 11778 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14995 { 11778 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14996 { 11778 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14997 { 11778 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14998 { 11778 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14999 { 11778 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15000 { 11778 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15001 { 11778 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15002 { 11778 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15003 { 11778 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15004 { 11778 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15005 { 11778 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15006 { 11778 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15007 { 11778 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15008 { 11778 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15009 { 11778 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15010 { 11778 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15011 { 11778 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15012 { 11778 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15013 { 11778 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15014 { 11778 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15015 { 11785 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15016 { 11785 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15017 { 11785 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15018 { 11785 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15019 { 11785 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15020 { 11785 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15021 { 11785 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15022 { 11785 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15023 { 11785 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15024 { 11785 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15025 { 11785 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15026 { 11785 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15027 { 11785 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15028 { 11785 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15029 { 11785 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15030 { 11785 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15031 { 11785 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15032 { 11785 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15033 { 11785 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15034 { 11785 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15035 { 11785 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15036 { 11785 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15037 { 11792 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15038 { 11792 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15039 { 11792 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15040 { 11792 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15041 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15042 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15043 { 11801 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15044 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15045 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15046 { 11801 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15047 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15048 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15049 { 11801 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15050 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15051 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15052 { 11801 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15053 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15054 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15055 { 11801 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15056 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15057 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15058 { 11801 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15059 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15060 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15061 { 11811 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15062 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15063 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15064 { 11811 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15065 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15066 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15067 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15068 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15069 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15070 { 11811 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15071 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15072 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15073 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15074 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15075 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15076 { 11811 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15077 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15078 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15079 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15080 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15081 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15082 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15083 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15084 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15085 { 11821 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15086 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15087 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15088 { 11821 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15089 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15090 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15091 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15092 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15093 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15094 { 11821 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15095 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15096 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15097 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15098 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15099 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15100 { 11821 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15101 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15102 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15103 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15104 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15105 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15106 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15107 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15108 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15109 { 11831 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15110 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15111 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15112 { 11831 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15113 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15114 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15115 { 11831 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15116 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15117 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15118 { 11831 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15119 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15120 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15121 { 11831 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15122 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15123 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15124 { 11831 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15125 { 11841 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15126 { 11841 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15127 { 11841 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15128 { 11841 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15129 { 11851 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15130 { 11851 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15131 { 11851 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15132 { 11851 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15133 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15134 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15135 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X }, },
15136 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X }, },
15137 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512 }, },
15138 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15139 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
15140 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512 }, },
15141 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_FR32 }, },
15142 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR256 }, },
15143 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_1__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_FR32X }, },
15144 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_1__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_VR256X }, },
15145 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_1__Mem85_0, Feature_HasBWI, { MCK_Mem8, MCK_VR512 }, },
15146 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15147 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15148 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15149 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15150 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15151 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15152 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15153 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15154 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem85_0, Feature_HasBWI, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15155 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15156 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15157 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15158 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15159 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15160 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15161 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_1__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15162 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_1__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15163 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_1__Reg1_3__Mem85_0, Feature_HasBWI, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15164 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15165 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15166 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_FR32X }, },
15167 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_VR256X }, },
15168 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VR512 }, },
15169 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15170 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
15171 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
15172 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
15173 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
15174 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_1__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_FR32X }, },
15175 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_1__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_VR256X }, },
15176 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512 }, },
15177 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15178 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15179 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15180 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15181 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15182 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15183 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15184 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15185 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15186 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15187 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15188 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15189 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15190 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15191 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15192 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15193 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15194 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15195 { 11886 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
15196 { 11886 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
15197 { 11886 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VK1, MCK_VR512 }, },
15198 { 11902 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
15199 { 11902 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
15200 { 11902 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VK1, MCK_VR512 }, },
15201 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15202 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15203 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_FR32X }, },
15204 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_VR256X }, },
15205 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_VR512 }, },
15206 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15207 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
15208 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
15209 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
15210 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
15211 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_1__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
15212 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_1__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_VR256X }, },
15213 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
15214 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15215 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15216 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15217 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15218 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15219 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15220 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15221 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15222 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15223 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15224 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15225 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15226 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15227 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15228 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15229 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15230 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15231 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15232 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15233 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15234 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X }, },
15235 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X }, },
15236 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512 }, },
15237 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15238 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
15239 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512 }, },
15240 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
15241 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR256 }, },
15242 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_1__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_FR32X }, },
15243 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_1__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_VR256X }, },
15244 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_1__Mem165_0, Feature_HasBWI, { MCK_Mem16, MCK_VR512 }, },
15245 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15246 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15247 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15248 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15249 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15250 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15251 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15252 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15253 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasBWI, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15254 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15255 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15256 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15257 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15258 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15259 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15260 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15261 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15262 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasBWI, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15263 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15264 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15265 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15266 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15267 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15268 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15269 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15270 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15271 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15272 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15273 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15274 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15275 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15276 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15277 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15278 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15279 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15280 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15281 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15282 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15283 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15284 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15285 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15286 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15287 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15288 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15289 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15290 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15291 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15292 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15293 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15294 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15295 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15296 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15297 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15298 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15299 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15300 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15301 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15302 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15303 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15304 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15305 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15306 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15307 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15308 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15309 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15310 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15311 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15312 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15313 { 12011 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15314 { 12011 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15315 { 12011 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15316 { 12011 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15317 { 12011 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15318 { 12011 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15319 { 12018 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15320 { 12018 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15321 { 12018 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15322 { 12018 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15323 { 12018 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15324 { 12018 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15325 { 12018 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15326 { 12018 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15327 { 12018 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15328 { 12018 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15329 { 12018 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15330 { 12018 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15331 { 12018 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15332 { 12018 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15333 { 12018 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15334 { 12018 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15335 { 12018 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15336 { 12018 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15337 { 12018 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15338 { 12018 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15339 { 12018 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15340 { 12018 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15341 { 12018 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15342 { 12018 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15343 { 12018 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15344 { 12018 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15345 { 12018 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15346 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15347 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15348 { 12018 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15349 { 12018 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15350 { 12018 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15351 { 12018 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15352 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15353 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15354 { 12018 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15355 { 12018 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15356 { 12018 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15357 { 12018 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15358 { 12018 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15359 { 12018 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15360 { 12018 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15361 { 12018 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15362 { 12018 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15363 { 12018 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15364 { 12018 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15365 { 12018 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15366 { 12018 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15367 { 12018 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15368 { 12018 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15369 { 12018 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15370 { 12018 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15371 { 12018 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15372 { 12018 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15373 { 12018 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15374 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15375 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15376 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15377 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15378 { 12018 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15379 { 12018 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15380 { 12018 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15381 { 12018 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15382 { 12018 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15383 { 12018 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15384 { 12018 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15385 { 12018 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15386 { 12018 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15387 { 12018 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15388 { 12018 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15389 { 12018 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15390 { 12018 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15391 { 12018 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15392 { 12018 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15393 { 12018 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15394 { 12018 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15395 { 12018 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15396 { 12018 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15397 { 12018 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15398 { 12018 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15399 { 12018 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15400 { 12018 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15401 { 12018 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15402 { 12018 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15403 { 12018 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15404 { 12018 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15405 { 12018 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15406 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15407 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15408 { 12018 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15409 { 12018 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15410 { 12018 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15411 { 12018 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15412 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15413 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15414 { 12018 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15415 { 12018 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15416 { 12018 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15417 { 12018 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15418 { 12018 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15419 { 12018 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15420 { 12018 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15421 { 12018 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15422 { 12018 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15423 { 12018 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15424 { 12018 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15425 { 12018 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15426 { 12018 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15427 { 12018 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15428 { 12018 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15429 { 12018 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15430 { 12018 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15431 { 12018 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15432 { 12018 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15433 { 12018 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15434 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15435 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15436 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15437 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15438 { 12018 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15439 { 12024 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15440 { 12024 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15441 { 12024 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15442 { 12024 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15443 { 12024 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15444 { 12024 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15445 { 12024 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15446 { 12024 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15447 { 12024 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15448 { 12024 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15449 { 12024 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15450 { 12024 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15451 { 12031 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15452 { 12031 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15453 { 12031 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15454 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15455 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15456 { 12031 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15457 { 12031 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15458 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15459 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15460 { 12031 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15461 { 12031 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15462 { 12031 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15463 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15464 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15465 { 12031 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15466 { 12031 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15467 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15468 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15469 { 12038 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15470 { 12038 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15471 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15472 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15473 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15474 { 12038 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15475 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15476 { 12038 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15477 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15478 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15479 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15480 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15481 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15482 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15483 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15484 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15485 { 12047 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15486 { 12047 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15487 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15488 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15489 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15490 { 12047 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15491 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15492 { 12047 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15493 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15494 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15495 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15496 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15497 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15498 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15499 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15500 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15501 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15502 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15503 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15504 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15505 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15506 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15507 { 12056 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15508 { 12056 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15509 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15510 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15511 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15512 { 12056 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15513 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15514 { 12056 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15515 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15516 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15517 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15518 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15519 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15520 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15521 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15522 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15523 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15524 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15525 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15526 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15527 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15528 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15529 { 12065 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15530 { 12065 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15531 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15532 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15533 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15534 { 12065 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15535 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15536 { 12065 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15537 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15538 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15539 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15540 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15541 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15542 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15543 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15544 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15545 { 12074 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15546 { 12074 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15547 { 12085 /* vpcmpestrm */, X86::VPCMPESTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15548 { 12085 /* vpcmpestrm */, X86::VPCMPESTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15549 { 12096 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15550 { 12096 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15551 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15552 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15553 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15554 { 12096 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15555 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15556 { 12096 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15557 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15558 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15559 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15560 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15561 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15562 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15563 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15564 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15565 { 12105 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15566 { 12105 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15567 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15568 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15569 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15570 { 12105 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15571 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15572 { 12105 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15573 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15574 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15575 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15576 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15577 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15578 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15579 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15580 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15581 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15582 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15583 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15584 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15585 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15586 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15587 { 12114 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15588 { 12114 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15589 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15590 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15591 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15592 { 12114 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15593 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15594 { 12114 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15595 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15596 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15597 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15598 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15599 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15600 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15601 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15602 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15603 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15604 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15605 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15606 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15607 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15608 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15609 { 12123 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15610 { 12123 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15611 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15612 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15613 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15614 { 12123 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15615 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15616 { 12123 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15617 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15618 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15619 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15620 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15621 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15622 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15623 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15624 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15625 { 12132 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15626 { 12132 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15627 { 12143 /* vpcmpistrm */, X86::VPCMPISTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15628 { 12143 /* vpcmpistrm */, X86::VPCMPISTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15629 { 12154 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15630 { 12154 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15631 { 12154 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15632 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15633 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15634 { 12154 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15635 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15636 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15637 { 12154 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15638 { 12154 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15639 { 12154 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15640 { 12154 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15641 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15642 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15643 { 12154 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15644 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15645 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15646 { 12154 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15647 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15648 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15649 { 12161 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15650 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15651 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15652 { 12161 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15653 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15654 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15655 { 12161 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15656 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15657 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15658 { 12161 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15659 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15660 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15661 { 12169 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15662 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15663 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15664 { 12169 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15665 { 12169 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15666 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15667 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15668 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15669 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15670 { 12169 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15671 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15672 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15673 { 12169 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15674 { 12169 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15675 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15676 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15677 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15678 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15679 { 12177 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15680 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15681 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15682 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15683 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15684 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15685 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15686 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15687 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15688 { 12177 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15689 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15690 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15691 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15692 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15693 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15694 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15695 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15696 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15697 { 12185 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15698 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15699 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15700 { 12185 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15701 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15702 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15703 { 12185 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15704 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15705 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15706 { 12185 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15707 { 12193 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15708 { 12193 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15709 { 12193 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15710 { 12193 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15711 { 12193 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15712 { 12193 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15713 { 12193 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15714 { 12193 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15715 { 12193 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15716 { 12193 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15717 { 12193 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15718 { 12193 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15719 { 12200 /* vpcom */, X86::VPCOMBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15720 { 12200 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15721 { 12200 /* vpcom */, X86::VPCOMDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15722 { 12200 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15723 { 12200 /* vpcom */, X86::VPCOMQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15724 { 12200 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15725 { 12200 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15726 { 12200 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15727 { 12200 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15728 { 12200 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15729 { 12200 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15730 { 12200 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15731 { 12200 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15732 { 12200 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15733 { 12200 /* vpcom */, X86::VPCOMWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15734 { 12200 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15735 { 12206 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15736 { 12206 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15737 { 12213 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15738 { 12213 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15739 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15740 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
15741 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
15742 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
15743 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
15744 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_Mem512 }, },
15745 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15746 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15747 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15748 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15749 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15750 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15751 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15752 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15753 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15754 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15755 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
15756 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
15757 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
15758 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
15759 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
15760 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15761 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15762 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15763 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15764 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15765 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15766 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15767 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15768 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15769 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15770 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
15771 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
15772 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
15773 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
15774 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
15775 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15776 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15777 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15778 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15779 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15780 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15781 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15782 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15783 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15784 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15785 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
15786 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
15787 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
15788 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
15789 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_Mem512 }, },
15790 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15791 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15792 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15793 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15794 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15795 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15796 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15797 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15798 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15799 { 12268 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15800 { 12268 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15801 { 12275 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15802 { 12275 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15803 { 12283 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15804 { 12283 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15805 { 12291 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15806 { 12291 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15807 { 12299 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15808 { 12299 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15809 { 12307 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15810 { 12307 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15811 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15812 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
15813 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
15814 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
15815 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
15816 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
15817 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
15818 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
15819 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
15820 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15821 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15822 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15823 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15824 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15825 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15826 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15827 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15828 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15829 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15830 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15831 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15832 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15833 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15834 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15835 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15836 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15837 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15838 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
15839 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
15840 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
15841 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
15842 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
15843 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
15844 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
15845 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
15846 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
15847 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15848 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15849 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15850 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15851 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15852 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15853 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15854 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15855 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15856 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15857 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15858 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15859 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15860 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15861 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15862 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15863 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15864 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15865 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15866 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15867 { 12338 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15868 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15869 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15870 { 12338 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15871 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15872 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15873 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15874 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15875 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15876 { 12338 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15877 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15878 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15879 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15880 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15881 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15882 { 12338 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15883 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15884 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15885 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15886 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15887 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15888 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15889 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15890 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15891 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15892 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15893 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15894 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15895 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15896 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15897 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15898 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15899 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15900 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15901 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15902 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15903 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15904 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15905 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15906 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15907 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15908 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15909 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15910 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15911 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15912 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15913 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15914 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15915 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15916 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15917 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15918 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15919 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15920 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15921 { 12357 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15922 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15923 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15924 { 12357 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15925 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15926 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15927 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15928 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15929 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15930 { 12357 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15931 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15932 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15933 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15934 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15935 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15936 { 12357 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15937 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15938 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15939 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15940 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15941 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15942 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15943 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15944 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15945 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15946 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15947 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15948 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15949 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15950 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15951 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15952 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15953 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15954 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15955 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15956 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15957 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15958 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15959 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15960 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15961 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15962 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15963 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15964 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15965 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15966 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15967 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15968 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15969 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVNNI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15970 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15971 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15972 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVNNI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15973 { 12376 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15974 { 12376 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15975 { 12387 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15976 { 12387 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15977 { 12398 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15978 { 12398 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15979 { 12398 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15980 { 12398 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15981 { 12398 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15982 { 12398 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15983 { 12398 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15984 { 12398 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15985 { 12398 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15986 { 12398 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15987 { 12398 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15988 { 12398 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15989 { 12398 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15990 { 12398 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15991 { 12398 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15992 { 12398 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15993 { 12398 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15994 { 12398 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15995 { 12405 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15996 { 12405 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15997 { 12405 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15998 { 12405 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15999 { 12405 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16000 { 12405 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16001 { 12405 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16002 { 12405 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16003 { 12405 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16004 { 12405 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16005 { 12405 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16006 { 12405 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16007 { 12405 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16008 { 12405 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16009 { 12405 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16010 { 12405 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16011 { 12405 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16012 { 12405 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16013 { 12405 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16014 { 12405 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16015 { 12412 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16016 { 12412 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16017 { 12412 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16018 { 12412 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16019 { 12412 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16020 { 12412 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16021 { 12412 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16022 { 12412 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16023 { 12412 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16024 { 12412 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16025 { 12412 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16026 { 12412 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16027 { 12412 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16028 { 12412 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16029 { 12412 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16030 { 12412 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16031 { 12412 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16032 { 12412 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16033 { 12421 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16034 { 12421 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16035 { 12421 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16036 { 12421 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16037 { 12421 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16038 { 12421 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16039 { 12421 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16040 { 12421 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16041 { 12421 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16042 { 12421 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16043 { 12421 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16044 { 12421 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16045 { 12421 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16046 { 12421 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16047 { 12421 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16048 { 12421 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16049 { 12421 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16050 { 12421 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16051 { 12421 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16052 { 12421 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16053 { 12421 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16054 { 12421 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16055 { 12421 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16056 { 12421 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16057 { 12421 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16058 { 12421 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16059 { 12421 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16060 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16061 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16062 { 12430 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16063 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16064 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16065 { 12430 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16066 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16067 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16068 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16069 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16070 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16071 { 12430 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16072 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16073 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16074 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16075 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16076 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16077 { 12430 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16078 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16079 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16080 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16081 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16082 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16083 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16084 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16085 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16086 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16087 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16088 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16089 { 12440 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16090 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16091 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16092 { 12440 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16093 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16094 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16095 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16096 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16097 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16098 { 12440 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16099 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16100 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16101 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16102 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16103 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16104 { 12440 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16105 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16106 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16107 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16108 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16109 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16110 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16111 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16112 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16113 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16114 { 12450 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16115 { 12450 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16116 { 12450 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16117 { 12450 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16118 { 12450 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16119 { 12450 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16120 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16121 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16122 { 12450 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16123 { 12450 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16124 { 12450 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16125 { 12450 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16126 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16127 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16128 { 12450 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16129 { 12450 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16130 { 12450 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16131 { 12450 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16132 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16133 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16134 { 12450 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16135 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16136 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16137 { 12450 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16138 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16139 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16140 { 12450 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16141 { 12459 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16142 { 12459 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16143 { 12459 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16144 { 12459 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16145 { 12459 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16146 { 12459 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16147 { 12459 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16148 { 12459 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16149 { 12459 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16150 { 12459 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16151 { 12459 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16152 { 12459 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16153 { 12459 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16154 { 12459 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16155 { 12459 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16156 { 12459 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16157 { 12459 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16158 { 12459 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16159 { 12468 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16160 { 12468 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16161 { 12468 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16162 { 12468 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16163 { 12468 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16164 { 12468 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16165 { 12479 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16166 { 12479 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16167 { 12479 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16168 { 12479 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16169 { 12479 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16170 { 12479 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16171 { 12490 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16172 { 12490 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16173 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16174 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16175 { 12490 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16176 { 12490 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16177 { 12490 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16178 { 12490 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
16179 { 12490 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16180 { 12490 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16181 { 12490 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16182 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
16183 { 12490 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16184 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16185 { 12490 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16186 { 12490 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16187 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16188 { 12490 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16189 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16190 { 12490 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16191 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16192 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16193 { 12490 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16194 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16195 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16196 { 12490 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16197 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16198 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16199 { 12490 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16200 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16201 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16202 { 12490 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16203 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16204 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16205 { 12490 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16206 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16207 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16208 { 12490 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16209 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16210 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16211 { 12490 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16212 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16213 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16214 { 12490 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16215 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16216 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16217 { 12490 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16218 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16219 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16220 { 12490 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16221 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16222 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16223 { 12490 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16224 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16225 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16226 { 12490 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16227 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16228 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16229 { 12490 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16230 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16231 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16232 { 12490 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16233 { 12500 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16234 { 12500 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16235 { 12500 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16236 { 12500 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16237 { 12500 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16238 { 12500 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16239 { 12500 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16240 { 12500 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
16241 { 12500 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16242 { 12500 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16243 { 12500 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16244 { 12500 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
16245 { 12500 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16246 { 12500 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16247 { 12500 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16248 { 12500 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16249 { 12500 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16250 { 12500 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16251 { 12500 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16252 { 12500 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16253 { 12500 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16254 { 12500 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16255 { 12500 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16256 { 12500 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16257 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16258 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16259 { 12500 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16260 { 12500 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16261 { 12500 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16262 { 12500 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16263 { 12500 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16264 { 12500 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16265 { 12500 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16266 { 12500 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16267 { 12500 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16268 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16269 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16270 { 12500 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16271 { 12500 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16272 { 12500 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16273 { 12500 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16274 { 12500 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16275 { 12500 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16276 { 12500 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16277 { 12500 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16278 { 12500 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16279 { 12500 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16280 { 12500 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16281 { 12500 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16282 { 12500 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16283 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16284 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16285 { 12500 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16286 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16287 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16288 { 12500 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16289 { 12500 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16290 { 12500 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16291 { 12500 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16292 { 12500 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16293 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16294 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16295 { 12510 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16296 { 12510 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16297 { 12510 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16298 { 12510 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16299 { 12510 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16300 { 12510 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16301 { 12510 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16302 { 12510 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16303 { 12510 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16304 { 12510 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16305 { 12510 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16306 { 12510 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16307 { 12510 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16308 { 12510 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16309 { 12510 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16310 { 12510 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16311 { 12510 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16312 { 12510 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16313 { 12510 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16314 { 12510 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16315 { 12510 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16316 { 12510 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16317 { 12510 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16318 { 12510 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16319 { 12510 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16320 { 12510 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16321 { 12510 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16322 { 12510 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16323 { 12510 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16324 { 12510 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16325 { 12510 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16326 { 12510 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16327 { 12510 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16328 { 12510 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16329 { 12510 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16330 { 12510 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16331 { 12510 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16332 { 12510 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16333 { 12518 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16334 { 12518 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16335 { 12518 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16336 { 12518 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16337 { 12518 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16338 { 12518 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16339 { 12518 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16340 { 12518 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16341 { 12518 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16342 { 12518 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16343 { 12518 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16344 { 12518 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16345 { 12518 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16346 { 12518 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16347 { 12518 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16348 { 12518 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16349 { 12518 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16350 { 12518 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16351 { 12518 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16352 { 12518 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16353 { 12526 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16354 { 12526 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16355 { 12526 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16356 { 12526 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16357 { 12526 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16358 { 12526 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16359 { 12526 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16360 { 12526 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16361 { 12526 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16362 { 12526 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16363 { 12526 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16364 { 12526 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16365 { 12526 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16366 { 12526 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16367 { 12526 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16368 { 12526 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16369 { 12526 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16370 { 12526 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16371 { 12526 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16372 { 12526 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16373 { 12526 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16374 { 12526 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16375 { 12526 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16376 { 12526 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16377 { 12526 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16378 { 12526 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16379 { 12526 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16380 { 12526 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16381 { 12526 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16382 { 12526 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16383 { 12526 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16384 { 12526 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16385 { 12526 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16386 { 12526 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16387 { 12526 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16388 { 12526 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16389 { 12526 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16390 { 12526 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16391 { 12533 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16392 { 12533 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16393 { 12533 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16394 { 12533 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16395 { 12533 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16396 { 12533 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16397 { 12533 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16398 { 12533 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16399 { 12533 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16400 { 12533 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16401 { 12533 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16402 { 12533 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16403 { 12533 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16404 { 12533 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16405 { 12533 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16406 { 12533 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16407 { 12533 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16408 { 12533 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16409 { 12542 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16410 { 12542 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16411 { 12542 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16412 { 12542 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16413 { 12542 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16414 { 12542 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16415 { 12542 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16416 { 12542 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16417 { 12542 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16418 { 12542 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16419 { 12542 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16420 { 12542 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16421 { 12542 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16422 { 12542 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16423 { 12542 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16424 { 12542 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16425 { 12542 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16426 { 12542 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16427 { 12542 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16428 { 12542 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16429 { 12542 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16430 { 12542 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16431 { 12542 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16432 { 12542 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16433 { 12542 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16434 { 12542 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16435 { 12542 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16436 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16437 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16438 { 12551 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16439 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16440 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16441 { 12551 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16442 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16443 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16444 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16445 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16446 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16447 { 12551 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16448 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16449 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16450 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16451 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16452 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16453 { 12551 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16454 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16455 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16456 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16457 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16458 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16459 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16460 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16461 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16462 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16463 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16464 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16465 { 12561 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16466 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16467 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16468 { 12561 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16469 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16470 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16471 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16472 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16473 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16474 { 12561 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16475 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16476 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16477 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16478 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16479 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16480 { 12561 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16481 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16482 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16483 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16484 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16485 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16486 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16487 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16488 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16489 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16490 { 12571 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16491 { 12571 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16492 { 12571 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16493 { 12571 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16494 { 12571 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16495 { 12571 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16496 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16497 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16498 { 12571 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16499 { 12571 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16500 { 12571 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16501 { 12571 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16502 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16503 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16504 { 12571 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16505 { 12571 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16506 { 12571 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16507 { 12571 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16508 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16509 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16510 { 12571 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16511 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16512 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16513 { 12571 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16514 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16515 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16516 { 12571 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16517 { 12580 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16518 { 12580 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16519 { 12580 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16520 { 12580 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16521 { 12580 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16522 { 12580 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16523 { 12580 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16524 { 12580 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16525 { 12580 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16526 { 12580 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16527 { 12580 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16528 { 12580 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16529 { 12580 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16530 { 12580 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16531 { 12580 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16532 { 12580 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16533 { 12580 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16534 { 12580 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16535 { 12589 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16536 { 12589 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16537 { 12589 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16538 { 12589 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16539 { 12589 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16540 { 12589 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16541 { 12589 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16542 { 12589 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16543 { 12589 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16544 { 12589 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16545 { 12589 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16546 { 12589 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16547 { 12589 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16548 { 12589 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16549 { 12589 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16550 { 12589 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16551 { 12589 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16552 { 12589 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16553 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
16554 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
16555 { 12596 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
16556 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
16557 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
16558 { 12596 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512 }, },
16559 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16560 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16561 { 12596 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16562 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16563 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16564 { 12596 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16565 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16566 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16567 { 12596 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16568 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16569 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16570 { 12596 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16571 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
16572 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
16573 { 12606 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
16574 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
16575 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
16576 { 12606 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
16577 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16578 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16579 { 12606 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16580 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16581 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16582 { 12606 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16583 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16584 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16585 { 12606 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16586 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16587 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16588 { 12606 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16589 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
16590 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
16591 { 12616 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
16592 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
16593 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
16594 { 12616 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
16595 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16596 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16597 { 12616 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16598 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16599 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16600 { 12616 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16601 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16602 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16603 { 12616 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16604 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16605 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16606 { 12616 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16607 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
16608 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
16609 { 12626 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
16610 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
16611 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
16612 { 12626 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512 }, },
16613 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16614 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16615 { 12626 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16616 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16617 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16618 { 12626 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16619 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16620 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16621 { 12626 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16622 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16623 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16624 { 12626 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16625 { 12636 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
16626 { 12636 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
16627 { 12636 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16628 { 12636 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem8 }, },
16629 { 12644 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
16630 { 12644 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
16631 { 12644 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
16632 { 12644 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
16633 { 12652 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
16634 { 12652 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
16635 { 12652 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, },
16636 { 12652 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
16637 { 12660 /* vpextrw */, X86::VPEXTRWri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
16638 { 12660 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
16639 { 12660 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16640 { 12660 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem16 }, },
16641 { 12668 /* vpextrw.s */, X86::VPEXTRWZrr_REV, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16642 { 12678 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16643 { 12678 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
16644 { 12678 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0, Feature_HasVLX, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16645 { 12678 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0, Feature_HasVLX, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16646 { 12678 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0, Feature_HasAVX512, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16647 { 12689 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16648 { 12689 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC1285_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
16649 { 12689 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0, Feature_HasVLX, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16650 { 12689 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC128X5_0, Feature_HasVLX, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16651 { 12689 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC256X5_0, Feature_HasAVX512, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16652 { 12700 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC2565_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
16653 { 12700 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0__Mem64_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
16654 { 12700 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC256X5_0, Feature_HasVLX, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16655 { 12700 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC5125_0, Feature_HasAVX512, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16656 { 12700 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem64_RC128X5_0, Feature_HasVLX, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16657 { 12711 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16658 { 12711 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
16659 { 12711 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0, Feature_HasVLX, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16660 { 12711 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0, Feature_HasVLX, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16661 { 12711 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0, Feature_HasAVX512, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16662 { 12722 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16663 { 12722 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16664 { 12731 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16665 { 12731 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16666 { 12740 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16667 { 12740 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16668 { 12749 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16669 { 12749 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16670 { 12749 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16671 { 12749 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16672 { 12757 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16673 { 12757 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16674 { 12766 /* vphaddsw */, X86::VPHADDSWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16675 { 12766 /* vphaddsw */, X86::VPHADDSWrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16676 { 12766 /* vphaddsw */, X86::VPHADDSWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16677 { 12766 /* vphaddsw */, X86::VPHADDSWrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16678 { 12775 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16679 { 12775 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16680 { 12785 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16681 { 12785 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16682 { 12795 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16683 { 12795 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16684 { 12805 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16685 { 12805 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16686 { 12815 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16687 { 12815 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16688 { 12825 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16689 { 12825 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16690 { 12835 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16691 { 12835 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16692 { 12835 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16693 { 12835 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16694 { 12843 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16695 { 12843 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16696 { 12852 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16697 { 12852 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16698 { 12861 /* vphminposuw */, X86::VPHMINPOSUWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16699 { 12861 /* vphminposuw */, X86::VPHMINPOSUWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16700 { 12873 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16701 { 12873 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16702 { 12882 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16703 { 12882 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16704 { 12882 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16705 { 12882 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16706 { 12890 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16707 { 12890 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16708 { 12899 /* vphsubsw */, X86::VPHSUBSWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16709 { 12899 /* vphsubsw */, X86::VPHSUBSWrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16710 { 12899 /* vphsubsw */, X86::VPHSUBSWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16711 { 12899 /* vphsubsw */, X86::VPHSUBSWrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16712 { 12908 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16713 { 12908 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16714 { 12908 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16715 { 12908 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16716 { 12916 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16717 { 12916 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16718 { 12925 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
16719 { 12925 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
16720 { 12925 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
16721 { 12925 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32X, MCK_FR32X }, },
16722 { 12933 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
16723 { 12933 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, },
16724 { 12933 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
16725 { 12933 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
16726 { 12941 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
16727 { 12941 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32X, MCK_FR32X }, },
16728 { 12941 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
16729 { 12941 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
16730 { 12949 /* vpinsrw */, X86::VPINSRWrri, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
16731 { 12949 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
16732 { 12949 /* vpinsrw */, X86::VPINSRWrmi, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
16733 { 12949 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32X, MCK_FR32X }, },
16734 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
16735 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
16736 { 12957 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
16737 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
16738 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
16739 { 12957 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
16740 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16741 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16742 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16743 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16744 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16745 { 12957 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16746 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16747 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16748 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16749 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16750 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16751 { 12957 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16752 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16753 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16754 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16755 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16756 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16757 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16758 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16759 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16760 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16761 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
16762 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
16763 { 12966 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
16764 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
16765 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
16766 { 12966 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
16767 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16768 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16769 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16770 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16771 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16772 { 12966 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16773 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16774 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16775 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16776 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16777 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16778 { 12966 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16779 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16780 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16781 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16782 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16783 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16784 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16785 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16786 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16787 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16788 { 12975 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16789 { 12975 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16790 { 12984 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16791 { 12984 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16792 { 12994 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16793 { 12994 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16794 { 13004 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16795 { 13004 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16796 { 13014 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16797 { 13014 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16798 { 13025 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16799 { 13025 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16800 { 13036 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16801 { 13036 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16802 { 13046 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16803 { 13046 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16804 { 13056 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16805 { 13056 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16806 { 13065 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16807 { 13065 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16808 { 13074 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16809 { 13074 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16810 { 13085 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16811 { 13085 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16812 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16813 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16814 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16815 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16816 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16817 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16818 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16819 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16820 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16821 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16822 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16823 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16824 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16825 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16826 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16827 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16828 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16829 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16830 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16831 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16832 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16833 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16834 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16835 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16836 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16837 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16838 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16839 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16840 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16841 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16842 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16843 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16844 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16845 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16846 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16847 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16848 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16849 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16850 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16851 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16852 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16853 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16854 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16855 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16856 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16857 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16858 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16859 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16860 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16861 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16862 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16863 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16864 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16865 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16866 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16867 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16868 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16869 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16870 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16871 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16872 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16873 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16874 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16875 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16876 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16877 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16878 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16879 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16880 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16881 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16882 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16883 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16884 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16885 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16886 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16887 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16888 { 13130 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16889 { 13130 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16890 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16891 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16892 { 13130 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16893 { 13130 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16894 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16895 { 13130 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16896 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16897 { 13130 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16898 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16899 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16900 { 13130 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16901 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16902 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16903 { 13130 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16904 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16905 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16906 { 13130 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16907 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16908 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16909 { 13130 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16910 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
16911 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
16912 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16913 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16914 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
16915 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
16916 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16917 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16918 { 13161 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16919 { 13161 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16920 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16921 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16922 { 13161 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16923 { 13161 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16924 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16925 { 13161 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16926 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16927 { 13161 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16928 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16929 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16930 { 13161 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16931 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16932 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16933 { 13161 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16934 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16935 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16936 { 13161 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16937 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16938 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16939 { 13161 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16940 { 13169 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16941 { 13169 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16942 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16943 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16944 { 13169 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16945 { 13169 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16946 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16947 { 13169 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16948 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16949 { 13169 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16950 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16951 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16952 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16953 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16954 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16955 { 13169 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16956 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16957 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16958 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16959 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16960 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16961 { 13169 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16962 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16963 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16964 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16965 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16966 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16967 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16968 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16969 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16970 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16971 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16972 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16973 { 13177 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16974 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16975 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16976 { 13177 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16977 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16978 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16979 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16980 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16981 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16982 { 13177 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16983 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16984 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16985 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16986 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16987 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16988 { 13177 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16989 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16990 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16991 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16992 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16993 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16994 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16995 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16996 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16997 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16998 { 13185 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16999 { 13185 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17000 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17001 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17002 { 13185 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17003 { 13185 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17004 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17005 { 13185 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17006 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17007 { 13185 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17008 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17009 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17010 { 13185 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17011 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17012 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17013 { 13185 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17014 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17015 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17016 { 13185 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17017 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17018 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17019 { 13185 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17020 { 13193 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17021 { 13193 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17022 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17023 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17024 { 13193 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17025 { 13193 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17026 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17027 { 13193 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17028 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17029 { 13193 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17030 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17031 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17032 { 13193 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17033 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17034 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17035 { 13193 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17036 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17037 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17038 { 13193 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17039 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17040 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17041 { 13193 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17042 { 13201 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17043 { 13201 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17044 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17045 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17046 { 13201 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17047 { 13201 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17048 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17049 { 13201 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17050 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17051 { 13201 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17052 { 13201 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17053 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17054 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17055 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17056 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17057 { 13201 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17058 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17059 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17060 { 13201 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17061 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17062 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17063 { 13201 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17064 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17065 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17066 { 13201 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17067 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17068 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17069 { 13201 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17070 { 13201 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17071 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17072 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17073 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17074 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17075 { 13209 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17076 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17077 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17078 { 13209 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17079 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17080 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17081 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17082 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17083 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17084 { 13209 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17085 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17086 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17087 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17088 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17089 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17090 { 13209 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17091 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17092 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17093 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17094 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17095 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17096 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17097 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17098 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17099 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17100 { 13217 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17101 { 13217 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17102 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17103 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17104 { 13217 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17105 { 13217 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17106 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17107 { 13217 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17108 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17109 { 13217 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17110 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17111 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17112 { 13217 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17113 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17114 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17115 { 13217 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17116 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17117 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17118 { 13217 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17119 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17120 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17121 { 13217 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17122 { 13225 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17123 { 13225 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17124 { 13225 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17125 { 13225 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17126 { 13225 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17127 { 13225 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17128 { 13225 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17129 { 13225 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17130 { 13225 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17131 { 13225 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17132 { 13225 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17133 { 13225 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17134 { 13225 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17135 { 13225 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17136 { 13225 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17137 { 13225 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17138 { 13225 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17139 { 13225 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17140 { 13225 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17141 { 13225 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17142 { 13225 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17143 { 13225 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17144 { 13233 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17145 { 13233 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17146 { 13233 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17147 { 13233 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17148 { 13233 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17149 { 13233 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17150 { 13233 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17151 { 13233 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17152 { 13233 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17153 { 13233 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17154 { 13233 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17155 { 13233 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17156 { 13233 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17157 { 13233 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17158 { 13233 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17159 { 13233 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17160 { 13233 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17161 { 13233 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17162 { 13233 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17163 { 13233 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17164 { 13233 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17165 { 13233 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17166 { 13233 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17167 { 13233 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17168 { 13233 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17169 { 13233 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17170 { 13233 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17171 { 13233 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17172 { 13233 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17173 { 13233 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17174 { 13233 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17175 { 13241 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17176 { 13241 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17177 { 13241 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17178 { 13241 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17179 { 13241 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17180 { 13241 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17181 { 13241 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17182 { 13241 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17183 { 13241 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17184 { 13241 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17185 { 13241 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17186 { 13241 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17187 { 13241 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17188 { 13241 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17189 { 13241 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17190 { 13241 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17191 { 13241 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17192 { 13241 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17193 { 13241 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17194 { 13241 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17195 { 13241 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17196 { 13241 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17197 { 13241 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17198 { 13241 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17199 { 13241 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17200 { 13241 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17201 { 13241 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17202 { 13249 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17203 { 13249 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17204 { 13249 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17205 { 13249 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17206 { 13249 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17207 { 13249 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17208 { 13249 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17209 { 13249 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17210 { 13249 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17211 { 13249 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17212 { 13249 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17213 { 13249 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17214 { 13249 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17215 { 13249 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17216 { 13249 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17217 { 13249 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17218 { 13249 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17219 { 13249 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17220 { 13249 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17221 { 13249 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17222 { 13249 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17223 { 13249 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17224 { 13257 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17225 { 13257 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17226 { 13257 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17227 { 13257 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17228 { 13257 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17229 { 13257 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17230 { 13257 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17231 { 13257 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17232 { 13257 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17233 { 13257 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17234 { 13257 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17235 { 13257 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17236 { 13257 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17237 { 13257 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17238 { 13257 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17239 { 13257 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17240 { 13257 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17241 { 13257 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17242 { 13257 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17243 { 13257 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17244 { 13257 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17245 { 13257 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17246 { 13265 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17247 { 13265 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17248 { 13265 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17249 { 13265 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17250 { 13265 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17251 { 13265 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17252 { 13265 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17253 { 13265 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17254 { 13265 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17255 { 13265 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17256 { 13265 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17257 { 13265 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17258 { 13265 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17259 { 13265 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17260 { 13265 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17261 { 13265 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17262 { 13265 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17263 { 13265 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17264 { 13265 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17265 { 13265 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17266 { 13265 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17267 { 13265 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17268 { 13265 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17269 { 13265 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17270 { 13265 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17271 { 13265 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17272 { 13265 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17273 { 13265 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17274 { 13265 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17275 { 13265 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17276 { 13265 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17277 { 13273 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17278 { 13273 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17279 { 13273 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17280 { 13273 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17281 { 13273 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17282 { 13273 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17283 { 13273 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17284 { 13273 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17285 { 13273 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17286 { 13273 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17287 { 13273 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17288 { 13273 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17289 { 13273 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17290 { 13273 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17291 { 13273 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17292 { 13273 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17293 { 13273 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17294 { 13273 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17295 { 13273 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17296 { 13273 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17297 { 13273 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17298 { 13273 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17299 { 13273 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17300 { 13273 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17301 { 13273 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17302 { 13273 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17303 { 13273 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17304 { 13281 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17305 { 13281 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17306 { 13281 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17307 { 13281 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17308 { 13281 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17309 { 13281 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17310 { 13281 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17311 { 13281 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17312 { 13281 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17313 { 13281 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17314 { 13281 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17315 { 13281 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17316 { 13281 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17317 { 13281 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17318 { 13281 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17319 { 13281 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17320 { 13281 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17321 { 13281 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17322 { 13281 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17323 { 13281 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17324 { 13281 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17325 { 13281 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17326 { 13289 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
17327 { 13289 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
17328 { 13289 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
17329 { 13298 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
17330 { 13298 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
17331 { 13298 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
17332 { 13307 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17333 { 13307 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
17334 { 13307 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17335 { 13307 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
17336 { 13307 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17337 { 13307 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
17338 { 13307 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17339 { 13307 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17340 { 13307 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17341 { 13307 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17342 { 13307 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17343 { 13307 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17344 { 13307 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17345 { 13307 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17346 { 13307 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17347 { 13315 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17348 { 13315 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
17349 { 13315 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17350 { 13315 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
17351 { 13315 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
17352 { 13315 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
17353 { 13315 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17354 { 13315 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17355 { 13315 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17356 { 13315 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17357 { 13315 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17358 { 13315 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17359 { 13315 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17360 { 13315 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17361 { 13315 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17362 { 13323 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
17363 { 13323 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
17364 { 13323 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
17365 { 13332 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
17366 { 13332 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
17367 { 13332 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
17368 { 13341 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
17369 { 13341 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
17370 { 13341 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
17371 { 13350 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
17372 { 13350 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
17373 { 13350 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
17374 { 13359 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
17375 { 13359 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
17376 { 13369 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
17377 { 13369 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
17378 { 13369 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
17379 { 13378 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17380 { 13378 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
17381 { 13378 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17382 { 13378 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
17383 { 13378 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17384 { 13378 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
17385 { 13378 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17386 { 13378 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17387 { 13378 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17388 { 13378 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17389 { 13378 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17390 { 13378 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17391 { 13378 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17392 { 13378 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17393 { 13378 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17394 { 13386 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17395 { 13386 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
17396 { 13386 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17397 { 13386 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
17398 { 13386 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
17399 { 13386 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
17400 { 13386 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17401 { 13386 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17402 { 13386 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17403 { 13386 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17404 { 13386 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17405 { 13386 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17406 { 13386 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17407 { 13386 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17408 { 13386 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17409 { 13394 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17410 { 13394 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
17411 { 13394 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17412 { 13394 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
17413 { 13394 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17414 { 13394 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
17415 { 13394 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17416 { 13394 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17417 { 13394 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17418 { 13394 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17419 { 13394 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17420 { 13394 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17421 { 13394 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17422 { 13394 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17423 { 13394 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17424 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17425 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
17426 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17427 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
17428 { 13402 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17429 { 13402 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
17430 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17431 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17432 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17433 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17434 { 13402 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17435 { 13402 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17436 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17437 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17438 { 13402 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17439 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17440 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
17441 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17442 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
17443 { 13411 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
17444 { 13411 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
17445 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17446 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17447 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17448 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17449 { 13411 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17450 { 13411 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17451 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17452 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17453 { 13411 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17454 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17455 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
17456 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17457 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
17458 { 13420 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17459 { 13420 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
17460 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17461 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17462 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17463 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17464 { 13420 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17465 { 13420 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17466 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17467 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17468 { 13420 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17469 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17470 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
17471 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17472 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
17473 { 13429 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
17474 { 13429 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
17475 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17476 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17477 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17478 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17479 { 13429 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17480 { 13429 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17481 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17482 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17483 { 13429 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17484 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17485 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
17486 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17487 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
17488 { 13438 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17489 { 13438 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
17490 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17491 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17492 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17493 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17494 { 13438 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17495 { 13438 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17496 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17497 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17498 { 13438 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17499 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
17500 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
17501 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
17502 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
17503 { 13447 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
17504 { 13447 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
17505 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17506 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17507 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17508 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17509 { 13447 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17510 { 13447 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17511 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17512 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17513 { 13447 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17514 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17515 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17516 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17517 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17518 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
17519 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
17520 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17521 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
17522 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17523 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
17524 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17525 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17526 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17527 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17528 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17529 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17530 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17531 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17532 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17533 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17534 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17535 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17536 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17537 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17538 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17539 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17540 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
17541 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
17542 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_1__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
17543 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
17544 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
17545 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
17546 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17547 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17548 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17549 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17550 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17551 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17552 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17553 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17554 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17555 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17556 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17557 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17558 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17559 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17560 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
17561 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
17562 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
17563 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17564 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
17565 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
17566 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17567 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
17568 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17569 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17570 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17571 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17572 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17573 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17574 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17575 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17576 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17577 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17578 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17579 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17580 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17581 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17582 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17583 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17584 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
17585 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17586 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
17587 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
17588 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17589 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
17590 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17591 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17592 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17593 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17594 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17595 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17596 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17597 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17598 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17599 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17600 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17601 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17602 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17603 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17604 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17605 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17606 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
17607 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17608 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
17609 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
17610 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17611 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
17612 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17613 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17614 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17615 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17616 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17617 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17618 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17619 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17620 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17621 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17622 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17623 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17624 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17625 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17626 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17627 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17628 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
17629 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
17630 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17631 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
17632 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17633 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
17634 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17635 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17636 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17637 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17638 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17639 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17640 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17641 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17642 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17643 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17644 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17645 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17646 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17647 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
17648 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17649 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
17650 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17651 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
17652 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17653 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17654 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17655 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17656 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17657 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17658 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17659 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17660 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17661 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17662 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
17663 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17664 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
17665 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
17666 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
17667 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17668 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17669 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17670 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17671 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17672 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17673 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17674 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17675 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17676 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17677 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
17678 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17679 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
17680 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17681 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
17682 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17683 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17684 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17685 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17686 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17687 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17688 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17689 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17690 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17691 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17692 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
17693 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17694 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
17695 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
17696 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
17697 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17698 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17699 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17700 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17701 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17702 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17703 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17704 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17705 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17706 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17707 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
17708 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
17709 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
17710 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
17711 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
17712 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17713 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17714 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17715 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17716 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17717 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17718 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17719 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17720 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17721 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
17722 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
17723 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
17724 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
17725 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
17726 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
17727 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17728 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17729 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17730 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17731 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17732 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17733 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17734 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17735 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17736 { 13576 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
17737 { 13576 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
17738 { 13576 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
17739 { 13585 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
17740 { 13585 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
17741 { 13585 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
17742 { 13585 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
17743 { 13585 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
17744 { 13585 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
17745 { 13585 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17746 { 13585 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17747 { 13585 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17748 { 13585 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17749 { 13585 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17750 { 13585 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17751 { 13585 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17752 { 13585 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17753 { 13585 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17754 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17755 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17756 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17757 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17758 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
17759 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
17760 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17761 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
17762 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17763 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
17764 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17765 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17766 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17767 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17768 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17769 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17770 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17771 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17772 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17773 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17774 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17775 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17776 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17777 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17778 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17779 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17780 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
17781 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
17782 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_1__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
17783 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
17784 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
17785 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
17786 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17787 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17788 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17789 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17790 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17791 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17792 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17793 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17794 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17795 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17796 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17797 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17798 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17799 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17800 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
17801 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
17802 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
17803 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17804 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
17805 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
17806 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17807 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
17808 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17809 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17810 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17811 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17812 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17813 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17814 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17815 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17816 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17817 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17818 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17819 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17820 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17821 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17822 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17823 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17824 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
17825 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17826 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
17827 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
17828 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17829 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
17830 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17831 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17832 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17833 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17834 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17835 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17836 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17837 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17838 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17839 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17840 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17841 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17842 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17843 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17844 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17845 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17846 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
17847 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17848 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
17849 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
17850 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17851 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
17852 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17853 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17854 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17855 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17856 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17857 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17858 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17859 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17860 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17861 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17862 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17863 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17864 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17865 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17866 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
17867 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
17868 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
17869 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
17870 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17871 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
17872 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17873 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
17874 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17875 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17876 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17877 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17878 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17879 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17880 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17881 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17882 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17883 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17884 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17885 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17886 { 13653 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17887 { 13653 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17888 { 13653 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17889 { 13653 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17890 { 13653 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17891 { 13653 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17892 { 13653 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17893 { 13653 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17894 { 13653 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17895 { 13653 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17896 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17897 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17898 { 13653 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17899 { 13653 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17900 { 13653 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17901 { 13653 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17902 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17903 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17904 { 13653 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17905 { 13653 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17906 { 13653 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17907 { 13653 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17908 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17909 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17910 { 13653 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17911 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17912 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17913 { 13653 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17914 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17915 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17916 { 13653 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17917 { 13661 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17918 { 13661 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17919 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17920 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17921 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17922 { 13661 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17923 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17924 { 13661 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17925 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17926 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17927 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17928 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17929 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17930 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17931 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17932 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17933 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17934 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17935 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17936 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17937 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17938 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17939 { 13671 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17940 { 13671 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17941 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17942 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17943 { 13671 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17944 { 13671 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17945 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17946 { 13671 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17947 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17948 { 13671 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17949 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17950 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17951 { 13671 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17952 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17953 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17954 { 13671 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17955 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17956 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17957 { 13671 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17958 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17959 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17960 { 13671 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17961 { 13680 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17962 { 13680 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17963 { 13680 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17964 { 13680 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17965 { 13680 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17966 { 13680 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17967 { 13680 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17968 { 13680 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17969 { 13680 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17970 { 13680 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17971 { 13680 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17972 { 13680 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17973 { 13680 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17974 { 13680 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17975 { 13680 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17976 { 13680 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17977 { 13680 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17978 { 13680 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17979 { 13680 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17980 { 13680 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17981 { 13680 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17982 { 13680 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17983 { 13688 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17984 { 13688 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17985 { 13688 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17986 { 13688 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17987 { 13688 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17988 { 13688 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17989 { 13688 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17990 { 13688 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17991 { 13688 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17992 { 13688 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17993 { 13688 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17994 { 13688 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17995 { 13688 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17996 { 13688 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17997 { 13688 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17998 { 13688 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17999 { 13688 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18000 { 13688 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18001 { 13688 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18002 { 13688 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18003 { 13688 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18004 { 13688 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18005 { 13688 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18006 { 13688 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18007 { 13688 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18008 { 13688 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18009 { 13688 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18010 { 13688 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18011 { 13688 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18012 { 13688 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18013 { 13688 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18014 { 13696 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18015 { 13696 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18016 { 13696 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18017 { 13696 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18018 { 13696 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18019 { 13696 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18020 { 13696 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18021 { 13696 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18022 { 13696 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18023 { 13696 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18024 { 13696 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18025 { 13696 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18026 { 13696 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18027 { 13696 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18028 { 13696 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18029 { 13696 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18030 { 13696 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18031 { 13696 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18032 { 13696 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18033 { 13696 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18034 { 13696 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18035 { 13696 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18036 { 13696 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18037 { 13696 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18038 { 13696 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18039 { 13696 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18040 { 13696 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18041 { 13704 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18042 { 13704 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18043 { 13704 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18044 { 13704 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18045 { 13704 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18046 { 13704 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18047 { 13704 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18048 { 13704 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18049 { 13704 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18050 { 13704 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18051 { 13704 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18052 { 13704 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18053 { 13704 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18054 { 13704 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18055 { 13704 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18056 { 13704 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18057 { 13704 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18058 { 13704 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18059 { 13704 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18060 { 13704 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18061 { 13704 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18062 { 13704 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18063 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18064 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18065 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18066 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18067 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18068 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18069 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18070 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18071 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVBMI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18072 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18073 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18074 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18075 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18076 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18077 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18078 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18079 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18080 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18081 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18082 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18083 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18084 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18085 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18086 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18087 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18088 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18089 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18090 { 13727 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18091 { 13727 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18092 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18093 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18094 { 13727 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18095 { 13727 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18096 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18097 { 13727 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18098 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18099 { 13727 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18100 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18101 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18102 { 13727 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18103 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18104 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18105 { 13727 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18106 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18107 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18108 { 13727 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18109 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18110 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18111 { 13727 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18112 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18113 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18114 { 13727 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18115 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18116 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18117 { 13727 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18118 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18119 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18120 { 13727 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18121 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
18122 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
18123 { 13736 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512 }, },
18124 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
18125 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
18126 { 13736 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_1__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512 }, },
18127 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18128 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18129 { 13736 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18130 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18131 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18132 { 13736 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18133 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18134 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18135 { 13736 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18136 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18137 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18138 { 13736 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18139 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
18140 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
18141 { 13745 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512 }, },
18142 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
18143 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
18144 { 13745 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasVPOPCNTDQ, { MCK_Mem512, MCK_VR512 }, },
18145 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasVPOPCNTDQ, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18146 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18147 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18148 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18149 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18150 { 13745 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18151 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18152 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18153 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasVPOPCNTDQ, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18154 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18155 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18156 { 13745 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18157 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18158 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18159 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVPOPCNTDQ, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18160 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18161 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18162 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasVPOPCNTDQ, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18163 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVPOPCNTDQ, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18164 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18165 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18166 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
18167 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
18168 { 13754 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512 }, },
18169 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
18170 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
18171 { 13754 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasVPOPCNTDQ, { MCK_Mem512, MCK_VR512 }, },
18172 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18173 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18174 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasVPOPCNTDQ, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18175 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18176 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18177 { 13754 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18178 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18179 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18180 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasVPOPCNTDQ, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18181 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18182 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18183 { 13754 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18184 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18185 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18186 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasVPOPCNTDQ, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18187 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18188 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18189 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVPOPCNTDQ, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18190 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18191 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18192 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVPOPCNTDQ, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18193 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
18194 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
18195 { 13763 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512 }, },
18196 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
18197 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
18198 { 13763 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_1__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512 }, },
18199 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18200 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18201 { 13763 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18202 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18203 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18204 { 13763 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18205 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18206 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18207 { 13763 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18208 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18210 { 13763 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18211 { 13772 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18212 { 13772 /* vpor */, X86::VPORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18213 { 13772 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18214 { 13772 /* vpor */, X86::VPORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18215 { 13777 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18216 { 13777 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18217 { 13777 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18218 { 13777 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18219 { 13777 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18220 { 13777 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18221 { 13777 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18222 { 13777 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18223 { 13777 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18224 { 13777 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18225 { 13777 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18226 { 13777 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18227 { 13777 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228 { 13777 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18229 { 13777 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18230 { 13777 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18231 { 13777 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18232 { 13777 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18233 { 13777 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18234 { 13777 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18235 { 13777 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18236 { 13777 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18237 { 13777 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18238 { 13777 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18239 { 13777 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18240 { 13777 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18241 { 13777 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18242 { 13783 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18243 { 13783 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18244 { 13783 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18245 { 13783 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18246 { 13783 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18247 { 13783 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18248 { 13783 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18249 { 13783 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18250 { 13783 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18251 { 13783 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18252 { 13783 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18253 { 13783 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18254 { 13783 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255 { 13783 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18256 { 13783 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18257 { 13783 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18258 { 13783 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18259 { 13783 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18260 { 13783 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261 { 13783 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18262 { 13783 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18263 { 13783 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18264 { 13783 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18265 { 13783 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18266 { 13783 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18267 { 13783 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18268 { 13783 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18269 { 13789 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18270 { 13789 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18271 { 13789 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18272 { 13796 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18273 { 13796 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18274 { 13796 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18275 { 13796 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18276 { 13796 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18277 { 13796 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18278 { 13796 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18279 { 13796 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18280 { 13796 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18281 { 13796 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18282 { 13796 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283 { 13796 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18284 { 13796 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18285 { 13796 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18286 { 13796 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18287 { 13796 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18288 { 13796 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18289 { 13796 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18290 { 13796 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18291 { 13796 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18292 { 13796 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18293 { 13796 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18294 { 13796 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18295 { 13796 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18296 { 13796 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18297 { 13796 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18298 { 13796 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18299 { 13803 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18300 { 13803 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18301 { 13803 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18302 { 13803 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18303 { 13803 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18304 { 13803 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18305 { 13803 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18306 { 13803 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18307 { 13803 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18308 { 13803 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18309 { 13803 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18310 { 13803 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18311 { 13803 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18312 { 13803 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18313 { 13803 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18314 { 13803 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18315 { 13803 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18316 { 13803 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18317 { 13803 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18318 { 13803 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18319 { 13803 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18320 { 13803 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18321 { 13803 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18322 { 13803 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18323 { 13803 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18324 { 13803 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18325 { 13803 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18326 { 13810 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18327 { 13810 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18328 { 13810 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18329 { 13810 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18330 { 13810 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18331 { 13810 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18332 { 13810 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18333 { 13810 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18334 { 13810 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18335 { 13810 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18336 { 13810 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18337 { 13810 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18338 { 13810 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18339 { 13810 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18340 { 13810 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18341 { 13810 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18342 { 13810 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18343 { 13810 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18344 { 13810 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18345 { 13810 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18346 { 13810 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18347 { 13810 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18348 { 13810 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18349 { 13810 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18350 { 13810 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18351 { 13810 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18352 { 13810 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18353 { 13818 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18354 { 13818 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18355 { 13818 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18356 { 13818 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18357 { 13818 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18358 { 13818 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18359 { 13818 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18360 { 13818 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18361 { 13818 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18362 { 13818 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18363 { 13818 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18364 { 13818 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18365 { 13818 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18366 { 13818 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18367 { 13818 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18368 { 13818 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18369 { 13818 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18370 { 13818 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18371 { 13818 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18372 { 13818 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18373 { 13818 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18374 { 13818 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18375 { 13818 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18376 { 13818 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18377 { 13818 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18378 { 13818 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18379 { 13818 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18380 { 13826 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18381 { 13826 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18382 { 13826 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18383 { 13826 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18384 { 13826 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18385 { 13826 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18386 { 13826 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18387 { 13826 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18388 { 13826 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18389 { 13826 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18390 { 13826 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18391 { 13826 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18392 { 13826 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18393 { 13826 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18394 { 13826 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18395 { 13826 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18396 { 13826 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18397 { 13826 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18398 { 13826 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18399 { 13826 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18400 { 13826 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18401 { 13826 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18402 { 13826 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18403 { 13826 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18404 { 13826 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18405 { 13826 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18406 { 13826 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18407 { 13833 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18408 { 13833 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18409 { 13833 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18410 { 13833 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18411 { 13833 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18412 { 13833 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18413 { 13833 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18414 { 13833 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18415 { 13833 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18416 { 13833 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18417 { 13833 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18418 { 13833 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18419 { 13833 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18420 { 13833 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18421 { 13833 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18422 { 13833 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18423 { 13833 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18424 { 13833 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18425 { 13833 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18426 { 13833 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18427 { 13833 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18428 { 13833 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18429 { 13833 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18430 { 13833 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18431 { 13833 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18432 { 13833 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18433 { 13833 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18434 { 13840 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18435 { 13840 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18436 { 13840 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18437 { 13840 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18438 { 13840 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18439 { 13840 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18440 { 13840 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18441 { 13840 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18442 { 13840 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18443 { 13840 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18444 { 13840 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18445 { 13840 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18446 { 13840 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18447 { 13840 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18448 { 13840 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18449 { 13840 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18450 { 13840 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18451 { 13840 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18452 { 13840 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18453 { 13840 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18454 { 13840 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18455 { 13840 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18456 { 13840 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18457 { 13840 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18458 { 13840 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18459 { 13840 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18460 { 13840 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18461 { 13848 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18462 { 13848 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18463 { 13848 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18464 { 13848 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18465 { 13848 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18466 { 13848 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18467 { 13848 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18468 { 13848 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18469 { 13848 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18470 { 13848 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18471 { 13848 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18472 { 13848 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18473 { 13848 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18474 { 13848 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18475 { 13848 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18476 { 13848 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18477 { 13848 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18478 { 13848 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18479 { 13848 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18480 { 13848 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18481 { 13848 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18482 { 13848 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18483 { 13848 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18484 { 13848 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18485 { 13848 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18486 { 13848 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18487 { 13848 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18488 { 13856 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18489 { 13856 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18490 { 13856 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18491 { 13856 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18492 { 13856 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18493 { 13863 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18494 { 13863 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18495 { 13863 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18496 { 13863 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18497 { 13863 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18498 { 13870 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18499 { 13870 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18500 { 13870 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18501 { 13870 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18502 { 13870 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18503 { 13877 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18504 { 13877 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18505 { 13877 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18506 { 13877 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18507 { 13877 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18508 { 13884 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18509 { 13884 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18510 { 13884 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18511 { 13884 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18512 { 13884 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18513 { 13884 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18514 { 13884 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18515 { 13884 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18516 { 13884 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18517 { 13884 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18518 { 13892 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18519 { 13892 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18520 { 13892 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18521 { 13904 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18522 { 13904 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18523 { 13904 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18524 { 13916 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18525 { 13916 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18526 { 13916 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18527 { 13928 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18528 { 13928 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18529 { 13928 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18530 { 13940 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18531 { 13940 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18532 { 13940 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18533 { 13947 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18534 { 13947 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18535 { 13947 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18536 { 13954 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18537 { 13954 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18538 { 13954 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18539 { 13961 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18540 { 13961 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18541 { 13961 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18542 { 13968 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18543 { 13968 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18544 { 13968 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18545 { 13975 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18546 { 13975 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18547 { 13975 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18548 { 13982 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18549 { 13982 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18550 { 13982 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18551 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18552 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18553 { 13982 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18554 { 13982 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18555 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18556 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18557 { 13982 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18558 { 13982 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18559 { 13982 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18560 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18561 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18562 { 13982 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18563 { 13982 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18564 { 13982 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18565 { 13982 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18566 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18567 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18568 { 13982 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18569 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18570 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18571 { 13982 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18572 { 13982 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18573 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18574 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18575 { 13990 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18576 { 13990 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18577 { 13990 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18578 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18579 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18580 { 13990 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18581 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18582 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18583 { 13990 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18584 { 13990 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18585 { 13990 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18586 { 13990 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18587 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18588 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18589 { 13990 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18590 { 13990 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18591 { 13990 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18592 { 13990 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18593 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18594 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18595 { 13990 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18596 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18597 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18598 { 13990 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18599 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18600 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18601 { 13990 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18602 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18603 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18604 { 13998 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18605 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18606 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18607 { 13998 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18608 { 13998 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVBMI2, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18609 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18610 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18611 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18612 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18613 { 13998 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18614 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18615 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18616 { 13998 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18617 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18618 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18619 { 13998 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18620 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18621 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18622 { 13998 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18623 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18624 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18625 { 13998 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18626 { 13998 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18627 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18628 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18629 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18630 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18631 { 14007 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18632 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18633 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18634 { 14007 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18635 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18636 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18637 { 14007 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVBMI2, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18638 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18639 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18640 { 14007 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18641 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18642 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18643 { 14007 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18644 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18645 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18646 { 14007 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18647 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18648 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18649 { 14007 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18650 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18651 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18652 { 14007 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18653 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18654 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18655 { 14007 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18656 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18657 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18658 { 14016 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18659 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18660 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18661 { 14016 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18662 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18663 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18664 { 14016 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18665 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18666 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18667 { 14016 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18668 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18669 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18670 { 14016 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18671 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18672 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18673 { 14016 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18674 { 14025 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18675 { 14025 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18676 { 14025 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18677 { 14025 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18678 { 14025 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18679 { 14025 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18680 { 14025 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18681 { 14025 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18682 { 14025 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18683 { 14025 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18684 { 14025 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18685 { 14025 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18686 { 14025 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18687 { 14025 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18688 { 14025 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18689 { 14025 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18690 { 14025 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18691 { 14025 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18692 { 14033 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18693 { 14033 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18694 { 14033 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18695 { 14040 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18696 { 14040 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18697 { 14040 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18698 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18699 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18700 { 14047 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18701 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18702 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18703 { 14047 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18704 { 14047 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18705 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18706 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18707 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18708 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18709 { 14047 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18710 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18711 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18712 { 14047 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18713 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18714 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18715 { 14047 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18716 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18717 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18718 { 14047 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18719 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18720 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18721 { 14047 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18722 { 14047 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18723 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18724 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18725 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18726 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18727 { 14055 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18728 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18729 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18730 { 14055 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18731 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18732 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18733 { 14055 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18734 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18735 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18736 { 14055 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18737 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18738 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18739 { 14055 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18740 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18741 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18742 { 14055 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18743 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18744 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18745 { 14055 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18746 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18747 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18748 { 14055 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18749 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18750 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18751 { 14055 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18752 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18753 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18754 { 14063 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18755 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18756 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18757 { 14063 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18758 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVBMI2, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18759 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18760 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18761 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18762 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18763 { 14063 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18764 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18765 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18766 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18767 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18768 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18769 { 14063 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18770 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18771 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18772 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18773 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18774 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18775 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18776 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18777 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18778 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18779 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18780 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18781 { 14072 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18782 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18783 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18784 { 14072 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18785 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18786 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18787 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVBMI2, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18788 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18789 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18790 { 14072 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18791 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18792 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18793 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18794 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18795 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18796 { 14072 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18797 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18798 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18799 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18800 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18801 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18802 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18803 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18804 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18805 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVBMI2, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18806 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18807 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18808 { 14081 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18809 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18810 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18811 { 14081 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18812 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18813 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18814 { 14081 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18815 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18816 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18817 { 14081 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18818 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18819 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18820 { 14081 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18821 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18822 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18823 { 14081 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18824 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18825 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18826 { 14090 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18827 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18828 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18829 { 14090 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18830 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18831 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18832 { 14090 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18833 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18834 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18835 { 14090 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18836 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18837 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18838 { 14090 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18839 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18840 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVBMI2|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18841 { 14090 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasVBMI2, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18842 { 14098 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18843 { 14098 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18844 { 14098 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18845 { 14098 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18846 { 14098 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18847 { 14098 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18848 { 14098 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18849 { 14098 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18850 { 14098 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18851 { 14098 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18852 { 14098 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18853 { 14098 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18854 { 14098 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18855 { 14098 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18856 { 14098 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18857 { 14098 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18858 { 14098 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18859 { 14098 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18860 { 14098 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18861 { 14098 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18862 { 14098 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18863 { 14098 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18864 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
18865 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
18866 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
18867 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
18868 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
18869 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
18870 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18871 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18872 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBITALG, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18873 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18874 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBITALG|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18875 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBITALG, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18876 { 14119 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18877 { 14119 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18878 { 14119 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18879 { 14119 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18880 { 14119 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18881 { 14119 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18882 { 14119 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18883 { 14119 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
18884 { 14119 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18885 { 14119 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18886 { 14119 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18887 { 14119 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18888 { 14119 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18889 { 14119 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18890 { 14119 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18891 { 14119 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18892 { 14119 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18893 { 14119 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18894 { 14119 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18895 { 14119 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18896 { 14119 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18897 { 14119 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18898 { 14119 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18899 { 14119 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18900 { 14119 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18901 { 14119 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18902 { 14119 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18903 { 14119 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18904 { 14119 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18905 { 14119 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18906 { 14119 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18907 { 14127 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18908 { 14127 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18909 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18910 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18911 { 14127 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18912 { 14127 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18913 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18914 { 14127 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
18915 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18916 { 14127 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18917 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18918 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18919 { 14127 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18920 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18921 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18922 { 14127 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18923 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18924 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18925 { 14127 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18926 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18927 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18928 { 14127 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18929 { 14136 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18930 { 14136 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18931 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18932 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18933 { 14136 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18934 { 14136 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18935 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18936 { 14136 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
18937 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18938 { 14136 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18939 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18940 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18941 { 14136 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18942 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18943 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18944 { 14136 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18945 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18946 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18947 { 14136 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18948 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18949 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18950 { 14136 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18951 { 14145 /* vpsignb */, X86::VPSIGNBrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18952 { 14145 /* vpsignb */, X86::VPSIGNBYrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18953 { 14145 /* vpsignb */, X86::VPSIGNBrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18954 { 14145 /* vpsignb */, X86::VPSIGNBYrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18955 { 14153 /* vpsignd */, X86::VPSIGNDrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18956 { 14153 /* vpsignd */, X86::VPSIGNDYrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18957 { 14153 /* vpsignd */, X86::VPSIGNDrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18958 { 14153 /* vpsignd */, X86::VPSIGNDYrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18959 { 14161 /* vpsignw */, X86::VPSIGNWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18960 { 14161 /* vpsignw */, X86::VPSIGNWYrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18961 { 14161 /* vpsignw */, X86::VPSIGNWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18962 { 14161 /* vpsignw */, X86::VPSIGNWYrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18963 { 14169 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18964 { 14169 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
18965 { 14169 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18966 { 14169 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
18967 { 14169 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
18968 { 14169 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18969 { 14169 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
18970 { 14169 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18971 { 14169 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18972 { 14169 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18973 { 14169 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18974 { 14169 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18975 { 14169 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18976 { 14169 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18977 { 14169 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
18978 { 14169 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18979 { 14169 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
18980 { 14169 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
18981 { 14169 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18982 { 14169 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18983 { 14169 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18984 { 14169 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18985 { 14169 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18986 { 14169 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18987 { 14169 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18988 { 14169 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18989 { 14169 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18990 { 14169 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18991 { 14169 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18992 { 14169 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18993 { 14169 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18994 { 14169 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18995 { 14169 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18996 { 14169 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18997 { 14169 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18998 { 14169 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18999 { 14169 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19000 { 14169 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19001 { 14169 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19002 { 14169 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19003 { 14169 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19004 { 14169 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19005 { 14169 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19006 { 14169 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19007 { 14169 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19008 { 14169 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19009 { 14169 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19010 { 14169 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19011 { 14169 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19012 { 14169 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19013 { 14169 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19014 { 14176 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19015 { 14176 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19016 { 14176 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19017 { 14176 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19018 { 14176 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19019 { 14176 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19020 { 14176 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19021 { 14176 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19022 { 14184 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19023 { 14184 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19024 { 14184 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19025 { 14184 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19026 { 14184 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19027 { 14184 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19028 { 14184 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19029 { 14184 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19030 { 14184 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19031 { 14184 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19032 { 14184 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19033 { 14184 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19034 { 14184 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19035 { 14184 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19036 { 14184 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19037 { 14184 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19038 { 14184 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19039 { 14184 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19040 { 14184 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19041 { 14184 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19042 { 14184 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19043 { 14184 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19044 { 14184 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19045 { 14184 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19046 { 14184 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19047 { 14184 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19048 { 14184 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19049 { 14184 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19050 { 14184 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19051 { 14184 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19052 { 14184 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19053 { 14184 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19054 { 14184 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19055 { 14184 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19056 { 14184 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19057 { 14184 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19058 { 14184 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19059 { 14184 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19060 { 14184 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19061 { 14184 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19062 { 14184 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19063 { 14184 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19064 { 14184 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19065 { 14184 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19066 { 14184 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19067 { 14184 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19068 { 14184 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19069 { 14184 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19070 { 14184 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19071 { 14184 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19072 { 14184 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19073 { 14191 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19074 { 14191 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19075 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19076 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19077 { 14191 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19078 { 14191 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19079 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19080 { 14191 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19081 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19082 { 14191 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19083 { 14191 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19084 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19085 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19086 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19087 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19088 { 14191 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19089 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19090 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19091 { 14191 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19092 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19093 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19094 { 14191 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19095 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19096 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19097 { 14191 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19098 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19099 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19100 { 14191 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19101 { 14191 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19102 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19103 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19104 { 14199 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19105 { 14199 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19106 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19107 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19108 { 14199 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19109 { 14199 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19110 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19111 { 14199 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19112 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19113 { 14199 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19114 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19115 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19116 { 14199 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19117 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19118 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19119 { 14199 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19120 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19121 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19122 { 14199 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19123 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19124 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19125 { 14199 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19126 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19127 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19128 { 14199 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19129 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19130 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19131 { 14199 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19132 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19133 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19134 { 14199 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19135 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19136 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19137 { 14207 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19138 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19139 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19140 { 14207 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19141 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19142 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19143 { 14207 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19144 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19145 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19146 { 14207 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19147 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19148 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19149 { 14207 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19150 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19151 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19152 { 14207 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19153 { 14215 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19154 { 14215 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19155 { 14215 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19156 { 14215 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19157 { 14215 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19158 { 14215 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19159 { 14215 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19160 { 14215 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19161 { 14215 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19162 { 14215 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19163 { 14215 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19164 { 14215 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19165 { 14215 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19166 { 14215 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19167 { 14215 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19168 { 14215 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19169 { 14215 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19170 { 14215 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19171 { 14215 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19172 { 14215 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19173 { 14215 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19174 { 14215 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19175 { 14215 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19176 { 14215 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19177 { 14215 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19178 { 14215 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19179 { 14215 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19180 { 14215 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19181 { 14215 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19182 { 14215 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19183 { 14215 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19184 { 14215 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19185 { 14215 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19186 { 14215 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19187 { 14215 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19188 { 14215 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19189 { 14215 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19190 { 14215 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19191 { 14215 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19192 { 14215 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19193 { 14215 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19194 { 14215 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19195 { 14222 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19196 { 14222 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19197 { 14222 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19198 { 14222 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19199 { 14222 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19200 { 14222 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19201 { 14222 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19202 { 14222 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19203 { 14222 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19204 { 14222 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19205 { 14222 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19206 { 14222 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19207 { 14222 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19208 { 14222 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19209 { 14222 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19210 { 14222 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19211 { 14222 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19212 { 14222 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19213 { 14222 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19214 { 14222 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19215 { 14222 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19216 { 14222 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19217 { 14222 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19218 { 14222 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19219 { 14222 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19220 { 14222 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19221 { 14222 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19222 { 14222 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19223 { 14222 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19224 { 14222 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19225 { 14222 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19226 { 14222 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19227 { 14222 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19228 { 14222 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19229 { 14222 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19230 { 14222 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19231 { 14222 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19232 { 14222 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19233 { 14222 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19234 { 14222 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19235 { 14222 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19236 { 14222 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19237 { 14222 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19238 { 14222 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19239 { 14222 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19240 { 14222 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19241 { 14222 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19242 { 14222 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19243 { 14222 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19244 { 14222 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19245 { 14222 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19246 { 14229 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19247 { 14229 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19248 { 14229 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19249 { 14229 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19250 { 14229 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19251 { 14229 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19252 { 14229 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19253 { 14229 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19254 { 14229 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19255 { 14229 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19256 { 14229 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19257 { 14229 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19258 { 14229 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19259 { 14229 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19260 { 14229 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19261 { 14229 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19262 { 14229 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19263 { 14229 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19264 { 14229 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19265 { 14229 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19266 { 14229 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19267 { 14229 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19268 { 14229 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19269 { 14229 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19270 { 14229 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19271 { 14229 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19272 { 14229 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19273 { 14229 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19274 { 14229 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19275 { 14229 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19276 { 14229 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19277 { 14229 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19278 { 14229 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19279 { 14229 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19280 { 14229 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19281 { 14229 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19282 { 14229 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19283 { 14229 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19284 { 14229 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19285 { 14229 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19286 { 14229 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19287 { 14229 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19288 { 14229 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19289 { 14229 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19290 { 14229 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19291 { 14236 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19292 { 14236 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19293 { 14236 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19294 { 14236 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19295 { 14236 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19296 { 14236 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19297 { 14236 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19298 { 14236 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19299 { 14236 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19300 { 14236 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19301 { 14236 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19302 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19303 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19304 { 14236 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19305 { 14236 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19306 { 14236 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19307 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19308 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19309 { 14236 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19310 { 14236 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19311 { 14236 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19312 { 14236 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19313 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19314 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19315 { 14236 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19316 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19317 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19318 { 14236 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19319 { 14236 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19320 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19321 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19322 { 14244 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19323 { 14244 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19324 { 14244 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19325 { 14244 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19326 { 14244 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19327 { 14244 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19328 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19329 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19330 { 14244 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19331 { 14244 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19332 { 14244 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19333 { 14244 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19334 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19335 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19336 { 14244 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19337 { 14244 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19338 { 14244 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19339 { 14244 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19340 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19341 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19342 { 14244 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19343 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19344 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19345 { 14244 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19346 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19347 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19348 { 14244 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19349 { 14252 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19350 { 14252 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19351 { 14252 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19352 { 14252 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19353 { 14252 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19354 { 14252 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19355 { 14252 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19356 { 14252 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19357 { 14252 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19358 { 14252 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19359 { 14252 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19360 { 14252 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19361 { 14252 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19362 { 14252 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19363 { 14252 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19364 { 14252 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19365 { 14252 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19366 { 14252 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19367 { 14260 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19368 { 14260 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19369 { 14260 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19370 { 14260 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19371 { 14260 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19372 { 14260 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19373 { 14260 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19374 { 14260 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19375 { 14260 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19376 { 14260 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19377 { 14260 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19378 { 14260 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19379 { 14260 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19380 { 14260 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19381 { 14260 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19382 { 14260 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19383 { 14260 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19384 { 14260 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19385 { 14260 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19386 { 14260 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19387 { 14260 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19388 { 14260 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19389 { 14260 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19390 { 14260 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19391 { 14260 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19392 { 14260 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19393 { 14260 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19394 { 14260 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19395 { 14260 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19396 { 14260 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19397 { 14260 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19398 { 14260 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19399 { 14260 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19400 { 14260 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19401 { 14260 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19402 { 14260 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19403 { 14260 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19404 { 14260 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19405 { 14260 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19406 { 14260 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19407 { 14260 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19408 { 14260 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19409 { 14267 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19410 { 14267 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19411 { 14267 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19412 { 14267 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19413 { 14267 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19414 { 14267 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19415 { 14267 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19416 { 14267 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19417 { 14267 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19418 { 14267 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19419 { 14267 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19420 { 14267 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19421 { 14267 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19422 { 14267 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19423 { 14267 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19424 { 14267 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19425 { 14267 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19426 { 14267 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19427 { 14267 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19428 { 14267 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19429 { 14267 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19430 { 14267 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19431 { 14267 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19432 { 14267 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19433 { 14267 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19434 { 14267 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19435 { 14267 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19436 { 14267 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19437 { 14267 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19438 { 14267 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19439 { 14267 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19440 { 14267 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19441 { 14267 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19442 { 14267 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19443 { 14267 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19444 { 14267 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19445 { 14267 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19446 { 14267 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19447 { 14267 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19448 { 14267 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19449 { 14267 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19450 { 14267 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19451 { 14267 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19452 { 14267 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19453 { 14267 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19454 { 14267 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19455 { 14267 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19456 { 14267 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19457 { 14267 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19458 { 14267 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19459 { 14267 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19460 { 14274 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19461 { 14274 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19462 { 14274 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19463 { 14274 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19464 { 14274 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19465 { 14274 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19466 { 14274 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19467 { 14274 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19468 { 14282 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19469 { 14282 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19470 { 14282 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19471 { 14282 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19472 { 14282 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19473 { 14282 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19474 { 14282 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19475 { 14282 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19476 { 14282 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19477 { 14282 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19478 { 14282 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19479 { 14282 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19480 { 14282 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19481 { 14282 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19482 { 14282 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19483 { 14282 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19484 { 14282 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19485 { 14282 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19486 { 14282 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19487 { 14282 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19488 { 14282 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19489 { 14282 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19490 { 14282 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19491 { 14282 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19492 { 14282 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19493 { 14282 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19494 { 14282 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19495 { 14282 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19496 { 14282 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19497 { 14282 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19498 { 14282 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19499 { 14282 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19500 { 14282 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19501 { 14282 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19502 { 14282 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19503 { 14282 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19504 { 14282 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19505 { 14282 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19506 { 14282 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19507 { 14282 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19508 { 14282 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19509 { 14282 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19510 { 14282 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19511 { 14282 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19512 { 14282 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19513 { 14282 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19514 { 14282 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19515 { 14282 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19516 { 14282 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19517 { 14282 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19518 { 14282 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19519 { 14289 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19520 { 14289 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19521 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19522 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19523 { 14289 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19524 { 14289 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19525 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19526 { 14289 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19527 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19528 { 14289 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19529 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19530 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19531 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19532 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19533 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19534 { 14289 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19535 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19536 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19537 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19538 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19539 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19540 { 14289 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19541 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19542 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19543 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19544 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19545 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19546 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19547 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19548 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19549 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19550 { 14297 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19551 { 14297 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19552 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19553 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19554 { 14297 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19555 { 14297 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19556 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19557 { 14297 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19558 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19559 { 14297 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19560 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19561 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19562 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19563 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19564 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19565 { 14297 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19566 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19567 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19568 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19569 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19570 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19571 { 14297 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19572 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19573 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19574 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19575 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19576 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19577 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19578 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19579 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19580 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19581 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19582 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19583 { 14305 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19584 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19585 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19586 { 14305 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19587 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19588 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19589 { 14305 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19590 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19591 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19592 { 14305 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19593 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19594 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19595 { 14305 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19596 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19597 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19598 { 14305 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19599 { 14313 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19600 { 14313 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19601 { 14313 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19602 { 14313 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19603 { 14313 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19604 { 14313 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19605 { 14313 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19606 { 14313 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19607 { 14313 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19608 { 14313 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19609 { 14313 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19610 { 14313 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19611 { 14313 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19612 { 14313 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19613 { 14313 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19614 { 14313 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19615 { 14313 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19616 { 14313 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19617 { 14313 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19618 { 14313 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19619 { 14313 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19620 { 14313 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19621 { 14313 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19622 { 14313 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19623 { 14313 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19624 { 14313 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19625 { 14313 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19626 { 14313 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19627 { 14313 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19628 { 14313 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19629 { 14313 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19630 { 14313 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19631 { 14313 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19632 { 14313 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19633 { 14313 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19634 { 14313 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19635 { 14313 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19636 { 14313 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19637 { 14313 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19638 { 14313 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19639 { 14313 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19640 { 14313 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19641 { 14320 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19642 { 14320 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19643 { 14320 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19644 { 14320 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19645 { 14320 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19646 { 14320 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19647 { 14320 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19648 { 14320 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19649 { 14320 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19650 { 14320 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19651 { 14320 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19652 { 14320 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19653 { 14320 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19654 { 14320 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19655 { 14320 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19656 { 14320 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19657 { 14320 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19658 { 14320 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19659 { 14320 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19660 { 14320 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19661 { 14320 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19662 { 14320 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19663 { 14327 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19664 { 14327 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19665 { 14327 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19666 { 14327 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19667 { 14327 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19668 { 14327 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19669 { 14327 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19670 { 14327 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19671 { 14327 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19672 { 14327 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19673 { 14327 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19674 { 14327 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19675 { 14327 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19676 { 14327 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19677 { 14327 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19678 { 14327 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19679 { 14327 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19680 { 14327 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19681 { 14327 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19682 { 14327 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19683 { 14327 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19684 { 14327 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19685 { 14327 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19686 { 14327 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19687 { 14327 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19688 { 14327 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19689 { 14327 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19690 { 14327 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19691 { 14327 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19692 { 14327 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19693 { 14327 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19694 { 14334 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19695 { 14334 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19696 { 14334 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19697 { 14334 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19698 { 14334 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19699 { 14334 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19700 { 14334 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19701 { 14334 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19702 { 14334 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19703 { 14334 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19704 { 14334 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19705 { 14334 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19706 { 14334 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19707 { 14334 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19708 { 14334 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19709 { 14334 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19710 { 14334 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19711 { 14334 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19712 { 14334 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19713 { 14334 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19714 { 14334 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19715 { 14334 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19716 { 14334 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19717 { 14334 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19718 { 14334 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19719 { 14334 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19720 { 14334 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19721 { 14334 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19722 { 14334 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19723 { 14334 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19724 { 14334 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19725 { 14341 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19726 { 14341 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19727 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19728 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19729 { 14341 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19730 { 14341 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19731 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19732 { 14341 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19733 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19734 { 14341 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19735 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19736 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19737 { 14341 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19738 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19739 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19740 { 14341 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19741 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19742 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19743 { 14341 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19744 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19745 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19746 { 14341 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19747 { 14349 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19748 { 14349 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19749 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19750 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19751 { 14349 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19752 { 14349 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19753 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19754 { 14349 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19755 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19756 { 14349 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19757 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19758 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19759 { 14349 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19760 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19761 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19762 { 14349 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19763 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19764 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19765 { 14349 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19766 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19767 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19768 { 14349 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19769 { 14357 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19770 { 14357 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19771 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19772 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19773 { 14357 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19774 { 14357 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19775 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19776 { 14357 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19777 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19778 { 14357 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19779 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19780 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19781 { 14357 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19782 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19783 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19784 { 14357 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19785 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19786 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19787 { 14357 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19788 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19789 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19790 { 14357 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19791 { 14366 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19792 { 14366 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19793 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19794 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19795 { 14366 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19796 { 14366 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19797 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19798 { 14366 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19799 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19800 { 14366 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19801 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19802 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19803 { 14366 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19804 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19805 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19806 { 14366 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19807 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19808 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19809 { 14366 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19810 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19811 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19812 { 14366 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19813 { 14375 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19814 { 14375 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19815 { 14375 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19816 { 14375 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19817 { 14375 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19818 { 14375 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19819 { 14375 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19820 { 14375 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19821 { 14375 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19822 { 14375 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19823 { 14375 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19824 { 14375 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19825 { 14375 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19826 { 14375 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19827 { 14375 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19828 { 14375 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19829 { 14375 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19830 { 14375 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19831 { 14375 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19832 { 14375 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19833 { 14375 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19834 { 14375 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19835 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19836 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19837 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19838 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19839 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19840 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19841 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19842 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19843 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19844 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19845 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19846 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19847 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19848 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19849 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19850 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19851 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19852 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19853 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19854 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19855 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19856 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19857 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19858 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19859 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19860 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19861 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19862 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19863 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19864 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19865 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19866 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19867 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19868 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19869 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19870 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19871 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19872 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19873 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19874 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19875 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19876 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19877 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19878 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19879 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19880 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19881 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19882 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19883 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19884 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19885 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19886 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19887 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19888 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19889 { 14404 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
19890 { 14404 /* vptest */, X86::VPTESTYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
19891 { 14404 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
19892 { 14404 /* vptest */, X86::VPTESTYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
19893 { 14411 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19894 { 14411 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19895 { 14411 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19896 { 14411 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19897 { 14411 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19898 { 14411 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19899 { 14411 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19900 { 14411 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19901 { 14411 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19902 { 14411 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19903 { 14411 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19904 { 14411 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19905 { 14420 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19906 { 14420 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19907 { 14420 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19908 { 14420 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19909 { 14420 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19910 { 14420 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19911 { 14420 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
19912 { 14420 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
19913 { 14420 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
19914 { 14420 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19915 { 14420 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19916 { 14420 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19917 { 14420 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19918 { 14420 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19919 { 14420 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19920 { 14420 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19921 { 14420 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19922 { 14420 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19923 { 14429 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19924 { 14429 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19925 { 14429 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19926 { 14429 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19927 { 14429 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19928 { 14429 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19929 { 14429 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
19930 { 14429 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
19931 { 14429 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
19932 { 14429 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19933 { 14429 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19934 { 14429 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19935 { 14429 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19936 { 14429 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19937 { 14429 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19938 { 14429 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19939 { 14429 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19940 { 14429 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19941 { 14438 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19942 { 14438 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19943 { 14438 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19944 { 14438 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19945 { 14438 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19946 { 14438 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19947 { 14438 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19948 { 14438 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19949 { 14438 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19950 { 14438 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19951 { 14438 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19952 { 14438 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19953 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19954 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19955 { 14447 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19956 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19957 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19958 { 14447 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19959 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19960 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19961 { 14447 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19962 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19963 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19964 { 14447 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19965 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19966 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19967 { 14457 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19968 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19969 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19970 { 14457 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19971 { 14457 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
19972 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
19973 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
19974 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19975 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19976 { 14457 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19977 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19978 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19979 { 14457 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19980 { 14457 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19981 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19982 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19983 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19984 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19985 { 14467 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19986 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19987 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19988 { 14467 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19989 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
19990 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
19991 { 14467 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
19992 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19993 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19994 { 14467 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19995 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19996 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19997 { 14467 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19998 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19999 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20000 { 14467 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20001 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20002 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20003 { 14477 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20004 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20005 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20006 { 14477 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20007 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20008 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20009 { 14477 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20010 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20011 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20012 { 14477 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20013 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20014 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20015 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20016 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20017 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20018 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20019 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20020 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20021 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20022 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20023 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20024 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20025 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20026 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20027 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20028 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20029 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20030 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20031 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20032 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20033 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20034 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20035 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20036 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20037 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20038 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20039 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20040 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20041 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20042 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20043 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20044 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20045 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20046 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20047 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20048 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20049 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20050 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20051 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20052 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20053 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20054 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20055 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20056 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20057 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20058 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20059 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20060 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20061 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20062 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20063 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20064 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20065 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20066 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20067 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20068 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20069 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20070 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20071 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20072 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20073 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20074 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20075 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20076 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20077 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20078 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20079 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20080 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20081 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20082 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20083 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20084 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20085 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20086 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20087 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20088 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20089 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20090 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20091 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20092 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20093 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20094 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20095 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20096 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20097 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20098 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20099 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20100 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20101 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20102 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20103 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20104 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20105 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20106 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20107 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20108 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20109 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20110 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20111 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20112 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20113 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20114 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20115 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20116 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20117 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20118 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20119 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20120 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20121 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20122 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20123 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20124 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20125 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20126 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20127 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20128 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20129 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20130 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20131 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20132 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20133 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20134 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20135 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20136 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20137 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20138 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20139 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20140 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20141 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20142 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20143 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20144 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20145 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20146 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20147 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20148 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20149 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20150 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20151 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20152 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20153 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20154 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20155 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20156 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20157 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20158 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20159 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20160 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20161 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20162 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20163 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20164 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20165 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20166 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20167 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20168 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20169 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20170 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20171 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20172 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20173 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20174 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20175 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20176 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20177 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20178 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20179 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20180 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20181 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20182 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20183 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20184 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20185 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20186 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20187 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20188 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20189 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20190 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20191 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20192 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20193 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20194 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20195 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20196 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20197 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20198 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20199 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20200 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20201 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20202 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20203 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20204 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20205 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20206 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20207 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20208 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20209 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20210 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20211 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20212 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20213 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20214 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20215 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20216 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20217 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20218 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20219 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20220 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20221 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20222 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20223 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20224 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20225 { 14577 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20226 { 14577 /* vpxor */, X86::VPXORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20227 { 14577 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20228 { 14577 /* vpxor */, X86::VPXORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20229 { 14583 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20230 { 14583 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20231 { 14583 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20232 { 14583 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20233 { 14583 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20234 { 14583 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20235 { 14583 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20236 { 14583 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20237 { 14583 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20238 { 14583 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20239 { 14583 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20240 { 14583 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20241 { 14583 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20242 { 14583 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20243 { 14583 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20244 { 14583 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20245 { 14583 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20246 { 14583 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20247 { 14583 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20248 { 14583 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20249 { 14583 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20250 { 14583 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20251 { 14583 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20252 { 14583 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20253 { 14583 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20254 { 14583 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20255 { 14583 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20256 { 14590 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20257 { 14590 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20258 { 14590 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20259 { 14590 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20260 { 14590 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20261 { 14590 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20262 { 14590 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20263 { 14590 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20264 { 14590 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20265 { 14590 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20266 { 14590 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20267 { 14590 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20268 { 14590 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20269 { 14590 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20270 { 14590 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20271 { 14590 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20272 { 14590 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20273 { 14590 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20274 { 14590 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20275 { 14590 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20276 { 14590 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20277 { 14590 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20278 { 14590 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20279 { 14590 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20280 { 14590 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20281 { 14590 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20282 { 14590 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20283 { 14597 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20284 { 14597 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20285 { 14597 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20286 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20287 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20288 { 14597 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20289 { 14597 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20290 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20291 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20292 { 14597 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20293 { 14597 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20294 { 14597 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20295 { 14597 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20296 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20297 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20298 { 14597 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20299 { 14597 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20300 { 14597 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20301 { 14597 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20302 { 14597 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20303 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20304 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20305 { 14597 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20306 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20307 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20308 { 14597 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20309 { 14597 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20310 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20311 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20312 { 14597 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20313 { 14606 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20314 { 14606 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20315 { 14606 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20316 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20317 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20318 { 14606 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20319 { 14606 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20320 { 14606 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20321 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20322 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20323 { 14606 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20324 { 14606 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20325 { 14606 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20326 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20327 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20328 { 14606 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20329 { 14606 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20330 { 14606 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20331 { 14606 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20332 { 14606 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20333 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20334 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20335 { 14606 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20336 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20337 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20338 { 14606 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20339 { 14606 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20340 { 14606 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20341 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20342 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20343 { 14615 /* vrangesd */, X86::VRANGESDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20344 { 14615 /* vrangesd */, X86::VRANGESDZ128rmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20345 { 14615 /* vrangesd */, X86::VRANGESDZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20346 { 14615 /* vrangesd */, X86::VRANGESDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20347 { 14615 /* vrangesd */, X86::VRANGESDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20348 { 14615 /* vrangesd */, X86::VRANGESDZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20349 { 14615 /* vrangesd */, X86::VRANGESDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20350 { 14615 /* vrangesd */, X86::VRANGESDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20351 { 14615 /* vrangesd */, X86::VRANGESDZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20352 { 14624 /* vrangess */, X86::VRANGESSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20353 { 14624 /* vrangess */, X86::VRANGESSZ128rmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20354 { 14624 /* vrangess */, X86::VRANGESSZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20355 { 14624 /* vrangess */, X86::VRANGESSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20356 { 14624 /* vrangess */, X86::VRANGESSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20357 { 14624 /* vrangess */, X86::VRANGESSZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20358 { 14624 /* vrangess */, X86::VRANGESSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20359 { 14624 /* vrangess */, X86::VRANGESSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20360 { 14624 /* vrangess */, X86::VRANGESSZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20361 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
20362 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
20363 { 14633 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
20364 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
20365 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
20366 { 14633 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
20367 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20368 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20369 { 14633 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20370 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20371 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20372 { 14633 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20373 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20374 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20375 { 14633 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20376 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20377 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20378 { 14633 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20379 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20380 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20381 { 14633 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20382 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20383 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20384 { 14633 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20385 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20386 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20387 { 14633 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20388 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
20389 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
20390 { 14642 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
20391 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
20392 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
20393 { 14642 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
20394 { 14642 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20395 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20396 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20397 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20398 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20399 { 14642 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20400 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20401 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20402 { 14642 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20403 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20404 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20405 { 14642 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20406 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20407 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20408 { 14642 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20409 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20410 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20411 { 14642 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20412 { 14642 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20413 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20414 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20415 { 14651 /* vrcp14sd */, X86::VRCP14SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20416 { 14651 /* vrcp14sd */, X86::VRCP14SDrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20417 { 14651 /* vrcp14sd */, X86::VRCP14SDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20418 { 14651 /* vrcp14sd */, X86::VRCP14SDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20419 { 14651 /* vrcp14sd */, X86::VRCP14SDrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20420 { 14651 /* vrcp14sd */, X86::VRCP14SDrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20421 { 14660 /* vrcp14ss */, X86::VRCP14SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20422 { 14660 /* vrcp14ss */, X86::VRCP14SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20423 { 14660 /* vrcp14ss */, X86::VRCP14SSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20424 { 14660 /* vrcp14ss */, X86::VRCP14SSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20425 { 14660 /* vrcp14ss */, X86::VRCP14SSrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20426 { 14660 /* vrcp14ss */, X86::VRCP14SSrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20427 { 14669 /* vrcp28pd */, X86::VRCP28PDr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
20428 { 14669 /* vrcp28pd */, X86::VRCP28PDm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
20429 { 14669 /* vrcp28pd */, X86::VRCP28PDrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20430 { 14669 /* vrcp28pd */, X86::VRCP28PDmb, Convert__Reg1_2__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20431 { 14669 /* vrcp28pd */, X86::VRCP28PDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20432 { 14669 /* vrcp28pd */, X86::VRCP28PDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20433 { 14669 /* vrcp28pd */, X86::VRCP28PDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20434 { 14669 /* vrcp28pd */, X86::VRCP28PDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20435 { 14669 /* vrcp28pd */, X86::VRCP28PDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20436 { 14669 /* vrcp28pd */, X86::VRCP28PDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20437 { 14669 /* vrcp28pd */, X86::VRCP28PDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20438 { 14669 /* vrcp28pd */, X86::VRCP28PDmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20439 { 14678 /* vrcp28ps */, X86::VRCP28PSr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
20440 { 14678 /* vrcp28ps */, X86::VRCP28PSm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
20441 { 14678 /* vrcp28ps */, X86::VRCP28PSrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20442 { 14678 /* vrcp28ps */, X86::VRCP28PSmb, Convert__Reg1_2__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20443 { 14678 /* vrcp28ps */, X86::VRCP28PSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20444 { 14678 /* vrcp28ps */, X86::VRCP28PSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20445 { 14678 /* vrcp28ps */, X86::VRCP28PSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20446 { 14678 /* vrcp28ps */, X86::VRCP28PSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20447 { 14678 /* vrcp28ps */, X86::VRCP28PSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20448 { 14678 /* vrcp28ps */, X86::VRCP28PSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20449 { 14678 /* vrcp28ps */, X86::VRCP28PSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20450 { 14678 /* vrcp28ps */, X86::VRCP28PSmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20451 { 14687 /* vrcp28sd */, X86::VRCP28SDr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20452 { 14687 /* vrcp28sd */, X86::VRCP28SDm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20453 { 14687 /* vrcp28sd */, X86::VRCP28SDrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20454 { 14687 /* vrcp28sd */, X86::VRCP28SDrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20455 { 14687 /* vrcp28sd */, X86::VRCP28SDmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20456 { 14687 /* vrcp28sd */, X86::VRCP28SDrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20457 { 14687 /* vrcp28sd */, X86::VRCP28SDrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20458 { 14687 /* vrcp28sd */, X86::VRCP28SDmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20459 { 14687 /* vrcp28sd */, X86::VRCP28SDrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20460 { 14696 /* vrcp28ss */, X86::VRCP28SSr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20461 { 14696 /* vrcp28ss */, X86::VRCP28SSm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20462 { 14696 /* vrcp28ss */, X86::VRCP28SSrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20463 { 14696 /* vrcp28ss */, X86::VRCP28SSrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20464 { 14696 /* vrcp28ss */, X86::VRCP28SSmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20465 { 14696 /* vrcp28ss */, X86::VRCP28SSrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20466 { 14696 /* vrcp28ss */, X86::VRCP28SSrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20467 { 14696 /* vrcp28ss */, X86::VRCP28SSmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20468 { 14696 /* vrcp28ss */, X86::VRCP28SSrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20469 { 14705 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20470 { 14705 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20471 { 14705 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20472 { 14705 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20473 { 14712 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20474 { 14712 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20475 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20476 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20477 { 14719 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20478 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20479 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20480 { 14719 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20481 { 14719 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20482 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20483 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20484 { 14719 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20485 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20486 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20487 { 14719 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20488 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20489 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20490 { 14719 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20491 { 14719 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20492 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20493 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20494 { 14719 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20495 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20496 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20497 { 14719 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20498 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20499 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20500 { 14719 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20501 { 14719 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20502 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20503 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20504 { 14719 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20505 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20506 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20507 { 14729 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20508 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20509 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20510 { 14729 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20511 { 14729 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20512 { 14729 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20513 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20514 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20515 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20516 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20517 { 14729 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20518 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20519 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20520 { 14729 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20521 { 14729 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20522 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20523 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20524 { 14729 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20525 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20526 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20527 { 14729 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20528 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20529 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20530 { 14729 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20531 { 14729 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20532 { 14729 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20533 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20534 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20535 { 14739 /* vreducesd */, X86::VREDUCESDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20536 { 14739 /* vreducesd */, X86::VREDUCESDZ128rmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20537 { 14739 /* vreducesd */, X86::VREDUCESDZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20538 { 14739 /* vreducesd */, X86::VREDUCESDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20539 { 14739 /* vreducesd */, X86::VREDUCESDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20540 { 14739 /* vreducesd */, X86::VREDUCESDZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20541 { 14739 /* vreducesd */, X86::VREDUCESDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20542 { 14739 /* vreducesd */, X86::VREDUCESDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20543 { 14739 /* vreducesd */, X86::VREDUCESDZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20544 { 14749 /* vreducess */, X86::VREDUCESSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20545 { 14749 /* vreducess */, X86::VREDUCESSZ128rmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20546 { 14749 /* vreducess */, X86::VREDUCESSZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20547 { 14749 /* vreducess */, X86::VREDUCESSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20548 { 14749 /* vreducess */, X86::VREDUCESSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20549 { 14749 /* vreducess */, X86::VREDUCESSZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20550 { 14749 /* vreducess */, X86::VREDUCESSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20551 { 14749 /* vreducess */, X86::VREDUCESSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20552 { 14749 /* vreducess */, X86::VREDUCESSZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20553 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20554 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20555 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20556 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20557 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20558 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20559 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20560 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20561 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20562 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20563 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20564 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20565 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20566 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20567 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20568 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20569 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20570 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20571 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20572 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20573 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20574 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20575 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20576 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20577 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20578 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20579 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20580 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20581 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20582 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20583 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20584 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20585 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20586 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20587 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20588 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20589 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20590 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20591 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20592 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20593 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20594 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20595 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20596 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20597 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20598 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20599 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20600 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20601 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20602 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20603 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20604 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20605 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20606 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20607 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20608 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20609 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20610 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20611 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20612 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20613 { 14783 /* vrndscalesd */, X86::VRNDSCALESDr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20614 { 14783 /* vrndscalesd */, X86::VRNDSCALESDm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20615 { 14783 /* vrndscalesd */, X86::VRNDSCALESDrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20616 { 14783 /* vrndscalesd */, X86::VRNDSCALESDr_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20617 { 14783 /* vrndscalesd */, X86::VRNDSCALESDm_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20618 { 14783 /* vrndscalesd */, X86::VRNDSCALESDrb_Intk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20619 { 14783 /* vrndscalesd */, X86::VRNDSCALESDr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20620 { 14783 /* vrndscalesd */, X86::VRNDSCALESDm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20621 { 14783 /* vrndscalesd */, X86::VRNDSCALESDrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20622 { 14795 /* vrndscaless */, X86::VRNDSCALESSr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20623 { 14795 /* vrndscaless */, X86::VRNDSCALESSm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20624 { 14795 /* vrndscaless */, X86::VRNDSCALESSrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20625 { 14795 /* vrndscaless */, X86::VRNDSCALESSr_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20626 { 14795 /* vrndscaless */, X86::VRNDSCALESSm_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20627 { 14795 /* vrndscaless */, X86::VRNDSCALESSrb_Intk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20628 { 14795 /* vrndscaless */, X86::VRNDSCALESSr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20629 { 14795 /* vrndscaless */, X86::VRNDSCALESSm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20630 { 14795 /* vrndscaless */, X86::VRNDSCALESSrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20631 { 14807 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20632 { 14807 /* vroundpd */, X86::VROUNDYPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20633 { 14807 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20634 { 14807 /* vroundpd */, X86::VROUNDYPDm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20635 { 14816 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20636 { 14816 /* vroundps */, X86::VROUNDYPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20637 { 14816 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20638 { 14816 /* vroundps */, X86::VROUNDYPSm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20639 { 14825 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20640 { 14825 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
20641 { 14834 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20642 { 14834 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20643 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
20644 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
20645 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
20646 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
20647 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
20648 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
20649 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20650 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20651 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20652 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20653 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20654 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20655 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20656 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20657 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20659 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20660 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20661 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20662 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20663 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20664 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20665 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20666 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20667 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20668 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20669 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20670 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
20671 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
20672 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
20673 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
20674 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
20675 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
20676 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20677 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20678 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20679 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20680 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20681 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20682 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20683 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20684 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20685 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20686 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20687 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20688 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20689 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20690 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20691 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20692 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20693 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20694 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20695 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20696 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20697 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20698 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20699 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20700 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20701 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20702 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20703 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20704 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20705 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20706 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20707 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20708 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20709 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
20710 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
20711 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20712 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmb, Convert__Reg1_2__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20713 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20714 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20715 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20716 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20717 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20718 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20719 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20720 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20721 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
20722 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
20723 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20724 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmb, Convert__Reg1_2__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20725 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20726 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20727 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20728 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20729 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20730 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20731 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20732 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20733 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20734 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20735 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20736 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20737 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20738 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20739 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20740 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasERI, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20741 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20742 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20743 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20744 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20745 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20746 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20747 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20748 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20749 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasERI, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20750 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20751 { 14931 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20752 { 14931 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20753 { 14931 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20754 { 14931 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20755 { 14940 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20756 { 14940 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20757 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20758 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20759 { 14949 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20760 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20761 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20762 { 14949 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20763 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20764 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20765 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20766 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20767 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20768 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20769 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20770 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20771 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20772 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20773 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20774 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20775 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20776 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20777 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20778 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20779 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20780 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20781 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20782 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20783 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20784 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20785 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20786 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20787 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20788 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20789 { 14959 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20790 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20791 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20792 { 14959 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20793 { 14959 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20794 { 14959 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20795 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20796 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20797 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20798 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20799 { 14959 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20800 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20801 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20802 { 14959 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20803 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20804 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20805 { 14959 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20806 { 14959 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20807 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20808 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20809 { 14959 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20810 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20811 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20812 { 14959 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20813 { 14959 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20814 { 14959 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20815 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20816 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20817 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20818 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20819 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20820 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20821 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20822 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20823 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20824 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20825 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20826 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20827 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20828 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20829 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20830 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20831 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20832 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20833 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20834 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20835 { 14989 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20836 { 14989 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20837 { 14989 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20838 { 15001 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20839 { 15001 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20840 { 15001 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20841 { 15013 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, Feature_HasPFI, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20842 { 15028 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20843 { 15043 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20844 { 15058 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, Feature_HasPFI, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20845 { 15073 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, Feature_HasPFI, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20846 { 15088 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20847 { 15103 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, Feature_HasPFI, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20848 { 15118 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, Feature_HasPFI, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20849 { 15133 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20850 { 15133 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20851 { 15133 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20852 { 15145 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20853 { 15145 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20854 { 15145 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20855 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20856 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20857 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20858 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20859 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20860 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20861 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20862 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20863 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20864 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20865 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20866 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20867 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20868 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20869 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20870 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20871 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20872 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20873 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20874 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20875 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20876 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20877 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20878 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20879 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20880 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20881 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20882 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20883 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20884 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20885 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20886 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20887 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20888 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20889 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20890 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20891 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20892 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20893 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20894 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20895 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20896 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20897 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20898 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20899 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20900 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20901 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20902 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20903 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20904 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20905 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20906 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20907 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20908 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20909 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20910 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20911 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20912 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20913 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20914 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20915 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20916 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20917 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20918 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20919 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20920 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20921 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20922 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20923 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20924 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20925 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20926 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20927 { 15201 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20928 { 15201 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
20929 { 15201 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20930 { 15201 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20931 { 15201 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20932 { 15201 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20933 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20934 { 15201 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20935 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20936 { 15201 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20937 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20938 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20939 { 15201 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20940 { 15201 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20941 { 15201 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20942 { 15201 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20943 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20944 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20945 { 15201 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20946 { 15201 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20947 { 15201 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20948 { 15201 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20949 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20950 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20951 { 15201 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20952 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20953 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20954 { 15201 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20955 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20956 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20957 { 15201 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20958 { 15209 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20959 { 15209 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
20960 { 15209 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20961 { 15209 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20962 { 15209 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20963 { 15209 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20964 { 15209 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20965 { 15209 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20966 { 15209 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20967 { 15209 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20968 { 15209 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20969 { 15209 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20970 { 15209 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20971 { 15209 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20972 { 15209 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20973 { 15209 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20974 { 15209 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20975 { 15209 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20976 { 15209 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20977 { 15209 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20978 { 15209 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20979 { 15209 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20980 { 15209 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20981 { 15209 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20982 { 15209 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20983 { 15209 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20984 { 15209 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20985 { 15209 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20986 { 15209 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20987 { 15209 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20988 { 15209 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20989 { 15217 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20990 { 15217 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20991 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
20992 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
20993 { 15217 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
20994 { 15217 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20995 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
20996 { 15217 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20997 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
20998 { 15217 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
20999 { 15217 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
21000 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
21001 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
21002 { 15217 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21003 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21004 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21005 { 15217 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21006 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21007 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21008 { 15217 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21009 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21010 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21011 { 15217 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21012 { 15217 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21013 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21014 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21015 { 15217 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21016 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21017 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21018 { 15217 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21019 { 15217 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21020 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21021 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21022 { 15217 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21023 { 15225 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21024 { 15225 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21025 { 15225 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
21026 { 15225 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
21027 { 15225 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
21028 { 15225 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21029 { 15225 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
21030 { 15225 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21031 { 15225 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
21032 { 15225 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
21033 { 15225 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
21034 { 15225 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21035 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
21036 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
21037 { 15225 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21038 { 15225 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21039 { 15225 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21040 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21041 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21042 { 15225 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21043 { 15225 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21044 { 15225 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21045 { 15225 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21046 { 15225 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21047 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21048 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21049 { 15225 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21050 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21051 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21052 { 15225 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21053 { 15225 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21054 { 15225 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21055 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21056 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21057 { 15233 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21058 { 15233 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21059 { 15233 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21060 { 15233 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21061 { 15233 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21062 { 15233 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21063 { 15233 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21064 { 15233 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21065 { 15233 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21066 { 15233 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21067 { 15233 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21068 { 15241 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21069 { 15241 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21070 { 15241 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21071 { 15241 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21072 { 15241 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21073 { 15241 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21074 { 15241 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21075 { 15241 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21076 { 15241 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21077 { 15241 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21078 { 15241 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21079 { 15249 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
21080 { 15258 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21081 { 15258 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21082 { 15258 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21083 { 15258 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21084 { 15258 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21085 { 15258 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21086 { 15258 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21087 { 15258 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21088 { 15258 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21089 { 15258 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21090 { 15258 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21091 { 15258 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21092 { 15258 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21093 { 15258 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21094 { 15258 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21095 { 15258 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21096 { 15258 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21097 { 15258 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21098 { 15258 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21099 { 15258 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21100 { 15258 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21101 { 15258 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21102 { 15258 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21103 { 15258 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21104 { 15258 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21105 { 15258 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21106 { 15258 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21107 { 15258 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21108 { 15258 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21109 { 15258 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21110 { 15258 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21111 { 15258 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21112 { 15258 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21113 { 15258 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21114 { 15265 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21115 { 15265 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21116 { 15265 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21117 { 15265 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21118 { 15265 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21119 { 15265 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21120 { 15265 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21121 { 15265 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21122 { 15265 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21123 { 15265 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21124 { 15265 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21125 { 15265 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21126 { 15265 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21127 { 15265 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21128 { 15265 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21129 { 15265 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21130 { 15265 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21131 { 15265 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21132 { 15265 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21133 { 15265 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21134 { 15265 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21135 { 15265 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21136 { 15265 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21137 { 15265 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21138 { 15265 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21139 { 15265 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21140 { 15265 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21141 { 15265 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21142 { 15265 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21143 { 15265 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21144 { 15265 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21145 { 15265 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21146 { 15265 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21147 { 15265 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21148 { 15272 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21149 { 15272 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21150 { 15272 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21151 { 15272 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21152 { 15272 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21153 { 15272 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21154 { 15272 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21155 { 15272 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21156 { 15272 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21157 { 15272 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21158 { 15272 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21159 { 15279 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21160 { 15279 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21161 { 15279 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21162 { 15279 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21163 { 15279 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21164 { 15279 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21165 { 15279 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21166 { 15279 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21167 { 15279 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21168 { 15279 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21169 { 15279 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21170 { 15286 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21171 { 15286 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21172 { 15286 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21173 { 15286 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21174 { 15294 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21175 { 15294 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21176 { 15294 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21177 { 15294 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21178 { 15302 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21179 { 15302 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
21180 { 15302 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
21181 { 15302 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
21182 { 15302 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
21183 { 15311 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21184 { 15311 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
21185 { 15311 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
21186 { 15311 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
21187 { 15311 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
21188 { 15320 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21189 { 15320 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21190 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21191 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21192 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21193 { 15320 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21194 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21195 { 15320 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21196 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21197 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21198 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21199 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21200 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21201 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21202 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21203 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21204 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21205 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21206 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21207 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21208 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21209 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21210 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21211 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21212 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21213 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21214 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21215 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21216 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21217 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21218 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21219 { 15330 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21220 { 15330 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21221 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21222 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21223 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21224 { 15330 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21225 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21226 { 15330 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21227 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21228 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21229 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21230 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21231 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21232 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21233 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21234 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21235 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21236 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21237 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21238 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21239 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21240 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21241 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21242 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21243 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21244 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21245 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21246 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21247 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21248 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21249 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21250 { 15340 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21251 { 15340 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21252 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21253 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21254 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21255 { 15340 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21256 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21257 { 15340 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21258 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21259 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21260 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21261 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21262 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21263 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21264 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21265 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21266 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21267 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21268 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21269 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21270 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21271 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21272 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21273 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21274 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21275 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21276 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21277 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21278 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21279 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21280 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21281 { 15350 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21282 { 15350 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21283 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21284 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21285 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21286 { 15350 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21287 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21288 { 15350 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21289 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21290 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21291 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21292 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21293 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21294 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21295 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21296 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21297 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21298 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21299 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21300 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21301 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21302 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21303 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21304 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21305 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21306 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21307 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21308 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21309 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21310 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21311 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21312 { 15360 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21313 { 15360 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21314 { 15360 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21315 { 15360 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21316 { 15360 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21317 { 15360 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21318 { 15360 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21319 { 15360 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21320 { 15360 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21321 { 15360 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21322 { 15360 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21323 { 15360 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21324 { 15360 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21325 { 15360 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21326 { 15360 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21327 { 15360 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21328 { 15360 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21329 { 15360 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21330 { 15360 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21331 { 15360 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21332 { 15360 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21333 { 15360 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21334 { 15360 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21335 { 15360 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21336 { 15360 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21337 { 15360 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21338 { 15360 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21339 { 15360 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21340 { 15360 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21341 { 15360 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21342 { 15360 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21343 { 15367 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21344 { 15367 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21345 { 15367 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21346 { 15367 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21347 { 15367 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21348 { 15367 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21349 { 15367 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21350 { 15367 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21351 { 15367 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21352 { 15367 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21353 { 15367 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21354 { 15367 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21355 { 15367 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21356 { 15367 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21357 { 15367 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21358 { 15367 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21359 { 15367 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21360 { 15367 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21361 { 15367 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21362 { 15367 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21363 { 15367 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21364 { 15367 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21365 { 15367 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21366 { 15367 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21367 { 15367 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21368 { 15367 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21369 { 15367 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21370 { 15367 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21371 { 15367 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21372 { 15367 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21373 { 15367 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21374 { 15374 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, { }, },
21375 { 15383 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, { }, },
21376 { 15394 /* wait */, X86::WAIT, Convert_NoOperands, 0, { }, },
21377 { 15399 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, { }, },
21378 { 15415 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
21379 { 15425 /* wrfsbaseq */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21380 { 15444 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
21381 { 15454 /* wrgsbaseq */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21382 { 15464 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, { }, },
21383 { 15470 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, { }, },
21384 { 15477 /* wrssd */, X86::WRSSD, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21385 { 15483 /* wrssq */, X86::WRSSQ, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21386 { 15489 /* wrussd */, X86::WRUSSD, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21387 { 15496 /* wrussq */, X86::WRUSSQ, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21388 { 15503 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
21389 { 15510 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, { }, },
21390 { 15524 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
21391 { 15524 /* xaddb */, X86::XADD8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
21392 { 15530 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
21393 { 15530 /* xaddl */, X86::XADD32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21394 { 15536 /* xaddq */, X86::XADD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
21395 { 15536 /* xaddq */, X86::XADD64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21396 { 15542 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
21397 { 15542 /* xaddw */, X86::XADD16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
21398 { 15548 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
21399 { 15548 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
21400 { 15560 /* xchgb */, X86::XCHG8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21401 { 15560 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21402 { 15560 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
21403 { 15566 /* xchgl */, X86::XCHG32ar64, Convert__Reg1_1, Feature_In64BitMode, { MCK_EAX, MCK_GR32_NOAX }, },
21404 { 15566 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1, Feature_Not64BitMode, { MCK_EAX, MCK_GR32 }, },
21405 { 15566 /* xchgl */, X86::XCHG32ar64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32_NOAX, MCK_EAX }, },
21406 { 15566 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_EAX }, },
21407 { 15566 /* xchgl */, X86::XCHG32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21408 { 15566 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21409 { 15566 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
21410 { 15572 /* xchgq */, X86::XCHG64ar, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
21411 { 15572 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
21412 { 15572 /* xchgq */, X86::XCHG64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21413 { 15572 /* xchgq */, X86::XCHG64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21414 { 15572 /* xchgq */, X86::XCHG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
21415 { 15578 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
21416 { 15578 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
21417 { 15578 /* xchgw */, X86::XCHG16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21418 { 15578 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21419 { 15578 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
21420 { 15584 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, { }, },
21421 { 15594 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, { }, },
21422 { 15604 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, { }, },
21423 { 15614 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, { }, },
21424 { 15624 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, { }, },
21425 { 15634 /* xend */, X86::XEND, Convert_NoOperands, 0, { }, },
21426 { 15639 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, { }, },
21427 { 15646 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, { }, },
21428 { 15656 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
21429 { 15656 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
21430 { 15656 /* xorb */, X86::XOR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
21431 { 15656 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
21432 { 15656 /* xorb */, X86::XOR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
21433 { 15656 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
21434 { 15661 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
21435 { 15661 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21436 { 15661 /* xorl */, X86::XOR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
21437 { 15661 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
21438 { 15661 /* xorl */, X86::XOR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
21439 { 15661 /* xorl */, X86::XOR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
21440 { 15661 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
21441 { 15661 /* xorl */, X86::XOR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
21442 { 15661 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
21443 { 15666 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21444 { 15666 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21445 { 15672 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21446 { 15672 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21447 { 15678 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
21448 { 15678 /* xorq */, X86::XOR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21449 { 15678 /* xorq */, X86::XOR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
21450 { 15678 /* xorq */, X86::XOR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
21451 { 15678 /* xorq */, X86::XOR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
21452 { 15678 /* xorq */, X86::XOR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
21453 { 15678 /* xorq */, X86::XOR64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
21454 { 15678 /* xorq */, X86::XOR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
21455 { 15678 /* xorq */, X86::XOR64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
21456 { 15683 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
21457 { 15683 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
21458 { 15683 /* xorw */, X86::XOR16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
21459 { 15683 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
21460 { 15683 /* xorw */, X86::XOR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
21461 { 15683 /* xorw */, X86::XOR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
21462 { 15683 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
21463 { 15683 /* xorw */, X86::XOR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
21464 { 15683 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
21465 { 15688 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, { }, },
21466 { 15697 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
21467 { 15704 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21468 { 15713 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
21469 { 15721 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21470 { 15731 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
21471 { 15737 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21472 { 15745 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
21473 { 15752 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21474 { 15761 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
21475 { 15770 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21476 { 15781 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
21477 { 15788 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21478 { 15797 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, { }, },
21479 { 15804 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, { }, },
21480 { 15810 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, { }, },
21481 { 15818 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, { }, },
21482 { 15825 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, { }, },
21483 { 15835 /* xtest */, X86::XTEST, Convert_NoOperands, 0, { }, },
21484};
21485
21486static const MatchEntry MatchTable1[] = {
21487 { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
21488 { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
21489 { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
21490 { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
21491 { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
21492 { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
21493 { 16 /* adc */, X86::ADC8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21494 { 16 /* adc */, X86::ADC16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21495 { 16 /* adc */, X86::ADC16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21496 { 16 /* adc */, X86::ADC32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21497 { 16 /* adc */, X86::ADC32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21498 { 16 /* adc */, X86::ADC64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21499 { 16 /* adc */, X86::ADC64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21500 { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21501 { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21502 { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21503 { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21504 { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21505 { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21506 { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21507 { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21508 { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21509 { 16 /* adc */, X86::ADC64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21510 { 16 /* adc */, X86::ADC64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21511 { 16 /* adc */, X86::ADC64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21512 { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21513 { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21514 { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21515 { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21516 { 16 /* adc */, X86::ADC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21517 { 16 /* adc */, X86::ADC16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21518 { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21519 { 16 /* adc */, X86::ADC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21520 { 16 /* adc */, X86::ADC32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21521 { 16 /* adc */, X86::ADC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21522 { 16 /* adc */, X86::ADC64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21523 { 16 /* adc */, X86::ADC64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21524 { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21525 { 16 /* adc */, X86::ADC8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21526 { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21527 { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21528 { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21529 { 40 /* adcx */, X86::ADCX64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21530 { 57 /* add */, X86::ADD8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21531 { 57 /* add */, X86::ADD16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21532 { 57 /* add */, X86::ADD16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21533 { 57 /* add */, X86::ADD32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21534 { 57 /* add */, X86::ADD32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21535 { 57 /* add */, X86::ADD64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21536 { 57 /* add */, X86::ADD64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21537 { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21538 { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21539 { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21540 { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21541 { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21542 { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21543 { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21544 { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21545 { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21546 { 57 /* add */, X86::ADD64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21547 { 57 /* add */, X86::ADD64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21548 { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21549 { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21550 { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21551 { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21552 { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21553 { 57 /* add */, X86::ADD16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21554 { 57 /* add */, X86::ADD16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21555 { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21556 { 57 /* add */, X86::ADD32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21557 { 57 /* add */, X86::ADD32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21558 { 57 /* add */, X86::ADD64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21559 { 57 /* add */, X86::ADD64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21560 { 57 /* add */, X86::ADD64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21561 { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21562 { 57 /* add */, X86::ADD8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21563 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21564 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21565 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21566 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21567 { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21568 { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21569 { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21570 { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21571 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21572 { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21573 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21574 { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21575 { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21576 { 123 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21577 { 123 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21578 { 123 /* adox */, X86::ADOX64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21579 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21580 { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21581 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21582 { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21583 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21584 { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21585 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21586 { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21587 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21588 { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21589 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21590 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21591 { 199 /* and */, X86::AND8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21592 { 199 /* and */, X86::AND16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21593 { 199 /* and */, X86::AND16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21594 { 199 /* and */, X86::AND32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21595 { 199 /* and */, X86::AND32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21596 { 199 /* and */, X86::AND64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21597 { 199 /* and */, X86::AND64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21598 { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21599 { 199 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21600 { 199 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21601 { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21602 { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21603 { 199 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21604 { 199 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21605 { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21606 { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21607 { 199 /* and */, X86::AND64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21608 { 199 /* and */, X86::AND64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21609 { 199 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21610 { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21611 { 199 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21612 { 199 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21613 { 199 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21614 { 199 /* and */, X86::AND16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21615 { 199 /* and */, X86::AND16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21616 { 199 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21617 { 199 /* and */, X86::AND32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21618 { 199 /* and */, X86::AND32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21619 { 199 /* and */, X86::AND64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21620 { 199 /* and */, X86::AND64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21621 { 199 /* and */, X86::AND64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21622 { 199 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21623 { 199 /* and */, X86::AND8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21624 { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21625 { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
21626 { 213 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21627 { 213 /* andn */, X86::ANDN64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
21628 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21629 { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21630 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21631 { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21632 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21633 { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21634 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21635 { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21636 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
21637 { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
21638 { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21639 { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
21640 { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
21641 { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
21642 { 271 /* bextr */, X86::BEXTR64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21643 { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
21644 { 271 /* bextr */, X86::BEXTR64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
21645 { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
21646 { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21647 { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21648 { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21649 { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21650 { 299 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21651 { 299 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21652 { 299 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21653 { 299 /* blci */, X86::BLCI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21654 { 304 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21655 { 304 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21656 { 304 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21657 { 304 /* blcic */, X86::BLCIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21658 { 310 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21659 { 310 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21660 { 310 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21661 { 310 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21662 { 317 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21663 { 317 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21664 { 317 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21665 { 317 /* blcs */, X86::BLCS64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21666 { 322 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21667 { 322 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21668 { 330 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21669 { 330 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21670 { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21671 { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21672 { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
21673 { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
21674 { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21675 { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21676 { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
21677 { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
21678 { 356 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21679 { 356 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21680 { 356 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21681 { 356 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21682 { 364 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21683 { 364 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21684 { 364 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21685 { 364 /* blsi */, X86::BLSI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21686 { 369 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21687 { 369 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21688 { 369 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21689 { 369 /* blsic */, X86::BLSIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21690 { 387 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21691 { 387 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21692 { 387 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21693 { 387 /* blsmsk */, X86::BLSMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21694 { 410 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21695 { 410 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21696 { 410 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21697 { 410 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21698 { 427 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21699 { 427 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21700 { 427 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
21701 { 427 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21702 { 433 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21703 { 433 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21704 { 433 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
21705 { 433 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21706 { 439 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21707 { 439 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21708 { 439 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
21709 { 439 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21710 { 445 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_0__Mem5_1, 0, { MCK_BNDR, MCK_Mem }, },
21711 { 452 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
21712 { 452 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21713 { 458 /* bndmov */, X86::BNDMOVMRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_BNDR, MCK_BNDR }, },
21714 { 458 /* bndmov */, X86::BNDMOVRMrr, Convert__Reg1_0__Reg1_1, 0, { MCK_BNDR, MCK_BNDR }, },
21715 { 458 /* bndmov */, X86::BNDMOVRM64rm, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
21716 { 458 /* bndmov */, X86::BNDMOVRM32rm, Convert__Reg1_0__Mem645_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21717 { 458 /* bndmov */, X86::BNDMOVMR64mr, Convert__Mem1285_0__Reg1_1, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
21718 { 458 /* bndmov */, X86::BNDMOVMR32mr, Convert__Mem645_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
21719 { 465 /* bndstx */, X86::BNDSTXmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_BNDR }, },
21720 { 472 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
21721 { 472 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
21722 { 478 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21723 { 478 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21724 { 478 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21725 { 478 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21726 { 478 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21727 { 478 /* bsf */, X86::BSF64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21728 { 497 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21729 { 497 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21730 { 497 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21731 { 497 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21732 { 497 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21733 { 497 /* bsr */, X86::BSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21734 { 516 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
21735 { 516 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
21736 { 536 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21737 { 536 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21738 { 536 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21739 { 536 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21740 { 536 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21741 { 536 /* bt */, X86::BT64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21742 { 536 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21743 { 536 /* bt */, X86::BT16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21744 { 536 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21745 { 536 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21746 { 536 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21747 { 536 /* bt */, X86::BT64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21748 { 536 /* bt */, X86::BT64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21749 { 539 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21750 { 539 /* btc */, X86::BTC16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21751 { 539 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21752 { 539 /* btc */, X86::BTC32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21753 { 539 /* btc */, X86::BTC64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21754 { 539 /* btc */, X86::BTC64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21755 { 539 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21756 { 539 /* btc */, X86::BTC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21757 { 539 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21758 { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21759 { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21760 { 539 /* btc */, X86::BTC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21761 { 539 /* btc */, X86::BTC64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21762 { 566 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21763 { 566 /* btr */, X86::BTR16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21764 { 566 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21765 { 566 /* btr */, X86::BTR32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21766 { 566 /* btr */, X86::BTR64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21767 { 566 /* btr */, X86::BTR64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21768 { 566 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21769 { 566 /* btr */, X86::BTR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21770 { 566 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21771 { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21772 { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21773 { 566 /* btr */, X86::BTR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21774 { 566 /* btr */, X86::BTR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21775 { 585 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21776 { 585 /* bts */, X86::BTS16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21777 { 585 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21778 { 585 /* bts */, X86::BTS32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21779 { 585 /* bts */, X86::BTS64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21780 { 585 /* bts */, X86::BTS64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21781 { 585 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21782 { 585 /* bts */, X86::BTS16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21783 { 585 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21784 { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21785 { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21786 { 585 /* bts */, X86::BTS64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21787 { 585 /* bts */, X86::BTS64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21788 { 608 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21789 { 608 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
21790 { 608 /* bzhi */, X86::BZHI64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21791 { 608 /* bzhi */, X86::BZHI64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
21792 { 625 /* call */, X86::CALL16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
21793 { 625 /* call */, X86::CALL32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
21794 { 625 /* call */, X86::CALL64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21795 { 625 /* call */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
21796 { 625 /* call */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
21797 { 625 /* call */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
21798 { 625 /* call */, X86::CALL16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
21799 { 625 /* call */, X86::CALL16m, Convert__Mem165_0, Feature_In16BitMode, { MCK_Mem16 }, },
21800 { 625 /* call */, X86::CALL32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
21801 { 625 /* call */, X86::CALL32m, Convert__Mem325_0, Feature_In32BitMode, { MCK_Mem32 }, },
21802 { 625 /* call */, X86::CALL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
21803 { 625 /* call */, X86::CALL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
21804 { 625 /* call */, X86::FARCALL32m, Convert__Mem5_0, 0, { MCK_Mem }, },
21805 { 625 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
21806 { 625 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
21807 { 630 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
21808 { 642 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
21809 { 653 /* cbw */, X86::CBW, Convert_NoOperands, 0, { }, },
21810 { 657 /* cdq */, X86::CDQ, Convert_NoOperands, 0, { }, },
21811 { 661 /* cdqe */, X86::CDQE, Convert_NoOperands, 0, { }, },
21812 { 666 /* clac */, X86::CLAC, Convert_NoOperands, 0, { }, },
21813 { 671 /* clc */, X86::CLC, Convert_NoOperands, 0, { }, },
21814 { 675 /* cld */, X86::CLD, Convert_NoOperands, 0, { }, },
21815 { 679 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21816 { 687 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21817 { 698 /* clgi */, X86::CLGI, Convert_NoOperands, 0, { }, },
21818 { 703 /* cli */, X86::CLI, Convert_NoOperands, 0, { }, },
21819 { 707 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR8 }, },
21820 { 712 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR32 }, },
21821 { 717 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR64 }, },
21822 { 722 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
21823 { 731 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR16 }, },
21824 { 746 /* clts */, X86::CLTS, Convert_NoOperands, 0, { }, },
21825 { 751 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
21826 { 756 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, { }, },
21827 { 756 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
21828 { 756 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
21829 { 763 /* cmc */, X86::CMC, Convert_NoOperands, 0, { }, },
21830 { 767 /* cmova */, X86::CMOVA16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21831 { 767 /* cmova */, X86::CMOVA16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21832 { 767 /* cmova */, X86::CMOVA32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21833 { 767 /* cmova */, X86::CMOVA32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21834 { 767 /* cmova */, X86::CMOVA64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21835 { 767 /* cmova */, X86::CMOVA64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21836 { 773 /* cmovae */, X86::CMOVAE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21837 { 773 /* cmovae */, X86::CMOVAE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21838 { 773 /* cmovae */, X86::CMOVAE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21839 { 773 /* cmovae */, X86::CMOVAE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21840 { 773 /* cmovae */, X86::CMOVAE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21841 { 773 /* cmovae */, X86::CMOVAE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21842 { 825 /* cmovb */, X86::CMOVB16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21843 { 825 /* cmovb */, X86::CMOVB16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21844 { 825 /* cmovb */, X86::CMOVB32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21845 { 825 /* cmovb */, X86::CMOVB32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21846 { 825 /* cmovb */, X86::CMOVB64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21847 { 825 /* cmovb */, X86::CMOVB64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21848 { 831 /* cmovbe */, X86::CMOVBE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21849 { 831 /* cmovbe */, X86::CMOVBE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21850 { 831 /* cmovbe */, X86::CMOVBE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21851 { 831 /* cmovbe */, X86::CMOVBE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21852 { 831 /* cmovbe */, X86::CMOVBE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21853 { 831 /* cmovbe */, X86::CMOVBE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21854 { 883 /* cmove */, X86::CMOVE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21855 { 883 /* cmove */, X86::CMOVE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21856 { 883 /* cmove */, X86::CMOVE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21857 { 883 /* cmove */, X86::CMOVE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21858 { 883 /* cmove */, X86::CMOVE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21859 { 883 /* cmove */, X86::CMOVE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21860 { 910 /* cmovg */, X86::CMOVG16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21861 { 910 /* cmovg */, X86::CMOVG16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21862 { 910 /* cmovg */, X86::CMOVG32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21863 { 910 /* cmovg */, X86::CMOVG32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21864 { 910 /* cmovg */, X86::CMOVG64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21865 { 910 /* cmovg */, X86::CMOVG64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21866 { 916 /* cmovge */, X86::CMOVGE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21867 { 916 /* cmovge */, X86::CMOVGE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21868 { 916 /* cmovge */, X86::CMOVGE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21869 { 916 /* cmovge */, X86::CMOVGE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21870 { 916 /* cmovge */, X86::CMOVGE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21871 { 916 /* cmovge */, X86::CMOVGE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21872 { 968 /* cmovl */, X86::CMOVL16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21873 { 968 /* cmovl */, X86::CMOVL16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21874 { 968 /* cmovl */, X86::CMOVL32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21875 { 968 /* cmovl */, X86::CMOVL32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21876 { 968 /* cmovl */, X86::CMOVL64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21877 { 968 /* cmovl */, X86::CMOVL64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21878 { 974 /* cmovle */, X86::CMOVLE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21879 { 974 /* cmovle */, X86::CMOVLE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21880 { 974 /* cmovle */, X86::CMOVLE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21881 { 974 /* cmovle */, X86::CMOVLE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21882 { 974 /* cmovle */, X86::CMOVLE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21883 { 974 /* cmovle */, X86::CMOVLE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21884 { 1026 /* cmovne */, X86::CMOVNE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21885 { 1026 /* cmovne */, X86::CMOVNE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21886 { 1026 /* cmovne */, X86::CMOVNE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21887 { 1026 /* cmovne */, X86::CMOVNE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21888 { 1026 /* cmovne */, X86::CMOVNE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21889 { 1026 /* cmovne */, X86::CMOVNE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21890 { 1057 /* cmovno */, X86::CMOVNO16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21891 { 1057 /* cmovno */, X86::CMOVNO16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21892 { 1057 /* cmovno */, X86::CMOVNO32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21893 { 1057 /* cmovno */, X86::CMOVNO32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21894 { 1057 /* cmovno */, X86::CMOVNO64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21895 { 1057 /* cmovno */, X86::CMOVNO64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21896 { 1088 /* cmovnp */, X86::CMOVNP16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21897 { 1088 /* cmovnp */, X86::CMOVNP16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21898 { 1088 /* cmovnp */, X86::CMOVNP32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21899 { 1088 /* cmovnp */, X86::CMOVNP32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21900 { 1088 /* cmovnp */, X86::CMOVNP64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21901 { 1088 /* cmovnp */, X86::CMOVNP64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21902 { 1119 /* cmovns */, X86::CMOVNS16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21903 { 1119 /* cmovns */, X86::CMOVNS16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21904 { 1119 /* cmovns */, X86::CMOVNS32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21905 { 1119 /* cmovns */, X86::CMOVNS32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21906 { 1119 /* cmovns */, X86::CMOVNS64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21907 { 1119 /* cmovns */, X86::CMOVNS64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21908 { 1150 /* cmovo */, X86::CMOVO16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21909 { 1150 /* cmovo */, X86::CMOVO16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21910 { 1150 /* cmovo */, X86::CMOVO32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21911 { 1150 /* cmovo */, X86::CMOVO32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21912 { 1150 /* cmovo */, X86::CMOVO64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21913 { 1150 /* cmovo */, X86::CMOVO64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21914 { 1177 /* cmovp */, X86::CMOVP16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21915 { 1177 /* cmovp */, X86::CMOVP16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21916 { 1177 /* cmovp */, X86::CMOVP32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21917 { 1177 /* cmovp */, X86::CMOVP32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21918 { 1177 /* cmovp */, X86::CMOVP64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21919 { 1177 /* cmovp */, X86::CMOVP64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21920 { 1204 /* cmovs */, X86::CMOVS16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21921 { 1204 /* cmovs */, X86::CMOVS16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21922 { 1204 /* cmovs */, X86::CMOVS32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21923 { 1204 /* cmovs */, X86::CMOVS32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21924 { 1204 /* cmovs */, X86::CMOVS64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21925 { 1204 /* cmovs */, X86::CMOVS64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21926 { 1231 /* cmp */, X86::CMP8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21927 { 1231 /* cmp */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21928 { 1231 /* cmp */, X86::CMP16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21929 { 1231 /* cmp */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21930 { 1231 /* cmp */, X86::CMP32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21931 { 1231 /* cmp */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21932 { 1231 /* cmp */, X86::CMP64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21933 { 1231 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21934 { 1231 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21935 { 1231 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21936 { 1231 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21937 { 1231 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21938 { 1231 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21939 { 1231 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21940 { 1231 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21941 { 1231 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21942 { 1231 /* cmp */, X86::CMP64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21943 { 1231 /* cmp */, X86::CMP64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21944 { 1231 /* cmp */, X86::CMP64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21945 { 1231 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21946 { 1231 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21947 { 1231 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21948 { 1231 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21949 { 1231 /* cmp */, X86::CMP16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21950 { 1231 /* cmp */, X86::CMP16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21951 { 1231 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21952 { 1231 /* cmp */, X86::CMP32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21953 { 1231 /* cmp */, X86::CMP32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21954 { 1231 /* cmp */, X86::CMP64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21955 { 1231 /* cmp */, X86::CMP64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21956 { 1231 /* cmp */, X86::CMP64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21957 { 1231 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21958 { 1231 /* cmp */, X86::CMP8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21959 { 1231 /* cmp */, X86::CMPPDrri, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
21960 { 1231 /* cmp */, X86::CMPPDrmi, Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_Mem128 }, },
21961 { 1231 /* cmp */, X86::CMPPSrri, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
21962 { 1231 /* cmp */, X86::CMPPSrmi, Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_Mem128 }, },
21963 { 1231 /* cmp */, X86::CMPSDrr, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
21964 { 1231 /* cmp */, X86::CMPSDrm, Convert__Reg1_2__Tie0__Mem645_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_Mem64 }, },
21965 { 1231 /* cmp */, X86::CMPSSrr, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
21966 { 1231 /* cmp */, X86::CMPSSrm, Convert__Reg1_2__Tie0__Mem325_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_Mem32 }, },
21967 { 1245 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21968 { 1245 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21969 { 1251 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21970 { 1251 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21971 { 1262 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
21972 { 1262 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
21973 { 1262 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
21974 { 1262 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
21975 { 1267 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
21976 { 1273 /* cmpsd */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
21977 { 1273 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21978 { 1273 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
21979 { 1285 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_DstIdx64 }, },
21980 { 1291 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21981 { 1291 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
21982 { 1297 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
21983 { 1308 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21984 { 1308 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21985 { 1308 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21986 { 1308 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21987 { 1308 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21988 { 1308 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21989 { 1308 /* cmpxchg */, X86::CMPXCHG64rm, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21990 { 1308 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21991 { 1316 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
21992 { 1327 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
21993 { 1373 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21994 { 1373 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21995 { 1380 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21996 { 1380 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21997 { 1387 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, { }, },
21998 { 1393 /* cqo */, X86::CQO, Convert_NoOperands, 0, { }, },
21999 { 1402 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22000 { 1402 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22001 { 1402 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22002 { 1402 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22003 { 1402 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22004 { 1402 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
22005 { 1402 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22006 { 1402 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22007 { 1402 /* crc32 */, X86::CRC32r64m64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22008 { 1402 /* crc32 */, X86::CRC32r64m8, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
22009 { 1436 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, { }, },
22010 { 1439 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22011 { 1439 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22012 { 1448 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22013 { 1448 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22014 { 1457 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22015 { 1457 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22016 { 1466 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22017 { 1466 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
22018 { 1475 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22019 { 1475 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22020 { 1484 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
22021 { 1484 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22022 { 1493 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
22023 { 1493 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22024 { 1502 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22025 { 1502 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22026 { 1511 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22027 { 1511 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22028 { 1520 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22029 { 1520 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22030 { 1529 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22031 { 1529 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22032 { 1529 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
22033 { 1529 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
22034 { 1529 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22035 { 1529 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22036 { 1529 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22037 { 1529 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22038 { 1558 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22039 { 1558 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22040 { 1567 /* cvtsi2sd */, X86::CVTSI2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22041 { 1567 /* cvtsi2sd */, X86::CVTSI642SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22042 { 1567 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22043 { 1567 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22044 { 1567 /* cvtsi2sd */, X86::CVTSI642SDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22045 { 1596 /* cvtsi2ss */, X86::CVTSI2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22046 { 1596 /* cvtsi2ss */, X86::CVTSI642SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22047 { 1596 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22048 { 1596 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22049 { 1596 /* cvtsi2ss */, X86::CVTSI642SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22050 { 1625 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22051 { 1625 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22052 { 1634 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22053 { 1634 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22054 { 1634 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22055 { 1634 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22056 { 1634 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22057 { 1634 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22058 { 1634 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22059 { 1634 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22060 { 1663 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22061 { 1663 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22062 { 1673 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22063 { 1673 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
22064 { 1683 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22065 { 1683 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22066 { 1693 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22067 { 1693 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22068 { 1703 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22069 { 1703 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22070 { 1703 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
22071 { 1703 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
22072 { 1703 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22073 { 1703 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22074 { 1703 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22075 { 1703 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22076 { 1735 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22077 { 1735 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22078 { 1735 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22079 { 1735 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22080 { 1735 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22081 { 1735 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22082 { 1735 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22083 { 1735 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22084 { 1767 /* cwd */, X86::CWD, Convert_NoOperands, 0, { }, },
22085 { 1771 /* cwde */, X86::CWDE, Convert_NoOperands, 0, { }, },
22086 { 1786 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
22087 { 1790 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
22088 { 1794 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, Feature_Not16BitMode, { }, },
22089 { 1801 /* data32 */, X86::DATA32_PREFIX, Convert_NoOperands, Feature_In16BitMode, { }, },
22090 { 1808 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
22091 { 1808 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
22092 { 1808 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
22093 { 1808 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
22094 { 1808 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
22095 { 1808 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
22096 { 1808 /* dec */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22097 { 1808 /* dec */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22098 { 1808 /* dec */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22099 { 1808 /* dec */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22100 { 1832 /* div */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22101 { 1832 /* div */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22102 { 1832 /* div */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22103 { 1832 /* div */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22104 { 1832 /* div */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22105 { 1832 /* div */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22106 { 1832 /* div */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22107 { 1832 /* div */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22108 { 1832 /* div */, X86::DIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
22109 { 1832 /* div */, X86::DIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
22110 { 1832 /* div */, X86::DIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
22111 { 1832 /* div */, X86::DIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
22112 { 1832 /* div */, X86::DIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
22113 { 1832 /* div */, X86::DIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
22114 { 1832 /* div */, X86::DIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
22115 { 1832 /* div */, X86::DIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
22116 { 1846 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22117 { 1846 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22118 { 1852 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22119 { 1852 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22120 { 1863 /* divsd */, X86::DIVSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22121 { 1863 /* divsd */, X86::DIVSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22122 { 1869 /* divss */, X86::DIVSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22123 { 1869 /* divss */, X86::DIVSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22124 { 1880 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22125 { 1880 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22126 { 1885 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22127 { 1885 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22128 { 1890 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, { }, },
22129 { 1893 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, { }, },
22130 { 1898 /* encls */, X86::ENCLS, Convert_NoOperands, 0, { }, },
22131 { 1904 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, { }, },
22132 { 1910 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
22133 { 1916 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, { }, },
22134 { 1919 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
22135 { 1919 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22136 { 1929 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22137 { 1929 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
22138 { 1935 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, { }, },
22139 { 1941 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, { }, },
22140 { 1946 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
22141 { 1946 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22142 { 1946 /* fadd */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22143 { 1946 /* fadd */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22144 { 1946 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22145 { 1946 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22146 { 1946 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22147 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
22148 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22149 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22150 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22151 { 1957 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22152 { 1969 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22153 { 1974 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22154 { 1980 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, { }, },
22155 { 1985 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22156 { 1992 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22157 { 2000 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22158 { 2007 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22159 { 2015 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22160 { 2024 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22161 { 2032 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22162 { 2040 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22163 { 2047 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, { }, },
22164 { 2047 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22165 { 2047 /* fcom */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22166 { 2047 /* fcom */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22167 { 2052 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, { }, },
22168 { 2052 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
22169 { 2052 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22170 { 2052 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22171 { 2064 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, { }, },
22172 { 2064 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22173 { 2064 /* fcomp */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22174 { 2064 /* fcomp */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22175 { 2070 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, { }, },
22176 { 2070 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
22177 { 2070 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22178 { 2070 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22179 { 2084 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, { }, },
22180 { 2104 /* fcos */, X86::COS_F, Convert_NoOperands, 0, { }, },
22181 { 2109 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, { }, },
22182 { 2117 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22183 { 2117 /* fdiv */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22184 { 2117 /* fdiv */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22185 { 2117 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22186 { 2117 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22187 { 2117 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22188 { 2128 /* fdivp */, X86::DIV_FPrST0, Convert__regST1, 0, { }, },
22189 { 2128 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22190 { 2128 /* fdivp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22191 { 2128 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22192 { 2128 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22193 { 2134 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22194 { 2134 /* fdivr */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22195 { 2134 /* fdivr */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22196 { 2134 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22197 { 2134 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22198 { 2134 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22199 { 2147 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST1, 0, { }, },
22200 { 2147 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22201 { 2147 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22202 { 2147 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22203 { 2147 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22204 { 2167 /* femms */, X86::FEMMS, Convert_NoOperands, 0, { }, },
22205 { 2173 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
22206 { 2179 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
22207 { 2186 /* fiadd */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22208 { 2186 /* fiadd */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22209 { 2206 /* ficom */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22210 { 2206 /* ficom */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22211 { 2219 /* ficomp */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22212 { 2219 /* ficomp */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22213 { 2249 /* fidiv */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22214 { 2249 /* fidiv */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22215 { 2262 /* fidivr */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22216 { 2262 /* fidivr */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22217 { 2292 /* fild */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22218 { 2292 /* fild */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22219 { 2292 /* fild */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22220 { 2316 /* fimul */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22221 { 2316 /* fimul */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22222 { 2336 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, { }, },
22223 { 2344 /* fist */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22224 { 2344 /* fist */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22225 { 2355 /* fistp */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22226 { 2355 /* fistp */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22227 { 2355 /* fistp */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22228 { 2389 /* fisttp */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22229 { 2389 /* fisttp */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22230 { 2389 /* fisttp */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22231 { 2421 /* fisub */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22232 { 2421 /* fisub */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22233 { 2434 /* fisubr */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22234 { 2434 /* fisubr */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22235 { 2464 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
22236 { 2464 /* fld */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22237 { 2464 /* fld */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22238 { 2464 /* fld */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22239 { 2468 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, { }, },
22240 { 2473 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22241 { 2479 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22242 { 2491 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, { }, },
22243 { 2498 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, { }, },
22244 { 2505 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, { }, },
22245 { 2512 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, { }, },
22246 { 2519 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, { }, },
22247 { 2535 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, { }, },
22248 { 2540 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
22249 { 2540 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22250 { 2540 /* fmul */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22251 { 2540 /* fmul */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22252 { 2540 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22253 { 2540 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22254 { 2540 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22255 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
22256 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22257 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22258 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22259 { 2551 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22260 { 2563 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, { }, },
22261 { 2570 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, { }, },
22262 { 2577 /* fnop */, X86::FNOP, Convert_NoOperands, 0, { }, },
22263 { 2582 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22264 { 2589 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22265 { 2596 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22266 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { }, },
22267 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AL }, },
22268 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
22269 { 2604 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_EAX }, },
22270 { 2604 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22271 { 2611 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, { }, },
22272 { 2618 /* fprem */, X86::FPREM, Convert_NoOperands, 0, { }, },
22273 { 2624 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, { }, },
22274 { 2631 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, { }, },
22275 { 2637 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, { }, },
22276 { 2645 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22277 { 2652 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, { }, },
22278 { 2655 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, { }, },
22279 { 2662 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, { }, },
22280 { 2667 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, { }, },
22281 { 2675 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, { }, },
22282 { 2681 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
22283 { 2681 /* fst */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22284 { 2681 /* fst */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22285 { 2690 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
22286 { 2690 /* fstp */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22287 { 2690 /* fstp */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22288 { 2690 /* fstp */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22289 { 2718 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22290 { 2718 /* fsub */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22291 { 2718 /* fsub */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22292 { 2718 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22293 { 2718 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22294 { 2718 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22295 { 2729 /* fsubp */, X86::SUB_FPrST0, Convert__regST1, 0, { }, },
22296 { 2729 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22297 { 2729 /* fsubp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22298 { 2729 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22299 { 2729 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22300 { 2735 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22301 { 2735 /* fsubr */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22302 { 2735 /* fsubr */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22303 { 2735 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22304 { 2735 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22305 { 2735 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22306 { 2748 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST1, 0, { }, },
22307 { 2748 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22308 { 2748 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22309 { 2748 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22310 { 2748 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22311 { 2768 /* ftst */, X86::TST_F, Convert_NoOperands, 0, { }, },
22312 { 2773 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, { }, },
22313 { 2773 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
22314 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, { }, },
22315 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
22316 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22317 { 2779 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22318 { 2786 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, { }, },
22319 { 2786 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
22320 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, { }, },
22321 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
22322 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22323 { 2793 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22324 { 2801 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, { }, },
22325 { 2809 /* fxam */, X86::FXAM, Convert_NoOperands, 0, { }, },
22326 { 2814 /* fxch */, X86::XCH_F, Convert__regST1, 0, { }, },
22327 { 2814 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
22328 { 2819 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
22329 { 2827 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22330 { 2837 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
22331 { 2844 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22332 { 2853 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, { }, },
22333 { 2861 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, { }, },
22334 { 2867 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, { }, },
22335 { 2875 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, { }, },
22336 { 2882 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22337 { 2882 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22338 { 2899 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22339 { 2899 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22340 { 2913 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22341 { 2913 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22342 { 2923 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, { }, },
22343 { 2926 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22344 { 2926 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22345 { 2933 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22346 { 2933 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22347 { 2940 /* hlt */, X86::HLT, Convert_NoOperands, 0, { }, },
22348 { 2944 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22349 { 2944 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22350 { 2951 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22351 { 2951 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22352 { 2958 /* idiv */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22353 { 2958 /* idiv */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22354 { 2958 /* idiv */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22355 { 2958 /* idiv */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22356 { 2958 /* idiv */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22357 { 2958 /* idiv */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22358 { 2958 /* idiv */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22359 { 2958 /* idiv */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22360 { 2958 /* idiv */, X86::IDIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
22361 { 2958 /* idiv */, X86::IDIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
22362 { 2958 /* idiv */, X86::IDIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
22363 { 2958 /* idiv */, X86::IDIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
22364 { 2958 /* idiv */, X86::IDIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
22365 { 2958 /* idiv */, X86::IDIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
22366 { 2958 /* idiv */, X86::IDIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
22367 { 2958 /* idiv */, X86::IDIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
22368 { 2987 /* imul */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22369 { 2987 /* imul */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22370 { 2987 /* imul */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22371 { 2987 /* imul */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22372 { 2987 /* imul */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22373 { 2987 /* imul */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22374 { 2987 /* imul */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22375 { 2987 /* imul */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22376 { 2987 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22377 { 2987 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22378 { 2987 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22379 { 2987 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22380 { 2987 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22381 { 2987 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22382 { 2987 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22383 { 2987 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22384 { 2987 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22385 { 2987 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22386 { 2987 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22387 { 2987 /* imul */, X86::IMUL64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22388 { 2987 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
22389 { 2987 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR16, MCK_GR16, MCK_Imm }, },
22390 { 2987 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, },
22391 { 2987 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, 0, { MCK_GR16, MCK_Mem16, MCK_Imm }, },
22392 { 2987 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
22393 { 2987 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22394 { 2987 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, },
22395 { 2987 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22396 { 2987 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i8 }, },
22397 { 2987 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
22398 { 2987 /* imul */, X86::IMUL64rmi8, Convert__Reg1_0__Mem645_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i8 }, },
22399 { 2987 /* imul */, X86::IMUL64rmi32, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
22400 { 3016 /* in */, X86::IN8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
22401 { 3016 /* in */, X86::IN8ri, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
22402 { 3016 /* in */, X86::IN16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
22403 { 3016 /* in */, X86::IN16ri, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
22404 { 3016 /* in */, X86::IN32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
22405 { 3016 /* in */, X86::IN32ri, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
22406 { 3019 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
22407 { 3019 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22408 { 3023 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
22409 { 3023 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
22410 { 3023 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
22411 { 3023 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
22412 { 3023 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
22413 { 3023 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
22414 { 3023 /* inc */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22415 { 3023 /* inc */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22416 { 3023 /* inc */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22417 { 3023 /* inc */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22418 { 3042 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
22419 { 3050 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
22420 { 3063 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
22421 { 3063 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22422 { 3067 /* ins */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
22423 { 3067 /* ins */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
22424 { 3067 /* ins */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
22425 { 3071 /* insb */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
22426 { 3076 /* insd */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
22427 { 3081 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22428 { 3081 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
22429 { 3090 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22430 { 3090 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
22431 { 3103 /* insw */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
22432 { 3108 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22433 { 3112 /* int3 */, X86::INT3, Convert_NoOperands, 0, { }, },
22434 { 3117 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, { }, },
22435 { 3122 /* invd */, X86::INVD, Convert_NoOperands, 0, { }, },
22436 { 3127 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22437 { 3127 /* invept */, X86::INVEPT64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22438 { 3134 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22439 { 3141 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
22440 { 3141 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
22441 { 3149 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22442 { 3149 /* invpcid */, X86::INVPCID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22443 { 3157 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22444 { 3157 /* invvpid */, X86::INVVPID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22445 { 3165 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
22446 { 3165 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22447 { 3169 /* iret */, X86::IRET16, Convert_NoOperands, 0, { }, },
22448 { 3174 /* iretd */, X86::IRET32, Convert_NoOperands, 0, { }, },
22449 { 3186 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
22450 { 3198 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22451 { 3201 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22452 { 3205 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22453 { 3208 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22454 { 3212 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
22455 { 3217 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22456 { 3220 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22457 { 3226 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22458 { 3229 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22459 { 3233 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22460 { 3236 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22461 { 3240 /* jmp */, X86::JMP16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
22462 { 3240 /* jmp */, X86::JMP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
22463 { 3240 /* jmp */, X86::JMP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
22464 { 3240 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22465 { 3240 /* jmp */, X86::JMP16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
22466 { 3240 /* jmp */, X86::JMP16m, Convert__Mem165_0, Feature_In16BitMode, { MCK_Mem16 }, },
22467 { 3240 /* jmp */, X86::JMP32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
22468 { 3240 /* jmp */, X86::JMP32m, Convert__Mem325_0, Feature_In32BitMode, { MCK_Mem32 }, },
22469 { 3240 /* jmp */, X86::JMP64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22470 { 3240 /* jmp */, X86::JMP64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22471 { 3240 /* jmp */, X86::FARJMP32m, Convert__Mem5_0, 0, { MCK_Mem }, },
22472 { 3240 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22473 { 3240 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22474 { 3244 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22475 { 3254 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22476 { 3259 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22477 { 3263 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22478 { 3267 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22479 { 3271 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22480 { 3275 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22481 { 3278 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22482 { 3281 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
22483 { 3287 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22484 { 3290 /* kaddb */, X86::KADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22485 { 3296 /* kaddd */, X86::KADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22486 { 3302 /* kaddq */, X86::KADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22487 { 3308 /* kaddw */, X86::KADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22488 { 3314 /* kandb */, X86::KANDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22489 { 3320 /* kandd */, X86::KANDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22490 { 3326 /* kandnb */, X86::KANDNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22491 { 3333 /* kandnd */, X86::KANDNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22492 { 3340 /* kandnq */, X86::KANDNQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22493 { 3347 /* kandnw */, X86::KANDNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22494 { 3354 /* kandq */, X86::KANDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22495 { 3360 /* kandw */, X86::KANDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22496 { 3366 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
22497 { 3366 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_GR32 }, },
22498 { 3366 /* kmovb */, X86::KMOVBkm, Convert__Reg1_0__Mem85_1, Feature_HasDQI, { MCK_VK1, MCK_Mem8 }, },
22499 { 3366 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_GR32, MCK_VK1 }, },
22500 { 3366 /* kmovb */, X86::KMOVBmk, Convert__Mem85_0__Reg1_1, Feature_HasDQI, { MCK_Mem8, MCK_VK1 }, },
22501 { 3372 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22502 { 3372 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_GR32 }, },
22503 { 3372 /* kmovd */, X86::KMOVDkm, Convert__Reg1_0__Mem325_1, Feature_HasBWI, { MCK_VK1, MCK_Mem32 }, },
22504 { 3372 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_GR32, MCK_VK1 }, },
22505 { 3372 /* kmovd */, X86::KMOVDmk, Convert__Mem325_0__Reg1_1, Feature_HasBWI, { MCK_Mem32, MCK_VK1 }, },
22506 { 3378 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22507 { 3378 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_GR64 }, },
22508 { 3378 /* kmovq */, X86::KMOVQkm, Convert__Reg1_0__Mem645_1, Feature_HasBWI, { MCK_VK1, MCK_Mem64 }, },
22509 { 3378 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_GR64, MCK_VK1 }, },
22510 { 3378 /* kmovq */, X86::KMOVQmk, Convert__Mem645_0__Reg1_1, Feature_HasBWI, { MCK_Mem64, MCK_VK1 }, },
22511 { 3384 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
22512 { 3384 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_GR32 }, },
22513 { 3384 /* kmovw */, X86::KMOVWkm, Convert__Reg1_0__Mem165_1, Feature_HasAVX512, { MCK_VK1, MCK_Mem16 }, },
22514 { 3384 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_VK1 }, },
22515 { 3384 /* kmovw */, X86::KMOVWmk, Convert__Mem165_0__Reg1_1, Feature_HasAVX512, { MCK_Mem16, MCK_VK1 }, },
22516 { 3390 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
22517 { 3396 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22518 { 3402 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22519 { 3408 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
22520 { 3414 /* korb */, X86::KORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22521 { 3419 /* kord */, X86::KORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22522 { 3424 /* korq */, X86::KORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22523 { 3429 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
22524 { 3438 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22525 { 3447 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22526 { 3456 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
22527 { 3465 /* korw */, X86::KORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22528 { 3470 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22529 { 3479 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22530 { 3488 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22531 { 3497 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22532 { 3506 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22533 { 3515 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22534 { 3524 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22535 { 3533 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22536 { 3542 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
22537 { 3549 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22538 { 3556 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
22539 { 3563 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
22540 { 3570 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22541 { 3579 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22542 { 3588 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22543 { 3597 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22544 { 3604 /* kxnord */, X86::KXNORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22545 { 3611 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22546 { 3618 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22547 { 3625 /* kxorb */, X86::KXORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22548 { 3631 /* kxord */, X86::KXORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22549 { 3637 /* kxorq */, X86::KXORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22550 { 3643 /* kxorw */, X86::KXORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22551 { 3649 /* lahf */, X86::LAHF, Convert_NoOperands, 0, { }, },
22552 { 3654 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22553 { 3654 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22554 { 3654 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22555 { 3654 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22556 { 3654 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
22557 { 3654 /* lar */, X86::LAR64rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22558 { 3673 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
22559 { 3673 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
22560 { 3673 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, 0, { MCK_Mem }, },
22561 { 3673 /* lcall */, X86::FARCALL64, Convert__Mem5_0, 0, { MCK_Mem }, },
22562 { 3673 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22563 { 3673 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22564 { 3673 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22565 { 3673 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22566 { 3700 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22567 { 3706 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22568 { 3714 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
22569 { 3714 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22570 { 3728 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22571 { 3728 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22572 { 3728 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_GR32, MCK_Mem }, },
22573 { 3728 /* lea */, X86::LEA64r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22574 { 3742 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, { }, },
22575 { 3742 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, { }, },
22576 { 3753 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
22577 { 3753 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22578 { 3767 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, { }, },
22579 { 3774 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22580 { 3774 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22581 { 3774 /* lfs */, X86::LFS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22582 { 3793 /* lgdt */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22583 { 3793 /* lgdt */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22584 { 3793 /* lgdt */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22585 { 3816 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22586 { 3816 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22587 { 3816 /* lgs */, X86::LGS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22588 { 3835 /* lidt */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22589 { 3835 /* lidt */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22590 { 3835 /* lidt */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22591 { 3858 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
22592 { 3858 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
22593 { 3858 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, 0, { MCK_Mem }, },
22594 { 3858 /* ljmp */, X86::FARJMP64, Convert__Mem5_0, 0, { MCK_Mem }, },
22595 { 3858 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22596 { 3858 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22597 { 3858 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22598 { 3858 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22599 { 3881 /* lldt */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22600 { 3881 /* lldt */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22601 { 3892 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
22602 { 3892 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
22603 { 3899 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22604 { 3899 /* lmsw */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22605 { 3910 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, { }, },
22606 { 3915 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
22607 { 3915 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
22608 { 3915 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
22609 { 3915 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
22610 { 3915 /* lods */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
22611 { 3915 /* lods */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
22612 { 3915 /* lods */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
22613 { 3915 /* lods */, X86::LODSQ, Convert__SrcIdx642_1, Feature_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
22614 { 3920 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
22615 { 3920 /* lodsb */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
22616 { 3926 /* lodsd */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
22617 { 3926 /* lodsd */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
22618 { 3938 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
22619 { 3938 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_1, 0, { MCK_RAX, MCK_SrcIdx64 }, },
22620 { 3944 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
22621 { 3944 /* lodsw */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
22622 { 3950 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22623 { 3955 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22624 { 3961 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22625 { 3986 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22626 { 3986 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22627 { 3986 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22628 { 3986 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22629 { 3986 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22630 { 3986 /* lsl */, X86::LSL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22631 { 4005 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22632 { 4005 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22633 { 4005 /* lss */, X86::LSS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22634 { 4024 /* ltr */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
22635 { 4024 /* ltr */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22636 { 4033 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22637 { 4033 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22638 { 4033 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR64, MCK_GR32, MCK_Imm }, },
22639 { 4033 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
22640 { 4040 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22641 { 4040 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22642 { 4040 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR64, MCK_GR32, MCK_Imm }, },
22643 { 4040 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
22644 { 4047 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22645 { 4047 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22646 { 4047 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22647 { 4047 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22648 { 4047 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22649 { 4047 /* lzcnt */, X86::LZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22650 { 4074 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
22651 { 4074 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
22652 { 4085 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
22653 { 4085 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
22654 { 4094 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22655 { 4094 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22656 { 4100 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22657 { 4100 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22658 { 4106 /* maxsd */, X86::MAXSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22659 { 4106 /* maxsd */, X86::MAXSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22660 { 4112 /* maxss */, X86::MAXSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22661 { 4112 /* maxss */, X86::MAXSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22662 { 4118 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, { }, },
22663 { 4125 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22664 { 4125 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22665 { 4131 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22666 { 4131 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22667 { 4137 /* minsd */, X86::MINSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22668 { 4137 /* minsd */, X86::MINSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22669 { 4143 /* minss */, X86::MINSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22670 { 4143 /* minss */, X86::MINSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22671 { 4149 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, { }, },
22672 { 4149 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
22673 { 4149 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
22674 { 4157 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, { }, },
22675 { 4157 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
22676 { 4157 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
22677 { 4166 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, { }, },
22678 { 4174 /* mov */, X86::MOV8ao16, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
22679 { 4174 /* mov */, X86::MOV8ao32, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
22680 { 4174 /* mov */, X86::MOV16ao16, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
22681 { 4174 /* mov */, X86::MOV16ao32, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
22682 { 4174 /* mov */, X86::MOV32ao16, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
22683 { 4174 /* mov */, X86::MOV32ao32, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
22684 { 4174 /* mov */, X86::MOV64ao32, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
22685 { 4174 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
22686 { 4174 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
22687 { 4174 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
22688 { 4174 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
22689 { 4174 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
22690 { 4174 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
22691 { 4174 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
22692 { 4174 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
22693 { 4174 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
22694 { 4174 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
22695 { 4174 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22696 { 4174 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22697 { 4174 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22698 { 4174 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
22699 { 4174 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
22700 { 4174 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
22701 { 4174 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22702 { 4174 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22703 { 4174 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22704 { 4174 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
22705 { 4174 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
22706 { 4174 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
22707 { 4174 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22708 { 4174 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22709 { 4174 /* mov */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
22710 { 4174 /* mov */, X86::MOV64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22711 { 4174 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22712 { 4174 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
22713 { 4174 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
22714 { 4174 /* mov */, X86::MOV16o16a, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
22715 { 4174 /* mov */, X86::MOV32o16a, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
22716 { 4174 /* mov */, X86::MOV8o16a, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
22717 { 4174 /* mov */, X86::MOV16o32a, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
22718 { 4174 /* mov */, X86::MOV32o32a, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
22719 { 4174 /* mov */, X86::MOV64o32a, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
22720 { 4174 /* mov */, X86::MOV8o32a, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
22721 { 4174 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
22722 { 4174 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
22723 { 4174 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22724 { 4174 /* mov */, X86::MOV16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
22725 { 4174 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22726 { 4174 /* mov */, X86::MOV32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
22727 { 4174 /* mov */, X86::MOV64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22728 { 4174 /* mov */, X86::MOV64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22729 { 4174 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22730 { 4174 /* mov */, X86::MOV8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
22731 { 4178 /* movabs */, X86::MOV8ao64, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
22732 { 4178 /* movabs */, X86::MOV16ao64, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
22733 { 4178 /* movabs */, X86::MOV32ao64, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
22734 { 4178 /* movabs */, X86::MOV64ao64, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
22735 { 4178 /* movabs */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
22736 { 4178 /* movabs */, X86::MOV16o64a, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
22737 { 4178 /* movabs */, X86::MOV32o64a, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
22738 { 4178 /* movabs */, X86::MOV64o64a, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
22739 { 4178 /* movabs */, X86::MOV8o64a, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
22740 { 4217 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22741 { 4217 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22742 { 4217 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22743 { 4224 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22744 { 4224 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22745 { 4224 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22746 { 4236 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22747 { 4236 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22748 { 4236 /* movbe */, X86::MOVBE64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22749 { 4236 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22750 { 4236 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22751 { 4236 /* movbe */, X86::MOVBE64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22752 { 4263 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR32 }, },
22753 { 4263 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
22754 { 4263 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
22755 { 4263 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22756 { 4263 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22757 { 4263 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22758 { 4263 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VR64 }, },
22759 { 4263 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22760 { 4263 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
22761 { 4263 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22762 { 4263 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR64 }, },
22763 { 4263 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22764 { 4268 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22765 { 4268 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22766 { 4276 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22767 { 4284 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22768 { 4284 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22769 { 4284 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22770 { 4291 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22771 { 4291 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22772 { 4291 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22773 { 4298 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22774 { 4306 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22775 { 4306 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22776 { 4313 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22777 { 4313 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22778 { 4325 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22779 { 4333 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22780 { 4333 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22781 { 4340 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22782 { 4340 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22783 { 4347 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
22784 { 4356 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
22785 { 4365 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22786 { 4373 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22787 { 4382 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22788 { 4382 /* movnti */, X86::MOVNTI_64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22789 { 4405 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22790 { 4413 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22791 { 4421 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
22792 { 4428 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22793 { 4436 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22794 { 4444 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22795 { 4444 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
22796 { 4444 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22797 { 4444 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22798 { 4444 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22799 { 4444 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22800 { 4444 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
22801 { 4444 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22802 { 4444 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
22803 { 4444 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22804 { 4449 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
22805 { 4457 /* movs */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
22806 { 4457 /* movs */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
22807 { 4457 /* movs */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
22808 { 4457 /* movs */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
22809 { 4462 /* movsb */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
22810 { 4489 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22811 { 4489 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22812 { 4489 /* movsd */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
22813 { 4489 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22814 { 4495 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22815 { 4495 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22816 { 4510 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22817 { 4510 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22818 { 4526 /* movsq */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, 0, { MCK_DstIdx64, MCK_SrcIdx64 }, },
22819 { 4532 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22820 { 4532 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22821 { 4532 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22822 { 4538 /* movsw */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
22823 { 4558 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
22824 { 4558 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
22825 { 4558 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
22826 { 4558 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
22827 { 4558 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22828 { 4558 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22829 { 4558 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22830 { 4558 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22831 { 4558 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22832 { 4558 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
22833 { 4558 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
22834 { 4558 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
22835 { 4558 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
22836 { 4558 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22837 { 4558 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22838 { 4558 /* movsx */, X86::MOVSX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22839 { 4558 /* movsx */, X86::MOVSX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
22840 { 4564 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR32 }, },
22841 { 4564 /* movsxd */, X86::MOVSX64rm32, Convert__Reg1_0__Mem325_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem32 }, },
22842 { 4571 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22843 { 4571 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22844 { 4571 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22845 { 4578 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22846 { 4578 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22847 { 4578 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22848 { 4625 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
22849 { 4625 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
22850 { 4625 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
22851 { 4625 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
22852 { 4625 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22853 { 4625 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22854 { 4625 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22855 { 4625 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22856 { 4625 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22857 { 4625 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
22858 { 4625 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
22859 { 4625 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
22860 { 4625 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22861 { 4625 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22862 { 4625 /* movzx */, X86::MOVZX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22863 { 4625 /* movzx */, X86::MOVZX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
22864 { 4631 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22865 { 4631 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22866 { 4639 /* mul */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22867 { 4639 /* mul */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22868 { 4639 /* mul */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22869 { 4639 /* mul */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22870 { 4639 /* mul */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22871 { 4639 /* mul */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22872 { 4639 /* mul */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22873 { 4639 /* mul */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22874 { 4653 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22875 { 4653 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22876 { 4659 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22877 { 4659 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22878 { 4670 /* mulsd */, X86::MULSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22879 { 4670 /* mulsd */, X86::MULSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22880 { 4676 /* mulss */, X86::MULSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22881 { 4676 /* mulss */, X86::MULSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22882 { 4687 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22883 { 4687 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
22884 { 4687 /* mulx */, X86::MULX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
22885 { 4687 /* mulx */, X86::MULX64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
22886 { 4704 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, { }, },
22887 { 4704 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
22888 { 4704 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RCX, MCK_RAX }, },
22889 { 4710 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, { }, },
22890 { 4710 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EBX, MCK_ECX, MCK_EAX }, },
22891 { 4710 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RBX, MCK_RCX, MCK_RAX }, },
22892 { 4717 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
22893 { 4717 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
22894 { 4717 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
22895 { 4717 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
22896 { 4717 /* neg */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22897 { 4717 /* neg */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22898 { 4717 /* neg */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22899 { 4717 /* neg */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22900 { 4741 /* nop */, X86::NOOP, Convert_NoOperands, 0, { }, },
22901 { 4741 /* nop */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
22902 { 4741 /* nop */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
22903 { 4741 /* nop */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
22904 { 4741 /* nop */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22905 { 4741 /* nop */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22906 { 4741 /* nop */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22907 { 4760 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
22908 { 4760 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
22909 { 4760 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
22910 { 4760 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
22911 { 4760 /* not */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22912 { 4760 /* not */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22913 { 4760 /* not */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22914 { 4760 /* not */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22915 { 4784 /* or */, X86::OR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
22916 { 4784 /* or */, X86::OR16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
22917 { 4784 /* or */, X86::OR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
22918 { 4784 /* or */, X86::OR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
22919 { 4784 /* or */, X86::OR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
22920 { 4784 /* or */, X86::OR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
22921 { 4784 /* or */, X86::OR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
22922 { 4784 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22923 { 4784 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22924 { 4784 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22925 { 4784 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22926 { 4784 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22927 { 4784 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22928 { 4784 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22929 { 4784 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22930 { 4784 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22931 { 4784 /* or */, X86::OR64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22932 { 4784 /* or */, X86::OR64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22933 { 4784 /* or */, X86::OR64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22934 { 4784 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22935 { 4784 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
22936 { 4784 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
22937 { 4784 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22938 { 4784 /* or */, X86::OR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22939 { 4784 /* or */, X86::OR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
22940 { 4784 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22941 { 4784 /* or */, X86::OR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22942 { 4784 /* or */, X86::OR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
22943 { 4784 /* or */, X86::OR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22944 { 4784 /* or */, X86::OR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22945 { 4784 /* or */, X86::OR64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22946 { 4784 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22947 { 4784 /* or */, X86::OR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
22948 { 4795 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22949 { 4795 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22950 { 4800 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22951 { 4800 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22952 { 4813 /* out */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
22953 { 4813 /* out */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
22954 { 4813 /* out */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
22955 { 4813 /* out */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
22956 { 4813 /* out */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
22957 { 4813 /* out */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
22958 { 4817 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
22959 { 4817 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22960 { 4822 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
22961 { 4822 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22962 { 4827 /* outs */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
22963 { 4827 /* outs */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
22964 { 4827 /* outs */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
22965 { 4832 /* outsb */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
22966 { 4838 /* outsd */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
22967 { 4850 /* outsw */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
22968 { 4856 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
22969 { 4856 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22970 { 4861 /* pabsb */, X86::MMX_PABSBrr64, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22971 { 4861 /* pabsb */, X86::MMX_PABSBrm64, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22972 { 4861 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22973 { 4861 /* pabsb */, X86::PABSBrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22974 { 4867 /* pabsd */, X86::MMX_PABSDrr64, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22975 { 4867 /* pabsd */, X86::MMX_PABSDrm64, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22976 { 4867 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22977 { 4867 /* pabsd */, X86::PABSDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22978 { 4873 /* pabsw */, X86::MMX_PABSWrr64, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22979 { 4873 /* pabsw */, X86::MMX_PABSWrm64, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22980 { 4873 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22981 { 4873 /* pabsw */, X86::PABSWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22982 { 4879 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22983 { 4879 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22984 { 4879 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22985 { 4879 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22986 { 4888 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22987 { 4888 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22988 { 4888 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22989 { 4888 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22990 { 4897 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22991 { 4897 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22992 { 4906 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22993 { 4906 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22994 { 4906 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22995 { 4906 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22996 { 4915 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
22997 { 4915 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22998 { 4915 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22999 { 4915 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23000 { 4921 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23001 { 4921 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23002 { 4921 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23003 { 4921 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23004 { 4927 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23005 { 4927 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23006 { 4927 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23007 { 4927 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23008 { 4933 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23009 { 4933 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23010 { 4933 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23011 { 4933 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23012 { 4940 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23013 { 4940 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23014 { 4940 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23015 { 4940 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23016 { 4947 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23017 { 4947 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23018 { 4947 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23019 { 4947 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23020 { 4955 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23021 { 4955 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23022 { 4955 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23023 { 4955 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23024 { 4963 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23025 { 4963 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23026 { 4963 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23027 { 4963 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23028 { 4969 /* palignr */, X86::MMX_PALIGNR64irr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23029 { 4969 /* palignr */, X86::MMX_PALIGNR64irm, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23030 { 4969 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23031 { 4969 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23032 { 4977 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23033 { 4977 /* pand */, X86::MMX_PANDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23034 { 4977 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23035 { 4977 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23036 { 4982 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23037 { 4982 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23038 { 4982 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23039 { 4982 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23040 { 4988 /* pause */, X86::PAUSE, Convert_NoOperands, 0, { }, },
23041 { 4994 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23042 { 4994 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23043 { 4994 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23044 { 4994 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23045 { 5000 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23046 { 5000 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23047 { 5008 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23048 { 5008 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23049 { 5008 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23050 { 5008 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23051 { 5014 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23052 { 5014 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23053 { 5014 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
23054 { 5014 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
23055 { 5023 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23056 { 5023 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23057 { 5031 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
23058 { 5031 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17, 0, { MCK_FR32, MCK_Mem128 }, },
23059 { 5044 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
23060 { 5044 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1, 0, { MCK_FR32, MCK_Mem128 }, },
23061 { 5057 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
23062 { 5057 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16, 0, { MCK_FR32, MCK_Mem128 }, },
23063 { 5070 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
23064 { 5070 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0, 0, { MCK_FR32, MCK_Mem128 }, },
23065 { 5083 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23066 { 5083 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23067 { 5093 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23068 { 5093 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23069 { 5093 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23070 { 5093 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23071 { 5101 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23072 { 5101 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23073 { 5101 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23074 { 5101 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23075 { 5109 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23076 { 5109 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23077 { 5117 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23078 { 5117 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23079 { 5117 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23080 { 5117 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23081 { 5125 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23082 { 5125 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23083 { 5135 /* pcmpestrm */, X86::PCMPESTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23084 { 5135 /* pcmpestrm */, X86::PCMPESTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23085 { 5145 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23086 { 5145 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23087 { 5145 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23088 { 5145 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23089 { 5153 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23090 { 5153 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23091 { 5153 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23092 { 5153 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23093 { 5161 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23094 { 5161 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23095 { 5169 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23096 { 5169 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23097 { 5169 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23098 { 5169 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23099 { 5177 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23100 { 5177 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23101 { 5187 /* pcmpistrm */, X86::PCMPISTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23102 { 5187 /* pcmpistrm */, X86::PCMPISTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23103 { 5197 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23104 { 5197 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23105 { 5197 /* pdep */, X86::PDEP64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23106 { 5197 /* pdep */, X86::PDEP64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23107 { 5214 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23108 { 5214 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23109 { 5214 /* pext */, X86::PEXT64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23110 { 5214 /* pext */, X86::PEXT64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23111 { 5231 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23112 { 5231 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
23113 { 5238 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23114 { 5238 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23115 { 5245 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23116 { 5245 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23117 { 5252 /* pextrw */, X86::MMX_PEXTRWirri, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23118 { 5252 /* pextrw */, X86::PEXTRWri, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23119 { 5252 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
23120 { 5259 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23121 { 5259 /* pf2id */, X86::PF2IDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23122 { 5265 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23123 { 5265 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23124 { 5271 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23125 { 5271 /* pfacc */, X86::PFACCrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23126 { 5277 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23127 { 5277 /* pfadd */, X86::PFADDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23128 { 5283 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23129 { 5283 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23130 { 5291 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23131 { 5291 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23132 { 5299 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23133 { 5299 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23134 { 5307 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23135 { 5307 /* pfmax */, X86::PFMAXrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23136 { 5313 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23137 { 5313 /* pfmin */, X86::PFMINrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23138 { 5319 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23139 { 5319 /* pfmul */, X86::PFMULrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23140 { 5325 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23141 { 5325 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23142 { 5332 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23143 { 5332 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23144 { 5340 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23145 { 5340 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23146 { 5346 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23147 { 5346 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23148 { 5355 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23149 { 5355 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23150 { 5364 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23151 { 5364 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23152 { 5373 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23153 { 5373 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23154 { 5381 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23155 { 5381 /* pfsub */, X86::PFSUBrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23156 { 5387 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23157 { 5387 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23158 { 5394 /* phaddd */, X86::MMX_PHADDrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23159 { 5394 /* phaddd */, X86::MMX_PHADDrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23160 { 5394 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23161 { 5394 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23162 { 5401 /* phaddsw */, X86::MMX_PHADDSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23163 { 5401 /* phaddsw */, X86::MMX_PHADDSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23164 { 5401 /* phaddsw */, X86::PHADDSWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23165 { 5401 /* phaddsw */, X86::PHADDSWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23166 { 5409 /* phaddw */, X86::MMX_PHADDWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23167 { 5409 /* phaddw */, X86::MMX_PHADDWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23168 { 5409 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23169 { 5409 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23170 { 5416 /* phminposuw */, X86::PHMINPOSUWrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23171 { 5416 /* phminposuw */, X86::PHMINPOSUWrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23172 { 5427 /* phsubd */, X86::MMX_PHSUBDrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23173 { 5427 /* phsubd */, X86::MMX_PHSUBDrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23174 { 5427 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23175 { 5427 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23176 { 5434 /* phsubsw */, X86::MMX_PHSUBSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23177 { 5434 /* phsubsw */, X86::MMX_PHSUBSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23178 { 5434 /* phsubsw */, X86::PHSUBSWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23179 { 5434 /* phsubsw */, X86::PHSUBSWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23180 { 5442 /* phsubw */, X86::MMX_PHSUBWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23181 { 5442 /* phsubw */, X86::MMX_PHSUBWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23182 { 5442 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23183 { 5442 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23184 { 5449 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23185 { 5449 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23186 { 5455 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23187 { 5455 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23188 { 5461 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23189 { 5461 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
23190 { 5468 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23191 { 5468 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23192 { 5475 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
23193 { 5475 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23194 { 5482 /* pinsrw */, X86::MMX_PINSRWirri, Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23195 { 5482 /* pinsrw */, X86::MMX_PINSRWirmi, Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem16, MCK_ImmUnsignedi8 }, },
23196 { 5482 /* pinsrw */, X86::PINSRWrri, Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23197 { 5482 /* pinsrw */, X86::PINSRWrmi, Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
23198 { 5489 /* pmaddubsw */, X86::MMX_PMADDUBSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23199 { 5489 /* pmaddubsw */, X86::MMX_PMADDUBSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23200 { 5489 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23201 { 5489 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23202 { 5499 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23203 { 5499 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23204 { 5499 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23205 { 5499 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23206 { 5507 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23207 { 5507 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23208 { 5514 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23209 { 5514 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23210 { 5521 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23211 { 5521 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23212 { 5521 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23213 { 5521 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23214 { 5528 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23215 { 5528 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23216 { 5528 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23217 { 5528 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23218 { 5535 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23219 { 5535 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23220 { 5542 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23221 { 5542 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23222 { 5549 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23223 { 5549 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23224 { 5556 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23225 { 5556 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23226 { 5563 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23227 { 5563 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23228 { 5563 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23229 { 5563 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23230 { 5570 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23231 { 5570 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23232 { 5570 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23233 { 5570 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23234 { 5577 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23235 { 5577 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23236 { 5584 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23237 { 5584 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23238 { 5591 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR64 }, },
23239 { 5591 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
23240 { 5600 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23241 { 5600 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23242 { 5609 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23243 { 5609 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
23244 { 5618 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23245 { 5618 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23246 { 5627 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23247 { 5627 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23248 { 5636 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23249 { 5636 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23250 { 5645 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23251 { 5645 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23252 { 5654 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23253 { 5654 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23254 { 5663 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23255 { 5663 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
23256 { 5672 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23257 { 5672 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23258 { 5681 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23259 { 5681 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23260 { 5690 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23261 { 5690 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23262 { 5699 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23263 { 5699 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23264 { 5708 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23265 { 5708 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23266 { 5715 /* pmulhrsw */, X86::MMX_PMULHRSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23267 { 5715 /* pmulhrsw */, X86::MMX_PMULHRSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23268 { 5715 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23269 { 5715 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23270 { 5724 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23271 { 5724 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23272 { 5732 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23273 { 5732 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23274 { 5732 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23275 { 5732 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23276 { 5740 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23277 { 5740 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23278 { 5740 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23279 { 5740 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23280 { 5747 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23281 { 5747 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23282 { 5754 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23283 { 5754 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23284 { 5754 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23285 { 5754 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23286 { 5761 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23287 { 5761 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23288 { 5761 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23289 { 5761 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23290 { 5769 /* pop */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23291 { 5769 /* pop */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23292 { 5769 /* pop */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23293 { 5769 /* pop */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23294 { 5769 /* pop */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
23295 { 5769 /* pop */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
23296 { 5769 /* pop */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
23297 { 5769 /* pop */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
23298 { 5769 /* pop */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
23299 { 5769 /* pop */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
23300 { 5769 /* pop */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23301 { 5769 /* pop */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23302 { 5769 /* pop */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23303 { 5769 /* pop */, X86::POP16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
23304 { 5769 /* pop */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23305 { 5769 /* pop */, X86::POP32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23306 { 5769 /* pop */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23307 { 5769 /* pop */, X86::POP64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23308 { 5769 /* pop */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23309 { 5769 /* pop */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
23310 { 5769 /* pop */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23311 { 5773 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23312 { 5779 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
23313 { 5785 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23314 { 5785 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23315 { 5785 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23316 { 5785 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23317 { 5785 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23318 { 5785 /* popcnt */, X86::POPCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23319 { 5816 /* popf */, X86::POPF16, Convert_NoOperands, 0, { }, },
23320 { 5821 /* popfd */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23321 { 5833 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, { }, },
23322 { 5860 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23323 { 5860 /* por */, X86::MMX_PORirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23324 { 5860 /* por */, X86::PORrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23325 { 5860 /* por */, X86::PORrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23326 { 5864 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23327 { 5873 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23328 { 5885 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23329 { 5896 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23330 { 5907 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23331 { 5918 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23332 { 5928 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23333 { 5940 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23334 { 5940 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23335 { 5940 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23336 { 5940 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23337 { 5947 /* pshufb */, X86::MMX_PSHUFBrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23338 { 5947 /* pshufb */, X86::MMX_PSHUFBrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23339 { 5947 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23340 { 5947 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23341 { 5954 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23342 { 5954 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23343 { 5961 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23344 { 5961 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23345 { 5969 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23346 { 5969 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23347 { 5977 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23348 { 5977 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23349 { 5984 /* psignb */, X86::MMX_PSIGNBrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23350 { 5984 /* psignb */, X86::MMX_PSIGNBrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23351 { 5984 /* psignb */, X86::PSIGNBrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23352 { 5984 /* psignb */, X86::PSIGNBrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23353 { 5991 /* psignd */, X86::MMX_PSIGNDrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23354 { 5991 /* psignd */, X86::MMX_PSIGNDrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23355 { 5991 /* psignd */, X86::PSIGNDrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23356 { 5991 /* psignd */, X86::PSIGNDrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23357 { 5998 /* psignw */, X86::MMX_PSIGNWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23358 { 5998 /* psignw */, X86::MMX_PSIGNWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23359 { 5998 /* psignw */, X86::PSIGNWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23360 { 5998 /* psignw */, X86::PSIGNWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23361 { 6005 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23362 { 6005 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23363 { 6005 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23364 { 6005 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23365 { 6005 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23366 { 6005 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23367 { 6011 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23368 { 6018 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23369 { 6018 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23370 { 6018 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23371 { 6018 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23372 { 6018 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23373 { 6018 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23374 { 6024 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23375 { 6024 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23376 { 6024 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23377 { 6024 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23378 { 6024 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23379 { 6024 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23380 { 6030 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23381 { 6030 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23382 { 6030 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23383 { 6030 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23384 { 6030 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23385 { 6030 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23386 { 6036 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23387 { 6036 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23388 { 6036 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23389 { 6036 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23390 { 6036 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23391 { 6036 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23392 { 6042 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23393 { 6042 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23394 { 6042 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23395 { 6042 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23396 { 6042 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23397 { 6042 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23398 { 6048 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23399 { 6055 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23400 { 6055 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23401 { 6055 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23402 { 6055 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23403 { 6055 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23404 { 6055 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23405 { 6061 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23406 { 6061 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23407 { 6061 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23408 { 6061 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23409 { 6061 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23410 { 6061 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23411 { 6067 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23412 { 6067 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23413 { 6067 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23414 { 6067 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23415 { 6073 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23416 { 6073 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23417 { 6073 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23418 { 6073 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23419 { 6079 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23420 { 6079 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23421 { 6079 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23422 { 6079 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23423 { 6085 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23424 { 6085 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23425 { 6085 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23426 { 6085 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23427 { 6092 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23428 { 6092 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23429 { 6092 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23430 { 6092 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23431 { 6099 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23432 { 6099 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23433 { 6099 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23434 { 6099 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23435 { 6107 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23436 { 6107 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23437 { 6107 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23438 { 6107 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23439 { 6115 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23440 { 6115 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23441 { 6115 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23442 { 6115 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23443 { 6121 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23444 { 6121 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23445 { 6128 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23446 { 6128 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23447 { 6134 /* ptwrite */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
23448 { 6134 /* ptwrite */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23449 { 6134 /* ptwrite */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23450 { 6134 /* ptwrite */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23451 { 6160 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23452 { 6160 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23453 { 6160 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23454 { 6160 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23455 { 6170 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23456 { 6170 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23457 { 6170 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23458 { 6170 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23459 { 6180 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23460 { 6180 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23461 { 6191 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23462 { 6191 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23463 { 6191 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23464 { 6191 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23465 { 6201 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23466 { 6201 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23467 { 6201 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23468 { 6201 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23469 { 6211 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23470 { 6211 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23471 { 6211 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23472 { 6211 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23473 { 6221 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23474 { 6221 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23475 { 6232 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23476 { 6232 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23477 { 6232 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23478 { 6232 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23479 { 6242 /* push */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
23480 { 6242 /* push */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
23481 { 6242 /* push */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23482 { 6242 /* push */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23483 { 6242 /* push */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23484 { 6242 /* push */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23485 { 6242 /* push */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
23486 { 6242 /* push */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
23487 { 6242 /* push */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
23488 { 6242 /* push */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
23489 { 6242 /* push */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
23490 { 6242 /* push */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
23491 { 6242 /* push */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23492 { 6242 /* push */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23493 { 6242 /* push */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23494 { 6242 /* push */, X86::PUSH16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
23495 { 6242 /* push */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23496 { 6242 /* push */, X86::PUSH32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23497 { 6242 /* push */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23498 { 6242 /* push */, X86::PUSH64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23499 { 6242 /* push */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
23500 { 6242 /* push */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
23501 { 6242 /* push */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
23502 { 6242 /* push */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
23503 { 6242 /* push */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
23504 { 6242 /* push */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
23505 { 6242 /* push */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23506 { 6242 /* push */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
23507 { 6242 /* push */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23508 { 6247 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23509 { 6254 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
23510 { 6261 /* pushf */, X86::PUSHF16, Convert_NoOperands, 0, { }, },
23511 { 6267 /* pushfd */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23512 { 6281 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, { }, },
23513 { 6313 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23514 { 6313 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23515 { 6313 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23516 { 6313 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23517 { 6318 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23518 { 6318 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23519 { 6318 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23520 { 6318 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23521 { 6318 /* rcl */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23522 { 6318 /* rcl */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23523 { 6318 /* rcl */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23524 { 6318 /* rcl */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23525 { 6318 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23526 { 6318 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23527 { 6318 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23528 { 6318 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23529 { 6318 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23530 { 6318 /* rcl */, X86::RCL64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23531 { 6318 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23532 { 6318 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23533 { 6318 /* rcl */, X86::RCL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23534 { 6318 /* rcl */, X86::RCL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23535 { 6318 /* rcl */, X86::RCL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23536 { 6318 /* rcl */, X86::RCL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23537 { 6318 /* rcl */, X86::RCL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23538 { 6318 /* rcl */, X86::RCL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23539 { 6318 /* rcl */, X86::RCL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23540 { 6318 /* rcl */, X86::RCL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23541 { 6342 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23542 { 6342 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23543 { 6348 /* rcpss */, X86::RCPSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23544 { 6348 /* rcpss */, X86::RCPSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23545 { 6354 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23546 { 6354 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23547 { 6354 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23548 { 6354 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23549 { 6354 /* rcr */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23550 { 6354 /* rcr */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23551 { 6354 /* rcr */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23552 { 6354 /* rcr */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23553 { 6354 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23554 { 6354 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23555 { 6354 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23556 { 6354 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23557 { 6354 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23558 { 6354 /* rcr */, X86::RCR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23559 { 6354 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23560 { 6354 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23561 { 6354 /* rcr */, X86::RCR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23562 { 6354 /* rcr */, X86::RCR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23563 { 6354 /* rcr */, X86::RCR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23564 { 6354 /* rcr */, X86::RCR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23565 { 6354 /* rcr */, X86::RCR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23566 { 6354 /* rcr */, X86::RCR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23567 { 6354 /* rcr */, X86::RCR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23568 { 6354 /* rcr */, X86::RCR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23569 { 6378 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
23570 { 6378 /* rdfsbase */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23571 { 6407 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
23572 { 6407 /* rdgsbase */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23573 { 6436 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, { }, },
23574 { 6442 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23575 { 6442 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23576 { 6448 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, { }, },
23577 { 6455 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, { }, },
23578 { 6461 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23579 { 6461 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23580 { 6461 /* rdrand */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23581 { 6492 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23582 { 6492 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23583 { 6492 /* rdseed */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23584 { 6523 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23585 { 6530 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23586 { 6537 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, { }, },
23587 { 6543 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, { }, },
23588 { 6550 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, { }, },
23589 { 6554 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, { }, },
23590 { 6560 /* ret */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, { }, },
23591 { 6560 /* ret */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
23592 { 6560 /* ret */, X86::RETW, Convert_NoOperands, 0, { }, },
23593 { 6560 /* ret */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
23594 { 6560 /* ret */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
23595 { 6560 /* ret */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
23596 { 6564 /* retf */, X86::LRETL, Convert_NoOperands, 0, { }, },
23597 { 6564 /* retf */, X86::LRETW, Convert_NoOperands, 0, { }, },
23598 { 6564 /* retf */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
23599 { 6564 /* retf */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
23600 { 6569 /* retfq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
23601 { 6569 /* retfq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
23602 { 6590 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, { }, },
23603 { 6596 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23604 { 6596 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23605 { 6596 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23606 { 6596 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23607 { 6596 /* rol */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23608 { 6596 /* rol */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23609 { 6596 /* rol */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23610 { 6596 /* rol */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23611 { 6596 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23612 { 6596 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23613 { 6596 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23614 { 6596 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23615 { 6596 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23616 { 6596 /* rol */, X86::ROL64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23617 { 6596 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23618 { 6596 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23619 { 6596 /* rol */, X86::ROL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23620 { 6596 /* rol */, X86::ROL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23621 { 6596 /* rol */, X86::ROL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23622 { 6596 /* rol */, X86::ROL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23623 { 6596 /* rol */, X86::ROL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23624 { 6596 /* rol */, X86::ROL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23625 { 6596 /* rol */, X86::ROL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23626 { 6596 /* rol */, X86::ROL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23627 { 6620 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23628 { 6620 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23629 { 6620 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23630 { 6620 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23631 { 6620 /* ror */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23632 { 6620 /* ror */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23633 { 6620 /* ror */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23634 { 6620 /* ror */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23635 { 6620 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23636 { 6620 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23637 { 6620 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23638 { 6620 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23639 { 6620 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23640 { 6620 /* ror */, X86::ROR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23641 { 6620 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23642 { 6620 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23643 { 6620 /* ror */, X86::ROR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23644 { 6620 /* ror */, X86::ROR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23645 { 6620 /* ror */, X86::ROR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23646 { 6620 /* ror */, X86::ROR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23647 { 6620 /* ror */, X86::ROR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23648 { 6620 /* ror */, X86::ROR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23649 { 6620 /* ror */, X86::ROR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23650 { 6620 /* ror */, X86::ROR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23651 { 6644 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23652 { 6644 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23653 { 6644 /* rorx */, X86::RORX64ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23654 { 6644 /* rorx */, X86::RORX64mi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23655 { 6661 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23656 { 6661 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23657 { 6669 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23658 { 6669 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23659 { 6677 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23660 { 6677 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23661 { 6685 /* roundss */, X86::ROUNDSSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23662 { 6685 /* roundss */, X86::ROUNDSSm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23663 { 6693 /* rsm */, X86::RSM, Convert_NoOperands, 0, { }, },
23664 { 6697 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23665 { 6697 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23666 { 6705 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23667 { 6705 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23668 { 6713 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23669 { 6722 /* sahf */, X86::SAHF, Convert_NoOperands, 0, { }, },
23670 { 6727 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, { }, },
23671 { 6732 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23672 { 6732 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23673 { 6732 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23674 { 6732 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23675 { 6732 /* sar */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23676 { 6732 /* sar */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23677 { 6732 /* sar */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23678 { 6732 /* sar */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23679 { 6732 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23680 { 6732 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23681 { 6732 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23682 { 6732 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23683 { 6732 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23684 { 6732 /* sar */, X86::SAR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23685 { 6732 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23686 { 6732 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23687 { 6732 /* sar */, X86::SAR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23688 { 6732 /* sar */, X86::SAR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23689 { 6732 /* sar */, X86::SAR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23690 { 6732 /* sar */, X86::SAR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23691 { 6732 /* sar */, X86::SAR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23692 { 6732 /* sar */, X86::SAR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23693 { 6732 /* sar */, X86::SAR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23694 { 6732 /* sar */, X86::SAR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23695 { 6756 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23696 { 6756 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23697 { 6756 /* sarx */, X86::SARX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23698 { 6756 /* sarx */, X86::SARX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23699 { 6773 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, { }, },
23700 { 6785 /* sbb */, X86::SBB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23701 { 6785 /* sbb */, X86::SBB16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
23702 { 6785 /* sbb */, X86::SBB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23703 { 6785 /* sbb */, X86::SBB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
23704 { 6785 /* sbb */, X86::SBB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23705 { 6785 /* sbb */, X86::SBB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
23706 { 6785 /* sbb */, X86::SBB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23707 { 6785 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23708 { 6785 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
23709 { 6785 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23710 { 6785 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23711 { 6785 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23712 { 6785 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
23713 { 6785 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23714 { 6785 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23715 { 6785 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23716 { 6785 /* sbb */, X86::SBB64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
23717 { 6785 /* sbb */, X86::SBB64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
23718 { 6785 /* sbb */, X86::SBB64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23719 { 6785 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23720 { 6785 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23721 { 6785 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
23722 { 6785 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23723 { 6785 /* sbb */, X86::SBB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23724 { 6785 /* sbb */, X86::SBB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23725 { 6785 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23726 { 6785 /* sbb */, X86::SBB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23727 { 6785 /* sbb */, X86::SBB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23728 { 6785 /* sbb */, X86::SBB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23729 { 6785 /* sbb */, X86::SBB64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23730 { 6785 /* sbb */, X86::SBB64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23731 { 6785 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23732 { 6785 /* sbb */, X86::SBB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23733 { 6809 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23734 { 6809 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23735 { 6809 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23736 { 6809 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23737 { 6809 /* scas */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
23738 { 6809 /* scas */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
23739 { 6809 /* scas */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
23740 { 6809 /* scas */, X86::SCASQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
23741 { 6814 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23742 { 6814 /* scasb */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
23743 { 6820 /* scasd */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23744 { 6820 /* scasd */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
23745 { 6832 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23746 { 6832 /* scasq */, X86::SCASQ, Convert__DstIdx641_1, 0, { MCK_RAX, MCK_DstIdx64 }, },
23747 { 6838 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23748 { 6838 /* scasw */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
23749 { 6844 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23750 { 6844 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23751 { 6849 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23752 { 6849 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23753 { 6855 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23754 { 6855 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23755 { 6860 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23756 { 6860 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23757 { 6866 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23758 { 6866 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23759 { 6871 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23760 { 6871 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23761 { 6876 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23762 { 6876 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23763 { 6882 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23764 { 6882 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23765 { 6887 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23766 { 6887 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23767 { 6893 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23768 { 6893 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23769 { 6899 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23770 { 6899 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23771 { 6905 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23772 { 6905 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23773 { 6911 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23774 { 6911 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23775 { 6917 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23776 { 6917 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23777 { 6922 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23778 { 6922 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23779 { 6927 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23780 { 6927 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23781 { 6932 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, 0, { }, },
23782 { 6941 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, { }, },
23783 { 6948 /* sgdt */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23784 { 6948 /* sgdt */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23785 { 6948 /* sgdt */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
23786 { 6971 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23787 { 6971 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23788 { 6980 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23789 { 6980 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23790 { 6989 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23791 { 6989 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23792 { 6999 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23793 { 6999 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23794 { 7009 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23795 { 7009 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23796 { 7020 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23797 { 7020 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23798 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23799 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23800 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
23801 { 7031 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
23802 { 7043 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23803 { 7043 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23804 { 7043 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23805 { 7043 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23806 { 7043 /* shl */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23807 { 7043 /* shl */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23808 { 7043 /* shl */, X86::SHL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23809 { 7043 /* shl */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23810 { 7043 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23811 { 7043 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23812 { 7043 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23813 { 7043 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23814 { 7043 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23815 { 7043 /* shl */, X86::SHL64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23816 { 7043 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23817 { 7043 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23818 { 7043 /* shl */, X86::SHL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23819 { 7043 /* shl */, X86::SHL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23820 { 7043 /* shl */, X86::SHL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23821 { 7043 /* shl */, X86::SHL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23822 { 7043 /* shl */, X86::SHL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23823 { 7043 /* shl */, X86::SHL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23824 { 7043 /* shl */, X86::SHL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23825 { 7043 /* shl */, X86::SHL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23826 { 7052 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23827 { 7052 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23828 { 7052 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23829 { 7052 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23830 { 7052 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23831 { 7052 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23832 { 7052 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
23833 { 7052 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23834 { 7052 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
23835 { 7052 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23836 { 7052 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
23837 { 7052 /* shld */, X86::SHLD64rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23838 { 7052 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
23839 { 7052 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23840 { 7052 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
23841 { 7052 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23842 { 7052 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
23843 { 7052 /* shld */, X86::SHLD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23844 { 7090 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23845 { 7090 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23846 { 7090 /* shlx */, X86::SHLX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23847 { 7090 /* shlx */, X86::SHLX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23848 { 7107 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
23849 { 7107 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
23850 { 7107 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
23851 { 7107 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
23852 { 7107 /* shr */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23853 { 7107 /* shr */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23854 { 7107 /* shr */, X86::SHR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23855 { 7107 /* shr */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23856 { 7107 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
23857 { 7107 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23858 { 7107 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
23859 { 7107 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23860 { 7107 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
23861 { 7107 /* shr */, X86::SHR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23862 { 7107 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
23863 { 7107 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23864 { 7107 /* shr */, X86::SHR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23865 { 7107 /* shr */, X86::SHR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23866 { 7107 /* shr */, X86::SHR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23867 { 7107 /* shr */, X86::SHR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23868 { 7107 /* shr */, X86::SHR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23869 { 7107 /* shr */, X86::SHR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23870 { 7107 /* shr */, X86::SHR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23871 { 7107 /* shr */, X86::SHR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23872 { 7116 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23873 { 7116 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23874 { 7116 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23875 { 7116 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23876 { 7116 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23877 { 7116 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23878 { 7116 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
23879 { 7116 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23880 { 7116 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
23881 { 7116 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23882 { 7116 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
23883 { 7116 /* shrd */, X86::SHRD64rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23884 { 7116 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
23885 { 7116 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
23886 { 7116 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
23887 { 7116 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23888 { 7116 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
23889 { 7116 /* shrd */, X86::SHRD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23890 { 7154 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23891 { 7154 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23892 { 7154 /* shrx */, X86::SHRX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23893 { 7154 /* shrx */, X86::SHRX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23894 { 7171 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23895 { 7171 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23896 { 7178 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23897 { 7178 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23898 { 7185 /* sidt */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23899 { 7185 /* sidt */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23900 { 7185 /* sidt */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
23901 { 7208 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
23902 { 7215 /* sldt */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23903 { 7215 /* sldt */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23904 { 7215 /* sldt */, X86::SLDT64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23905 { 7215 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23906 { 7215 /* sldt */, X86::SLDT64m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23907 { 7215 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23908 { 7238 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
23909 { 7238 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
23910 { 7245 /* smsw */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23911 { 7245 /* smsw */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23912 { 7245 /* smsw */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23913 { 7245 /* smsw */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23914 { 7268 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23915 { 7268 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23916 { 7275 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23917 { 7275 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23918 { 7282 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23919 { 7282 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23920 { 7289 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23921 { 7289 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23922 { 7296 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, { }, },
23923 { 7299 /* stac */, X86::STAC, Convert_NoOperands, 0, { }, },
23924 { 7304 /* stc */, X86::STC, Convert_NoOperands, 0, { }, },
23925 { 7308 /* std */, X86::STD, Convert_NoOperands, 0, { }, },
23926 { 7312 /* stgi */, X86::STGI, Convert_NoOperands, 0, { }, },
23927 { 7317 /* sti */, X86::STI, Convert_NoOperands, 0, { }, },
23928 { 7321 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23929 { 7329 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23930 { 7329 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23931 { 7329 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23932 { 7329 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23933 { 7329 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
23934 { 7329 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
23935 { 7329 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
23936 { 7329 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
23937 { 7334 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23938 { 7334 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
23939 { 7340 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23940 { 7340 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
23941 { 7352 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23942 { 7352 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, 0, { MCK_DstIdx64, MCK_RAX }, },
23943 { 7358 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23944 { 7358 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
23945 { 7364 /* str */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23946 { 7364 /* str */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23947 { 7364 /* str */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23948 { 7364 /* str */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23949 { 7383 /* sub */, X86::SUB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23950 { 7383 /* sub */, X86::SUB16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
23951 { 7383 /* sub */, X86::SUB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23952 { 7383 /* sub */, X86::SUB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
23953 { 7383 /* sub */, X86::SUB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23954 { 7383 /* sub */, X86::SUB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
23955 { 7383 /* sub */, X86::SUB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23956 { 7383 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23957 { 7383 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
23958 { 7383 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23959 { 7383 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23960 { 7383 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23961 { 7383 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
23962 { 7383 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23963 { 7383 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23964 { 7383 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23965 { 7383 /* sub */, X86::SUB64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
23966 { 7383 /* sub */, X86::SUB64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
23967 { 7383 /* sub */, X86::SUB64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23968 { 7383 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23969 { 7383 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23970 { 7383 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
23971 { 7383 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23972 { 7383 /* sub */, X86::SUB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23973 { 7383 /* sub */, X86::SUB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23974 { 7383 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23975 { 7383 /* sub */, X86::SUB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23976 { 7383 /* sub */, X86::SUB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23977 { 7383 /* sub */, X86::SUB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23978 { 7383 /* sub */, X86::SUB64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23979 { 7383 /* sub */, X86::SUB64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23980 { 7383 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23981 { 7383 /* sub */, X86::SUB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23982 { 7397 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23983 { 7397 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23984 { 7403 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23985 { 7403 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23986 { 7414 /* subsd */, X86::SUBSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23987 { 7414 /* subsd */, X86::SUBSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23988 { 7420 /* subss */, X86::SUBSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23989 { 7420 /* subss */, X86::SUBSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23990 { 7431 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, { }, },
23991 { 7438 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, { }, },
23992 { 7446 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, { }, },
23993 { 7455 /* sysexit */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, { }, },
23994 { 7455 /* sysexit */, X86::SYSEXIT, Convert_NoOperands, 0, { }, },
23995 { 7481 /* sysret */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
23996 { 7481 /* sysret */, X86::SYSRET, Convert_NoOperands, 0, { }, },
23997 { 7504 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23998 { 7504 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23999 { 7504 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24000 { 7504 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24001 { 7511 /* test */, X86::TEST8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
24002 { 7511 /* test */, X86::TEST16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
24003 { 7511 /* test */, X86::TEST32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
24004 { 7511 /* test */, X86::TEST64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
24005 { 7511 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24006 { 7511 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
24007 { 7511 /* test */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
24008 { 7511 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24009 { 7511 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
24010 { 7511 /* test */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
24011 { 7511 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24012 { 7511 /* test */, X86::TEST64ri32, Convert__Reg1_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_GR64, MCK_ImmSExti64i32 }, },
24013 { 7511 /* test */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
24014 { 7511 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
24015 { 7511 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
24016 { 7511 /* test */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
24017 { 7511 /* test */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
24018 { 7511 /* test */, X86::TEST16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
24019 { 7511 /* test */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
24020 { 7511 /* test */, X86::TEST32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
24021 { 7511 /* test */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
24022 { 7511 /* test */, X86::TEST64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
24023 { 7511 /* test */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
24024 { 7511 /* test */, X86::TEST8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
24025 { 7540 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24026 { 7540 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
24027 { 7540 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24028 { 7540 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
24029 { 7540 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24030 { 7540 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24031 { 7567 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24032 { 7567 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
24033 { 7567 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24034 { 7567 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24035 { 7573 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24036 { 7573 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24037 { 7581 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24038 { 7581 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24039 { 7589 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, { }, },
24040 { 7593 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, { }, },
24041 { 7598 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24042 { 7598 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24043 { 7607 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24044 { 7607 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24045 { 7616 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24046 { 7616 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24047 { 7625 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24048 { 7625 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24049 { 7634 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24050 { 7634 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24051 { 7634 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24052 { 7634 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24053 { 7634 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24054 { 7634 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24055 { 7634 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24056 { 7634 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24057 { 7634 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24058 { 7634 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24059 { 7634 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24060 { 7634 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24061 { 7634 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24062 { 7634 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24063 { 7634 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24064 { 7634 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24065 { 7634 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24066 { 7634 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24067 { 7634 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24068 { 7634 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24069 { 7634 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24070 { 7634 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24071 { 7634 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24072 { 7634 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24073 { 7634 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24074 { 7634 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24075 { 7634 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24076 { 7634 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24077 { 7634 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24078 { 7634 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24079 { 7634 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24080 { 7634 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24081 { 7634 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24082 { 7634 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24083 { 7641 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24084 { 7641 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24085 { 7641 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24086 { 7641 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24087 { 7641 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24088 { 7641 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24089 { 7641 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24090 { 7641 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24091 { 7641 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24092 { 7641 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24093 { 7641 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24094 { 7641 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24095 { 7641 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24096 { 7641 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24097 { 7641 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24098 { 7641 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24099 { 7641 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24100 { 7641 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24101 { 7641 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24102 { 7641 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24103 { 7641 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24104 { 7641 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24105 { 7641 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24106 { 7641 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24107 { 7641 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24108 { 7641 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24109 { 7641 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24110 { 7641 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24111 { 7641 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24112 { 7641 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24113 { 7641 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24114 { 7641 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24115 { 7641 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24116 { 7641 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24117 { 7648 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24118 { 7648 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
24119 { 7648 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24120 { 7648 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
24121 { 7648 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24122 { 7648 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24123 { 7648 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
24124 { 7648 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24125 { 7648 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
24126 { 7648 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24127 { 7648 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24128 { 7655 /* vaddss */, X86::VADDSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24129 { 7655 /* vaddss */, X86::VADDSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
24130 { 7655 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24131 { 7655 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
24132 { 7655 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24133 { 7655 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24134 { 7655 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
24135 { 7655 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24136 { 7655 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
24137 { 7655 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24138 { 7655 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24139 { 7662 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24140 { 7662 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24141 { 7662 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24142 { 7662 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24143 { 7672 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24144 { 7672 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24145 { 7672 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24146 { 7672 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24147 { 7682 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24148 { 7682 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24149 { 7682 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24150 { 7682 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24151 { 7682 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24152 { 7682 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24153 { 7682 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24154 { 7682 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24155 { 7682 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24156 { 7682 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24157 { 7690 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24158 { 7690 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24159 { 7690 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24160 { 7690 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24161 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24162 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24163 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24164 { 7690 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24165 { 7690 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24166 { 7690 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24167 { 7702 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24168 { 7702 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24169 { 7702 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24170 { 7702 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24171 { 7702 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24172 { 7702 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24173 { 7702 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24174 { 7702 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24175 { 7702 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24176 { 7702 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24177 { 7710 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24178 { 7710 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24179 { 7710 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24180 { 7710 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24181 { 7710 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24182 { 7710 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24183 { 7710 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24184 { 7710 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24185 { 7710 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24186 { 7710 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24187 { 7722 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24188 { 7722 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24189 { 7730 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24190 { 7730 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24191 { 7747 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24192 { 7747 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24193 { 7747 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24194 { 7747 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24195 { 7747 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24196 { 7747 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24197 { 7747 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24198 { 7747 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24199 { 7747 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24200 { 7747 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24201 { 7747 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24202 { 7747 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24203 { 7747 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24204 { 7747 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24205 { 7747 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24206 { 7747 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24207 { 7747 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24208 { 7747 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24209 { 7747 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24210 { 7747 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24211 { 7747 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24212 { 7747 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24213 { 7747 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24214 { 7747 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24215 { 7747 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24216 { 7747 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24217 { 7747 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24218 { 7755 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24219 { 7755 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24220 { 7755 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24221 { 7755 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24222 { 7755 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24223 { 7755 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24224 { 7755 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24225 { 7755 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24226 { 7755 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24227 { 7755 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24228 { 7755 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24229 { 7755 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24230 { 7755 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24231 { 7755 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24232 { 7755 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24233 { 7755 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24234 { 7755 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24235 { 7755 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24236 { 7755 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24237 { 7755 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24238 { 7755 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24239 { 7755 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24240 { 7755 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24241 { 7755 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24242 { 7755 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24243 { 7755 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24244 { 7755 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24245 { 7763 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24246 { 7763 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24247 { 7763 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24248 { 7763 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24249 { 7763 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24250 { 7763 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24251 { 7763 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24252 { 7763 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24253 { 7763 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24254 { 7763 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24255 { 7763 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24256 { 7763 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24257 { 7763 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24258 { 7763 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24259 { 7763 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24260 { 7763 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24261 { 7763 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24262 { 7763 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24263 { 7763 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24264 { 7763 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24265 { 7763 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24266 { 7763 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24267 { 7763 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24268 { 7763 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24269 { 7763 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24270 { 7763 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24271 { 7763 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24272 { 7763 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24273 { 7763 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24274 { 7763 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24275 { 7763 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24276 { 7771 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24277 { 7771 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24278 { 7771 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24279 { 7771 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24280 { 7771 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24281 { 7771 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24282 { 7771 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24283 { 7771 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24284 { 7771 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24285 { 7771 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24286 { 7771 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24287 { 7771 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24288 { 7771 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24289 { 7771 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24290 { 7771 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24291 { 7771 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24292 { 7771 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24293 { 7771 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24294 { 7771 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24295 { 7771 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24296 { 7771 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24297 { 7771 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24298 { 7771 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24299 { 7771 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24300 { 7771 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24301 { 7771 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24302 { 7771 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24303 { 7771 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24304 { 7771 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24305 { 7771 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24306 { 7771 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24307 { 7779 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24308 { 7779 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24309 { 7779 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24310 { 7779 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24311 { 7779 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24312 { 7779 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24313 { 7779 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24314 { 7779 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24315 { 7779 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24316 { 7779 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24317 { 7779 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24318 { 7779 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24319 { 7779 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24320 { 7779 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24321 { 7779 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24322 { 7779 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24323 { 7779 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24324 { 7779 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24325 { 7779 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24326 { 7779 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24327 { 7779 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24328 { 7779 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24329 { 7779 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24330 { 7779 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24331 { 7779 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24332 { 7779 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24333 { 7779 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24334 { 7779 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24335 { 7779 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24336 { 7779 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24337 { 7779 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24338 { 7786 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24339 { 7786 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24340 { 7786 /* vandps */, X86::VANDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24341 { 7786 /* vandps */, X86::VANDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24342 { 7786 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24343 { 7786 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24344 { 7786 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24345 { 7786 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24346 { 7786 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24347 { 7786 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24348 { 7786 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24349 { 7786 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24350 { 7786 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24351 { 7786 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24352 { 7786 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24353 { 7786 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24354 { 7786 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24355 { 7786 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24356 { 7786 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24357 { 7786 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24358 { 7786 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24359 { 7786 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24360 { 7786 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24361 { 7786 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24362 { 7786 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24363 { 7786 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24364 { 7786 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24365 { 7786 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24366 { 7786 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24367 { 7786 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24368 { 7786 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24369 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24370 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24371 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24372 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24373 { 7793 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24374 { 7793 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24375 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24376 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24377 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24378 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24379 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24380 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24381 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24382 { 7793 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24383 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24384 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24385 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24386 { 7793 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24387 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24388 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24389 { 7793 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24390 { 7793 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24391 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24392 { 7793 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24393 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24394 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24395 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24396 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24397 { 7803 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24398 { 7803 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24399 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24400 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24401 { 7803 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24402 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24403 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24404 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24405 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24406 { 7803 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24407 { 7803 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24408 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24409 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24410 { 7803 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24411 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24412 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24413 { 7803 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24414 { 7803 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24415 { 7803 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24416 { 7803 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24417 { 7813 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24418 { 7813 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24419 { 7813 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24420 { 7813 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24421 { 7822 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24422 { 7822 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24423 { 7822 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24424 { 7822 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24425 { 7831 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24426 { 7831 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
24427 { 7831 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24428 { 7831 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
24429 { 7841 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24430 { 7841 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
24431 { 7841 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24432 { 7841 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
24433 { 7851 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24434 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
24435 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64 }, },
24436 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_FR32X }, },
24437 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64 }, },
24438 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24439 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24440 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24441 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24442 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24443 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24444 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24445 { 7866 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24446 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
24447 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
24448 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24449 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24450 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24451 { 7882 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24452 { 7898 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
24453 { 7898 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24454 { 7898 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24455 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_Mem128 }, },
24456 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI, { MCK_VR512, MCK_Mem128 }, },
24457 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24458 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24459 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24460 { 7914 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24461 { 7930 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
24462 { 7930 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24463 { 7930 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24464 { 7946 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24465 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24466 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
24467 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
24468 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64 }, },
24469 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_FR32X }, },
24470 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64 }, },
24471 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24472 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24473 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24474 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24475 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24476 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24477 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24478 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24479 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24480 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24481 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24482 { 7961 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24483 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
24484 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
24485 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24486 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24487 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24488 { 7977 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24489 { 7993 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
24490 { 7993 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24491 { 7993 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24492 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_Mem128 }, },
24493 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI, { MCK_VR512, MCK_Mem128 }, },
24494 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24495 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24496 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24497 { 8009 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24498 { 8025 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
24499 { 8025 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24500 { 8025 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24501 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24502 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
24503 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
24504 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64 }, },
24505 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
24506 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
24507 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24508 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24509 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24510 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24511 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24512 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24513 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24514 { 8041 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24515 { 8054 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24516 { 8054 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24517 { 8054 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24518 { 8054 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
24519 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24520 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32 }, },
24521 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
24522 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32 }, },
24523 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
24524 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32 }, },
24525 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24526 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24527 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24528 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24529 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24530 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24531 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24532 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24533 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24534 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24535 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24536 { 8054 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24537 { 8067 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24538 { 8067 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
24539 { 8067 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
24540 { 8067 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
24541 { 8067 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512 }, },
24542 { 8067 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
24543 { 8067 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24544 { 8067 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24545 { 8067 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24546 { 8067 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24547 { 8067 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24548 { 8067 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
24549 { 8067 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
24550 { 8067 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
24551 { 8067 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512 }, },
24552 { 8067 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
24553 { 8067 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24554 { 8067 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24555 { 8067 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24556 { 8067 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24557 { 8067 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24558 { 8067 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_Mem64 }, },
24559 { 8067 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24560 { 8067 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
24561 { 8067 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24562 { 8067 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_Mem32 }, },
24563 { 8067 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24564 { 8067 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
24565 { 8067 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24566 { 8067 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24567 { 8067 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24568 { 8067 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24569 { 8067 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24570 { 8067 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24571 { 8067 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24572 { 8067 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24573 { 8067 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24574 { 8067 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24575 { 8067 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24576 { 8067 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24577 { 8067 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24578 { 8067 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24579 { 8067 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24580 { 8067 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24581 { 8067 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24582 { 8067 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24583 { 8067 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24584 { 8067 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24585 { 8067 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24586 { 8067 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24587 { 8067 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24588 { 8067 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
24589 { 8067 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24590 { 8067 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
24591 { 8067 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24592 { 8067 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24593 { 8067 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24594 { 8067 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24595 { 8067 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24596 { 8067 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24597 { 8067 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24598 { 8067 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24599 { 8067 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24600 { 8067 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24601 { 8072 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24602 { 8072 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24603 { 8072 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24604 { 8072 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24605 { 8072 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24606 { 8072 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24607 { 8072 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24608 { 8072 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24609 { 8072 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24610 { 8072 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24611 { 8072 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24612 { 8072 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24613 { 8072 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24614 { 8072 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24615 { 8072 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24616 { 8072 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24617 { 8072 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24618 { 8072 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24619 { 8072 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24620 { 8072 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24621 { 8072 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24622 { 8072 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24623 { 8072 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24624 { 8072 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24625 { 8079 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24626 { 8079 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24627 { 8079 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24628 { 8079 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24629 { 8079 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24630 { 8079 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24631 { 8079 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24632 { 8079 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24633 { 8079 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24634 { 8079 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24635 { 8079 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24636 { 8079 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24637 { 8079 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24638 { 8079 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24639 { 8079 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24640 { 8079 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24641 { 8079 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24642 { 8079 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24643 { 8079 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24644 { 8079 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24645 { 8079 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24646 { 8079 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24647 { 8079 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24648 { 8079 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24649 { 8086 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24650 { 8086 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24651 { 8086 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24652 { 8086 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24653 { 8086 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24654 { 8086 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24655 { 8086 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24656 { 8086 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24657 { 8093 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24658 { 8093 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24659 { 8093 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24660 { 8093 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24661 { 8093 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24662 { 8093 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24663 { 8093 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24664 { 8093 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24665 { 8100 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24666 { 8100 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24667 { 8100 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
24668 { 8100 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
24669 { 8100 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24670 { 8108 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24671 { 8108 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24672 { 8108 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
24673 { 8108 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
24674 { 8108 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24675 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24676 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
24677 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
24678 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
24679 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
24680 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
24681 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24682 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24683 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24684 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24685 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24686 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24687 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24688 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24689 { 8116 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24690 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24691 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
24692 { 8128 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
24693 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
24694 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
24695 { 8128 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
24696 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24697 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24698 { 8128 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24699 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24700 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24701 { 8128 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24702 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24703 { 8128 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24704 { 8128 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24705 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24706 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24707 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24708 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24709 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24710 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
24711 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
24712 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
24713 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
24714 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
24715 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
24716 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
24717 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
24718 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24719 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24720 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24721 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24722 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24723 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24724 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24725 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24726 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24727 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24728 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24729 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24730 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24731 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24732 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24733 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24734 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24735 { 8140 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24736 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24737 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24738 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
24739 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
24740 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24741 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24742 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
24743 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
24744 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
24745 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
24746 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24747 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24748 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24749 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24750 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24751 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24752 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24753 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24754 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24755 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24756 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24757 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24758 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24759 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24760 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24761 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24762 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24763 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24764 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24765 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24766 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24767 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24768 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24769 { 8150 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24770 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24771 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24772 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24773 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24774 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24775 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
24776 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24777 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
24778 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
24779 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
24780 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24781 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24782 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24783 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24784 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24785 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24786 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24787 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24788 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24789 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24790 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24791 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24792 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24793 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24794 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24795 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24796 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24797 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24798 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24799 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24800 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24801 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24802 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24803 { 8160 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24804 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24805 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24806 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24807 { 8170 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24808 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24809 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24810 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
24811 { 8181 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
24812 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24813 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24814 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24815 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24816 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24817 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
24818 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24819 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
24820 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
24821 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
24822 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24823 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24824 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24825 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24826 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24827 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24828 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24829 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24830 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24831 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24832 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24833 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24834 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24835 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24836 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24837 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24838 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24839 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24840 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24841 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24842 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24843 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24844 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24845 { 8192 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24846 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24847 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24848 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24849 { 8202 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24850 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24851 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24852 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
24853 { 8213 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
24854 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24855 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24856 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
24857 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
24858 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
24859 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
24860 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24861 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24862 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24863 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24864 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24865 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24866 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24867 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24868 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24869 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24870 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24871 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24872 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24873 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24874 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24875 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24876 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24877 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24878 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24879 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24880 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24881 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24882 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24883 { 8224 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24884 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24885 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
24886 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24887 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
24888 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
24889 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
24890 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24891 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24892 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24893 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24894 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24895 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24896 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24897 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24898 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24899 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24900 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24901 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24902 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24903 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24904 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24905 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24906 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24907 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24908 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24909 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24910 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24911 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24912 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24913 { 8234 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24914 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24915 { 8245 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24916 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
24917 { 8257 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
24918 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24919 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24920 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
24921 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
24922 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
24923 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
24924 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24925 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24926 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24927 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24928 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24929 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24930 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24931 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24932 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24933 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24934 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24935 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24936 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24937 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24938 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24939 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24940 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24941 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24942 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24943 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24944 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
24945 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
24946 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24947 { 8269 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
24948 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24949 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24950 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24951 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24952 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24953 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
24954 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
24955 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
24956 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
24957 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
24958 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
24959 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24960 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24961 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24962 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24963 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24964 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24965 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24966 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24967 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24968 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24969 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24970 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24971 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
24972 { 8280 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
24973 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24974 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24975 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
24976 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
24977 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
24978 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
24979 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
24980 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
24981 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
24982 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
24983 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24984 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24985 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24986 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24987 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24988 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24989 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24990 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24991 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24992 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24993 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24994 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24995 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24996 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24997 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24998 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24999 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25000 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25001 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25002 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25003 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25004 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25005 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25006 { 8290 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25007 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25008 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
25009 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
25010 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
25011 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25012 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
25013 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
25014 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
25015 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
25016 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
25017 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25018 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25019 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25020 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25021 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25022 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25023 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25024 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25025 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25026 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25027 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25028 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25029 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25030 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25031 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25032 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25033 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25034 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25035 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25036 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25037 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25038 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25039 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25040 { 8300 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25041 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25042 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
25043 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25044 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25045 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25046 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
25047 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25048 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25049 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
25050 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25051 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25052 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25053 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25054 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25055 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25056 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25057 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25058 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25059 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25060 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25061 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25062 { 8310 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25063 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25064 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
25065 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
25066 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
25067 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
25068 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
25069 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25070 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25071 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
25072 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25073 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25074 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25075 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25076 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25077 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25078 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25079 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25080 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25081 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25082 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25083 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25084 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25085 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25086 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25087 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
25088 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25089 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25090 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25091 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
25092 { 8320 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25093 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25094 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25095 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25096 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25097 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
25098 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
25099 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25100 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25101 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25102 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25103 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25104 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25105 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25106 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25107 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25108 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25109 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25110 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25111 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25112 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25113 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25114 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25115 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25116 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25117 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25118 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25119 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25120 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25121 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25122 { 8330 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25123 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25124 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
25125 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
25126 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
25127 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
25128 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
25129 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25130 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25131 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
25132 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25133 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25134 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25135 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25136 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25137 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25138 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25139 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25140 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25141 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25142 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25143 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25144 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25145 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25146 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25147 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
25148 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25149 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25150 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25151 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
25152 { 8341 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25153 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25154 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25155 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25156 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25157 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
25158 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
25159 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25160 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25161 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25162 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25163 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25164 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25165 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25166 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25167 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25168 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25169 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25170 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25171 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25172 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25173 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25174 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25175 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25176 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25177 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25178 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25179 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25180 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25181 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25182 { 8352 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25183 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25184 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25185 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25186 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25187 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
25188 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem512 }, },
25189 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25190 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25191 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25192 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25193 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25194 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25195 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25196 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25197 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25198 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25199 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25200 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25201 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25202 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25203 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25204 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25205 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25206 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25207 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25208 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25209 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25210 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25211 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25212 { 8362 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25213 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25214 { 8372 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25215 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25216 { 8383 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25217 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25218 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25219 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25220 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
25221 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25222 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25223 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25224 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25225 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25226 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
25227 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25228 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25229 { 8394 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25230 { 8394 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25231 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25232 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25233 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25234 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25235 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25236 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25237 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
25238 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25239 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
25240 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25241 { 8426 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25242 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25243 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
25244 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25245 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
25246 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25247 { 8436 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25248 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
25249 { 8447 /* vcvtsi2sd */, X86::VCVTSI642SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
25250 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25251 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25252 { 8447 /* vcvtsi2sd */, X86::VCVTSI642SDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25253 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25254 { 8447 /* vcvtsi2sd */, X86::VCVTSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25255 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25256 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25257 { 8447 /* vcvtsi2sd */, X86::VCVTSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25258 { 8447 /* vcvtsi2sd */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25259 { 8447 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25260 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
25261 { 8479 /* vcvtsi2ss */, X86::VCVTSI642SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
25262 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25263 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25264 { 8479 /* vcvtsi2ss */, X86::VCVTSI642SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25265 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25266 { 8479 /* vcvtsi2ss */, X86::VCVTSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25267 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25268 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25269 { 8479 /* vcvtsi2ss */, X86::VCVTSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25270 { 8479 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25271 { 8479 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25272 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25273 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25274 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25275 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25276 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25277 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25278 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
25279 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25280 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
25281 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25282 { 8511 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25283 { 8521 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25284 { 8521 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25285 { 8521 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25286 { 8521 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
25287 { 8521 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25288 { 8521 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25289 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25290 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25291 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25292 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
25293 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25294 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25295 { 8521 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25296 { 8521 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25297 { 8553 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25298 { 8553 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
25299 { 8553 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25300 { 8553 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
25301 { 8553 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25302 { 8553 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25303 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25304 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25305 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25306 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25307 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25308 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25309 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25310 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25311 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
25312 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
25313 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25314 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25315 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
25316 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25317 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25318 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25319 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25320 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25321 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25322 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25323 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25324 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25325 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25326 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25327 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25328 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25329 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25330 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25331 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25332 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25333 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25334 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25335 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25336 { 8564 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25337 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25338 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25339 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25340 { 8575 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25341 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25342 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25343 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25344 { 8587 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25345 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25346 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25347 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25348 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25349 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
25350 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
25351 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25352 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25353 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25354 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25355 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25356 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25357 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25358 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25359 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25360 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25361 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25362 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25363 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25364 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25365 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25366 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25367 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25368 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25369 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25370 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25371 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25372 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25373 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25374 { 8599 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25375 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25376 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25377 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25378 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25379 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
25380 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
25381 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25382 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25383 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
25384 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25385 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25386 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25387 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25388 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25389 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25390 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25391 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25392 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25393 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25394 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25395 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25396 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25397 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25398 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25399 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25400 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25401 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25402 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25403 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25404 { 8610 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25405 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25406 { 8622 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25407 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25408 { 8635 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25409 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25410 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25411 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25412 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25413 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
25414 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
25415 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25416 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25417 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25418 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25419 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25420 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25421 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25422 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25423 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25424 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25425 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25426 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25427 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25428 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25429 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25430 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25431 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25432 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25433 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25434 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25435 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25436 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25437 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25438 { 8648 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25439 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25440 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25441 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
25442 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
25443 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25444 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25445 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25446 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25447 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
25448 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
25449 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25450 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25451 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25452 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25453 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25454 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25455 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25456 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25457 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25458 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25459 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25460 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25461 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25462 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25463 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25464 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25465 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25466 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25467 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25468 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25469 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25470 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25471 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25472 { 8660 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25473 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25474 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
25475 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
25476 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
25477 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
25478 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
25479 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25480 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25481 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25482 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25483 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25484 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25485 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25486 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25487 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25488 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25489 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25490 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25491 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25492 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25493 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25494 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25495 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25496 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25497 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25498 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25499 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25500 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25501 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25502 { 8671 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25503 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25504 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25505 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25506 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25507 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
25508 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
25509 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25510 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25511 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25512 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25513 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25514 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25515 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25516 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25517 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25518 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25519 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25520 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25521 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25522 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25523 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25524 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25525 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25526 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25527 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25528 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25529 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25530 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25531 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25532 { 8682 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25533 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25534 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
25535 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
25536 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
25537 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
25538 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
25539 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25540 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25541 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25542 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, Feature_HasDQI, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25543 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25544 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25545 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25546 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25547 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25548 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25549 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25550 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25551 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25552 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25553 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25554 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25555 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25556 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25557 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25558 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25559 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25560 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25561 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25562 { 8694 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25563 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25564 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25565 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25566 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25567 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25568 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
25569 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
25570 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25571 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25572 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25573 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25574 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25575 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25576 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25577 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
25578 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
25579 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25580 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25581 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25582 { 8706 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25583 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25584 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25585 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25586 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
25587 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
25588 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25589 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25590 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25591 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
25592 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
25593 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25594 { 8741 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25595 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25596 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25597 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25598 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25599 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25600 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
25601 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
25602 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25603 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25604 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25605 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25606 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25607 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25608 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25609 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
25610 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
25611 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25612 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25613 { 8779 /* vcvttss2si */, X86::VCVTTSS2SIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25614 { 8779 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25615 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25616 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25617 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
25618 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
25619 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
25620 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25621 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25622 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
25623 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
25624 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
25625 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25626 { 8814 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25627 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25628 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
25629 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
25630 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
25631 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
25632 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
25633 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25634 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25635 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25636 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25637 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25638 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25639 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25640 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25641 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25642 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25643 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25644 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25645 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25646 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25647 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25648 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25649 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25650 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25651 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25652 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25653 { 8852 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25654 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25655 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25656 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25657 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25658 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
25659 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
25660 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25661 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25662 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25663 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25664 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25665 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25666 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25667 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25668 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25669 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25670 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25671 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25672 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25673 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25674 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25675 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25676 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25677 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25678 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25679 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25680 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25681 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25682 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25683 { 8863 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25684 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25685 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25686 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25687 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25688 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
25689 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
25690 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25691 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25692 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25693 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25694 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25695 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25696 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25697 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25698 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25699 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25700 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25701 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25702 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25703 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25704 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25705 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25706 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25707 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25708 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25709 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25710 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25711 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25712 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25713 { 8874 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25714 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25715 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25716 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25717 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25718 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
25719 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem512 }, },
25720 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25721 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25722 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25723 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_0__Mem645_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25724 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25725 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25726 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25727 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25728 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25729 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25730 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25731 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25732 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25733 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25734 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25735 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25736 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25737 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25738 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25739 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25740 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25741 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25742 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25743 { 8885 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25744 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25745 { 8896 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25746 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
25747 { 8908 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
25748 { 8920 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25749 { 8920 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25750 { 8920 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25751 { 8920 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25752 { 8920 /* vcvtusi2sd */, X86::VCVTUSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25753 { 8920 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25754 { 8955 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25755 { 8955 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25756 { 8955 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25757 { 8955 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25758 { 8955 /* vcvtusi2ss */, X86::VCVTUSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25759 { 8955 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25760 { 8955 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25761 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25762 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25763 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25764 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25765 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25766 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25767 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25768 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25769 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25770 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25771 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25772 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25773 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25774 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25775 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25776 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25777 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25778 { 8990 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25779 { 9000 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25780 { 9000 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25781 { 9000 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25782 { 9000 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25783 { 9000 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25784 { 9000 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25785 { 9000 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25786 { 9000 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25787 { 9000 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25788 { 9000 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25789 { 9000 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25790 { 9000 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25791 { 9000 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25792 { 9000 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25793 { 9000 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25794 { 9000 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25795 { 9000 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25796 { 9000 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25797 { 9000 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25798 { 9000 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25799 { 9000 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25800 { 9000 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25801 { 9000 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25802 { 9000 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25803 { 9000 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25804 { 9000 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25805 { 9000 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25806 { 9000 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25807 { 9000 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25808 { 9000 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25809 { 9000 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25810 { 9000 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25811 { 9000 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25812 { 9000 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25813 { 9007 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25814 { 9007 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25815 { 9007 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25816 { 9007 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25817 { 9007 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25818 { 9007 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25819 { 9007 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25820 { 9007 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25821 { 9007 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25822 { 9007 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25823 { 9007 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25824 { 9007 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25825 { 9007 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25826 { 9007 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25827 { 9007 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25828 { 9007 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25829 { 9007 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25830 { 9007 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25831 { 9007 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25832 { 9007 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25833 { 9007 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25834 { 9007 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25835 { 9007 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25836 { 9007 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25837 { 9007 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25838 { 9007 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25839 { 9007 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25840 { 9007 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25841 { 9007 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25842 { 9007 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25843 { 9007 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25844 { 9007 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25845 { 9007 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25846 { 9007 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25847 { 9014 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25848 { 9014 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25849 { 9014 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25850 { 9014 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25851 { 9014 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25852 { 9014 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25853 { 9014 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
25854 { 9014 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25855 { 9014 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
25856 { 9014 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25857 { 9014 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25858 { 9021 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25859 { 9021 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25860 { 9021 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25861 { 9021 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25862 { 9021 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25863 { 9021 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25864 { 9021 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
25865 { 9021 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25866 { 9021 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
25867 { 9021 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25868 { 9021 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25869 { 9028 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25870 { 9028 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25871 { 9034 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25872 { 9034 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25873 { 9034 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25874 { 9034 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25875 { 9040 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
25876 { 9040 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
25877 { 9045 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
25878 { 9045 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
25879 { 9050 /* vexp2pd */, X86::VEXP2PDr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
25880 { 9050 /* vexp2pd */, X86::VEXP2PDm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
25881 { 9050 /* vexp2pd */, X86::VEXP2PDrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25882 { 9050 /* vexp2pd */, X86::VEXP2PDmb, Convert__Reg1_0__Mem645_1, Feature_HasERI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25883 { 9050 /* vexp2pd */, X86::VEXP2PDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25884 { 9050 /* vexp2pd */, X86::VEXP2PDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25885 { 9050 /* vexp2pd */, X86::VEXP2PDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25886 { 9050 /* vexp2pd */, X86::VEXP2PDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25887 { 9050 /* vexp2pd */, X86::VEXP2PDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25888 { 9050 /* vexp2pd */, X86::VEXP2PDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25889 { 9050 /* vexp2pd */, X86::VEXP2PDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25890 { 9050 /* vexp2pd */, X86::VEXP2PDmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25891 { 9058 /* vexp2ps */, X86::VEXP2PSr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
25892 { 9058 /* vexp2ps */, X86::VEXP2PSm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
25893 { 9058 /* vexp2ps */, X86::VEXP2PSrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25894 { 9058 /* vexp2ps */, X86::VEXP2PSmb, Convert__Reg1_0__Mem325_1, Feature_HasERI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25895 { 9058 /* vexp2ps */, X86::VEXP2PSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25896 { 9058 /* vexp2ps */, X86::VEXP2PSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25897 { 9058 /* vexp2ps */, X86::VEXP2PSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25898 { 9058 /* vexp2ps */, X86::VEXP2PSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25899 { 9058 /* vexp2ps */, X86::VEXP2PSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25900 { 9058 /* vexp2ps */, X86::VEXP2PSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25901 { 9058 /* vexp2ps */, X86::VEXP2PSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25902 { 9058 /* vexp2ps */, X86::VEXP2PSmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25903 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25904 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25905 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25906 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25907 { 9066 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
25908 { 9066 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
25909 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25910 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25911 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25912 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25913 { 9066 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25914 { 9066 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25915 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25916 { 9066 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25917 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25918 { 9066 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25919 { 9066 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25920 { 9066 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25921 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
25922 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
25923 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
25924 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
25925 { 9076 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
25926 { 9076 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
25927 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25928 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25929 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25930 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25931 { 9076 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25932 { 9076 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25933 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25934 { 9076 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25935 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25936 { 9076 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25937 { 9076 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25938 { 9076 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25939 { 9086 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
25940 { 9086 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
25941 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25942 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25943 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25944 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25945 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25946 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25947 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25948 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25949 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25950 { 9099 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25951 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25952 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25953 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25954 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25955 { 9113 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25956 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25957 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25958 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25959 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25960 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25961 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25962 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25963 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25964 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25965 { 9127 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25966 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25967 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25968 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25969 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25970 { 9141 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25971 { 9155 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
25972 { 9155 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
25973 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25974 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25975 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25976 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25977 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25978 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25979 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25980 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25981 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25982 { 9168 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25983 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25984 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25985 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25986 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25987 { 9182 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25988 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25989 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25990 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25991 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
25992 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25993 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25994 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25995 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25996 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25997 { 9196 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25998 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25999 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26000 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26001 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26002 { 9210 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26003 { 9224 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26004 { 9224 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
26005 { 9224 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26006 { 9224 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26007 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26008 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26009 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26010 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26011 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26012 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26013 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
26014 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26015 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26016 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26017 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26018 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26019 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26020 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26021 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26022 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26023 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26024 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26025 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
26026 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26027 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26028 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26029 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26030 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26031 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26032 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26033 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
26034 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26035 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26036 { 9235 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26037 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26038 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26039 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26040 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26041 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26042 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26043 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26044 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26045 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26046 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
26047 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26048 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26049 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26050 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26051 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26052 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26053 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26054 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26055 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26056 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26057 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26058 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26059 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26060 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26061 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26062 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
26063 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26064 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26065 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26066 { 9247 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
26067 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26068 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
26069 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26070 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26071 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
26072 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26073 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
26074 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26075 { 9259 /* vfixupimmsd */, X86::VFIXUPIMMSDrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26076 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26077 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
26078 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26079 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26080 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
26081 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26082 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
26083 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26084 { 9271 /* vfixupimmss */, X86::VFIXUPIMMSSrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26085 { 9283 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26086 { 9283 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26087 { 9283 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26088 { 9283 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26089 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26090 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26091 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26092 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26093 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26094 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26095 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26096 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26097 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26098 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26099 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26100 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26101 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26102 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26103 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26104 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26105 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26106 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26107 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26108 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26109 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26110 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26111 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26112 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26113 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26114 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26115 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26116 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26117 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26118 { 9283 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26119 { 9295 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26120 { 9295 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26121 { 9295 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26122 { 9295 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26123 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26124 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26125 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26126 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26127 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26128 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26129 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26130 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26131 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26132 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26133 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26134 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26135 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26136 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26137 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26138 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26139 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26140 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26141 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26142 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26143 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26144 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26145 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26146 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26147 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26148 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26149 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26150 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26151 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26152 { 9295 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26153 { 9307 /* vfmadd132sd */, X86::VFMADD132SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26154 { 9307 /* vfmadd132sd */, X86::VFMADD132SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26155 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26156 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26157 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26158 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26159 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26160 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26161 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26162 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26163 { 9307 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26164 { 9319 /* vfmadd132ss */, X86::VFMADD132SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26165 { 9319 /* vfmadd132ss */, X86::VFMADD132SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26166 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26167 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26168 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26169 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26170 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26171 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26172 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26173 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26174 { 9319 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26175 { 9331 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26176 { 9331 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26177 { 9331 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26178 { 9331 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26179 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26180 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26181 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26182 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26183 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26184 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26185 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26186 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26187 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26188 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26189 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26190 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26191 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26192 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26193 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26194 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26195 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26196 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26197 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26198 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26199 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26200 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26201 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26202 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26203 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26204 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26205 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26206 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26207 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26208 { 9331 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26209 { 9343 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26210 { 9343 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26211 { 9343 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26212 { 9343 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26213 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26214 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26215 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26216 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26217 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26218 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26219 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26220 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26221 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26222 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26223 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26224 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26225 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26226 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26227 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26228 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26229 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26230 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26231 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26232 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26233 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26234 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26235 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26236 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26237 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26238 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26239 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26240 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26241 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26242 { 9343 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26243 { 9355 /* vfmadd213sd */, X86::VFMADD213SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26244 { 9355 /* vfmadd213sd */, X86::VFMADD213SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26245 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26246 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26247 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26248 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26249 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26250 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26251 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26252 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26253 { 9355 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26254 { 9367 /* vfmadd213ss */, X86::VFMADD213SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26255 { 9367 /* vfmadd213ss */, X86::VFMADD213SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26256 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26257 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26258 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26259 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26260 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26261 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26262 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26263 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26264 { 9367 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26265 { 9379 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26266 { 9379 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26267 { 9379 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26268 { 9379 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26269 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26270 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26271 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26272 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26273 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26274 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26275 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26276 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26277 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26278 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26279 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26280 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26281 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26282 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26283 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26284 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26285 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26286 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26287 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26288 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26289 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26290 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26291 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26292 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26293 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26294 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26295 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26296 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26297 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26298 { 9379 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26299 { 9391 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26300 { 9391 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26301 { 9391 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26302 { 9391 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26303 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26304 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26305 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26306 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26307 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26308 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26309 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26310 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26311 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26312 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26313 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26314 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26315 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26316 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26317 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26318 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26319 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26320 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26321 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26322 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26323 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26324 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26325 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26326 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26327 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26328 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26329 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26330 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26331 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26332 { 9391 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26333 { 9403 /* vfmadd231sd */, X86::VFMADD231SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26334 { 9403 /* vfmadd231sd */, X86::VFMADD231SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26335 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26336 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26337 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26338 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26339 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26340 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26341 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26342 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26343 { 9403 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26344 { 9415 /* vfmadd231ss */, X86::VFMADD231SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26345 { 9415 /* vfmadd231ss */, X86::VFMADD231SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26346 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26347 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26348 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26349 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26350 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26351 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26352 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26353 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26354 { 9415 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26355 { 9427 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26356 { 9427 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26357 { 9427 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26358 { 9427 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26359 { 9427 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26360 { 9427 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26361 { 9436 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26362 { 9436 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26363 { 9436 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26364 { 9436 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26365 { 9436 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26366 { 9436 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26367 { 9445 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26368 { 9445 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26369 { 9445 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
26370 { 9454 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26371 { 9454 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26372 { 9454 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
26373 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26374 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26375 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26376 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26377 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26378 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26379 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26380 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26381 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26382 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26383 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26384 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26385 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26386 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26387 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26388 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26389 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26390 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26391 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26392 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26393 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26394 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26395 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26396 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26397 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26398 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26399 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26400 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26401 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26402 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26403 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26404 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26405 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26406 { 9463 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26407 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26408 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26409 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26410 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26411 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26412 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26413 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26414 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26415 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26416 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26417 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26418 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26419 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26420 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26421 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26422 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26423 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26424 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26425 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26426 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26427 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26428 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26429 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26430 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26431 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26432 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26433 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26434 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26435 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26436 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26437 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26438 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26439 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26440 { 9478 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26441 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26442 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26443 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26444 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26445 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26446 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26447 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26448 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26449 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26450 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26451 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26452 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26453 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26454 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26455 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26456 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26457 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26458 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26459 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26460 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26461 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26462 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26463 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26464 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26465 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26466 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26467 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26468 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26469 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26470 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26471 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26472 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26473 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26474 { 9493 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26475 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26476 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26477 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26478 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26479 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26480 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26481 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26482 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26483 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26484 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26485 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26486 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26487 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26488 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26489 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26490 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26491 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26492 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26493 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26494 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26495 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26496 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26497 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26498 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26499 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26500 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26501 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26502 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26503 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26504 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26505 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26506 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26507 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26508 { 9508 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26509 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26510 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26511 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26512 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26513 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26514 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26515 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26516 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26517 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26518 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26519 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26520 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26521 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26522 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26523 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26524 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26525 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26526 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26527 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26528 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26529 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26530 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26531 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26532 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26533 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26534 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26535 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26536 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26537 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26538 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26539 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26540 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26541 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26542 { 9523 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26543 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26544 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26545 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26546 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26547 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26548 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26549 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26550 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26551 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26552 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26553 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26554 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26555 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26556 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26557 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26558 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26559 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26560 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26561 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26562 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26563 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26564 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26565 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26566 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26567 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26568 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26569 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26570 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26571 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26572 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26573 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26574 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26575 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26576 { 9538 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26577 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26578 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26579 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26580 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26581 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26582 { 9553 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26583 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26584 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26585 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26586 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26587 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26588 { 9565 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26589 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26590 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26591 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26592 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26593 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26594 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26595 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26596 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26597 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26598 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26599 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26600 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26601 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26602 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26603 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26604 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26605 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26606 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26607 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26608 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26609 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26610 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26611 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26612 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26613 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26614 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26615 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26616 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26617 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26618 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26619 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26620 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26621 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26622 { 9577 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26623 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26624 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26625 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26626 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26627 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26628 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26629 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26630 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26631 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26632 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26633 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26634 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26635 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26636 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26637 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26638 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26639 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26640 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26641 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26642 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26643 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26644 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26645 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26646 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26647 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26648 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26649 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26650 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26651 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26652 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26653 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26654 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26655 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26656 { 9589 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26657 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26658 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26659 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26660 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26661 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26662 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26663 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26664 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26665 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26666 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26667 { 9601 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26668 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26669 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26670 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26671 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26672 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26673 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26674 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26675 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26676 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26677 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26678 { 9613 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26679 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26680 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26681 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26682 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26683 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26684 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26685 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26686 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26687 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26688 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26689 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26690 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26691 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26692 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26693 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26694 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26695 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26696 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26697 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26698 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26699 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26700 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26701 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26702 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26703 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26704 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26705 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26706 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26707 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26708 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26709 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26710 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26711 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26712 { 9625 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26713 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26714 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26715 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26716 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26717 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26718 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26719 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26720 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26721 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26722 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26723 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26724 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26725 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26726 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26727 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26728 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26729 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26730 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26731 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26732 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26733 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26734 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26735 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26736 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26737 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26738 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26739 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26740 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26741 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26742 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26743 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26744 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26745 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26746 { 9637 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26747 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26748 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26749 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26750 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26751 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26752 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26753 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26754 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26755 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26756 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26757 { 9649 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26758 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26759 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26760 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26761 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26762 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26763 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26764 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26765 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26766 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26767 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26768 { 9661 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26769 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26770 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26771 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26772 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26773 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26774 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26775 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26776 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26777 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26778 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26779 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26780 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26781 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26782 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26783 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26784 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26785 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26786 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26787 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26788 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26789 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26790 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26791 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26792 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26793 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26794 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26795 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26796 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26797 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26798 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26799 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26800 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26801 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26802 { 9673 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26803 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26804 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26805 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26806 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26807 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26808 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26809 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26810 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26811 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26812 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26813 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26814 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26815 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26816 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26817 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26818 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26819 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26820 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26821 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26822 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26823 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26824 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26825 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26826 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26827 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26828 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26829 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26830 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26831 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26832 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26833 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26834 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26835 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26836 { 9685 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26837 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26838 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26839 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26840 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26841 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26842 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26843 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26844 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26845 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26846 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26847 { 9697 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26848 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26849 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26850 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26851 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26852 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26853 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26854 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26855 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26856 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26857 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26858 { 9709 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26859 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26860 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26861 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26862 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26863 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26864 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26865 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26866 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26867 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26868 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26869 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26870 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26871 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26872 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26873 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26874 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26875 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26876 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26877 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26878 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26879 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26880 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26881 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26882 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26883 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26884 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26885 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26886 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26887 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26888 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26889 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26890 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26891 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26892 { 9721 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26893 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26894 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26895 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26896 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26897 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26898 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26899 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26900 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26901 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26902 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26903 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26904 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26905 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26906 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26907 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26908 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26909 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26910 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26911 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26912 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26913 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26914 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26915 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26916 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26917 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26918 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26919 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26920 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26921 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26922 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26923 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26924 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26925 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26926 { 9736 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26927 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26928 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26929 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26930 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26931 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26932 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26933 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26934 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26935 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26936 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26937 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26938 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26939 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26940 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26941 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26942 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26943 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26944 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26945 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26946 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26947 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26948 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26949 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26950 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26951 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26952 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26953 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26954 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26955 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26956 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26957 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26958 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26959 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26960 { 9751 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26961 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26962 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26963 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26964 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26965 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26966 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26967 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26968 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26969 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26970 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26971 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26972 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26973 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26974 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26975 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26976 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26977 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26978 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26979 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26980 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26981 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26982 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26983 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26984 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26985 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26986 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26987 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26988 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26989 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26990 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26991 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26992 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26993 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26994 { 9766 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26995 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26996 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26997 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26998 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26999 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27000 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27001 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27002 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27003 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27004 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27005 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27006 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27007 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27008 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27009 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27010 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27011 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27012 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27013 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27014 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27015 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27016 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27017 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27018 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27019 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27020 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27021 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27022 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27023 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27024 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27025 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27026 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27027 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27028 { 9781 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27029 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27030 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27031 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27032 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27033 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27034 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27035 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27036 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27037 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27038 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27039 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27040 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27041 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27042 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27043 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27044 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27045 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27046 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27047 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27048 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27049 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27050 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27051 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27052 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27053 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27054 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27055 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27056 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27057 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27058 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27059 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27060 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27061 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27062 { 9796 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27063 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27064 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27065 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27066 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27067 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27068 { 9811 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27069 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27070 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27071 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27072 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27073 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27074 { 9823 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27075 { 9835 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27076 { 9835 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27077 { 9835 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27078 { 9835 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27079 { 9835 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27080 { 9835 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27081 { 9844 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27082 { 9844 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27083 { 9844 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27084 { 9844 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27085 { 9844 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27086 { 9844 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27087 { 9853 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27088 { 9853 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27089 { 9853 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27090 { 9862 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27091 { 9862 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27092 { 9862 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27093 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27094 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27095 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27096 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27097 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27098 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27099 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27100 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27101 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27102 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27103 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27104 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27105 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27106 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27107 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27108 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27109 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27110 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27111 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27112 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27113 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27114 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27115 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27116 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27117 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27118 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27119 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27120 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27121 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27122 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27123 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27124 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27125 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27126 { 9871 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27127 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27128 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27129 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27130 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27131 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27132 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27133 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27134 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27135 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27136 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27137 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27138 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27139 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27140 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27141 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27142 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27143 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27144 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27145 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27146 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27147 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27148 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27149 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27150 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27151 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27152 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27153 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27154 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27155 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27156 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27157 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27158 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27159 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27160 { 9884 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27161 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27162 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27163 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27164 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27165 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27166 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27167 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27168 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27169 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27170 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27171 { 9897 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27172 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27173 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27174 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27175 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27176 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27177 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27178 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27179 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27180 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27181 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27182 { 9910 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27183 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27184 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27185 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27186 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27187 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27188 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27189 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27190 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27191 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27192 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27193 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27194 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27195 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27196 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27197 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27198 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27199 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27200 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27201 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27202 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27203 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27204 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27205 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27206 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27207 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27208 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27209 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27210 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27211 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27212 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27213 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27214 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27215 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27216 { 9923 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27217 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27218 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27219 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27220 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27221 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27222 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27223 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27224 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27225 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27226 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27227 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27228 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27229 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27230 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27231 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27232 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27233 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27234 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27235 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27236 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27237 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27238 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27239 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27240 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27241 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27242 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27243 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27244 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27245 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27246 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27247 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27248 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27249 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27250 { 9936 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27251 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27252 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27253 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27254 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27255 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27256 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27257 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27258 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27259 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27260 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27261 { 9949 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27262 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27263 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27264 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27265 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27266 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27267 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27268 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27269 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27270 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27271 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27272 { 9962 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27273 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27274 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27275 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27276 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27277 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27278 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27279 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27280 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27281 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27282 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27283 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27284 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27285 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27286 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27287 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27288 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27289 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27290 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27291 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27292 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27293 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27294 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27295 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27296 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27297 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27298 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27299 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27300 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27301 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27302 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27303 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27304 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27305 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27306 { 9975 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27307 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27308 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27309 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27310 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27311 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27312 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27313 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27314 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27315 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27316 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27317 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27318 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27319 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27320 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27321 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27322 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27323 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27324 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27325 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27326 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27327 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27328 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27329 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27330 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27331 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27332 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27333 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27334 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27335 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27336 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27337 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27338 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27339 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27340 { 9988 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27341 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27342 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27343 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27344 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27345 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27346 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27347 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27348 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27349 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27350 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27351 { 10001 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27352 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27353 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27354 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27355 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27356 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27357 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27358 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27359 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27360 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27361 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27362 { 10014 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27363 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27364 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27365 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27366 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27367 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27368 { 10027 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27369 { 10037 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27370 { 10037 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27371 { 10037 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27372 { 10037 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27373 { 10037 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27374 { 10037 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27375 { 10047 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27376 { 10047 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27377 { 10047 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27378 { 10057 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27379 { 10057 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27380 { 10057 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27381 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27382 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27383 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27384 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27385 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27386 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27387 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27388 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27389 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27390 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27391 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27392 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27393 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27394 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27395 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27396 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27397 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27398 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27399 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27400 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27401 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27402 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27403 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27404 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27405 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27406 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27407 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27408 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27409 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27410 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27411 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27412 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27413 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27414 { 10067 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27415 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27416 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27417 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27418 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27419 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27420 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27421 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27422 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27423 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27424 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27425 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27426 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27427 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27428 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27429 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27430 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27431 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27432 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27433 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27434 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27435 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27436 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27437 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27438 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27439 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27440 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27441 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27442 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27443 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27444 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27445 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27446 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27447 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27448 { 10080 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27449 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27450 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27451 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27452 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27453 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27454 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27455 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27456 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27457 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27458 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27459 { 10093 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27460 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27461 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27462 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27463 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27464 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27465 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27466 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27467 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27468 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27469 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27470 { 10106 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27471 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27472 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27473 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27474 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27475 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27476 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27477 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27478 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27479 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27480 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27481 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27482 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27483 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27484 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27485 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27486 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27487 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27488 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27489 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27490 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27491 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27492 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27493 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27494 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27495 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27496 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27497 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27498 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27499 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27500 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27501 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27502 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27503 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27504 { 10119 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27505 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27506 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27507 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27508 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27509 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27510 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27511 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27512 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27513 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27514 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27515 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27516 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27517 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27518 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27519 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27520 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27521 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27522 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27523 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27524 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27525 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27526 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27527 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27528 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27529 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27530 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27531 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27532 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27533 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27534 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27535 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27536 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27537 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27538 { 10132 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27539 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27540 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27541 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27542 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27543 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27544 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27545 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27546 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27547 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27548 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27549 { 10145 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27550 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27551 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27552 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27553 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27554 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27555 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27556 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27557 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27558 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27559 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27560 { 10158 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27561 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27562 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27563 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27564 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27565 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27566 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27567 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27568 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27569 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27570 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27571 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27572 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27573 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27574 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27575 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27576 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27577 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27578 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27579 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27580 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27581 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27582 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27583 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27584 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27585 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27586 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27587 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27588 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27589 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27590 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27591 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27592 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27593 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27594 { 10171 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27595 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27596 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27597 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27598 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27599 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27600 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27601 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27602 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27603 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27604 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27605 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27606 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27607 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27608 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27609 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27610 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27611 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27612 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27613 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27614 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27615 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27616 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27617 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27618 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27619 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27620 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27621 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27622 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27623 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27624 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27625 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27626 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27627 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27628 { 10184 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27629 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27630 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDm, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27631 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27632 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27633 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27634 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27635 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27636 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27637 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27638 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27639 { 10197 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27640 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27641 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSm, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27642 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27643 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27644 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27645 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27646 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27647 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27648 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27649 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27650 { 10210 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27651 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27652 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27653 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27654 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27655 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27656 { 10223 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27657 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27658 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27659 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27660 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27661 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27662 { 10233 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27663 { 10243 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27664 { 10243 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27665 { 10243 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27666 { 10253 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27667 { 10253 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27668 { 10253 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27669 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27670 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27671 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
27672 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27673 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27674 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27675 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27676 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27677 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VK1, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27678 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27679 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27680 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27681 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27682 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27683 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27684 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27685 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27686 { 10263 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27687 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27688 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27689 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
27690 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27691 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27692 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27693 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VK1, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27694 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27695 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27696 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27697 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27698 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27699 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27700 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27701 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27702 { 10322 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27703 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27704 { 10322 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27705 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27706 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27707 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27708 { 10381 /* vfpclasssd */, X86::VFPCLASSSDrmk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27709 { 10392 /* vfpclassss */, X86::VFPCLASSSSrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27710 { 10392 /* vfpclassss */, X86::VFPCLASSSSrm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27711 { 10392 /* vfpclassss */, X86::VFPCLASSSSrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27712 { 10392 /* vfpclassss */, X86::VFPCLASSSSrmk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27713 { 10403 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27714 { 10403 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27715 { 10403 /* vfrczpd */, X86::VFRCZPDrrY, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
27716 { 10403 /* vfrczpd */, X86::VFRCZPDrmY, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27717 { 10411 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27718 { 10411 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27719 { 10411 /* vfrczps */, X86::VFRCZPSrrY, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
27720 { 10411 /* vfrczps */, X86::VFRCZPSrmY, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27721 { 10419 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27722 { 10419 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
27723 { 10427 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27724 { 10427 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
27725 { 10435 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27726 { 10435 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC1285_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
27727 { 10435 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27728 { 10435 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC128X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
27729 { 10435 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC256X5_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27730 { 10446 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27731 { 10446 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
27732 { 10446 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27733 { 10446 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
27734 { 10446 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27735 { 10457 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27736 { 10471 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27737 { 10485 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27738 { 10499 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27739 { 10513 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27740 { 10527 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27741 { 10541 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27742 { 10555 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27743 { 10569 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27744 { 10569 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
27745 { 10569 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27746 { 10569 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
27747 { 10569 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27748 { 10580 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC2565_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
27749 { 10580 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0__Mem64_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
27750 { 10580 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC256X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
27751 { 10580 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem64_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
27752 { 10580 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27753 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
27754 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
27755 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
27756 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
27757 { 10591 /* vgetexppd */, X86::VGETEXPPDr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
27758 { 10591 /* vgetexppd */, X86::VGETEXPPDm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
27759 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27760 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27761 { 10591 /* vgetexppd */, X86::VGETEXPPDrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27762 { 10591 /* vgetexppd */, X86::VGETEXPPDmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27763 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27764 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27765 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27766 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27767 { 10591 /* vgetexppd */, X86::VGETEXPPDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27768 { 10591 /* vgetexppd */, X86::VGETEXPPDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27769 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27770 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27771 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
27772 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27773 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27774 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
27775 { 10591 /* vgetexppd */, X86::VGETEXPPDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27776 { 10591 /* vgetexppd */, X86::VGETEXPPDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27777 { 10591 /* vgetexppd */, X86::VGETEXPPDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27778 { 10591 /* vgetexppd */, X86::VGETEXPPDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27779 { 10591 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
27780 { 10591 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
27781 { 10591 /* vgetexppd */, X86::VGETEXPPDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27782 { 10591 /* vgetexppd */, X86::VGETEXPPDmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27783 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
27784 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
27785 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
27786 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
27787 { 10601 /* vgetexpps */, X86::VGETEXPPSr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
27788 { 10601 /* vgetexpps */, X86::VGETEXPPSm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
27789 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27790 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27791 { 10601 /* vgetexpps */, X86::VGETEXPPSrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27792 { 10601 /* vgetexpps */, X86::VGETEXPPSmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27793 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27794 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27795 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27796 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27797 { 10601 /* vgetexpps */, X86::VGETEXPPSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27798 { 10601 /* vgetexpps */, X86::VGETEXPPSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27799 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27800 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27801 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
27802 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27803 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27804 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
27805 { 10601 /* vgetexpps */, X86::VGETEXPPSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27806 { 10601 /* vgetexpps */, X86::VGETEXPPSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27807 { 10601 /* vgetexpps */, X86::VGETEXPPSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27808 { 10601 /* vgetexpps */, X86::VGETEXPPSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27809 { 10601 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
27810 { 10601 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
27811 { 10601 /* vgetexpps */, X86::VGETEXPPSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27812 { 10601 /* vgetexpps */, X86::VGETEXPPSmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27813 { 10611 /* vgetexpsd */, X86::VGETEXPSDr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27814 { 10611 /* vgetexpsd */, X86::VGETEXPSDm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27815 { 10611 /* vgetexpsd */, X86::VGETEXPSDrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27816 { 10611 /* vgetexpsd */, X86::VGETEXPSDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27817 { 10611 /* vgetexpsd */, X86::VGETEXPSDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27818 { 10611 /* vgetexpsd */, X86::VGETEXPSDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27819 { 10611 /* vgetexpsd */, X86::VGETEXPSDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27820 { 10611 /* vgetexpsd */, X86::VGETEXPSDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27821 { 10611 /* vgetexpsd */, X86::VGETEXPSDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27822 { 10621 /* vgetexpss */, X86::VGETEXPSSr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27823 { 10621 /* vgetexpss */, X86::VGETEXPSSm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27824 { 10621 /* vgetexpss */, X86::VGETEXPSSrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27825 { 10621 /* vgetexpss */, X86::VGETEXPSSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27826 { 10621 /* vgetexpss */, X86::VGETEXPSSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27827 { 10621 /* vgetexpss */, X86::VGETEXPSSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27828 { 10621 /* vgetexpss */, X86::VGETEXPSSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27829 { 10621 /* vgetexpss */, X86::VGETEXPSSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27830 { 10621 /* vgetexpss */, X86::VGETEXPSSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27831 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27832 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27833 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27834 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27835 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27836 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27837 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27838 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27839 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27840 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27841 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27842 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27843 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27844 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27845 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27846 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27847 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27848 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27849 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27850 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27851 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27852 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27853 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27854 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27855 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27856 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27857 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27858 { 10631 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27859 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27860 { 10631 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27861 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27862 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27863 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27864 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27865 { 10642 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27866 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27867 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27868 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27869 { 10642 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27870 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27871 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27872 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27873 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27874 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27875 { 10642 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27876 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27877 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27878 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27879 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27880 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27881 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27882 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27883 { 10642 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27884 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27885 { 10642 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27886 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27887 { 10642 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27888 { 10642 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27889 { 10642 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27890 { 10642 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27891 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27892 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27893 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27894 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27895 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27896 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27897 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27898 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27899 { 10653 /* vgetmantsd */, X86::VGETMANTSDZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27900 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27901 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27902 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27903 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27904 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27905 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27906 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27907 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27908 { 10664 /* vgetmantss */, X86::VGETMANTSSZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27909 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27910 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27911 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
27912 { 10675 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27913 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27914 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27915 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27916 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27917 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27918 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27919 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27920 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27921 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27922 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27923 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27924 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27925 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27926 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27927 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27928 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27929 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27930 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27931 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27932 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27933 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27934 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27935 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27936 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27937 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27938 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27939 { 10675 /* vgf2p8affineinvqb */, X86::GF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27940 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27941 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27942 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
27943 { 10693 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27944 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27945 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27946 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27947 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27948 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27949 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27950 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27951 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27952 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27953 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27954 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27955 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27956 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27957 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27958 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27959 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27960 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27961 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27962 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27963 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27964 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27965 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27966 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27967 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27968 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27969 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27970 { 10693 /* vgf2p8affineqb */, X86::GF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27971 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27972 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27973 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27974 { 10708 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27975 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27976 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27977 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27978 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27979 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27980 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27981 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27982 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27983 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27984 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27985 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27986 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27987 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27988 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27989 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27990 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27991 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27992 { 10708 /* vgf2p8mulb */, X86::GF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512|Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27993 { 10719 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27994 { 10719 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27995 { 10719 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27996 { 10719 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27997 { 10727 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27998 { 10727 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27999 { 10727 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28000 { 10727 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28001 { 10735 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28002 { 10735 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28003 { 10735 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28004 { 10735 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28005 { 10743 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28006 { 10743 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28007 { 10743 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28008 { 10743 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28009 { 10751 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
28010 { 10751 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28011 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28012 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28013 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28014 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28015 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28016 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28017 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28018 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28019 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28020 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28021 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28022 { 10763 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28023 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28024 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28025 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28026 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28027 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28028 { 10776 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28029 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28030 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28031 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28032 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28033 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28034 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28035 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28036 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28037 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28038 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28039 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28040 { 10789 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28041 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28042 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28043 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28044 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28045 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28046 { 10802 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28047 { 10815 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
28048 { 10815 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28049 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28050 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28051 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28052 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28053 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28054 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28055 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28056 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28057 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28058 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28059 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28060 { 10827 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28061 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28062 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28063 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28064 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28065 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28066 { 10840 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28067 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28068 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28069 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28070 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28071 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28072 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28073 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28074 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28075 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28076 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28077 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28078 { 10853 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28079 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28080 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28081 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28082 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28083 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28084 { 10866 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28085 { 10879 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28086 { 10879 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28087 { 10879 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28088 { 10879 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28089 { 10889 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28090 { 10889 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28091 { 10896 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
28092 { 10905 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
28093 { 10905 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
28094 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28095 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28096 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
28097 { 10917 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
28098 { 10928 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28099 { 10928 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28100 { 10928 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
28101 { 10928 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
28102 { 10939 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28103 { 10939 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28104 { 10939 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28105 { 10939 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28106 { 10939 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28107 { 10939 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28108 { 10939 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28109 { 10939 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28110 { 10939 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28111 { 10939 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28112 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28113 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28114 { 10939 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28115 { 10939 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28116 { 10939 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28117 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28118 { 10939 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28119 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28120 { 10939 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28121 { 10939 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28122 { 10939 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28123 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28124 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28125 { 10939 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28126 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28127 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28128 { 10939 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28129 { 10939 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28130 { 10939 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28131 { 10939 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28132 { 10939 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28133 { 10939 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28134 { 10939 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28135 { 10939 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28136 { 10946 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28137 { 10946 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28138 { 10946 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28139 { 10946 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28140 { 10946 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28141 { 10946 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28142 { 10946 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28143 { 10946 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28144 { 10946 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28145 { 10946 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28146 { 10946 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28147 { 10946 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28148 { 10946 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28149 { 10946 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28150 { 10946 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28151 { 10946 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28152 { 10946 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28153 { 10946 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28154 { 10946 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28155 { 10946 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28156 { 10946 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28157 { 10946 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28158 { 10946 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28159 { 10946 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28160 { 10946 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28161 { 10946 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28162 { 10946 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28163 { 10946 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28164 { 10946 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28165 { 10946 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28166 { 10946 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28167 { 10946 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28168 { 10946 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28169 { 10946 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28170 { 10953 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28171 { 10953 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28172 { 10953 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28173 { 10953 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28174 { 10953 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28175 { 10953 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28176 { 10953 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28177 { 10953 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28178 { 10953 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28179 { 10953 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28180 { 10953 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28181 { 10960 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28182 { 10960 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28183 { 10960 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28184 { 10960 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28185 { 10960 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28186 { 10960 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28187 { 10960 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28188 { 10960 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28189 { 10960 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28190 { 10960 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28191 { 10960 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28192 { 10967 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, { }, },
28193 { 10974 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28194 { 10982 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, { }, },
28195 { 10989 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28196 { 10989 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28197 { 10989 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28198 { 10989 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28199 { 10989 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28200 { 10989 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28201 { 10989 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28202 { 10989 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28203 { 10989 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28204 { 10989 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28205 { 10989 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28206 { 10989 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28207 { 10989 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28208 { 10989 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28209 { 10989 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28210 { 10989 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28211 { 10989 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28212 { 10989 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28213 { 10989 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28214 { 10989 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28215 { 10989 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28216 { 10989 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28217 { 10989 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28218 { 10989 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28219 { 10989 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28220 { 10989 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28221 { 10989 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28222 { 10989 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28223 { 10989 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28224 { 10989 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28225 { 10989 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28226 { 10989 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28227 { 10989 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28228 { 10989 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28229 { 10996 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28230 { 10996 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28231 { 10996 /* vminps */, X86::VMINPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28232 { 10996 /* vminps */, X86::VMINPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28233 { 10996 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28234 { 10996 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28235 { 10996 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28236 { 10996 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28237 { 10996 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28238 { 10996 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28239 { 10996 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28240 { 10996 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28241 { 10996 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28242 { 10996 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28243 { 10996 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28244 { 10996 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28245 { 10996 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28246 { 10996 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28247 { 10996 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28248 { 10996 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28249 { 10996 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28250 { 10996 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28251 { 10996 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28252 { 10996 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28253 { 10996 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28254 { 10996 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28255 { 10996 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28256 { 10996 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28257 { 10996 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28258 { 10996 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28259 { 10996 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28260 { 10996 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28261 { 10996 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28262 { 10996 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28263 { 11003 /* vminsd */, X86::VMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28264 { 11003 /* vminsd */, X86::VMINSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28265 { 11003 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28266 { 11003 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28267 { 11003 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28268 { 11003 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28269 { 11003 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28270 { 11003 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28271 { 11003 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28272 { 11003 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28273 { 11003 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28274 { 11010 /* vminss */, X86::VMINSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28275 { 11010 /* vminss */, X86::VMINSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28276 { 11010 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28277 { 11010 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28278 { 11010 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28279 { 11010 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28280 { 11010 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28281 { 11010 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28282 { 11010 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28283 { 11010 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28284 { 11010 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28285 { 11017 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, { }, },
28286 { 11026 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28287 { 11026 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28288 { 11033 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, { }, },
28289 { 11041 /* vmovapd */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28290 { 11041 /* vmovapd */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28291 { 11041 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28292 { 11041 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28293 { 11041 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28294 { 11041 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28295 { 11041 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28296 { 11041 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28297 { 11041 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28298 { 11041 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28299 { 11041 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28300 { 11041 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28301 { 11041 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28302 { 11041 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28303 { 11041 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28304 { 11041 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28305 { 11041 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28306 { 11041 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28307 { 11041 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28308 { 11041 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28309 { 11041 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28310 { 11041 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28311 { 11041 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28312 { 11041 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28313 { 11041 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28314 { 11041 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28315 { 11041 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28316 { 11041 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28317 { 11041 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28318 { 11041 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28319 { 11041 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28320 { 11041 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28321 { 11049 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28322 { 11049 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28323 { 11049 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28324 { 11049 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28325 { 11049 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28326 { 11049 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28327 { 11049 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28328 { 11049 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28329 { 11049 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28330 { 11059 /* vmovaps */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28331 { 11059 /* vmovaps */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28332 { 11059 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28333 { 11059 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28334 { 11059 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28335 { 11059 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28336 { 11059 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28337 { 11059 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28338 { 11059 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28339 { 11059 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28340 { 11059 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28341 { 11059 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28342 { 11059 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28343 { 11059 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28344 { 11059 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28345 { 11059 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28346 { 11059 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28347 { 11059 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28348 { 11059 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28349 { 11059 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28350 { 11059 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28351 { 11059 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28352 { 11059 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28353 { 11059 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28354 { 11059 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28355 { 11059 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28356 { 11059 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28357 { 11059 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28358 { 11059 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28359 { 11059 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28360 { 11059 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28361 { 11059 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28362 { 11067 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28363 { 11067 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28364 { 11067 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28365 { 11067 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28366 { 11067 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28367 { 11067 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28368 { 11067 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28369 { 11067 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28370 { 11067 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28371 { 11077 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
28372 { 11077 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
28373 { 11077 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
28374 { 11077 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
28375 { 11077 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
28376 { 11077 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
28377 { 11077 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
28378 { 11077 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
28379 { 11077 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
28380 { 11077 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_0__Reg1_1, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
28381 { 11083 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28382 { 11083 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28383 { 11083 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28384 { 11083 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28385 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28386 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
28387 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28388 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28389 { 11083 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28390 { 11083 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28391 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28392 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
28393 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28394 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28395 { 11083 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28396 { 11083 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28397 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28398 { 11083 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
28399 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28400 { 11083 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28401 { 11083 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28402 { 11083 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28403 { 11092 /* vmovdqa */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28404 { 11092 /* vmovdqa */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28405 { 11092 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28406 { 11092 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28407 { 11092 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28408 { 11092 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28409 { 11092 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28410 { 11092 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28411 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28412 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28413 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28414 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28415 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28416 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28417 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28418 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28419 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28420 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28421 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28422 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28423 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28424 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28425 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28426 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28427 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28428 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28429 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28430 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28431 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28432 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28433 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28434 { 11100 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28435 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28436 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28437 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28438 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28439 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28440 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28441 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28442 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28443 { 11110 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28444 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28445 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28446 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28447 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28448 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28449 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28450 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28451 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28452 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28453 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28454 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28455 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28456 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28457 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28458 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28459 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28460 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28461 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28462 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28463 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28464 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28465 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28466 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28467 { 11122 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28468 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28469 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28470 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28471 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28472 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28473 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28474 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28475 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28476 { 11132 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28477 { 11144 /* vmovdqu */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28478 { 11144 /* vmovdqu */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28479 { 11144 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28480 { 11144 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28481 { 11144 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28482 { 11144 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28483 { 11144 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28484 { 11144 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28485 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28486 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28487 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28488 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28489 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
28490 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
28491 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28492 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28493 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
28494 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28495 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28496 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28497 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28498 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28499 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28500 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28501 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28502 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28503 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28504 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28505 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28506 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28507 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28508 { 11152 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28509 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28510 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28511 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
28512 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28513 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28514 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28515 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28516 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28517 { 11162 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28518 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28519 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28520 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28521 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28522 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28523 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28524 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28525 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28526 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28527 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28528 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28529 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28530 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28531 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28532 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28533 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28534 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28535 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28536 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28537 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28538 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28539 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28540 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28541 { 11174 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28542 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28543 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28544 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28545 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28546 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28547 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28548 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28549 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28550 { 11184 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28551 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28552 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28553 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28554 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28555 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28556 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28557 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28558 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28559 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28560 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28561 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28562 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28563 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28564 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28565 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28566 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28567 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28568 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28569 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28570 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28571 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28572 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28573 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28574 { 11196 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28575 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28576 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28577 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28578 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28579 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28580 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28581 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28582 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28583 { 11206 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28584 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28585 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28586 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28587 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28588 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
28589 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
28590 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28591 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28592 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
28593 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28594 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28595 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28596 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28597 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28598 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28599 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28600 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28601 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28602 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28603 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28604 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28605 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28606 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28607 { 11218 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28608 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28609 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28610 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
28611 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28612 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28613 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28614 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28615 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28616 { 11227 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28617 { 11238 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28618 { 11238 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28619 { 11247 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28620 { 11247 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
28621 { 11247 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28622 { 11247 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28623 { 11255 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28624 { 11255 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
28625 { 11255 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28626 { 11255 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28627 { 11263 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28628 { 11263 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28629 { 11272 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28630 { 11272 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
28631 { 11272 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28632 { 11272 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28633 { 11280 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28634 { 11280 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
28635 { 11280 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28636 { 11280 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28637 { 11288 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
28638 { 11288 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
28639 { 11298 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
28640 { 11298 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
28641 { 11308 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28642 { 11308 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28643 { 11308 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28644 { 11308 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28645 { 11308 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28646 { 11317 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28647 { 11317 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28648 { 11317 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28649 { 11317 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28650 { 11317 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28651 { 11327 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28652 { 11327 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28653 { 11327 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28654 { 11327 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28655 { 11327 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28656 { 11336 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28657 { 11336 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28658 { 11336 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28659 { 11336 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28660 { 11336 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28661 { 11345 /* vmovq */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28662 { 11345 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28663 { 11345 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
28664 { 11345 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28665 { 11345 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
28666 { 11345 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_In64BitMode, { MCK_GR64, MCK_FR32X }, },
28667 { 11345 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
28668 { 11345 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
28669 { 11345 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
28670 { 11345 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28671 { 11345 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512|Feature_In64BitMode, { MCK_Mem64, MCK_FR32X }, },
28672 { 11351 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
28673 { 11359 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28674 { 11359 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
28675 { 11359 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28676 { 11359 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
28677 { 11359 /* vmovsd */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR128L, MCK_FR32, MCK_VR128H }, },
28678 { 11359 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28679 { 11359 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28680 { 11359 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
28681 { 11359 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28682 { 11359 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
28683 { 11359 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28684 { 11359 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28685 { 11366 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28686 { 11366 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28687 { 11366 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28688 { 11375 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28689 { 11375 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28690 { 11375 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28691 { 11375 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28692 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28693 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28694 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28695 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28696 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28697 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28698 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28699 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28700 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28701 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28702 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28703 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28704 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28705 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28706 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28707 { 11375 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28708 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28709 { 11375 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28710 { 11385 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28711 { 11385 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28712 { 11385 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28713 { 11385 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28714 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28715 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28716 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28717 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28718 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28719 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28720 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28721 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28722 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28723 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28724 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28725 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28726 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28727 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28728 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28729 { 11385 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28730 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28731 { 11385 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28732 { 11395 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
28733 { 11395 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
28734 { 11395 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
28735 { 11395 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_0__Reg1_1, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
28736 { 11395 /* vmovss */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR128L, MCK_FR32, MCK_VR128H }, },
28737 { 11395 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28738 { 11395 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28739 { 11395 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
28740 { 11395 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28741 { 11395 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
28742 { 11395 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28743 { 11395 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28744 { 11402 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28745 { 11402 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28746 { 11402 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28747 { 11411 /* vmovupd */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28748 { 11411 /* vmovupd */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28749 { 11411 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28750 { 11411 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28751 { 11411 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28752 { 11411 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28753 { 11411 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28754 { 11411 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28755 { 11411 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28756 { 11411 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28757 { 11411 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28758 { 11411 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28759 { 11411 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28760 { 11411 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28761 { 11411 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28762 { 11411 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28763 { 11411 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28764 { 11411 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28765 { 11411 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28766 { 11411 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28767 { 11411 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28768 { 11411 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28769 { 11411 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28770 { 11411 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28771 { 11411 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28772 { 11411 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28773 { 11411 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28774 { 11411 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28775 { 11411 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28776 { 11411 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28777 { 11411 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28778 { 11411 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28779 { 11419 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28780 { 11419 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28781 { 11419 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28782 { 11419 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28783 { 11419 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28784 { 11419 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28785 { 11419 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28786 { 11419 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28787 { 11419 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28788 { 11429 /* vmovups */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28789 { 11429 /* vmovups */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28790 { 11429 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28791 { 11429 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28792 { 11429 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28793 { 11429 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28794 { 11429 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28795 { 11429 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
28796 { 11429 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28797 { 11429 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
28798 { 11429 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28799 { 11429 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
28800 { 11429 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28801 { 11429 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
28802 { 11429 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28803 { 11429 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
28804 { 11429 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
28805 { 11429 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28806 { 11429 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28807 { 11429 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28808 { 11429 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28809 { 11429 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28810 { 11429 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28811 { 11429 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28812 { 11429 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28813 { 11429 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28814 { 11429 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28815 { 11429 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28816 { 11429 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28817 { 11429 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28818 { 11429 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28819 { 11429 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28820 { 11437 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
28821 { 11437 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
28822 { 11437 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
28823 { 11437 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28824 { 11437 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28825 { 11437 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28826 { 11437 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28827 { 11437 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28828 { 11437 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28829 { 11447 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28830 { 11447 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28831 { 11447 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28832 { 11447 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28833 { 11456 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28834 { 11464 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28835 { 11472 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
28836 { 11472 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
28837 { 11472 /* vmread */, X86::VMREAD32mr, Convert__Mem325_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
28838 { 11472 /* vmread */, X86::VMREAD64mr, Convert__Mem645_0__Reg1_1, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
28839 { 11495 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, { }, },
28840 { 11504 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28841 { 11504 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28842 { 11510 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28843 { 11510 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28844 { 11517 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28845 { 11517 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28846 { 11517 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28847 { 11517 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28848 { 11517 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28849 { 11517 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28850 { 11517 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28851 { 11517 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28852 { 11517 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28853 { 11517 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28854 { 11517 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28855 { 11517 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28856 { 11517 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28857 { 11517 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28858 { 11517 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28859 { 11517 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28860 { 11517 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28861 { 11517 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28862 { 11517 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28863 { 11517 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28864 { 11517 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28865 { 11517 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28866 { 11517 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28867 { 11517 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28868 { 11517 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28869 { 11517 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28870 { 11517 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28871 { 11517 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28872 { 11517 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28873 { 11517 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28874 { 11517 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28875 { 11517 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28876 { 11517 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28877 { 11517 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28878 { 11524 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28879 { 11524 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28880 { 11524 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28881 { 11524 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28882 { 11524 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28883 { 11524 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28884 { 11524 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28885 { 11524 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28886 { 11524 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28887 { 11524 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28888 { 11524 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28889 { 11524 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28890 { 11524 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28891 { 11524 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28892 { 11524 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28893 { 11524 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28894 { 11524 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28895 { 11524 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28896 { 11524 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28897 { 11524 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28898 { 11524 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28899 { 11524 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28900 { 11524 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28901 { 11524 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28902 { 11524 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28903 { 11524 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28904 { 11524 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28905 { 11524 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28906 { 11524 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28907 { 11524 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28908 { 11524 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28909 { 11524 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28910 { 11524 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28911 { 11524 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28912 { 11531 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28913 { 11531 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28914 { 11531 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28915 { 11531 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28916 { 11531 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28917 { 11531 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28918 { 11531 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28919 { 11531 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28920 { 11531 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28921 { 11531 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28922 { 11531 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28923 { 11538 /* vmulss */, X86::VMULSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28924 { 11538 /* vmulss */, X86::VMULSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28925 { 11538 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28926 { 11538 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28927 { 11538 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28928 { 11538 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28929 { 11538 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28930 { 11538 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28931 { 11538 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28932 { 11538 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28933 { 11538 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28934 { 11545 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
28935 { 11545 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
28936 { 11545 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
28937 { 11545 /* vmwrite */, X86::VMWRITE64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
28938 { 11571 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, { }, },
28939 { 11578 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28940 { 11584 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28941 { 11584 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28942 { 11584 /* vorpd */, X86::VORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28943 { 11584 /* vorpd */, X86::VORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28944 { 11584 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28945 { 11584 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28946 { 11584 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28947 { 11584 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28948 { 11584 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28949 { 11584 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28950 { 11584 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28951 { 11584 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28952 { 11584 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28953 { 11584 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28954 { 11584 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28955 { 11584 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28956 { 11584 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28957 { 11584 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28958 { 11584 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28959 { 11584 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28960 { 11584 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28961 { 11584 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28962 { 11584 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28963 { 11584 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28964 { 11584 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28965 { 11584 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28966 { 11584 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28967 { 11584 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28968 { 11584 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28969 { 11584 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28970 { 11584 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28971 { 11590 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28972 { 11590 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28973 { 11590 /* vorps */, X86::VORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28974 { 11590 /* vorps */, X86::VORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28975 { 11590 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28976 { 11590 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28977 { 11590 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28978 { 11590 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28979 { 11590 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28980 { 11590 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28981 { 11590 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28982 { 11590 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28983 { 11590 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28984 { 11590 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28985 { 11590 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28986 { 11590 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28987 { 11590 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28988 { 11590 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28989 { 11590 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28990 { 11590 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28991 { 11590 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28992 { 11590 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28993 { 11590 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28994 { 11590 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28995 { 11590 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28996 { 11590 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28997 { 11590 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28998 { 11590 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28999 { 11590 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29000 { 11590 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29001 { 11590 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29002 { 11596 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29003 { 11596 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
29004 { 11596 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
29005 { 11596 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
29006 { 11596 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29007 { 11596 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
29008 { 11596 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
29009 { 11596 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
29010 { 11596 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
29011 { 11596 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
29012 { 11596 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29013 { 11596 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29014 { 11596 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29015 { 11596 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29016 { 11596 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29017 { 11596 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29018 { 11596 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29019 { 11596 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29020 { 11596 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29021 { 11596 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29022 { 11596 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29023 { 11596 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29024 { 11603 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29025 { 11603 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
29026 { 11603 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
29027 { 11603 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
29028 { 11603 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29029 { 11603 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
29030 { 11603 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
29031 { 11603 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
29032 { 11603 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
29033 { 11603 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
29034 { 11603 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29035 { 11603 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29036 { 11603 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29037 { 11603 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29038 { 11603 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29039 { 11603 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29040 { 11603 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29041 { 11603 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29042 { 11603 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29043 { 11603 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29044 { 11603 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29045 { 11603 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
29046 { 11603 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29047 { 11603 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29048 { 11603 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
29049 { 11603 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29050 { 11603 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29051 { 11603 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
29052 { 11603 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
29053 { 11603 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
29054 { 11603 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
29055 { 11610 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29056 { 11610 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
29057 { 11610 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
29058 { 11610 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
29059 { 11610 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
29060 { 11610 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
29061 { 11610 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29062 { 11610 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29063 { 11610 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29064 { 11610 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29065 { 11610 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29066 { 11610 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29067 { 11610 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29068 { 11610 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29069 { 11610 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29070 { 11610 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29071 { 11610 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29072 { 11610 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
29073 { 11610 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29074 { 11610 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29075 { 11610 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
29076 { 11610 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29077 { 11610 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29078 { 11610 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
29079 { 11610 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
29080 { 11610 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
29081 { 11610 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
29082 { 11617 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29083 { 11617 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
29084 { 11617 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
29085 { 11617 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
29086 { 11617 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29087 { 11617 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
29088 { 11617 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
29089 { 11617 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
29090 { 11617 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
29091 { 11617 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
29092 { 11617 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29093 { 11617 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29094 { 11617 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29095 { 11617 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29096 { 11617 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29097 { 11617 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29098 { 11617 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29099 { 11617 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29100 { 11617 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29101 { 11617 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29102 { 11617 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29103 { 11617 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29104 { 11624 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29105 { 11624 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29106 { 11624 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29107 { 11624 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29108 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29109 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29110 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29111 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29112 { 11624 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29113 { 11624 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29114 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29115 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29116 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29117 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29118 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29119 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29120 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29121 { 11624 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29122 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29123 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29124 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29125 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29126 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29127 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29128 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29129 { 11624 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29130 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29131 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29132 { 11624 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29133 { 11624 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29134 { 11624 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29135 { 11634 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29136 { 11634 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29137 { 11634 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29138 { 11634 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29139 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29140 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29141 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29142 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29143 { 11634 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29144 { 11634 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29145 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29146 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29147 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29148 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29149 { 11634 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29150 { 11634 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29151 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29152 { 11634 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29153 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29154 { 11634 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29155 { 11634 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29156 { 11634 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29157 { 11644 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29158 { 11644 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29159 { 11644 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29160 { 11644 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29161 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29162 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29163 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29164 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29165 { 11644 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29166 { 11644 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29167 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29168 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29169 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29170 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29171 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29172 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29173 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29174 { 11644 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29175 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29176 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29177 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29178 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29179 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29180 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29181 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29182 { 11644 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29183 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29184 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29185 { 11644 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29186 { 11644 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29187 { 11644 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29188 { 11654 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29189 { 11654 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29190 { 11654 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29191 { 11654 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29192 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29193 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29194 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29195 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29196 { 11654 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29197 { 11654 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29198 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29199 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29200 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29201 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29202 { 11654 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29203 { 11654 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29204 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29205 { 11654 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29206 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29207 { 11654 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29208 { 11654 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29209 { 11654 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29210 { 11664 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29211 { 11664 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29212 { 11664 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29213 { 11664 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29214 { 11664 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29215 { 11664 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29216 { 11664 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29217 { 11664 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29218 { 11664 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29219 { 11664 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29220 { 11664 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29221 { 11664 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29222 { 11664 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29223 { 11664 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29224 { 11664 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29225 { 11664 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29226 { 11664 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29227 { 11664 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29228 { 11664 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29229 { 11664 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29230 { 11664 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29231 { 11664 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29232 { 11671 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29233 { 11671 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29234 { 11671 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29235 { 11671 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29236 { 11671 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29237 { 11671 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29238 { 11671 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29239 { 11671 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29240 { 11671 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29241 { 11671 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29242 { 11671 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29243 { 11671 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29244 { 11671 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29245 { 11671 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29246 { 11671 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29247 { 11671 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29248 { 11671 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29249 { 11671 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29250 { 11671 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29251 { 11671 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29252 { 11671 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29253 { 11671 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29254 { 11671 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29255 { 11671 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29256 { 11671 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29257 { 11671 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29258 { 11671 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29259 { 11671 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29260 { 11671 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29261 { 11671 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29262 { 11671 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29263 { 11678 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29264 { 11678 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29265 { 11678 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29266 { 11678 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29267 { 11678 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29268 { 11678 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29269 { 11678 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29270 { 11678 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29271 { 11678 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29272 { 11678 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29273 { 11678 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29274 { 11678 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29275 { 11678 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29276 { 11678 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29277 { 11678 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29278 { 11678 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29279 { 11678 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29280 { 11678 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29281 { 11678 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29282 { 11678 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29283 { 11678 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29284 { 11678 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29285 { 11678 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29286 { 11678 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29287 { 11678 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29288 { 11678 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29289 { 11678 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29290 { 11678 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29291 { 11678 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29292 { 11678 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29293 { 11678 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29294 { 11685 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29295 { 11685 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29296 { 11685 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29297 { 11685 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29298 { 11685 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29299 { 11685 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29300 { 11685 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29301 { 11685 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29302 { 11685 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29303 { 11685 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29304 { 11685 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29305 { 11685 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29306 { 11685 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29307 { 11685 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29308 { 11685 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29309 { 11685 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29310 { 11685 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29311 { 11685 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29312 { 11685 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29313 { 11685 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29314 { 11685 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29315 { 11685 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29316 { 11693 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29317 { 11693 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29318 { 11693 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29319 { 11693 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29320 { 11693 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29321 { 11693 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29322 { 11693 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29323 { 11693 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29324 { 11693 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29325 { 11693 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29326 { 11693 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29327 { 11693 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29328 { 11693 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29329 { 11693 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29330 { 11693 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29331 { 11693 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29332 { 11693 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29333 { 11693 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29334 { 11693 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29335 { 11693 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29336 { 11693 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29337 { 11693 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29338 { 11701 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29339 { 11701 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29340 { 11701 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29341 { 11701 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29342 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29343 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29344 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29345 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29346 { 11701 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29347 { 11701 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29348 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29349 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29350 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29351 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29352 { 11701 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29353 { 11701 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29354 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29355 { 11701 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29356 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29357 { 11701 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29358 { 11701 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29359 { 11701 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29360 { 11710 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29361 { 11710 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29362 { 11710 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29363 { 11710 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29364 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29365 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29366 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29367 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29368 { 11710 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29369 { 11710 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29370 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29371 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29372 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29373 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29374 { 11710 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29375 { 11710 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29376 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29377 { 11710 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29378 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29379 { 11710 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29380 { 11710 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29381 { 11710 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29382 { 11719 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29383 { 11719 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29384 { 11719 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29385 { 11719 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29386 { 11719 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29387 { 11719 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29388 { 11719 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29389 { 11719 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29390 { 11719 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29391 { 11719 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29392 { 11719 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29393 { 11719 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29394 { 11719 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29395 { 11719 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29396 { 11719 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29397 { 11719 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29398 { 11719 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29399 { 11719 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29400 { 11719 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29401 { 11719 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29402 { 11719 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29403 { 11719 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29404 { 11726 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29405 { 11726 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29406 { 11726 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29407 { 11726 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29408 { 11726 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29409 { 11726 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29410 { 11726 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29411 { 11726 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29412 { 11726 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29413 { 11726 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29414 { 11726 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29415 { 11726 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29416 { 11726 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29417 { 11726 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29418 { 11726 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29419 { 11726 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29420 { 11726 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29421 { 11726 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29422 { 11726 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29423 { 11726 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29424 { 11726 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29425 { 11726 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29426 { 11735 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29427 { 11735 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29428 { 11735 /* vpand */, X86::VPANDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29429 { 11735 /* vpand */, X86::VPANDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29430 { 11741 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29431 { 11741 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29432 { 11741 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29433 { 11741 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29434 { 11741 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29435 { 11741 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29436 { 11741 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29437 { 11741 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29438 { 11741 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29439 { 11741 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29440 { 11741 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29441 { 11741 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29442 { 11741 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29443 { 11741 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29444 { 11741 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29445 { 11741 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29446 { 11741 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29447 { 11741 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29448 { 11741 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29449 { 11741 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29450 { 11741 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29451 { 11741 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29452 { 11741 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29453 { 11741 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29454 { 11741 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29455 { 11741 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29456 { 11741 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29457 { 11748 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29458 { 11748 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29459 { 11748 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29460 { 11748 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29461 { 11755 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29462 { 11755 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29463 { 11755 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29464 { 11755 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29465 { 11755 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29466 { 11755 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29467 { 11755 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29468 { 11755 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29469 { 11755 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29470 { 11755 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29471 { 11755 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29472 { 11755 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29473 { 11755 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29474 { 11755 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29475 { 11755 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29476 { 11755 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29477 { 11755 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29478 { 11755 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29479 { 11755 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29480 { 11755 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29481 { 11755 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29482 { 11755 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29483 { 11755 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29484 { 11755 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29485 { 11755 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29486 { 11755 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29487 { 11755 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29488 { 11763 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29489 { 11763 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29490 { 11763 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29491 { 11763 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29492 { 11763 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29493 { 11763 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29494 { 11763 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29495 { 11763 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29496 { 11763 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29497 { 11763 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29498 { 11763 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29499 { 11763 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29500 { 11763 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29501 { 11763 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29502 { 11763 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29503 { 11763 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29504 { 11763 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29505 { 11763 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29506 { 11763 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29507 { 11763 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29508 { 11763 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29509 { 11763 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29510 { 11763 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29511 { 11763 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29512 { 11763 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29513 { 11763 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29514 { 11763 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29515 { 11771 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29516 { 11771 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29517 { 11771 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29518 { 11771 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29519 { 11771 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29520 { 11771 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29521 { 11771 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29522 { 11771 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29523 { 11771 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29524 { 11771 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29525 { 11771 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29526 { 11771 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29527 { 11771 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29528 { 11771 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29529 { 11771 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29530 { 11771 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29531 { 11771 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29532 { 11771 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29533 { 11771 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29534 { 11771 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29535 { 11771 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29536 { 11771 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29537 { 11771 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29538 { 11771 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29539 { 11771 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29540 { 11771 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29541 { 11771 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29542 { 11778 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29543 { 11778 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29544 { 11778 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29545 { 11778 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29546 { 11778 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29547 { 11778 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29548 { 11778 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29549 { 11778 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29550 { 11778 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29551 { 11778 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29552 { 11778 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29553 { 11778 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29554 { 11778 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29555 { 11778 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29556 { 11778 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29557 { 11778 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29558 { 11778 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29559 { 11778 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29560 { 11778 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29561 { 11778 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29562 { 11778 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29563 { 11778 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29564 { 11785 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29565 { 11785 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29566 { 11785 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29567 { 11785 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29568 { 11785 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29569 { 11785 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29570 { 11785 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29571 { 11785 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29572 { 11785 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29573 { 11785 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29574 { 11785 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29575 { 11785 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29576 { 11785 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29577 { 11785 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29578 { 11785 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29579 { 11785 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29580 { 11785 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29581 { 11785 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29582 { 11785 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29583 { 11785 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29584 { 11785 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29585 { 11785 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29586 { 11792 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29587 { 11792 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29588 { 11792 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29589 { 11792 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29590 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29591 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29592 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29593 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29594 { 11801 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29595 { 11801 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29596 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29597 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29598 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29599 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29600 { 11801 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29601 { 11801 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29602 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29603 { 11801 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29604 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29605 { 11801 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29606 { 11801 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29607 { 11801 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29608 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29609 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29610 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29611 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29612 { 11811 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29613 { 11811 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29614 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29615 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29616 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29617 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29618 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29619 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29620 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29621 { 11811 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29622 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29623 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29624 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29625 { 11811 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29626 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29627 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29628 { 11811 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29629 { 11811 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29630 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29631 { 11811 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29632 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29633 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29634 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29635 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29636 { 11821 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29637 { 11821 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29638 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29639 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29640 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29641 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29642 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29643 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29644 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29645 { 11821 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29646 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29647 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29648 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29649 { 11821 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29650 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29651 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29652 { 11821 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29653 { 11821 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29654 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29655 { 11821 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29656 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29657 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29658 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29659 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29660 { 11831 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29661 { 11831 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29662 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29663 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29664 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29665 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29666 { 11831 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29667 { 11831 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29668 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29669 { 11831 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29670 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29671 { 11831 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29672 { 11831 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29673 { 11831 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29674 { 11841 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
29675 { 11841 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
29676 { 11841 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
29677 { 11841 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
29678 { 11851 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29679 { 11851 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29680 { 11851 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29681 { 11851 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29682 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29683 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, 0, { MCK_FR32, MCK_Mem8 }, },
29684 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29685 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_0__Mem85_1, 0, { MCK_VR256, MCK_Mem8 }, },
29686 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_GR32 }, },
29687 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29688 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_0__Mem85_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem8 }, },
29689 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_GR32 }, },
29690 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
29691 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_0__Mem85_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem8 }, },
29692 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_GR32 }, },
29693 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_FR32X }, },
29694 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_0__Mem85_1, Feature_HasBWI, { MCK_VR512, MCK_Mem8 }, },
29695 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29696 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29697 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem85_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29698 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29699 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29700 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem85_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29701 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29702 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29703 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem85_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29704 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29705 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29706 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_0__Reg1_2__Mem85_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29707 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29708 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29709 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_0__Reg1_2__Mem85_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29710 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29711 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29712 { 11860 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_0__Reg1_2__Mem85_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29713 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29714 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
29715 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29716 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
29717 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_GR32 }, },
29718 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29719 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32 }, },
29720 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_GR32 }, },
29721 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
29722 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32 }, },
29723 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_GR32 }, },
29724 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
29725 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32 }, },
29726 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29727 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29728 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29729 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29730 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29731 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29732 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29733 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29734 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29735 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29736 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29737 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29738 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29739 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29740 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29741 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29742 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29743 { 11873 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29744 { 11886 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
29745 { 11886 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
29746 { 11886 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VK1 }, },
29747 { 11902 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
29748 { 11902 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
29749 { 11902 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VK1 }, },
29750 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29751 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
29752 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29753 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
29754 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_GR64 }, },
29755 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29756 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
29757 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_GR64 }, },
29758 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
29759 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64 }, },
29760 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_GR64 }, },
29761 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
29762 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
29763 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29764 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29765 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29766 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29767 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29768 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29769 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29770 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29771 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29772 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29773 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29774 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29775 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29776 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29777 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29778 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29779 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29780 { 11918 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29781 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29782 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
29783 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29784 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_0__Mem165_1, 0, { MCK_VR256, MCK_Mem16 }, },
29785 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_GR32 }, },
29786 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
29787 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_0__Mem165_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem16 }, },
29788 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_GR32 }, },
29789 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
29790 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_0__Mem165_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem16 }, },
29791 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_GR32 }, },
29792 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_FR32X }, },
29793 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_0__Mem165_1, Feature_HasBWI, { MCK_VR512, MCK_Mem16 }, },
29794 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29795 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29796 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29797 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29798 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29799 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29800 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29801 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29802 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29803 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29804 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29805 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29806 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29807 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29808 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29809 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29810 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29811 { 11931 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29812 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29813 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29814 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29815 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29816 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29817 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29818 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29819 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29820 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29821 { 11944 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29822 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29823 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29824 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29825 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29826 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29827 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29828 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29829 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29830 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29831 { 11958 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29832 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29833 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29834 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29835 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29836 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29837 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29838 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29839 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29840 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29841 { 11972 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29842 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29843 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29844 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29845 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29846 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29847 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29848 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29849 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29850 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29851 { 11986 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29852 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29853 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29854 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29855 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29856 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29857 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29858 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29859 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29860 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29861 { 12000 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29862 { 12011 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
29863 { 12011 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29864 { 12011 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
29865 { 12011 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
29866 { 12011 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29867 { 12011 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
29868 { 12018 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29869 { 12018 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29870 { 12018 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29871 { 12018 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29872 { 12018 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29873 { 12018 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29874 { 12018 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29875 { 12018 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29876 { 12018 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29877 { 12018 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29878 { 12018 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29879 { 12018 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29880 { 12018 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29881 { 12018 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29882 { 12018 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29883 { 12018 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29884 { 12018 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29885 { 12018 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29886 { 12018 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29887 { 12018 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29888 { 12018 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29889 { 12018 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29890 { 12018 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29891 { 12018 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29892 { 12018 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29893 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29894 { 12018 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29895 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29896 { 12018 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29897 { 12018 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29898 { 12018 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29899 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29900 { 12018 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29901 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29902 { 12018 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29903 { 12018 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29904 { 12018 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29905 { 12018 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29906 { 12018 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29907 { 12018 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29908 { 12018 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29909 { 12018 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29910 { 12018 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
29911 { 12018 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
29912 { 12018 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
29913 { 12018 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
29914 { 12018 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_VR512 }, },
29915 { 12018 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
29916 { 12018 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29917 { 12018 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29918 { 12018 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29919 { 12018 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29920 { 12018 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29921 { 12018 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29922 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29923 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29924 { 12018 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29925 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29926 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29927 { 12018 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29928 { 12018 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29929 { 12018 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29930 { 12018 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29931 { 12018 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29932 { 12018 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29933 { 12018 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29934 { 12018 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29935 { 12018 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29936 { 12018 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29937 { 12018 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29938 { 12018 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29939 { 12018 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29940 { 12018 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29941 { 12018 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29942 { 12018 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29943 { 12018 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29944 { 12018 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29945 { 12018 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29946 { 12018 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29947 { 12018 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29948 { 12018 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29949 { 12018 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29950 { 12018 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29951 { 12018 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29952 { 12018 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29953 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29954 { 12018 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29955 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29956 { 12018 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29957 { 12018 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29958 { 12018 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29959 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29960 { 12018 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29961 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29962 { 12018 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29963 { 12018 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29964 { 12018 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29965 { 12018 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29966 { 12018 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29967 { 12018 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29968 { 12018 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29969 { 12018 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29970 { 12018 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29971 { 12018 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29972 { 12018 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29973 { 12018 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29974 { 12018 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29975 { 12018 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29976 { 12018 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29977 { 12018 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29978 { 12018 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29979 { 12018 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29980 { 12018 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29981 { 12018 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29982 { 12018 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29983 { 12018 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29984 { 12018 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29985 { 12018 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29986 { 12018 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29987 { 12018 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29988 { 12024 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29989 { 12024 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29990 { 12024 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29991 { 12024 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29992 { 12024 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29993 { 12024 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29994 { 12024 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29995 { 12024 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29996 { 12024 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29997 { 12024 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29998 { 12024 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29999 { 12024 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30000 { 12031 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30001 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30002 { 12031 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30003 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30004 { 12031 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30005 { 12031 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30006 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30007 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30008 { 12031 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30009 { 12031 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30010 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30011 { 12031 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30012 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30013 { 12031 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30014 { 12031 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30015 { 12031 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30016 { 12031 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30017 { 12031 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30018 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30019 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30020 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30021 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30022 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30023 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30024 { 12038 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30025 { 12038 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30026 { 12038 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30027 { 12038 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30028 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30029 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30030 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30031 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30032 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30033 { 12038 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30034 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30035 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30036 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30037 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30038 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30039 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30040 { 12047 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30041 { 12047 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30042 { 12047 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30043 { 12047 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30044 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30045 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30046 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30047 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30048 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30049 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30050 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30051 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30052 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30053 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30054 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30055 { 12047 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30056 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30057 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30058 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30059 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30060 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30061 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30062 { 12056 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30063 { 12056 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30064 { 12056 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30065 { 12056 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30066 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30067 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30068 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30069 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30070 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30071 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30072 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30073 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30074 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30075 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30076 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30077 { 12056 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30078 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30079 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30080 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30081 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30082 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30083 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30084 { 12065 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30085 { 12065 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30086 { 12065 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30087 { 12065 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30088 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30089 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30090 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30091 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30092 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30093 { 12065 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30094 { 12074 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30095 { 12074 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30096 { 12085 /* vpcmpestrm */, X86::VPCMPESTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30097 { 12085 /* vpcmpestrm */, X86::VPCMPESTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30098 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30099 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30100 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30101 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30102 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30103 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30104 { 12096 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30105 { 12096 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30106 { 12096 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30107 { 12096 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30108 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30109 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30110 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30111 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30112 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30113 { 12096 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30114 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30115 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30116 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30117 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30118 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30119 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30120 { 12105 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30121 { 12105 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30122 { 12105 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30123 { 12105 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30124 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30125 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30126 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30127 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30128 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30129 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30130 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30131 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30132 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30133 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30134 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30135 { 12105 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30136 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30137 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30138 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30139 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30140 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30141 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30142 { 12114 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30143 { 12114 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30144 { 12114 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30145 { 12114 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30146 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30147 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30148 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30149 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30150 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30151 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30152 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30153 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30154 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30155 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30156 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30157 { 12114 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30158 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30159 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30160 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30161 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30162 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30163 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30164 { 12123 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30165 { 12123 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30166 { 12123 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30167 { 12123 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30168 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30169 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30170 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30171 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30172 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30173 { 12123 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30174 { 12132 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30175 { 12132 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30176 { 12143 /* vpcmpistrm */, X86::VPCMPISTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30177 { 12143 /* vpcmpistrm */, X86::VPCMPISTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30178 { 12154 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30179 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30180 { 12154 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30181 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30182 { 12154 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30183 { 12154 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30184 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30185 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30186 { 12154 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30187 { 12154 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30188 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30189 { 12154 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30190 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30191 { 12154 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30192 { 12154 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30193 { 12154 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30194 { 12154 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30195 { 12154 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30196 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30197 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30198 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30199 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30200 { 12161 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30201 { 12161 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30202 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30203 { 12161 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30204 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30205 { 12161 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30206 { 12161 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30207 { 12161 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30208 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30209 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30210 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30211 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30212 { 12169 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30213 { 12169 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30214 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30215 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30216 { 12169 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30217 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30218 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30219 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30220 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30221 { 12169 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30222 { 12169 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30223 { 12169 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30224 { 12169 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30225 { 12169 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30226 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30227 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30228 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30229 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30230 { 12177 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30231 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30232 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30233 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30234 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30235 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30236 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30237 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30238 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30239 { 12177 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30240 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30241 { 12177 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30242 { 12177 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30243 { 12177 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30244 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30245 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30246 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30247 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30248 { 12185 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30249 { 12185 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30250 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30251 { 12185 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30252 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30253 { 12185 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30254 { 12185 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30255 { 12185 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30256 { 12193 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30257 { 12193 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30258 { 12193 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30259 { 12193 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30260 { 12193 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30261 { 12193 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30262 { 12193 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30263 { 12193 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30264 { 12193 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30265 { 12193 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30266 { 12193 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30267 { 12193 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30268 { 12200 /* vpcom */, X86::VPCOMBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30269 { 12200 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30270 { 12200 /* vpcom */, X86::VPCOMDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30271 { 12200 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30272 { 12200 /* vpcom */, X86::VPCOMQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30273 { 12200 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30274 { 12200 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30275 { 12200 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30276 { 12200 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30277 { 12200 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30278 { 12200 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30279 { 12200 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30280 { 12200 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30281 { 12200 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30282 { 12200 /* vpcom */, X86::VPCOMWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30283 { 12200 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30284 { 12206 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30285 { 12206 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30286 { 12213 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30287 { 12213 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30288 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
30289 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
30290 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
30291 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
30292 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
30293 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_0__Reg1_1, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512 }, },
30294 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30295 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30296 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30297 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30298 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30299 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasVBMI2, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30300 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30301 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30302 { 12220 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30303 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
30304 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
30305 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
30306 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
30307 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
30308 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
30309 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30310 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30311 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30312 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30313 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30314 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30315 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30316 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30317 { 12232 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30318 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
30319 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
30320 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
30321 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
30322 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
30323 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
30324 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30325 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30326 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30327 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30328 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30329 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30330 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30331 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30332 { 12244 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30333 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
30334 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
30335 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
30336 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
30337 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
30338 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_0__Reg1_1, Feature_HasVBMI2, { MCK_Mem512, MCK_VR512 }, },
30339 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30340 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30341 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30342 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30343 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30344 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasVBMI2, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30345 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30346 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30347 { 12256 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30348 { 12268 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30349 { 12268 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30350 { 12275 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30351 { 12275 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30352 { 12283 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30353 { 12283 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30354 { 12291 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30355 { 12291 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30356 { 12299 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30357 { 12299 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30358 { 12307 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30359 { 12307 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30360 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
30361 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
30362 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
30363 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
30364 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
30365 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
30366 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30367 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30368 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30369 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30370 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30371 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30372 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30373 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30374 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30375 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30376 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30377 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30378 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30379 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30380 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30381 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30382 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30383 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30384 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30385 { 12314 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30386 { 12314 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30387 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
30388 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
30389 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
30390 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
30391 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
30392 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
30393 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30394 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30395 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30396 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30397 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30398 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30399 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30400 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30401 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30402 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30403 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30404 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30405 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30406 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30407 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30408 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30409 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30410 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30411 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30412 { 12326 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30413 { 12326 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30414 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30415 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30416 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30417 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30418 { 12338 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30419 { 12338 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30420 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30421 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30422 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30423 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30424 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30425 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30426 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30427 { 12338 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30428 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30429 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30430 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30431 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30432 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30433 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30434 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30435 { 12338 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30436 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30437 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30438 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30439 { 12338 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30440 { 12338 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30441 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30442 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30443 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30444 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30445 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30446 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30447 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30448 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30449 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30450 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30451 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30452 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30453 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30454 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30455 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30456 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30457 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30458 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30459 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30460 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30461 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30462 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30463 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30464 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30465 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30466 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30467 { 12347 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30468 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30469 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30470 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30471 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30472 { 12357 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30473 { 12357 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30474 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30475 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30476 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30477 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30478 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30479 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30480 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30481 { 12357 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30482 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30483 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30484 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30485 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30486 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30487 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30488 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30489 { 12357 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30490 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30491 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30492 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30493 { 12357 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30494 { 12357 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30495 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30496 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30497 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30498 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30499 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30500 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30501 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30502 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30503 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVNNI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30504 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30505 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30506 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30507 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30508 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30509 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30510 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30511 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30512 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30513 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30514 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30515 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30516 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30517 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30518 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30519 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30520 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30521 { 12366 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVNNI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30522 { 12376 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30523 { 12376 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30524 { 12387 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30525 { 12387 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30526 { 12398 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30527 { 12398 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30528 { 12398 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30529 { 12398 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30530 { 12398 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30531 { 12398 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30532 { 12398 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30533 { 12398 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30534 { 12398 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30535 { 12398 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30536 { 12398 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30537 { 12398 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30538 { 12398 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30539 { 12398 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30540 { 12398 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30541 { 12398 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30542 { 12398 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30543 { 12398 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30544 { 12405 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30545 { 12405 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30546 { 12405 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30547 { 12405 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30548 { 12405 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30549 { 12405 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30550 { 12405 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30551 { 12405 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30552 { 12405 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30553 { 12405 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30554 { 12405 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30555 { 12405 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30556 { 12405 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30557 { 12405 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30558 { 12405 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30559 { 12405 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30560 { 12405 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30561 { 12405 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30562 { 12405 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30563 { 12405 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30564 { 12412 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30565 { 12412 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30566 { 12412 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30567 { 12412 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30568 { 12412 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30569 { 12412 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30570 { 12412 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30571 { 12412 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30572 { 12412 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30573 { 12412 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30574 { 12412 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30575 { 12412 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30576 { 12412 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30577 { 12412 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30578 { 12412 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30579 { 12412 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30580 { 12412 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30581 { 12412 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30582 { 12421 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30583 { 12421 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30584 { 12421 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30585 { 12421 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30586 { 12421 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30587 { 12421 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30588 { 12421 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30589 { 12421 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30590 { 12421 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30591 { 12421 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30592 { 12421 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30593 { 12421 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30594 { 12421 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30595 { 12421 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30596 { 12421 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30597 { 12421 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30598 { 12421 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30599 { 12421 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30600 { 12421 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30601 { 12421 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30602 { 12421 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30603 { 12421 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30604 { 12421 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30605 { 12421 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30606 { 12421 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30607 { 12421 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30608 { 12421 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30609 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30610 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30611 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30612 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30613 { 12430 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30614 { 12430 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30615 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30616 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30617 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30618 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30619 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30620 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30621 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30622 { 12430 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30623 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30624 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30625 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30626 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30627 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30628 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30629 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30630 { 12430 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30631 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30632 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30633 { 12430 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30634 { 12430 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30635 { 12430 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30636 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30637 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30638 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30639 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30640 { 12440 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30641 { 12440 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30642 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30643 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30644 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30645 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30646 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30647 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30648 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30649 { 12440 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30650 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30651 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30652 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30653 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30654 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30655 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30656 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30657 { 12440 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30658 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30659 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30660 { 12440 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30661 { 12440 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30662 { 12440 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30663 { 12450 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30664 { 12450 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30665 { 12450 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30666 { 12450 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30667 { 12450 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30668 { 12450 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30669 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30670 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30671 { 12450 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30672 { 12450 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30673 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30674 { 12450 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30675 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30676 { 12450 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30677 { 12450 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30678 { 12450 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30679 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30680 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30681 { 12450 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30682 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30683 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30684 { 12450 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30685 { 12450 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30686 { 12450 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30687 { 12450 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30688 { 12450 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30689 { 12450 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30690 { 12459 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30691 { 12459 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30692 { 12459 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30693 { 12459 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30694 { 12459 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30695 { 12459 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30696 { 12459 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30697 { 12459 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30698 { 12459 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30699 { 12459 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30700 { 12459 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30701 { 12459 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30702 { 12459 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30703 { 12459 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30704 { 12459 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30705 { 12459 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30706 { 12459 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30707 { 12459 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30708 { 12468 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30709 { 12468 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30710 { 12468 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
30711 { 12468 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30712 { 12468 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30713 { 12468 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30714 { 12479 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30715 { 12479 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30716 { 12479 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
30717 { 12479 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30718 { 12479 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30719 { 12479 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30720 { 12490 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30721 { 12490 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30722 { 12490 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30723 { 12490 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30724 { 12490 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30725 { 12490 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30726 { 12490 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30727 { 12490 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30728 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30729 { 12490 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30730 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30731 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30732 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30733 { 12490 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30734 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30735 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30736 { 12490 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30737 { 12490 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30738 { 12490 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30739 { 12490 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30740 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30741 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30742 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30743 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30744 { 12490 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30745 { 12490 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30746 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30747 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30748 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30749 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30750 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30751 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30752 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30753 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30754 { 12490 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30755 { 12490 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30756 { 12490 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30757 { 12490 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30758 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30759 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30760 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30761 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30762 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30763 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30764 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30765 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30766 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30767 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30768 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30769 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30770 { 12490 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30771 { 12490 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30772 { 12490 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30773 { 12490 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30774 { 12490 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30775 { 12490 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30776 { 12490 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30777 { 12490 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30778 { 12490 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30779 { 12490 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30780 { 12490 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30781 { 12490 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30782 { 12500 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30783 { 12500 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30784 { 12500 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30785 { 12500 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30786 { 12500 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30787 { 12500 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30788 { 12500 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30789 { 12500 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30790 { 12500 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30791 { 12500 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30792 { 12500 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30793 { 12500 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30794 { 12500 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30795 { 12500 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30796 { 12500 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30797 { 12500 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30798 { 12500 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30799 { 12500 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30800 { 12500 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30801 { 12500 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30802 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30803 { 12500 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30804 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30805 { 12500 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30806 { 12500 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30807 { 12500 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30808 { 12500 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30809 { 12500 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30810 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30811 { 12500 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30812 { 12500 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30813 { 12500 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30814 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30815 { 12500 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30816 { 12500 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30817 { 12500 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30818 { 12500 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30819 { 12500 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30820 { 12500 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30821 { 12500 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30822 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30823 { 12500 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30824 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30825 { 12500 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30826 { 12500 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30827 { 12500 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30828 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30829 { 12500 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30830 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30831 { 12500 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30832 { 12500 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30833 { 12500 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30834 { 12500 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30835 { 12500 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30836 { 12500 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30837 { 12500 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30838 { 12500 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30839 { 12500 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30840 { 12500 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30841 { 12500 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30842 { 12500 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30843 { 12500 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30844 { 12510 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30845 { 12510 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30846 { 12510 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30847 { 12510 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30848 { 12510 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30849 { 12510 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30850 { 12510 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30851 { 12510 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30852 { 12510 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30853 { 12510 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30854 { 12510 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30855 { 12510 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30856 { 12510 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30857 { 12510 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30858 { 12510 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30859 { 12510 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30860 { 12510 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30861 { 12510 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30862 { 12510 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30863 { 12510 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30864 { 12510 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30865 { 12510 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30866 { 12510 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30867 { 12510 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30868 { 12510 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30869 { 12510 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30870 { 12510 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30871 { 12510 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30872 { 12510 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30873 { 12510 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30874 { 12510 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30875 { 12510 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30876 { 12510 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30877 { 12510 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30878 { 12510 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30879 { 12510 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30880 { 12510 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30881 { 12510 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30882 { 12518 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30883 { 12518 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30884 { 12518 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30885 { 12518 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30886 { 12518 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30887 { 12518 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30888 { 12518 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30889 { 12518 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30890 { 12518 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30891 { 12518 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30892 { 12518 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30893 { 12518 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30894 { 12518 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30895 { 12518 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30896 { 12518 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30897 { 12518 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30898 { 12518 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30899 { 12518 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30900 { 12518 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30901 { 12518 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30902 { 12526 /* vpermq */, X86::VPERMQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30903 { 12526 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30904 { 12526 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30905 { 12526 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30906 { 12526 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30907 { 12526 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30908 { 12526 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30909 { 12526 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30910 { 12526 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30911 { 12526 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30912 { 12526 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30913 { 12526 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30914 { 12526 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30915 { 12526 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30916 { 12526 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30917 { 12526 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30918 { 12526 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30919 { 12526 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30920 { 12526 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30921 { 12526 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30922 { 12526 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30923 { 12526 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30924 { 12526 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30925 { 12526 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30926 { 12526 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30927 { 12526 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30928 { 12526 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30929 { 12526 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30930 { 12526 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30931 { 12526 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30932 { 12526 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30933 { 12526 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30934 { 12526 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30935 { 12526 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30936 { 12526 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30937 { 12526 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30938 { 12526 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30939 { 12526 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30940 { 12533 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30941 { 12533 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30942 { 12533 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30943 { 12533 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30944 { 12533 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30945 { 12533 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30946 { 12533 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30947 { 12533 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30948 { 12533 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30949 { 12533 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30950 { 12533 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30951 { 12533 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30952 { 12533 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30953 { 12533 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30954 { 12533 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30955 { 12533 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30956 { 12533 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30957 { 12533 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30958 { 12542 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30959 { 12542 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30960 { 12542 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30961 { 12542 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30962 { 12542 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30963 { 12542 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30964 { 12542 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30965 { 12542 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30966 { 12542 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30967 { 12542 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30968 { 12542 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30969 { 12542 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30970 { 12542 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30971 { 12542 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30972 { 12542 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30973 { 12542 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30974 { 12542 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30975 { 12542 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30976 { 12542 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30977 { 12542 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30978 { 12542 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30979 { 12542 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30980 { 12542 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30981 { 12542 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30982 { 12542 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30983 { 12542 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30984 { 12542 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30985 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30986 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30987 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30988 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30989 { 12551 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30990 { 12551 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30991 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30992 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30993 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30994 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30995 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30996 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30997 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30998 { 12551 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30999 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31000 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31001 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31002 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31003 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31004 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31005 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31006 { 12551 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31007 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31008 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31009 { 12551 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31010 { 12551 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31011 { 12551 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31012 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31013 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31014 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31015 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31016 { 12561 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31017 { 12561 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31018 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31019 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31020 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31021 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31022 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31023 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31024 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31025 { 12561 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31026 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31027 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31028 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31029 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31030 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31031 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31032 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31033 { 12561 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31034 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31035 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31036 { 12561 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31037 { 12561 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31038 { 12561 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31039 { 12571 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31040 { 12571 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31041 { 12571 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31042 { 12571 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31043 { 12571 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31044 { 12571 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31045 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31046 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31047 { 12571 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31048 { 12571 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31049 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31050 { 12571 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31051 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31052 { 12571 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31053 { 12571 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31054 { 12571 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31055 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31056 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31057 { 12571 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31058 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31059 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31060 { 12571 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31061 { 12571 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31062 { 12571 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31063 { 12571 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31064 { 12571 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31065 { 12571 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31066 { 12580 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31067 { 12580 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31068 { 12580 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31069 { 12580 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31070 { 12580 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31071 { 12580 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31072 { 12580 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31073 { 12580 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31074 { 12580 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31075 { 12580 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31076 { 12580 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31077 { 12580 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31078 { 12580 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31079 { 12580 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31080 { 12580 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31081 { 12580 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31082 { 12580 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31083 { 12580 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31084 { 12589 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31085 { 12589 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31086 { 12589 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31087 { 12589 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31088 { 12589 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31089 { 12589 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31090 { 12589 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31091 { 12589 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31092 { 12589 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31093 { 12589 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31094 { 12589 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31095 { 12589 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31096 { 12589 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31097 { 12589 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31098 { 12589 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31099 { 12589 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31100 { 12589 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31101 { 12589 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31102 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
31103 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
31104 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
31105 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
31106 { 12596 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
31107 { 12596 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_0__Mem5125_1, Feature_HasVBMI2, { MCK_VR512, MCK_Mem512 }, },
31108 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31109 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31110 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31111 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31112 { 12596 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31113 { 12596 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31114 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31115 { 12596 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31116 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31117 { 12596 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31118 { 12596 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31119 { 12596 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31120 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
31121 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
31122 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
31123 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
31124 { 12606 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
31125 { 12606 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
31126 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31127 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31128 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31129 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31130 { 12606 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31131 { 12606 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31132 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31133 { 12606 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31134 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31135 { 12606 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31136 { 12606 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31137 { 12606 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31138 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
31139 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
31140 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
31141 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
31142 { 12616 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
31143 { 12616 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
31144 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31145 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31146 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31147 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31148 { 12616 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31149 { 12616 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31150 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31151 { 12616 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31152 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31153 { 12616 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31154 { 12616 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31155 { 12616 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31156 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
31157 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
31158 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
31159 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
31160 { 12626 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasVBMI2, { MCK_VR512, MCK_VR512 }, },
31161 { 12626 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_0__Mem5125_1, Feature_HasVBMI2, { MCK_VR512, MCK_Mem512 }, },
31162 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31163 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31164 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31165 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31166 { 12626 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31167 { 12626 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31168 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31169 { 12626 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31170 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31171 { 12626 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31172 { 12626 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31173 { 12626 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31174 { 12636 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31175 { 12636 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31176 { 12636 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
31177 { 12636 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_Mem8, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31178 { 12644 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31179 { 12644 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31180 { 12644 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31181 { 12644 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31182 { 12652 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31183 { 12652 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_GR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31184 { 12652 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31185 { 12652 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31186 { 12660 /* vpextrw */, X86::VPEXTRWri, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31187 { 12660 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31188 { 12660 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
31189 { 12660 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_Mem16, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31190 { 12668 /* vpextrw.s */, X86::VPEXTRWZrr_REV, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31191 { 12678 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31192 { 12678 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
31193 { 12678 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31194 { 12678 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
31195 { 12678 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
31196 { 12689 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31197 { 12689 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC1285_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
31198 { 12689 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31199 { 12689 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC128X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
31200 { 12689 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC256X5_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
31201 { 12700 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC2565_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
31202 { 12700 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0__Mem64_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
31203 { 12700 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC256X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
31204 { 12700 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem64_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
31205 { 12700 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
31206 { 12711 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31207 { 12711 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
31208 { 12711 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31209 { 12711 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
31210 { 12711 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
31211 { 12722 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31212 { 12722 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31213 { 12731 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31214 { 12731 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31215 { 12740 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31216 { 12740 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31217 { 12749 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31218 { 12749 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31219 { 12749 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31220 { 12749 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31221 { 12757 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31222 { 12757 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31223 { 12766 /* vphaddsw */, X86::VPHADDSWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31224 { 12766 /* vphaddsw */, X86::VPHADDSWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31225 { 12766 /* vphaddsw */, X86::VPHADDSWrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31226 { 12766 /* vphaddsw */, X86::VPHADDSWrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31227 { 12775 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31228 { 12775 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31229 { 12785 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31230 { 12785 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31231 { 12795 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31232 { 12795 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31233 { 12805 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31234 { 12805 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31235 { 12815 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31236 { 12815 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31237 { 12825 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31238 { 12825 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31239 { 12835 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31240 { 12835 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31241 { 12835 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31242 { 12835 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31243 { 12843 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31244 { 12843 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31245 { 12852 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31246 { 12852 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31247 { 12861 /* vphminposuw */, X86::VPHMINPOSUWrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31248 { 12861 /* vphminposuw */, X86::VPHMINPOSUWrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31249 { 12873 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31250 { 12873 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31251 { 12882 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31252 { 12882 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31253 { 12882 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31254 { 12882 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31255 { 12890 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31256 { 12890 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31257 { 12899 /* vphsubsw */, X86::VPHSUBSWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31258 { 12899 /* vphsubsw */, X86::VPHSUBSWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31259 { 12899 /* vphsubsw */, X86::VPHSUBSWrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31260 { 12899 /* vphsubsw */, X86::VPHSUBSWrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31261 { 12908 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31262 { 12908 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31263 { 12908 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31264 { 12908 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31265 { 12916 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31266 { 12916 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31267 { 12925 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31268 { 12925 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
31269 { 12925 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31270 { 12925 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK_ImmUnsignedi8 }, },
31271 { 12933 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
31272 { 12933 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
31273 { 12933 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
31274 { 12933 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
31275 { 12941 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
31276 { 12941 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
31277 { 12941 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, },
31278 { 12941 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
31279 { 12949 /* vpinsrw */, X86::VPINSRWrri, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31280 { 12949 /* vpinsrw */, X86::VPINSRWrmi, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
31281 { 12949 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31282 { 12949 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem16, MCK_ImmUnsignedi8 }, },
31283 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
31284 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
31285 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
31286 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
31287 { 12957 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
31288 { 12957 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
31289 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31290 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31291 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31292 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31293 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31294 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31295 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31296 { 12957 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31297 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31298 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31299 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31300 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31301 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31302 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31303 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31304 { 12957 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31305 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31306 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31307 { 12957 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31308 { 12957 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31309 { 12957 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31310 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
31311 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
31312 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
31313 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
31314 { 12966 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
31315 { 12966 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
31316 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31317 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31318 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31319 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31320 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31321 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31322 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31323 { 12966 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31324 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31325 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31326 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31327 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31328 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31329 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31330 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31331 { 12966 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31332 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31333 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31334 { 12966 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31335 { 12966 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31336 { 12966 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31337 { 12975 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31338 { 12975 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31339 { 12984 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31340 { 12984 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31341 { 12994 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31342 { 12994 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31343 { 13004 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31344 { 13004 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31345 { 13014 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31346 { 13014 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31347 { 13025 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31348 { 13025 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31349 { 13036 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31350 { 13036 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31351 { 13046 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31352 { 13046 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31353 { 13056 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31354 { 13056 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31355 { 13065 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31356 { 13065 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31357 { 13074 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31358 { 13074 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31359 { 13085 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31360 { 13085 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31361 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31362 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31363 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31364 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31365 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31366 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31367 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31368 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31369 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31370 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31371 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31372 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31373 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31374 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31375 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31376 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31377 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31378 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31379 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31380 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31381 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31382 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31383 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31384 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31385 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31386 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31387 { 13095 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31388 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31389 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31390 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31391 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31392 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31393 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31394 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31395 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31396 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31397 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31398 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31399 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31400 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31401 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31402 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31403 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31404 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31405 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31406 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31407 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31408 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31409 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31410 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31411 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31412 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31413 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31414 { 13107 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31415 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31416 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31417 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31418 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31419 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31420 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31421 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31422 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31423 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31424 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31425 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31426 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31427 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31428 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31429 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31430 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31431 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31432 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31433 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31434 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31435 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31436 { 13119 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31437 { 13130 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31438 { 13130 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31439 { 13130 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31440 { 13130 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31441 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31442 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31443 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31444 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31445 { 13130 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31446 { 13130 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31447 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31448 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31449 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31450 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31451 { 13130 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31452 { 13130 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31453 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31454 { 13130 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31455 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31456 { 13130 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31457 { 13130 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31458 { 13130 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31459 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31460 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31461 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
31462 { 13139 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
31463 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31464 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31465 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
31466 { 13150 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
31467 { 13161 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31468 { 13161 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31469 { 13161 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31470 { 13161 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31471 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31472 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31473 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31474 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31475 { 13161 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31476 { 13161 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31477 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31478 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31479 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31480 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31481 { 13161 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31482 { 13161 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31483 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31484 { 13161 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31485 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31486 { 13161 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31487 { 13161 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31488 { 13161 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31489 { 13169 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31490 { 13169 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31491 { 13169 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31492 { 13169 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31493 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31494 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31495 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31496 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31497 { 13169 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31498 { 13169 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31499 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31500 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31501 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31502 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31503 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31504 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31505 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31506 { 13169 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31507 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31508 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31509 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31510 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31511 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31512 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31513 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31514 { 13169 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31515 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31516 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31517 { 13169 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31518 { 13169 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31519 { 13169 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31520 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31521 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31522 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31523 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31524 { 13177 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31525 { 13177 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31526 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31527 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31528 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31529 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31530 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31531 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31532 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31533 { 13177 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31534 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31535 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31536 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31537 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31538 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31539 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31540 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31541 { 13177 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31542 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31543 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31544 { 13177 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31545 { 13177 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31546 { 13177 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31547 { 13185 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31548 { 13185 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31549 { 13185 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31550 { 13185 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31551 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31552 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31553 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31554 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31555 { 13185 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31556 { 13185 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31557 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31558 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31559 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31560 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31561 { 13185 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31562 { 13185 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31563 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31564 { 13185 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31565 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31566 { 13185 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31567 { 13185 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31568 { 13185 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31569 { 13193 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31570 { 13193 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31571 { 13193 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31572 { 13193 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31573 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31574 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31575 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31576 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31577 { 13193 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31578 { 13193 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31579 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31580 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31581 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31582 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31583 { 13193 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31584 { 13193 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31585 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31586 { 13193 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31587 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31588 { 13193 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31589 { 13193 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31590 { 13193 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31591 { 13201 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31592 { 13201 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31593 { 13201 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31594 { 13201 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31595 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31596 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31597 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31598 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31599 { 13201 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31600 { 13201 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31601 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31602 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31603 { 13201 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31604 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31605 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31606 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31607 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31608 { 13201 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31609 { 13201 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31610 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31611 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31612 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31613 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31614 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31615 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31616 { 13201 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31617 { 13201 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31618 { 13201 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31619 { 13201 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31620 { 13201 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31621 { 13201 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31622 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31623 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31624 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31625 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31626 { 13209 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31627 { 13209 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31628 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31629 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31630 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31631 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31632 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31633 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31634 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31635 { 13209 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31636 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31637 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31638 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31639 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31640 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31641 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31642 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31643 { 13209 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31644 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31645 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31646 { 13209 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31647 { 13209 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31648 { 13209 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31649 { 13217 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31650 { 13217 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31651 { 13217 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31652 { 13217 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31653 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31654 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31655 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31656 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31657 { 13217 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31658 { 13217 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31659 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31660 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31661 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31662 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31663 { 13217 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31664 { 13217 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31665 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31666 { 13217 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31667 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31668 { 13217 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31669 { 13217 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31670 { 13217 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31671 { 13225 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31672 { 13225 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31673 { 13225 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31674 { 13225 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31675 { 13225 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31676 { 13225 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31677 { 13225 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31678 { 13225 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31679 { 13225 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31680 { 13225 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31681 { 13225 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31682 { 13225 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31683 { 13225 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31684 { 13225 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31685 { 13225 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31686 { 13225 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31687 { 13225 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31688 { 13225 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31689 { 13225 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31690 { 13225 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31691 { 13225 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31692 { 13225 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31693 { 13233 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31694 { 13233 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31695 { 13233 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31696 { 13233 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31697 { 13233 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31698 { 13233 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31699 { 13233 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31700 { 13233 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31701 { 13233 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31702 { 13233 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31703 { 13233 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31704 { 13233 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31705 { 13233 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31706 { 13233 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31707 { 13233 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31708 { 13233 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31709 { 13233 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31710 { 13233 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31711 { 13233 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31712 { 13233 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31713 { 13233 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31714 { 13233 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31715 { 13233 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31716 { 13233 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31717 { 13233 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31718 { 13233 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31719 { 13233 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31720 { 13233 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31721 { 13233 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31722 { 13233 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31723 { 13233 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31724 { 13241 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31725 { 13241 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31726 { 13241 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31727 { 13241 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31728 { 13241 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31729 { 13241 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31730 { 13241 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31731 { 13241 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31732 { 13241 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31733 { 13241 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31734 { 13241 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31735 { 13241 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31736 { 13241 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31737 { 13241 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31738 { 13241 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31739 { 13241 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31740 { 13241 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31741 { 13241 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31742 { 13241 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31743 { 13241 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31744 { 13241 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31745 { 13241 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31746 { 13241 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31747 { 13241 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31748 { 13241 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31749 { 13241 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31750 { 13241 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31751 { 13249 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31752 { 13249 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31753 { 13249 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31754 { 13249 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31755 { 13249 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31756 { 13249 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31757 { 13249 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31758 { 13249 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31759 { 13249 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31760 { 13249 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31761 { 13249 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31762 { 13249 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31763 { 13249 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31764 { 13249 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31765 { 13249 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31766 { 13249 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31767 { 13249 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31768 { 13249 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31769 { 13249 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31770 { 13249 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31771 { 13249 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31772 { 13249 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31773 { 13257 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31774 { 13257 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31775 { 13257 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31776 { 13257 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31777 { 13257 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31778 { 13257 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31779 { 13257 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31780 { 13257 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31781 { 13257 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31782 { 13257 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31783 { 13257 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31784 { 13257 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31785 { 13257 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31786 { 13257 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31787 { 13257 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31788 { 13257 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31789 { 13257 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31790 { 13257 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31791 { 13257 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31792 { 13257 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31793 { 13257 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31794 { 13257 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31795 { 13265 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31796 { 13265 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31797 { 13265 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31798 { 13265 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31799 { 13265 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31800 { 13265 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31801 { 13265 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31802 { 13265 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31803 { 13265 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31804 { 13265 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31805 { 13265 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31806 { 13265 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31807 { 13265 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31808 { 13265 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31809 { 13265 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31810 { 13265 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31811 { 13265 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31812 { 13265 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31813 { 13265 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31814 { 13265 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31815 { 13265 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31816 { 13265 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31817 { 13265 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31818 { 13265 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31819 { 13265 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31820 { 13265 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31821 { 13265 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31822 { 13265 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31823 { 13265 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31824 { 13265 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31825 { 13265 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31826 { 13273 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31827 { 13273 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31828 { 13273 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31829 { 13273 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31830 { 13273 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31831 { 13273 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31832 { 13273 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31833 { 13273 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31834 { 13273 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31835 { 13273 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31836 { 13273 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31837 { 13273 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31838 { 13273 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31839 { 13273 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31840 { 13273 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31841 { 13273 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31842 { 13273 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31843 { 13273 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31844 { 13273 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31845 { 13273 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31846 { 13273 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31847 { 13273 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31848 { 13273 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31849 { 13273 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31850 { 13273 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31851 { 13273 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31852 { 13273 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31853 { 13281 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31854 { 13281 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31855 { 13281 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31856 { 13281 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31857 { 13281 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31858 { 13281 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31859 { 13281 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31860 { 13281 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31861 { 13281 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31862 { 13281 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31863 { 13281 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31864 { 13281 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31865 { 13281 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31866 { 13281 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31867 { 13281 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31868 { 13281 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31869 { 13281 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31870 { 13281 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31871 { 13281 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31872 { 13281 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31873 { 13281 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31874 { 13281 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31875 { 13289 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
31876 { 13289 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
31877 { 13289 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
31878 { 13298 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
31879 { 13298 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
31880 { 13298 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
31881 { 13307 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31882 { 13307 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31883 { 13307 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
31884 { 13307 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
31885 { 13307 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
31886 { 13307 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
31887 { 13307 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31888 { 13307 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31889 { 13307 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31890 { 13307 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31891 { 13307 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31892 { 13307 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31893 { 13307 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31894 { 13307 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31895 { 13307 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31896 { 13315 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31897 { 13315 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31898 { 13315 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
31899 { 13315 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
31900 { 13315 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
31901 { 13315 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
31902 { 13315 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31903 { 13315 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31904 { 13315 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31905 { 13315 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31906 { 13315 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31907 { 13315 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31908 { 13315 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31909 { 13315 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31910 { 13315 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31911 { 13323 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
31912 { 13323 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
31913 { 13323 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
31914 { 13332 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
31915 { 13332 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
31916 { 13332 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
31917 { 13341 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
31918 { 13341 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
31919 { 13341 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
31920 { 13350 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
31921 { 13350 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
31922 { 13350 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
31923 { 13359 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
31924 { 13359 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
31925 { 13369 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
31926 { 13369 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
31927 { 13369 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
31928 { 13378 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31929 { 13378 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31930 { 13378 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
31931 { 13378 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
31932 { 13378 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
31933 { 13378 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
31934 { 13378 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31935 { 13378 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31936 { 13378 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31937 { 13378 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31938 { 13378 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31939 { 13378 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31940 { 13378 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31941 { 13378 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31942 { 13378 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31943 { 13386 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31944 { 13386 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31945 { 13386 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
31946 { 13386 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
31947 { 13386 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
31948 { 13386 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
31949 { 13386 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31950 { 13386 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31951 { 13386 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31952 { 13386 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31953 { 13386 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31954 { 13386 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31955 { 13386 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31956 { 13386 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31957 { 13386 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31958 { 13394 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31959 { 13394 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31960 { 13394 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
31961 { 13394 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
31962 { 13394 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
31963 { 13394 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
31964 { 13394 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31965 { 13394 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31966 { 13394 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31967 { 13394 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31968 { 13394 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31969 { 13394 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31970 { 13394 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31971 { 13394 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31972 { 13394 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31973 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31974 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31975 { 13402 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
31976 { 13402 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
31977 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
31978 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
31979 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31980 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31981 { 13402 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31982 { 13402 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31983 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31984 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31985 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31986 { 13402 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31987 { 13402 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31988 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
31989 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
31990 { 13411 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
31991 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
31992 { 13411 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
31993 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
31994 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31995 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31996 { 13411 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31997 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31998 { 13411 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31999 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32000 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32001 { 13411 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32002 { 13411 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32003 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32004 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32005 { 13420 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
32006 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
32007 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
32008 { 13420 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
32009 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32010 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32011 { 13420 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32012 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32013 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32014 { 13420 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32015 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32016 { 13420 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32017 { 13420 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32018 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32019 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32020 { 13429 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
32021 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
32022 { 13429 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
32023 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
32024 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32025 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32026 { 13429 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32027 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32028 { 13429 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32029 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32030 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32031 { 13429 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32032 { 13429 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32033 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32034 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32035 { 13438 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
32036 { 13438 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
32037 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
32038 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
32039 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32040 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32041 { 13438 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32042 { 13438 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32043 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32044 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32045 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32046 { 13438 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32047 { 13438 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32048 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
32049 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
32050 { 13447 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
32051 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
32052 { 13447 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
32053 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
32054 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32055 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32056 { 13447 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32057 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32058 { 13447 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32059 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32060 { 13447 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32061 { 13447 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32062 { 13447 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32063 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32064 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32065 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32066 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32067 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32068 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
32069 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32070 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
32071 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
32072 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
32073 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32074 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32075 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32076 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32077 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32078 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32079 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32080 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32081 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32082 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32083 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32084 { 13456 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32085 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32086 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
32087 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32088 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
32089 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32090 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_0__Mem165_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
32091 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32092 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
32093 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
32094 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
32095 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32096 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
32097 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32098 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32099 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32100 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32101 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32102 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
32103 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32104 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32105 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32106 { 13466 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32107 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32108 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32109 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32110 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32111 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
32112 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
32113 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
32114 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
32115 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
32116 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
32117 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32118 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32119 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32120 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32121 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32122 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32123 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32124 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32125 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32126 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32127 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32128 { 13476 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32129 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32130 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32131 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32132 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32133 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32134 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
32135 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32136 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
32137 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
32138 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
32139 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32140 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32141 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32142 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32143 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32144 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32145 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32146 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32147 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32148 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32149 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32150 { 13486 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32151 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32152 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32153 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32154 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32155 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32156 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
32157 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32158 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
32159 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
32160 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
32161 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32162 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32163 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32164 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32165 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32166 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32167 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32168 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32169 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32170 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32171 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32172 { 13496 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32173 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32174 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32175 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32176 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32177 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32178 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
32179 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32180 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
32181 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
32182 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
32183 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32184 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32185 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32186 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32187 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32188 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32189 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32190 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32191 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32192 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32193 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32194 { 13506 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32195 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32196 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32197 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
32198 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
32199 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
32200 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
32201 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32202 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32203 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32204 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32205 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32206 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32207 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32208 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32209 { 13516 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32210 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32211 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32212 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
32213 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
32214 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
32215 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
32216 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32217 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32218 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32219 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32220 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32221 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32222 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32223 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32224 { 13526 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32225 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32226 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32227 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
32228 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
32229 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
32230 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
32231 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32232 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32233 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32234 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32235 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32236 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32237 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32238 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32239 { 13536 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32240 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32241 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32242 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
32243 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
32244 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
32245 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
32246 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32247 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32248 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32249 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32250 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32251 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32252 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32253 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32254 { 13546 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32255 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32256 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
32257 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
32258 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
32259 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
32260 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
32261 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32262 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32263 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32264 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32265 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32266 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32267 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32268 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32269 { 13556 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32270 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
32271 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
32272 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
32273 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
32274 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
32275 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
32276 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32277 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32278 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32279 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32280 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32281 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32282 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32283 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32284 { 13566 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32285 { 13576 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
32286 { 13576 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
32287 { 13576 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
32288 { 13585 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
32289 { 13585 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
32290 { 13585 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
32291 { 13585 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
32292 { 13585 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
32293 { 13585 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
32294 { 13585 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32295 { 13585 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32296 { 13585 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32297 { 13585 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32298 { 13585 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32299 { 13585 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32300 { 13585 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32301 { 13585 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32302 { 13585 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32303 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32304 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32305 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32306 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32307 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32308 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
32309 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32310 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
32311 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
32312 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
32313 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32314 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32315 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32316 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32317 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32318 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32319 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32320 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32321 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32322 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32323 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32324 { 13593 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32325 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32326 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
32327 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32328 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
32329 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32330 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_0__Mem165_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
32331 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32332 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
32333 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
32334 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
32335 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32336 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
32337 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32338 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32339 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32340 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32341 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32342 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
32343 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32344 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32345 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32346 { 13603 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32347 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32348 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32349 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32350 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32351 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
32352 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
32353 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
32354 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
32355 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
32356 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
32357 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32358 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32359 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32360 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32361 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32362 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32363 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32364 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32365 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32366 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32367 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32368 { 13613 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32369 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32370 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32371 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32372 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32373 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32374 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
32375 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32376 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
32377 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
32378 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
32379 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32380 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32381 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32382 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32383 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32384 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32385 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32386 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32387 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32388 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32389 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32390 { 13623 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32391 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32392 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32393 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32394 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32395 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32396 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
32397 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32398 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
32399 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
32400 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
32401 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32402 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32403 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32404 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32405 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32406 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32407 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32408 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32409 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32410 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32411 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32412 { 13633 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32413 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32414 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32415 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32416 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32417 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
32418 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
32419 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
32420 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
32421 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
32422 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
32423 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32424 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32425 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32426 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32427 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32428 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32429 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32430 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32431 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32432 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32433 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32434 { 13643 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32435 { 13653 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32436 { 13653 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32437 { 13653 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32438 { 13653 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32439 { 13653 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32440 { 13653 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32441 { 13653 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32442 { 13653 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32443 { 13653 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32444 { 13653 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32445 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32446 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32447 { 13653 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32448 { 13653 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32449 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32450 { 13653 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32451 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32452 { 13653 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32453 { 13653 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32454 { 13653 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32455 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32456 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32457 { 13653 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32458 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32459 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32460 { 13653 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32461 { 13653 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32462 { 13653 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32463 { 13653 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32464 { 13653 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32465 { 13653 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32466 { 13661 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32467 { 13661 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32468 { 13661 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32469 { 13661 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32470 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32471 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32472 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32473 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32474 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32475 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32476 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32477 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32478 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32479 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32480 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32481 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32482 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32483 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32484 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32485 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32486 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32487 { 13661 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32488 { 13671 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32489 { 13671 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32490 { 13671 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32491 { 13671 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32492 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32493 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32494 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32495 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32496 { 13671 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32497 { 13671 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32498 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32499 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32500 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32501 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32502 { 13671 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32503 { 13671 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32504 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32505 { 13671 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32506 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32507 { 13671 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32508 { 13671 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32509 { 13671 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32510 { 13680 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32511 { 13680 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32512 { 13680 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32513 { 13680 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32514 { 13680 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32515 { 13680 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32516 { 13680 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32517 { 13680 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32518 { 13680 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32519 { 13680 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32520 { 13680 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32521 { 13680 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32522 { 13680 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32523 { 13680 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32524 { 13680 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32525 { 13680 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32526 { 13680 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32527 { 13680 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32528 { 13680 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32529 { 13680 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32530 { 13680 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32531 { 13680 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32532 { 13688 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32533 { 13688 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32534 { 13688 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32535 { 13688 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32536 { 13688 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32537 { 13688 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32538 { 13688 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32539 { 13688 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32540 { 13688 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32541 { 13688 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32542 { 13688 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32543 { 13688 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32544 { 13688 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32545 { 13688 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32546 { 13688 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32547 { 13688 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32548 { 13688 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32549 { 13688 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32550 { 13688 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32551 { 13688 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32552 { 13688 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32553 { 13688 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32554 { 13688 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32555 { 13688 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32556 { 13688 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32557 { 13688 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32558 { 13688 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32559 { 13688 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32560 { 13688 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32561 { 13688 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32562 { 13688 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32563 { 13696 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32564 { 13696 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32565 { 13696 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32566 { 13696 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32567 { 13696 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32568 { 13696 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32569 { 13696 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32570 { 13696 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32571 { 13696 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32572 { 13696 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32573 { 13696 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32574 { 13696 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32575 { 13696 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32576 { 13696 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32577 { 13696 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32578 { 13696 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32579 { 13696 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32580 { 13696 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32581 { 13696 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32582 { 13696 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32583 { 13696 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32584 { 13696 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32585 { 13696 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32586 { 13696 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32587 { 13696 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32588 { 13696 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32589 { 13696 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32590 { 13704 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32591 { 13704 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32592 { 13704 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32593 { 13704 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32594 { 13704 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32595 { 13704 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32596 { 13704 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32597 { 13704 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32598 { 13704 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32599 { 13704 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32600 { 13704 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32601 { 13704 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32602 { 13704 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32603 { 13704 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32604 { 13704 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32605 { 13704 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32606 { 13704 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32607 { 13704 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32608 { 13704 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32609 { 13704 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32610 { 13704 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32611 { 13704 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32612 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32613 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32614 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32615 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32616 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32617 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32618 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32619 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32620 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32621 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32622 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32623 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32624 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32625 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32626 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32627 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32628 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32629 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32630 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32631 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32632 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32633 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32634 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32635 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32636 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32637 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32638 { 13712 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32639 { 13727 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32640 { 13727 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32641 { 13727 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32642 { 13727 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32643 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32644 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32645 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32646 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32647 { 13727 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32648 { 13727 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32649 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32650 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32651 { 13727 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32652 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32653 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32654 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32655 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32656 { 13727 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32657 { 13727 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32658 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32659 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32660 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32661 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32662 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32663 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32664 { 13727 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32665 { 13727 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32666 { 13727 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32667 { 13727 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32668 { 13727 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32669 { 13727 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32670 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
32671 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
32672 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
32673 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
32674 { 13736 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBITALG, { MCK_VR512, MCK_VR512 }, },
32675 { 13736 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_0__Mem5125_1, Feature_HasBITALG, { MCK_VR512, MCK_Mem512 }, },
32676 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32677 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32678 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32679 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32680 { 13736 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32681 { 13736 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32682 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32683 { 13736 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32684 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32685 { 13736 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32686 { 13736 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32687 { 13736 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32688 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
32689 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
32690 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
32691 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
32692 { 13745 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512 }, },
32693 { 13745 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_Mem512 }, },
32694 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32695 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32696 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32697 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32698 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32699 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32700 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32701 { 13745 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32702 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32703 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32704 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32705 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32706 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32707 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32708 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32709 { 13745 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32710 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32711 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32712 { 13745 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32713 { 13745 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32714 { 13745 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32715 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
32716 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
32717 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
32718 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
32719 { 13754 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_VR512 }, },
32720 { 13754 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_Mem512 }, },
32721 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32722 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32723 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32724 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32725 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32726 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32727 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32728 { 13754 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32729 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32730 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32731 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32732 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32733 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32734 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32735 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32736 { 13754 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32737 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32738 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32739 { 13754 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32740 { 13754 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVPOPCNTDQ|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32741 { 13754 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVPOPCNTDQ, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32742 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
32743 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
32744 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
32745 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
32746 { 13763 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBITALG, { MCK_VR512, MCK_VR512 }, },
32747 { 13763 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_0__Mem5125_1, Feature_HasBITALG, { MCK_VR512, MCK_Mem512 }, },
32748 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32749 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32750 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32751 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32752 { 13763 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32753 { 13763 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32754 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32755 { 13763 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBITALG|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32756 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32757 { 13763 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32758 { 13763 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32759 { 13763 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBITALG, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32760 { 13772 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32761 { 13772 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32762 { 13772 /* vpor */, X86::VPORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32763 { 13772 /* vpor */, X86::VPORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32764 { 13777 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32765 { 13777 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32766 { 13777 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32767 { 13777 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32768 { 13777 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32769 { 13777 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32770 { 13777 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32771 { 13777 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32772 { 13777 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32773 { 13777 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32774 { 13777 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32775 { 13777 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32776 { 13777 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32777 { 13777 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32778 { 13777 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32779 { 13777 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32780 { 13777 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32781 { 13777 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32782 { 13777 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32783 { 13777 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32784 { 13777 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32785 { 13777 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32786 { 13777 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32787 { 13777 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32788 { 13777 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32789 { 13777 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32790 { 13777 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32791 { 13783 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32792 { 13783 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32793 { 13783 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32794 { 13783 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32795 { 13783 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32796 { 13783 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32797 { 13783 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32798 { 13783 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32799 { 13783 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32800 { 13783 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32801 { 13783 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32802 { 13783 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32803 { 13783 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32804 { 13783 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32805 { 13783 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32806 { 13783 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32807 { 13783 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32808 { 13783 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32809 { 13783 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32810 { 13783 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32811 { 13783 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32812 { 13783 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32813 { 13783 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32814 { 13783 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32815 { 13783 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32816 { 13783 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32817 { 13783 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32818 { 13789 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32819 { 13789 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32820 { 13789 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32821 { 13796 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32822 { 13796 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32823 { 13796 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32824 { 13796 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32825 { 13796 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32826 { 13796 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32827 { 13796 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32828 { 13796 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32829 { 13796 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32830 { 13796 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32831 { 13796 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32832 { 13796 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32833 { 13796 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32834 { 13796 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32835 { 13796 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32836 { 13796 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32837 { 13796 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32838 { 13796 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32839 { 13796 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32840 { 13796 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32841 { 13796 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32842 { 13796 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32843 { 13796 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32844 { 13796 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32845 { 13796 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32846 { 13796 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32847 { 13796 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32848 { 13803 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32849 { 13803 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32850 { 13803 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32851 { 13803 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32852 { 13803 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32853 { 13803 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32854 { 13803 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32855 { 13803 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32856 { 13803 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32857 { 13803 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32858 { 13803 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32859 { 13803 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32860 { 13803 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32861 { 13803 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32862 { 13803 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32863 { 13803 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32864 { 13803 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32865 { 13803 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32866 { 13803 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32867 { 13803 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32868 { 13803 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32869 { 13803 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32870 { 13803 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32871 { 13803 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32872 { 13803 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32873 { 13803 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32874 { 13803 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32875 { 13810 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32876 { 13810 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32877 { 13810 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32878 { 13810 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32879 { 13810 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32880 { 13810 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32881 { 13810 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32882 { 13810 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32883 { 13810 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32884 { 13810 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32885 { 13810 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32886 { 13810 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32887 { 13810 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32888 { 13810 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32889 { 13810 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32890 { 13810 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32891 { 13810 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32892 { 13810 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32893 { 13810 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32894 { 13810 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32895 { 13810 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32896 { 13810 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32897 { 13810 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32898 { 13810 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32899 { 13810 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32900 { 13810 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32901 { 13810 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32902 { 13818 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32903 { 13818 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32904 { 13818 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32905 { 13818 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32906 { 13818 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32907 { 13818 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32908 { 13818 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32909 { 13818 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32910 { 13818 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32911 { 13818 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32912 { 13818 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32913 { 13818 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32914 { 13818 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32915 { 13818 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32916 { 13818 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32917 { 13818 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32918 { 13818 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32919 { 13818 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32920 { 13818 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32921 { 13818 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32922 { 13818 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32923 { 13818 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32924 { 13818 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32925 { 13818 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32926 { 13818 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32927 { 13818 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32928 { 13818 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32929 { 13826 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32930 { 13826 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32931 { 13826 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32932 { 13826 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32933 { 13826 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32934 { 13826 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32935 { 13826 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32936 { 13826 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32937 { 13826 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32938 { 13826 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32939 { 13826 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32940 { 13826 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32941 { 13826 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32942 { 13826 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32943 { 13826 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32944 { 13826 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32945 { 13826 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32946 { 13826 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32947 { 13826 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32948 { 13826 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32949 { 13826 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32950 { 13826 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32951 { 13826 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32952 { 13826 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32953 { 13826 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32954 { 13826 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32955 { 13826 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32956 { 13833 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32957 { 13833 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32958 { 13833 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32959 { 13833 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32960 { 13833 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32961 { 13833 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32962 { 13833 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32963 { 13833 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32964 { 13833 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32965 { 13833 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32966 { 13833 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32967 { 13833 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32968 { 13833 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32969 { 13833 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32970 { 13833 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32971 { 13833 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32972 { 13833 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32973 { 13833 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32974 { 13833 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32975 { 13833 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32976 { 13833 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32977 { 13833 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32978 { 13833 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32979 { 13833 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32980 { 13833 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
32981 { 13833 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32982 { 13833 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32983 { 13840 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32984 { 13840 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32985 { 13840 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32986 { 13840 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32987 { 13840 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32988 { 13840 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32989 { 13840 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32990 { 13840 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32991 { 13840 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32992 { 13840 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32993 { 13840 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32994 { 13840 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32995 { 13840 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32996 { 13840 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32997 { 13840 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32998 { 13840 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32999 { 13840 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33000 { 13840 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33001 { 13840 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33002 { 13840 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33003 { 13840 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33004 { 13840 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33005 { 13840 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33006 { 13840 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33007 { 13840 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33008 { 13840 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33009 { 13840 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33010 { 13848 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33011 { 13848 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33012 { 13848 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33013 { 13848 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33014 { 13848 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33015 { 13848 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33016 { 13848 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33017 { 13848 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33018 { 13848 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33019 { 13848 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33020 { 13848 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33021 { 13848 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33022 { 13848 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33023 { 13848 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33024 { 13848 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33025 { 13848 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33026 { 13848 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33027 { 13848 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33028 { 13848 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33029 { 13848 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33030 { 13848 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33031 { 13848 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33032 { 13848 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33033 { 13848 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33034 { 13848 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33035 { 13848 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33036 { 13848 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33037 { 13856 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33038 { 13856 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33039 { 13856 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33040 { 13856 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33041 { 13856 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33042 { 13863 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33043 { 13863 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33044 { 13863 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33045 { 13863 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33046 { 13863 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33047 { 13870 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33048 { 13870 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33049 { 13870 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33050 { 13870 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33051 { 13870 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33052 { 13877 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33053 { 13877 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33054 { 13877 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33055 { 13877 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33056 { 13877 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33057 { 13884 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33058 { 13884 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33059 { 13884 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33060 { 13884 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33061 { 13884 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33062 { 13884 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33063 { 13884 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33064 { 13884 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33065 { 13884 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33066 { 13884 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33067 { 13892 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33068 { 13892 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33069 { 13892 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33070 { 13904 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33071 { 13904 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33072 { 13904 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33073 { 13916 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33074 { 13916 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33075 { 13916 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33076 { 13928 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33077 { 13928 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33078 { 13928 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33079 { 13940 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33080 { 13940 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33081 { 13940 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33082 { 13947 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33083 { 13947 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33084 { 13947 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33085 { 13954 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33086 { 13954 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33087 { 13954 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33088 { 13961 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33089 { 13961 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33090 { 13961 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33091 { 13968 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33092 { 13968 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33093 { 13968 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33094 { 13975 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33095 { 13975 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33096 { 13975 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33097 { 13982 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33098 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33099 { 13982 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33100 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33101 { 13982 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33102 { 13982 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33103 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33104 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33105 { 13982 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33106 { 13982 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33107 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33108 { 13982 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33109 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33110 { 13982 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33111 { 13982 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33112 { 13982 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33113 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33114 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33115 { 13982 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33116 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33117 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33118 { 13982 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33119 { 13982 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33120 { 13982 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33121 { 13982 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33122 { 13982 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33123 { 13982 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33124 { 13990 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33125 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33126 { 13990 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33127 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33128 { 13990 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33129 { 13990 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33130 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33131 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33132 { 13990 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33133 { 13990 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33134 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33135 { 13990 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33136 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33137 { 13990 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33138 { 13990 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33139 { 13990 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33140 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33141 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33142 { 13990 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33143 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33144 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33145 { 13990 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33146 { 13990 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33147 { 13990 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33148 { 13990 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33149 { 13990 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33150 { 13990 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33151 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33152 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33153 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33154 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33155 { 13998 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33156 { 13998 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33157 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33158 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33159 { 13998 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33160 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33161 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33162 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33163 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33164 { 13998 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33165 { 13998 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33166 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33167 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33168 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33169 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33170 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33171 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33172 { 13998 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33173 { 13998 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33174 { 13998 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33175 { 13998 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33176 { 13998 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33177 { 13998 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33178 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33179 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33180 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33181 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33182 { 14007 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33183 { 14007 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33184 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33185 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33186 { 14007 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33187 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33188 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33189 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33190 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33191 { 14007 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33192 { 14007 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33193 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33194 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33195 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33196 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33197 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33198 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33199 { 14007 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33200 { 14007 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33201 { 14007 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33202 { 14007 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33203 { 14007 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33204 { 14007 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33205 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33206 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33207 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33208 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33209 { 14016 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33210 { 14016 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33211 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33212 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33213 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33214 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33215 { 14016 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33216 { 14016 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33217 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33218 { 14016 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33219 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33220 { 14016 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33221 { 14016 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33222 { 14016 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33223 { 14025 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33224 { 14025 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33225 { 14025 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33226 { 14025 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33227 { 14025 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33228 { 14025 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33229 { 14025 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33230 { 14025 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33231 { 14025 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33232 { 14025 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33233 { 14025 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33234 { 14025 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33235 { 14025 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33236 { 14025 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33237 { 14025 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33238 { 14025 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33239 { 14025 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33240 { 14025 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33241 { 14033 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33242 { 14033 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33243 { 14033 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33244 { 14040 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33245 { 14040 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33246 { 14040 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33247 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33248 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33249 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33250 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33251 { 14047 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33252 { 14047 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33253 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33254 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33255 { 14047 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33256 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33257 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33258 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33259 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33260 { 14047 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33261 { 14047 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33262 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33263 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33264 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33265 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33266 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33267 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33268 { 14047 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33269 { 14047 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33270 { 14047 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33271 { 14047 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33272 { 14047 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33273 { 14047 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33274 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33275 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33276 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33277 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33278 { 14055 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33279 { 14055 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33280 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33281 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33282 { 14055 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33283 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33284 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33285 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33286 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33287 { 14055 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33288 { 14055 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33289 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33290 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33291 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33292 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33293 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33294 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33295 { 14055 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33296 { 14055 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33297 { 14055 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33298 { 14055 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33299 { 14055 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33300 { 14055 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33301 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33302 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33303 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33304 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33305 { 14063 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33306 { 14063 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33307 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33308 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33309 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33310 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33311 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33312 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33313 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33314 { 14063 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33315 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33316 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33317 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33318 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33319 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33320 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33321 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33322 { 14063 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33323 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33324 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33325 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33326 { 14063 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33327 { 14063 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33328 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33329 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33330 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33331 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33332 { 14072 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33333 { 14072 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33334 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33335 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33336 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33337 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33338 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33339 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33340 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33341 { 14072 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33342 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33343 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33344 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33345 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33346 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33347 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33348 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33349 { 14072 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33350 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33351 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33352 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33353 { 14072 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33354 { 14072 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33355 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33356 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33357 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33358 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33359 { 14081 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33360 { 14081 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33361 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33362 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33363 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33364 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33365 { 14081 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33366 { 14081 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33367 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33368 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33369 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33370 { 14081 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33371 { 14081 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33372 { 14081 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33373 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33374 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33375 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33376 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33377 { 14090 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33378 { 14090 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasVBMI2, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33379 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33380 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33381 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33382 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33383 { 14090 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33384 { 14090 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33385 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33386 { 14090 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33387 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33388 { 14090 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasVBMI2|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33389 { 14090 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33390 { 14090 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasVBMI2, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33391 { 14098 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33392 { 14098 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33393 { 14098 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33394 { 14098 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33395 { 14098 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33396 { 14098 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33397 { 14098 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33398 { 14098 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33399 { 14098 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33400 { 14098 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33401 { 14098 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33402 { 14098 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33403 { 14098 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33404 { 14098 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33405 { 14098 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33406 { 14098 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33407 { 14098 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33408 { 14098 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33409 { 14098 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33410 { 14098 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33411 { 14098 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33412 { 14098 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33413 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
33414 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
33415 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
33416 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
33417 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBITALG, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
33418 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBITALG, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
33419 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33420 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33421 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33422 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBITALG|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33423 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBITALG, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33424 { 14106 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBITALG, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33425 { 14119 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33426 { 14119 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33427 { 14119 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33428 { 14119 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33429 { 14119 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33430 { 14119 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33431 { 14119 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33432 { 14119 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33433 { 14119 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33434 { 14119 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33435 { 14119 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33436 { 14119 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33437 { 14119 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33438 { 14119 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33439 { 14119 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33440 { 14119 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33441 { 14119 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33442 { 14119 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33443 { 14119 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33444 { 14119 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33445 { 14119 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33446 { 14119 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33447 { 14119 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33448 { 14119 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33449 { 14119 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33450 { 14119 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33451 { 14119 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33452 { 14119 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33453 { 14119 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33454 { 14119 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33455 { 14119 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33456 { 14127 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33457 { 14127 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33458 { 14127 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33459 { 14127 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33460 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33461 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33462 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33463 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33464 { 14127 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33465 { 14127 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33466 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33467 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33468 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33469 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33470 { 14127 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33471 { 14127 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33472 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33473 { 14127 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33474 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33475 { 14127 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33476 { 14127 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33477 { 14127 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33478 { 14136 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33479 { 14136 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33480 { 14136 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33481 { 14136 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33482 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33483 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33484 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33485 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33486 { 14136 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33487 { 14136 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33488 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33489 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33490 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33491 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33492 { 14136 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33493 { 14136 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33494 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33495 { 14136 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33496 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33497 { 14136 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33498 { 14136 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33499 { 14136 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33500 { 14145 /* vpsignb */, X86::VPSIGNBrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33501 { 14145 /* vpsignb */, X86::VPSIGNBrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33502 { 14145 /* vpsignb */, X86::VPSIGNBYrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33503 { 14145 /* vpsignb */, X86::VPSIGNBYrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33504 { 14153 /* vpsignd */, X86::VPSIGNDrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33505 { 14153 /* vpsignd */, X86::VPSIGNDrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33506 { 14153 /* vpsignd */, X86::VPSIGNDYrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33507 { 14153 /* vpsignd */, X86::VPSIGNDYrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33508 { 14161 /* vpsignw */, X86::VPSIGNWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33509 { 14161 /* vpsignw */, X86::VPSIGNWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33510 { 14161 /* vpsignw */, X86::VPSIGNWYrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33511 { 14161 /* vpsignw */, X86::VPSIGNWYrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33512 { 14169 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33513 { 14169 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33514 { 14169 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33515 { 14169 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33516 { 14169 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33517 { 14169 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33518 { 14169 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33519 { 14169 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33520 { 14169 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33521 { 14169 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33522 { 14169 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33523 { 14169 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33524 { 14169 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33525 { 14169 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33526 { 14169 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33527 { 14169 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33528 { 14169 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33529 { 14169 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33530 { 14169 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33531 { 14169 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33532 { 14169 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33533 { 14169 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33534 { 14169 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33535 { 14169 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33536 { 14169 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33537 { 14169 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33538 { 14169 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33539 { 14169 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33540 { 14169 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33541 { 14169 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33542 { 14169 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33543 { 14169 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33544 { 14169 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33545 { 14169 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33546 { 14169 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33547 { 14169 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33548 { 14169 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33549 { 14169 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33550 { 14169 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33551 { 14169 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33552 { 14169 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33553 { 14169 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33554 { 14169 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33555 { 14169 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33556 { 14169 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33557 { 14169 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33558 { 14169 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33559 { 14169 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33560 { 14169 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33561 { 14169 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33562 { 14169 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33563 { 14176 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33564 { 14176 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33565 { 14176 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33566 { 14176 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33567 { 14176 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33568 { 14176 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33569 { 14176 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33570 { 14176 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33571 { 14184 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33572 { 14184 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33573 { 14184 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33574 { 14184 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33575 { 14184 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33576 { 14184 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33577 { 14184 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33578 { 14184 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33579 { 14184 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33580 { 14184 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33581 { 14184 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33582 { 14184 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33583 { 14184 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33584 { 14184 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33585 { 14184 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33586 { 14184 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33587 { 14184 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33588 { 14184 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33589 { 14184 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33590 { 14184 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33591 { 14184 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33592 { 14184 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33593 { 14184 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33594 { 14184 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33595 { 14184 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33596 { 14184 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33597 { 14184 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33598 { 14184 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33599 { 14184 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33600 { 14184 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33601 { 14184 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33602 { 14184 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33603 { 14184 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33604 { 14184 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33605 { 14184 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33606 { 14184 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33607 { 14184 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33608 { 14184 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33609 { 14184 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33610 { 14184 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33611 { 14184 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33612 { 14184 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33613 { 14184 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33614 { 14184 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33615 { 14184 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33616 { 14184 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33617 { 14184 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33618 { 14184 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33619 { 14184 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33620 { 14184 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33621 { 14184 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33622 { 14191 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33623 { 14191 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33624 { 14191 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33625 { 14191 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33626 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33627 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33628 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33629 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33630 { 14191 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33631 { 14191 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33632 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33633 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33634 { 14191 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33635 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33636 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33637 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33638 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33639 { 14191 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33640 { 14191 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33641 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33642 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33643 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33644 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33645 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33646 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33647 { 14191 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33648 { 14191 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33649 { 14191 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33650 { 14191 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33651 { 14191 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33652 { 14191 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33653 { 14199 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33654 { 14199 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33655 { 14199 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33656 { 14199 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33657 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33658 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33659 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33660 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33661 { 14199 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33662 { 14199 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33663 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33664 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33665 { 14199 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33666 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33667 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33668 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33669 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33670 { 14199 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33671 { 14199 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33672 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33673 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33674 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33675 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33676 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33677 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33678 { 14199 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33679 { 14199 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33680 { 14199 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33681 { 14199 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33682 { 14199 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33683 { 14199 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33684 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33685 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33686 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33687 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33688 { 14207 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33689 { 14207 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33690 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33691 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33692 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33693 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33694 { 14207 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33695 { 14207 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33696 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33697 { 14207 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33698 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33699 { 14207 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33700 { 14207 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33701 { 14207 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33702 { 14215 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33703 { 14215 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33704 { 14215 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33705 { 14215 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33706 { 14215 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33707 { 14215 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33708 { 14215 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33709 { 14215 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33710 { 14215 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33711 { 14215 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33712 { 14215 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33713 { 14215 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33714 { 14215 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33715 { 14215 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33716 { 14215 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33717 { 14215 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33718 { 14215 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33719 { 14215 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33720 { 14215 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33721 { 14215 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33722 { 14215 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33723 { 14215 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33724 { 14215 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33725 { 14215 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33726 { 14215 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33727 { 14215 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33728 { 14215 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33729 { 14215 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33730 { 14215 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33731 { 14215 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33732 { 14215 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33733 { 14215 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33734 { 14215 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33735 { 14215 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33736 { 14215 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33737 { 14215 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33738 { 14215 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33739 { 14215 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33740 { 14215 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33741 { 14215 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33742 { 14215 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33743 { 14215 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33744 { 14222 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33745 { 14222 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33746 { 14222 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33747 { 14222 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33748 { 14222 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33749 { 14222 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33750 { 14222 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33751 { 14222 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33752 { 14222 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33753 { 14222 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33754 { 14222 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33755 { 14222 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33756 { 14222 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33757 { 14222 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33758 { 14222 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33759 { 14222 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33760 { 14222 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33761 { 14222 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33762 { 14222 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33763 { 14222 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33764 { 14222 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33765 { 14222 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33766 { 14222 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33767 { 14222 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33768 { 14222 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33769 { 14222 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33770 { 14222 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33771 { 14222 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33772 { 14222 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33773 { 14222 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33774 { 14222 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33775 { 14222 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33776 { 14222 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33777 { 14222 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33778 { 14222 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33779 { 14222 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33780 { 14222 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33781 { 14222 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33782 { 14222 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33783 { 14222 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33784 { 14222 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33785 { 14222 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33786 { 14222 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33787 { 14222 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33788 { 14222 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33789 { 14222 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33790 { 14222 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33791 { 14222 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33792 { 14222 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33793 { 14222 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33794 { 14222 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33795 { 14229 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33796 { 14229 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33797 { 14229 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33798 { 14229 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33799 { 14229 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33800 { 14229 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33801 { 14229 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33802 { 14229 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33803 { 14229 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33804 { 14229 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33805 { 14229 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33806 { 14229 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33807 { 14229 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33808 { 14229 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33809 { 14229 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33810 { 14229 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33811 { 14229 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33812 { 14229 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33813 { 14229 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33814 { 14229 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33815 { 14229 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33816 { 14229 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33817 { 14229 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33818 { 14229 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33819 { 14229 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33820 { 14229 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33821 { 14229 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33822 { 14229 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33823 { 14229 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33824 { 14229 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33825 { 14229 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33826 { 14229 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33827 { 14229 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33828 { 14229 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33829 { 14229 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33830 { 14229 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33831 { 14229 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33832 { 14229 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33833 { 14229 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33834 { 14229 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33835 { 14229 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33836 { 14229 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33837 { 14229 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33838 { 14229 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33839 { 14229 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33840 { 14236 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33841 { 14236 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33842 { 14236 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33843 { 14236 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33844 { 14236 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33845 { 14236 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33846 { 14236 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33847 { 14236 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33848 { 14236 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33849 { 14236 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33850 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33851 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33852 { 14236 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33853 { 14236 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33854 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33855 { 14236 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33856 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33857 { 14236 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33858 { 14236 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33859 { 14236 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33860 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33861 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33862 { 14236 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33863 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33864 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33865 { 14236 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33866 { 14236 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33867 { 14236 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33868 { 14236 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33869 { 14236 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33870 { 14236 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33871 { 14244 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33872 { 14244 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33873 { 14244 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33874 { 14244 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33875 { 14244 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33876 { 14244 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33877 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33878 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33879 { 14244 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33880 { 14244 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33881 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33882 { 14244 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33883 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33884 { 14244 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33885 { 14244 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33886 { 14244 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33887 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33888 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33889 { 14244 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33890 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33891 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33892 { 14244 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33893 { 14244 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33894 { 14244 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33895 { 14244 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33896 { 14244 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33897 { 14244 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33898 { 14252 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33899 { 14252 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33900 { 14252 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33901 { 14252 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33902 { 14252 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33903 { 14252 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33904 { 14252 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33905 { 14252 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33906 { 14252 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33907 { 14252 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33908 { 14252 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33909 { 14252 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33910 { 14252 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33911 { 14252 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33912 { 14252 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33913 { 14252 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33914 { 14252 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33915 { 14252 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33916 { 14260 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33917 { 14260 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33918 { 14260 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33919 { 14260 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33920 { 14260 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33921 { 14260 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33922 { 14260 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33923 { 14260 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33924 { 14260 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33925 { 14260 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33926 { 14260 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33927 { 14260 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33928 { 14260 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33929 { 14260 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33930 { 14260 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33931 { 14260 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33932 { 14260 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33933 { 14260 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33934 { 14260 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33935 { 14260 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33936 { 14260 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33937 { 14260 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33938 { 14260 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33939 { 14260 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33940 { 14260 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33941 { 14260 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33942 { 14260 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33943 { 14260 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33944 { 14260 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33945 { 14260 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33946 { 14260 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33947 { 14260 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33948 { 14260 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33949 { 14260 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33950 { 14260 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33951 { 14260 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33952 { 14260 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33953 { 14260 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33954 { 14260 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33955 { 14260 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33956 { 14260 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33957 { 14260 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33958 { 14267 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33959 { 14267 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33960 { 14267 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33961 { 14267 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33962 { 14267 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33963 { 14267 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33964 { 14267 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33965 { 14267 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33966 { 14267 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33967 { 14267 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33968 { 14267 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33969 { 14267 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33970 { 14267 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33971 { 14267 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33972 { 14267 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33973 { 14267 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33974 { 14267 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33975 { 14267 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33976 { 14267 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33977 { 14267 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33978 { 14267 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33979 { 14267 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33980 { 14267 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33981 { 14267 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33982 { 14267 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33983 { 14267 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33984 { 14267 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33985 { 14267 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33986 { 14267 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33987 { 14267 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33988 { 14267 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33989 { 14267 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33990 { 14267 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33991 { 14267 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33992 { 14267 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33993 { 14267 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33994 { 14267 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33995 { 14267 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33996 { 14267 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33997 { 14267 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33998 { 14267 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33999 { 14267 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34000 { 14267 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34001 { 14267 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34002 { 14267 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34003 { 14267 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34004 { 14267 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34005 { 14267 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34006 { 14267 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34007 { 14267 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34008 { 14267 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34009 { 14274 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34010 { 14274 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34011 { 14274 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34012 { 14274 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34013 { 14274 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34014 { 14274 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34015 { 14274 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34016 { 14274 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34017 { 14282 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34018 { 14282 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34019 { 14282 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34020 { 14282 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34021 { 14282 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34022 { 14282 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34023 { 14282 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34024 { 14282 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34025 { 14282 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34026 { 14282 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34027 { 14282 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34028 { 14282 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34029 { 14282 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34030 { 14282 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34031 { 14282 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34032 { 14282 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34033 { 14282 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34034 { 14282 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34035 { 14282 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34036 { 14282 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34037 { 14282 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34038 { 14282 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34039 { 14282 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34040 { 14282 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34041 { 14282 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34042 { 14282 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34043 { 14282 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34044 { 14282 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34045 { 14282 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34046 { 14282 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34047 { 14282 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34048 { 14282 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34049 { 14282 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34050 { 14282 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34051 { 14282 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34052 { 14282 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34053 { 14282 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34054 { 14282 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34055 { 14282 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34056 { 14282 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34057 { 14282 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34058 { 14282 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34059 { 14282 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34060 { 14282 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34061 { 14282 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34062 { 14282 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34063 { 14282 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34064 { 14282 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34065 { 14282 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34066 { 14282 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34067 { 14282 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34068 { 14289 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34069 { 14289 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34070 { 14289 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34071 { 14289 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34072 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34073 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34074 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34075 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34076 { 14289 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34077 { 14289 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34078 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34079 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34080 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34081 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34082 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34083 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34084 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34085 { 14289 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34086 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34087 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34088 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34089 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34090 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34091 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34092 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34093 { 14289 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34094 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34095 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34096 { 14289 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34097 { 14289 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34098 { 14289 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34099 { 14297 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34100 { 14297 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34101 { 14297 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34102 { 14297 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34103 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34104 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34105 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34106 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34107 { 14297 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34108 { 14297 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34109 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34110 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34111 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34112 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34113 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34114 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34115 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34116 { 14297 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34117 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34118 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34119 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34120 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34121 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34122 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34123 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34124 { 14297 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34125 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34126 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34127 { 14297 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34128 { 14297 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34129 { 14297 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34130 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34131 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34132 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34133 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34134 { 14305 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34135 { 14305 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34136 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34137 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34138 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34139 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34140 { 14305 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34141 { 14305 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34142 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34143 { 14305 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34144 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34145 { 14305 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34146 { 14305 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34147 { 14305 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34148 { 14313 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34149 { 14313 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34150 { 14313 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34151 { 14313 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34152 { 14313 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34153 { 14313 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34154 { 14313 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34155 { 14313 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34156 { 14313 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34157 { 14313 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34158 { 14313 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34159 { 14313 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34160 { 14313 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34161 { 14313 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34162 { 14313 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34163 { 14313 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34164 { 14313 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34165 { 14313 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34166 { 14313 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34167 { 14313 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34168 { 14313 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34169 { 14313 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34170 { 14313 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34171 { 14313 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34172 { 14313 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34173 { 14313 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34174 { 14313 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34175 { 14313 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34176 { 14313 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34177 { 14313 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34178 { 14313 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34179 { 14313 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34180 { 14313 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34181 { 14313 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34182 { 14313 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34183 { 14313 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34184 { 14313 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34185 { 14313 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34186 { 14313 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34187 { 14313 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34188 { 14313 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34189 { 14313 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34190 { 14320 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34191 { 14320 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34192 { 14320 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34193 { 14320 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34194 { 14320 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34195 { 14320 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34196 { 14320 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34197 { 14320 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34198 { 14320 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34199 { 14320 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34200 { 14320 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34201 { 14320 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34202 { 14320 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34203 { 14320 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34204 { 14320 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34205 { 14320 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34206 { 14320 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34207 { 14320 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34208 { 14320 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34209 { 14320 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34210 { 14320 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34211 { 14320 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34212 { 14327 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34213 { 14327 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34214 { 14327 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34215 { 14327 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34216 { 14327 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34217 { 14327 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34218 { 14327 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34219 { 14327 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34220 { 14327 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34221 { 14327 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34222 { 14327 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34223 { 14327 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34224 { 14327 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34225 { 14327 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34226 { 14327 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34227 { 14327 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34228 { 14327 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34229 { 14327 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34230 { 14327 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34231 { 14327 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34232 { 14327 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34233 { 14327 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34234 { 14327 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34235 { 14327 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34236 { 14327 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34237 { 14327 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34238 { 14327 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34239 { 14327 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34240 { 14327 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34241 { 14327 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34242 { 14327 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34243 { 14334 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34244 { 14334 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34245 { 14334 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34246 { 14334 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34247 { 14334 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34248 { 14334 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34249 { 14334 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34250 { 14334 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34251 { 14334 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34252 { 14334 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34253 { 14334 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34254 { 14334 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34255 { 14334 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34256 { 14334 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34257 { 14334 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34258 { 14334 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34259 { 14334 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34260 { 14334 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34261 { 14334 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34262 { 14334 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34263 { 14334 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34264 { 14334 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34265 { 14334 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34266 { 14334 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34267 { 14334 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34268 { 14334 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34269 { 14334 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34270 { 14334 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34271 { 14334 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34272 { 14334 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34273 { 14334 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34274 { 14341 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34275 { 14341 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34276 { 14341 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34277 { 14341 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34278 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34279 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34280 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34281 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34282 { 14341 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34283 { 14341 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34284 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34285 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34286 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34287 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34288 { 14341 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34289 { 14341 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34290 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34291 { 14341 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34292 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34293 { 14341 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34294 { 14341 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34295 { 14341 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34296 { 14349 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34297 { 14349 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34298 { 14349 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34299 { 14349 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34300 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34301 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34302 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34303 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34304 { 14349 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34305 { 14349 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34306 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34307 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34308 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34309 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34310 { 14349 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34311 { 14349 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34312 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34313 { 14349 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34314 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34315 { 14349 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34316 { 14349 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34317 { 14349 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34318 { 14357 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34319 { 14357 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34320 { 14357 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34321 { 14357 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34322 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34323 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34324 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34325 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34326 { 14357 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34327 { 14357 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34328 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34329 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34330 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34331 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34332 { 14357 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34333 { 14357 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34334 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34335 { 14357 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34336 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34337 { 14357 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34338 { 14357 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34339 { 14357 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34340 { 14366 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34341 { 14366 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34342 { 14366 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34343 { 14366 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34344 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34345 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34346 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34347 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34348 { 14366 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34349 { 14366 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34350 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34351 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34352 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34353 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34354 { 14366 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34355 { 14366 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34356 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34357 { 14366 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34358 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34359 { 14366 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34360 { 14366 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34361 { 14366 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34362 { 14375 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34363 { 14375 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34364 { 14375 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34365 { 14375 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34366 { 14375 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34367 { 14375 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34368 { 14375 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34369 { 14375 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34370 { 14375 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34371 { 14375 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34372 { 14375 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34373 { 14375 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34374 { 14375 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34375 { 14375 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34376 { 14375 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34377 { 14375 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34378 { 14375 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34379 { 14375 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34380 { 14375 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34381 { 14375 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34382 { 14375 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34383 { 14375 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34384 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34385 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34386 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34387 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34388 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34389 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34390 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34391 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34392 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34393 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34394 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34395 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34396 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34397 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34398 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34399 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34400 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34401 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34402 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34403 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34404 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34405 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34406 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34407 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34408 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34409 { 14382 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34410 { 14382 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34411 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34412 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34413 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34414 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34415 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34416 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34417 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34418 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34419 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34420 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34421 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34422 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34423 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34424 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34425 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34426 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34427 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34428 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34429 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34430 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34431 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34432 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34433 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34434 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34435 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34436 { 14393 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34437 { 14393 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34438 { 14404 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
34439 { 14404 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
34440 { 14404 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
34441 { 14404 /* vptest */, X86::VPTESTYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
34442 { 14411 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34443 { 14411 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34444 { 14411 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34445 { 14411 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34446 { 14411 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34447 { 14411 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34448 { 14411 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34449 { 14411 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34450 { 14411 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34451 { 14411 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34452 { 14411 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34453 { 14411 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34454 { 14420 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34455 { 14420 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34456 { 14420 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34457 { 14420 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34458 { 14420 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34459 { 14420 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34460 { 14420 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34461 { 14420 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34462 { 14420 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34463 { 14420 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34464 { 14420 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34465 { 14420 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34466 { 14420 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34467 { 14420 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34468 { 14420 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34469 { 14420 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34470 { 14420 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34471 { 14420 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34472 { 14429 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34473 { 14429 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34474 { 14429 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34475 { 14429 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34476 { 14429 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34477 { 14429 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34478 { 14429 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34479 { 14429 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34480 { 14429 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34481 { 14429 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34482 { 14429 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34483 { 14429 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34484 { 14429 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34485 { 14429 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34486 { 14429 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34487 { 14429 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34488 { 14429 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34489 { 14429 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34490 { 14438 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34491 { 14438 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34492 { 14438 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34493 { 14438 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34494 { 14438 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34495 { 14438 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34496 { 14438 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34497 { 14438 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34498 { 14438 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34499 { 14438 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34500 { 14438 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34501 { 14438 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34502 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34503 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34504 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34505 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34506 { 14447 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34507 { 14447 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34508 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34509 { 14447 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34510 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34511 { 14447 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34512 { 14447 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34513 { 14447 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34514 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34515 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34516 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34517 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34518 { 14457 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34519 { 14457 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34520 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34521 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34522 { 14457 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34523 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34524 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34525 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34526 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34527 { 14457 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34528 { 14457 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34529 { 14457 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34530 { 14457 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34531 { 14457 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34532 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34533 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34534 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34535 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34536 { 14467 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34537 { 14467 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34538 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34539 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34540 { 14467 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34541 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34542 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34543 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34544 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34545 { 14467 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34546 { 14467 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34547 { 14467 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34548 { 14467 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34549 { 14467 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34550 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34551 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34552 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34553 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34554 { 14477 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34555 { 14477 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34556 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34557 { 14477 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34558 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34559 { 14477 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34560 { 14477 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34561 { 14477 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34562 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34563 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34564 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34565 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34566 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34567 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34568 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34569 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34570 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34571 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34572 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34573 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34574 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34575 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34576 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34577 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34578 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34579 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34580 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34581 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34582 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34583 { 14487 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34584 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34585 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34586 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34587 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34588 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34589 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34590 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34591 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34592 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34593 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34594 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34595 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34596 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34597 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34598 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34599 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34600 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34601 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34602 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34603 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34604 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34605 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34606 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34607 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34608 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34609 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34610 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34611 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34612 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34613 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34614 { 14498 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34615 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34616 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34617 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34618 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34619 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34620 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34621 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34622 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34623 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34624 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34625 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34626 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34627 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34628 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34629 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34630 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34631 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34632 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34633 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34634 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34635 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34636 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34637 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34638 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34639 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34640 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34641 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34642 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34643 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34644 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34645 { 14509 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34646 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34647 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34648 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34649 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34650 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34651 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34652 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34653 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34654 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34655 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34656 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34657 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34658 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34659 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34660 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34661 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34662 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34663 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34664 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34665 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34666 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34667 { 14521 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34668 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34669 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34670 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34671 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34672 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34673 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34674 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34675 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34676 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34677 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34678 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34679 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34680 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34681 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34682 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34683 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34684 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34685 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34686 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34687 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34688 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34689 { 14532 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34690 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34691 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34692 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34693 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34694 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34695 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34696 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34697 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34698 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34699 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34700 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34701 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34702 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34703 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34704 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34705 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34706 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34707 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34708 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34709 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34710 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34711 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34712 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34713 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34714 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34715 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34716 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34717 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34718 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34719 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34720 { 14543 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34721 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34722 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34723 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34724 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34725 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34726 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34727 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34728 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34729 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34730 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34731 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34732 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34733 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34734 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34735 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34736 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34737 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34738 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34739 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34740 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34741 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34742 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34743 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34744 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34745 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34746 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34747 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34748 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34749 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34750 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34751 { 14554 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34752 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34753 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34754 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34755 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34756 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34757 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34758 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34759 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34760 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34761 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34762 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34763 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34764 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34765 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34766 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34767 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34768 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34769 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34770 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34771 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34772 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34773 { 14566 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34774 { 14577 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34775 { 14577 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34776 { 14577 /* vpxor */, X86::VPXORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34777 { 14577 /* vpxor */, X86::VPXORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34778 { 14583 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34779 { 14583 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34780 { 14583 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34781 { 14583 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34782 { 14583 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34783 { 14583 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34784 { 14583 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34785 { 14583 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34786 { 14583 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34787 { 14583 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34788 { 14583 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34789 { 14583 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34790 { 14583 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34791 { 14583 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34792 { 14583 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34793 { 14583 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34794 { 14583 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34795 { 14583 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34796 { 14583 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34797 { 14583 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34798 { 14583 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34799 { 14583 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34800 { 14583 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34801 { 14583 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34802 { 14583 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34803 { 14583 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34804 { 14583 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34805 { 14590 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34806 { 14590 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34807 { 14590 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34808 { 14590 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34809 { 14590 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34810 { 14590 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34811 { 14590 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34812 { 14590 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34813 { 14590 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34814 { 14590 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34815 { 14590 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34816 { 14590 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34817 { 14590 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34818 { 14590 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34819 { 14590 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34820 { 14590 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34821 { 14590 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34822 { 14590 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34823 { 14590 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34824 { 14590 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34825 { 14590 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34826 { 14590 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34827 { 14590 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34828 { 14590 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34829 { 14590 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34830 { 14590 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34831 { 14590 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34832 { 14597 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34833 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34834 { 14597 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34835 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34836 { 14597 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34837 { 14597 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34838 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34839 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34840 { 14597 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34841 { 14597 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34842 { 14597 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34843 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34844 { 14597 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34845 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34846 { 14597 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34847 { 14597 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34848 { 14597 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34849 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34850 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34851 { 14597 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34852 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34853 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34854 { 14597 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34855 { 14597 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34856 { 14597 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34857 { 14597 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34858 { 14597 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34859 { 14597 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34860 { 14597 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34861 { 14597 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34862 { 14606 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34863 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34864 { 14606 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34865 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34866 { 14606 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34867 { 14606 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34868 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34869 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34870 { 14606 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34871 { 14606 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34872 { 14606 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34873 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34874 { 14606 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34875 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34876 { 14606 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34877 { 14606 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34878 { 14606 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34879 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34880 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34881 { 14606 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34882 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34883 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34884 { 14606 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34885 { 14606 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34886 { 14606 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34887 { 14606 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34888 { 14606 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34889 { 14606 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34890 { 14606 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34891 { 14606 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34892 { 14615 /* vrangesd */, X86::VRANGESDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34893 { 14615 /* vrangesd */, X86::VRANGESDZ128rmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34894 { 14615 /* vrangesd */, X86::VRANGESDZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34895 { 14615 /* vrangesd */, X86::VRANGESDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34896 { 14615 /* vrangesd */, X86::VRANGESDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34897 { 14615 /* vrangesd */, X86::VRANGESDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34898 { 14615 /* vrangesd */, X86::VRANGESDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
34899 { 14615 /* vrangesd */, X86::VRANGESDZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34900 { 14615 /* vrangesd */, X86::VRANGESDZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34901 { 14624 /* vrangess */, X86::VRANGESSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34902 { 14624 /* vrangess */, X86::VRANGESSZ128rmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
34903 { 14624 /* vrangess */, X86::VRANGESSZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34904 { 14624 /* vrangess */, X86::VRANGESSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34905 { 14624 /* vrangess */, X86::VRANGESSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
34906 { 14624 /* vrangess */, X86::VRANGESSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34907 { 14624 /* vrangess */, X86::VRANGESSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
34908 { 14624 /* vrangess */, X86::VRANGESSZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34909 { 14624 /* vrangess */, X86::VRANGESSZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
34910 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
34911 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
34912 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
34913 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
34914 { 14633 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
34915 { 14633 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
34916 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34917 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34918 { 14633 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34919 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34920 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
34921 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34922 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
34923 { 14633 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34924 { 14633 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34925 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
34926 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
34927 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
34928 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
34929 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
34930 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
34931 { 14633 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34932 { 14633 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34933 { 14633 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34934 { 14633 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
34935 { 14633 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
34936 { 14633 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34937 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
34938 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
34939 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
34940 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
34941 { 14642 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
34942 { 14642 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
34943 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34944 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34945 { 14642 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34946 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34947 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
34948 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34949 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
34950 { 14642 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34951 { 14642 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34952 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
34953 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
34954 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
34955 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
34956 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
34957 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
34958 { 14642 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34959 { 14642 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34960 { 14642 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34961 { 14642 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
34962 { 14642 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
34963 { 14642 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34964 { 14651 /* vrcp14sd */, X86::VRCP14SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34965 { 14651 /* vrcp14sd */, X86::VRCP14SDrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
34966 { 14651 /* vrcp14sd */, X86::VRCP14SDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34967 { 14651 /* vrcp14sd */, X86::VRCP14SDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
34968 { 14651 /* vrcp14sd */, X86::VRCP14SDrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34969 { 14651 /* vrcp14sd */, X86::VRCP14SDrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
34970 { 14660 /* vrcp14ss */, X86::VRCP14SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34971 { 14660 /* vrcp14ss */, X86::VRCP14SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
34972 { 14660 /* vrcp14ss */, X86::VRCP14SSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34973 { 14660 /* vrcp14ss */, X86::VRCP14SSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
34974 { 14660 /* vrcp14ss */, X86::VRCP14SSrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34975 { 14660 /* vrcp14ss */, X86::VRCP14SSrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
34976 { 14669 /* vrcp28pd */, X86::VRCP28PDr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
34977 { 14669 /* vrcp28pd */, X86::VRCP28PDm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
34978 { 14669 /* vrcp28pd */, X86::VRCP28PDrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
34979 { 14669 /* vrcp28pd */, X86::VRCP28PDmb, Convert__Reg1_0__Mem645_1, Feature_HasERI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34980 { 14669 /* vrcp28pd */, X86::VRCP28PDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34981 { 14669 /* vrcp28pd */, X86::VRCP28PDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34982 { 14669 /* vrcp28pd */, X86::VRCP28PDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34983 { 14669 /* vrcp28pd */, X86::VRCP28PDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34984 { 14669 /* vrcp28pd */, X86::VRCP28PDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
34985 { 14669 /* vrcp28pd */, X86::VRCP28PDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34986 { 14669 /* vrcp28pd */, X86::VRCP28PDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
34987 { 14669 /* vrcp28pd */, X86::VRCP28PDmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
34988 { 14678 /* vrcp28ps */, X86::VRCP28PSr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
34989 { 14678 /* vrcp28ps */, X86::VRCP28PSm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
34990 { 14678 /* vrcp28ps */, X86::VRCP28PSrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
34991 { 14678 /* vrcp28ps */, X86::VRCP28PSmb, Convert__Reg1_0__Mem325_1, Feature_HasERI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34992 { 14678 /* vrcp28ps */, X86::VRCP28PSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34993 { 14678 /* vrcp28ps */, X86::VRCP28PSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
34994 { 14678 /* vrcp28ps */, X86::VRCP28PSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
34995 { 14678 /* vrcp28ps */, X86::VRCP28PSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
34996 { 14678 /* vrcp28ps */, X86::VRCP28PSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
34997 { 14678 /* vrcp28ps */, X86::VRCP28PSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
34998 { 14678 /* vrcp28ps */, X86::VRCP28PSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
34999 { 14678 /* vrcp28ps */, X86::VRCP28PSmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35000 { 14687 /* vrcp28sd */, X86::VRCP28SDr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35001 { 14687 /* vrcp28sd */, X86::VRCP28SDm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35002 { 14687 /* vrcp28sd */, X86::VRCP28SDrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35003 { 14687 /* vrcp28sd */, X86::VRCP28SDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35004 { 14687 /* vrcp28sd */, X86::VRCP28SDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35005 { 14687 /* vrcp28sd */, X86::VRCP28SDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35006 { 14687 /* vrcp28sd */, X86::VRCP28SDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35007 { 14687 /* vrcp28sd */, X86::VRCP28SDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35008 { 14687 /* vrcp28sd */, X86::VRCP28SDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35009 { 14696 /* vrcp28ss */, X86::VRCP28SSr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35010 { 14696 /* vrcp28ss */, X86::VRCP28SSm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35011 { 14696 /* vrcp28ss */, X86::VRCP28SSrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35012 { 14696 /* vrcp28ss */, X86::VRCP28SSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35013 { 14696 /* vrcp28ss */, X86::VRCP28SSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35014 { 14696 /* vrcp28ss */, X86::VRCP28SSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35015 { 14696 /* vrcp28ss */, X86::VRCP28SSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35016 { 14696 /* vrcp28ss */, X86::VRCP28SSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35017 { 14696 /* vrcp28ss */, X86::VRCP28SSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35018 { 14705 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35019 { 14705 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35020 { 14705 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35021 { 14705 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35022 { 14712 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35023 { 14712 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35024 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35025 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35026 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35027 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35028 { 14719 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35029 { 14719 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35030 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35031 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35032 { 14719 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35033 { 14719 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35034 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35035 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35036 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35037 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35038 { 14719 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35039 { 14719 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35040 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35041 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35042 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35043 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35044 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35045 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35046 { 14719 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35047 { 14719 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35048 { 14719 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35049 { 14719 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35050 { 14719 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35051 { 14719 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35052 { 14719 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35053 { 14719 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35054 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35055 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35056 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35057 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35058 { 14729 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35059 { 14729 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35060 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35061 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35062 { 14729 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35063 { 14729 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35064 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35065 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35066 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35067 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35068 { 14729 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35069 { 14729 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35070 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35071 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35072 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35073 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35074 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35075 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35076 { 14729 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35077 { 14729 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35078 { 14729 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35079 { 14729 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35080 { 14729 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35081 { 14729 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35082 { 14729 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35083 { 14729 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35084 { 14739 /* vreducesd */, X86::VREDUCESDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35085 { 14739 /* vreducesd */, X86::VREDUCESDZ128rmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35086 { 14739 /* vreducesd */, X86::VREDUCESDZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35087 { 14739 /* vreducesd */, X86::VREDUCESDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35088 { 14739 /* vreducesd */, X86::VREDUCESDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35089 { 14739 /* vreducesd */, X86::VREDUCESDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35090 { 14739 /* vreducesd */, X86::VREDUCESDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35091 { 14739 /* vreducesd */, X86::VREDUCESDZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35092 { 14739 /* vreducesd */, X86::VREDUCESDZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35093 { 14749 /* vreducess */, X86::VREDUCESSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35094 { 14749 /* vreducess */, X86::VREDUCESSZ128rmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35095 { 14749 /* vreducess */, X86::VREDUCESSZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35096 { 14749 /* vreducess */, X86::VREDUCESSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35097 { 14749 /* vreducess */, X86::VREDUCESSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35098 { 14749 /* vreducess */, X86::VREDUCESSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35099 { 14749 /* vreducess */, X86::VREDUCESSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35100 { 14749 /* vreducess */, X86::VREDUCESSZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35101 { 14749 /* vreducess */, X86::VREDUCESSZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35102 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35103 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35104 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35105 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35106 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35107 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35108 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35109 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35110 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35111 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35112 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35113 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35114 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35115 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35116 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35117 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35118 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35119 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35120 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35121 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35122 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35123 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35124 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35125 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35126 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35127 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35128 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35129 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35130 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35131 { 14759 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35132 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35133 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35134 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35135 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35136 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35137 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35138 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35139 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35140 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35141 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35142 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35143 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35144 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35145 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35146 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35147 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35148 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35149 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35150 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35151 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35152 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35153 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35154 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35155 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35156 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35157 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35158 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35159 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35160 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35161 { 14771 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35162 { 14783 /* vrndscalesd */, X86::VRNDSCALESDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35163 { 14783 /* vrndscalesd */, X86::VRNDSCALESDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35164 { 14783 /* vrndscalesd */, X86::VRNDSCALESDrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35165 { 14783 /* vrndscalesd */, X86::VRNDSCALESDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35166 { 14783 /* vrndscalesd */, X86::VRNDSCALESDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35167 { 14783 /* vrndscalesd */, X86::VRNDSCALESDr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35168 { 14783 /* vrndscalesd */, X86::VRNDSCALESDm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35169 { 14783 /* vrndscalesd */, X86::VRNDSCALESDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35170 { 14783 /* vrndscalesd */, X86::VRNDSCALESDrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35171 { 14795 /* vrndscaless */, X86::VRNDSCALESSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35172 { 14795 /* vrndscaless */, X86::VRNDSCALESSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35173 { 14795 /* vrndscaless */, X86::VRNDSCALESSrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35174 { 14795 /* vrndscaless */, X86::VRNDSCALESSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35175 { 14795 /* vrndscaless */, X86::VRNDSCALESSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35176 { 14795 /* vrndscaless */, X86::VRNDSCALESSr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35177 { 14795 /* vrndscaless */, X86::VRNDSCALESSm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35178 { 14795 /* vrndscaless */, X86::VRNDSCALESSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35179 { 14795 /* vrndscaless */, X86::VRNDSCALESSrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35180 { 14807 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35181 { 14807 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35182 { 14807 /* vroundpd */, X86::VROUNDYPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35183 { 14807 /* vroundpd */, X86::VROUNDYPDm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35184 { 14816 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35185 { 14816 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35186 { 14816 /* vroundps */, X86::VROUNDYPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35187 { 14816 /* vroundps */, X86::VROUNDYPSm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35188 { 14825 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35189 { 14825 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35190 { 14834 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35191 { 14834 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35192 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
35193 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
35194 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
35195 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
35196 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
35197 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
35198 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35199 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35200 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35201 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35202 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35203 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35204 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35205 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35206 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35207 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35208 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35209 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35210 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35211 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35212 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35213 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35214 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35215 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35216 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35217 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35218 { 14843 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35219 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
35220 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
35221 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
35222 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
35223 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
35224 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
35225 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35226 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35227 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35228 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35229 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35230 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35231 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35232 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35233 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35234 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35235 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35236 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35237 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35238 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35239 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35240 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35241 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35242 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35243 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35244 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35245 { 14854 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35246 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35247 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35248 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35249 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35250 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35251 { 14865 /* vrsqrt14sd */, X86::VRSQRT14SDrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35252 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35253 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35254 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35255 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35256 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35257 { 14876 /* vrsqrt14ss */, X86::VRSQRT14SSrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35258 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
35259 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
35260 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35261 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmb, Convert__Reg1_0__Mem645_1, Feature_HasERI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35262 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35263 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35264 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35265 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35266 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35267 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35268 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35269 { 14887 /* vrsqrt28pd */, X86::VRSQRT28PDmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35270 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
35271 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
35272 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35273 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmb, Convert__Reg1_0__Mem325_1, Feature_HasERI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35274 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35275 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35276 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35277 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35278 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35279 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35280 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35281 { 14898 /* vrsqrt28ps */, X86::VRSQRT28PSmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35282 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35283 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35284 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35285 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35286 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35287 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35288 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35289 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35290 { 14909 /* vrsqrt28sd */, X86::VRSQRT28SDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35291 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35292 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35293 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35294 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35295 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35296 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35297 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35298 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35299 { 14920 /* vrsqrt28ss */, X86::VRSQRT28SSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35300 { 14931 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35301 { 14931 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35302 { 14931 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35303 { 14931 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35304 { 14940 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35305 { 14940 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35306 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35307 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35308 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35309 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35310 { 14949 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35311 { 14949 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35312 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35313 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35314 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35315 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35316 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35317 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35318 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35319 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35320 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35321 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35322 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35323 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35324 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35325 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35326 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35327 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35328 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35329 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35330 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35331 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35332 { 14949 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35333 { 14949 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35334 { 14949 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35335 { 14949 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35336 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35337 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35338 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35339 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35340 { 14959 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35341 { 14959 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35342 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35343 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35344 { 14959 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35345 { 14959 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35346 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35347 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35348 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35349 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35350 { 14959 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35351 { 14959 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35352 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35353 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35354 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35355 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35356 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35357 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35358 { 14959 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35359 { 14959 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35360 { 14959 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35361 { 14959 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35362 { 14959 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35363 { 14959 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35364 { 14959 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35365 { 14959 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35366 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35367 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35368 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35369 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35370 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35371 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35372 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35373 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35374 { 14969 /* vscalefsd */, X86::VSCALEFSDZ128rrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35375 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35376 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35377 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35378 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35379 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35380 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35381 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35382 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35383 { 14979 /* vscalefss */, X86::VSCALEFSSZ128rrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35384 { 14989 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35385 { 14989 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35386 { 14989 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35387 { 15001 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35388 { 15001 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35389 { 15001 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35390 { 15013 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
35391 { 15028 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35392 { 15043 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35393 { 15058 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
35394 { 15073 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
35395 { 15088 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35396 { 15103 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35397 { 15118 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, Feature_HasPFI, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
35398 { 15133 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35399 { 15133 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35400 { 15133 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35401 { 15145 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35402 { 15145 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35403 { 15145 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35404 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35405 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35406 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35407 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35408 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35409 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35410 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35411 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35412 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35413 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35414 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35415 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35416 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35417 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35418 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35419 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35420 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35421 { 15157 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35422 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35423 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35424 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35425 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35426 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35427 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35428 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35429 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35430 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35431 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35432 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35433 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35434 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35435 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35436 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35437 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35438 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35439 { 15168 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35440 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35441 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35442 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35443 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35444 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35445 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35446 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35447 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35448 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35449 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35450 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35451 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35452 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35453 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35454 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35455 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35456 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35457 { 15179 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35458 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35459 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35460 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35461 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35462 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35463 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35464 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35465 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35466 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35467 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35468 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35469 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35470 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35471 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35472 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35473 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35474 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35475 { 15190 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35476 { 15201 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35477 { 15201 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35478 { 15201 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35479 { 15201 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35480 { 15201 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35481 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35482 { 15201 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35483 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35484 { 15201 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35485 { 15201 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35486 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35487 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35488 { 15201 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35489 { 15201 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35490 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35491 { 15201 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35492 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35493 { 15201 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35494 { 15201 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35495 { 15201 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35496 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35497 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35498 { 15201 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35499 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35500 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35501 { 15201 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35502 { 15201 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35503 { 15201 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35504 { 15201 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35505 { 15201 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35506 { 15201 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35507 { 15209 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35508 { 15209 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35509 { 15209 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35510 { 15209 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35511 { 15209 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35512 { 15209 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35513 { 15209 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35514 { 15209 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35515 { 15209 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35516 { 15209 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35517 { 15209 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35518 { 15209 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35519 { 15209 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35520 { 15209 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35521 { 15209 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35522 { 15209 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35523 { 15209 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35524 { 15209 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35525 { 15209 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35526 { 15209 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35527 { 15209 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35528 { 15209 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35529 { 15209 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35530 { 15209 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35531 { 15209 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35532 { 15209 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35533 { 15209 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35534 { 15209 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35535 { 15209 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35536 { 15209 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35537 { 15209 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35538 { 15217 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35539 { 15217 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35540 { 15217 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35541 { 15217 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35542 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
35543 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
35544 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
35545 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
35546 { 15217 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
35547 { 15217 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
35548 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35549 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35550 { 15217 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35551 { 15217 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35552 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35553 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35554 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35555 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35556 { 15217 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35557 { 15217 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35558 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35559 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35560 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35561 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35562 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35563 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35564 { 15217 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35565 { 15217 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35566 { 15217 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
35567 { 15217 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35568 { 15217 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35569 { 15217 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35570 { 15217 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
35571 { 15217 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35572 { 15225 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35573 { 15225 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35574 { 15225 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35575 { 15225 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35576 { 15225 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
35577 { 15225 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
35578 { 15225 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
35579 { 15225 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
35580 { 15225 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
35581 { 15225 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
35582 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35583 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35584 { 15225 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35585 { 15225 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35586 { 15225 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35587 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35588 { 15225 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35589 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35590 { 15225 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35591 { 15225 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35592 { 15225 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35593 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35594 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35595 { 15225 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35596 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35597 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35598 { 15225 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35599 { 15225 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35600 { 15225 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
35601 { 15225 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35602 { 15225 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35603 { 15225 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35604 { 15225 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
35605 { 15225 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35606 { 15233 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35607 { 15233 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
35608 { 15233 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35609 { 15233 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35610 { 15233 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35611 { 15233 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35612 { 15233 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35613 { 15233 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35614 { 15233 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35615 { 15233 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35616 { 15233 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35617 { 15241 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35618 { 15241 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35619 { 15241 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35620 { 15241 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35621 { 15241 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35622 { 15241 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35623 { 15241 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35624 { 15241 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35625 { 15241 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35626 { 15241 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35627 { 15241 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35628 { 15249 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
35629 { 15258 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35630 { 15258 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35631 { 15258 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35632 { 15258 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35633 { 15258 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35634 { 15258 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35635 { 15258 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35636 { 15258 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35637 { 15258 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35638 { 15258 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35639 { 15258 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35640 { 15258 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35641 { 15258 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35642 { 15258 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35643 { 15258 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35644 { 15258 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35645 { 15258 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35646 { 15258 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35647 { 15258 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35648 { 15258 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35649 { 15258 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35650 { 15258 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35651 { 15258 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35652 { 15258 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35653 { 15258 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35654 { 15258 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35655 { 15258 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35656 { 15258 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35657 { 15258 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35658 { 15258 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35659 { 15258 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35660 { 15258 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35661 { 15258 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35662 { 15258 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35663 { 15265 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35664 { 15265 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35665 { 15265 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35666 { 15265 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35667 { 15265 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35668 { 15265 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35669 { 15265 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35670 { 15265 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35671 { 15265 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35672 { 15265 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35673 { 15265 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35674 { 15265 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35675 { 15265 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35676 { 15265 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35677 { 15265 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35678 { 15265 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35679 { 15265 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35680 { 15265 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35681 { 15265 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35682 { 15265 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35683 { 15265 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35684 { 15265 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35685 { 15265 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35686 { 15265 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35687 { 15265 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35688 { 15265 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35689 { 15265 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35690 { 15265 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35691 { 15265 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35692 { 15265 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35693 { 15265 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35694 { 15265 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35695 { 15265 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35696 { 15265 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35697 { 15272 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35698 { 15272 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
35699 { 15272 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35700 { 15272 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35701 { 15272 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35702 { 15272 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35703 { 15272 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35704 { 15272 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35705 { 15272 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35706 { 15272 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35707 { 15272 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35708 { 15279 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35709 { 15279 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35710 { 15279 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35711 { 15279 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35712 { 15279 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35713 { 15279 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35714 { 15279 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35715 { 15279 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35716 { 15279 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35717 { 15279 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35718 { 15279 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35719 { 15286 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35720 { 15286 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35721 { 15286 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35722 { 15286 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35723 { 15294 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35724 { 15294 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35725 { 15294 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35726 { 15294 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35727 { 15302 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35728 { 15302 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
35729 { 15302 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
35730 { 15302 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
35731 { 15302 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35732 { 15311 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35733 { 15311 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
35734 { 15311 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
35735 { 15311 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
35736 { 15311 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35737 { 15320 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35738 { 15320 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35739 { 15320 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35740 { 15320 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35741 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35742 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35743 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35744 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35745 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35746 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35747 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35748 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35749 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35750 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35751 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35752 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35753 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35754 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35755 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35756 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35757 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35758 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35759 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35760 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35761 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35762 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35763 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35764 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35765 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35766 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35767 { 15320 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35768 { 15330 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35769 { 15330 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35770 { 15330 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35771 { 15330 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35772 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35773 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35774 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35775 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35776 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35777 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35778 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35779 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35780 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35781 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35782 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35783 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35784 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35785 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35786 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35787 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35788 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35789 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35790 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35791 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35792 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35793 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35794 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35795 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35796 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35797 { 15330 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35798 { 15330 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35799 { 15340 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35800 { 15340 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35801 { 15340 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35802 { 15340 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35803 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35804 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35805 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35806 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35807 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35808 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35809 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35810 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35811 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35812 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35813 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35814 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35815 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35816 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35817 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35818 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35819 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35820 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35821 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35822 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35823 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35824 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35825 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35826 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35827 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35828 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35829 { 15340 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35830 { 15350 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35831 { 15350 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35832 { 15350 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35833 { 15350 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35834 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35835 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35836 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35837 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35838 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35839 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35840 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35841 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35842 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35843 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35844 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35845 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35846 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35847 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35848 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35849 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35850 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35851 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35852 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35853 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35854 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35855 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35856 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35857 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35858 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35859 { 15350 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35860 { 15350 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35861 { 15360 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35862 { 15360 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35863 { 15360 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35864 { 15360 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35865 { 15360 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35866 { 15360 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35867 { 15360 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35868 { 15360 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35869 { 15360 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35870 { 15360 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35871 { 15360 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35872 { 15360 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35873 { 15360 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35874 { 15360 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35875 { 15360 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35876 { 15360 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35877 { 15360 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35878 { 15360 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35879 { 15360 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35880 { 15360 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35881 { 15360 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35882 { 15360 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35883 { 15360 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35884 { 15360 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35885 { 15360 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35886 { 15360 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35887 { 15360 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35888 { 15360 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35889 { 15360 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35890 { 15360 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35891 { 15360 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35892 { 15367 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35893 { 15367 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35894 { 15367 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35895 { 15367 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35896 { 15367 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35897 { 15367 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35898 { 15367 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35899 { 15367 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35900 { 15367 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35901 { 15367 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35902 { 15367 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35903 { 15367 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35904 { 15367 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35905 { 15367 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35906 { 15367 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35907 { 15367 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35908 { 15367 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35909 { 15367 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35910 { 15367 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35911 { 15367 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35912 { 15367 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35913 { 15367 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35914 { 15367 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35915 { 15367 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35916 { 15367 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35917 { 15367 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35918 { 15367 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35919 { 15367 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35920 { 15367 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35921 { 15367 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35922 { 15367 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35923 { 15374 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, { }, },
35924 { 15383 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, { }, },
35925 { 15394 /* wait */, X86::WAIT, Convert_NoOperands, 0, { }, },
35926 { 15399 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, { }, },
35927 { 15406 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
35928 { 15406 /* wrfsbase */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
35929 { 15435 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
35930 { 15435 /* wrgsbase */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
35931 { 15464 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, { }, },
35932 { 15470 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, { }, },
35933 { 15477 /* wrssd */, X86::WRSSD, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
35934 { 15483 /* wrssq */, X86::WRSSQ, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
35935 { 15489 /* wrussd */, X86::WRUSSD, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
35936 { 15496 /* wrussq */, X86::WRUSSQ, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
35937 { 15503 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
35938 { 15510 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, { }, },
35939 { 15519 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
35940 { 15519 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
35941 { 15519 /* xadd */, X86::XADD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
35942 { 15519 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
35943 { 15519 /* xadd */, X86::XADD16rm, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
35944 { 15519 /* xadd */, X86::XADD32rm, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
35945 { 15519 /* xadd */, X86::XADD64rm, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
35946 { 15519 /* xadd */, X86::XADD8rm, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
35947 { 15548 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
35948 { 15548 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
35949 { 15555 /* xchg */, X86::XCHG16ar, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
35950 { 15555 /* xchg */, X86::XCHG32ar64, Convert__Reg1_1, Feature_In64BitMode, { MCK_EAX, MCK_GR32_NOAX }, },
35951 { 15555 /* xchg */, X86::XCHG32ar, Convert__Reg1_1, Feature_Not64BitMode, { MCK_EAX, MCK_GR32 }, },
35952 { 15555 /* xchg */, X86::XCHG64ar, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
35953 { 15555 /* xchg */, X86::XCHG32ar64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32_NOAX, MCK_EAX }, },
35954 { 15555 /* xchg */, X86::XCHG16ar, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
35955 { 15555 /* xchg */, X86::XCHG16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
35956 { 15555 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
35957 { 15555 /* xchg */, X86::XCHG32ar, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_EAX }, },
35958 { 15555 /* xchg */, X86::XCHG32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
35959 { 15555 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
35960 { 15555 /* xchg */, X86::XCHG64ar, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
35961 { 15555 /* xchg */, X86::XCHG64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
35962 { 15555 /* xchg */, X86::XCHG64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
35963 { 15555 /* xchg */, X86::XCHG8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
35964 { 15555 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
35965 { 15555 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
35966 { 15555 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
35967 { 15555 /* xchg */, X86::XCHG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
35968 { 15555 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
35969 { 15584 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, { }, },
35970 { 15594 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, { }, },
35971 { 15604 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, { }, },
35972 { 15614 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, { }, },
35973 { 15624 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, { }, },
35974 { 15634 /* xend */, X86::XEND, Convert_NoOperands, 0, { }, },
35975 { 15639 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, { }, },
35976 { 15646 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, { }, },
35977 { 15652 /* xor */, X86::XOR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
35978 { 15652 /* xor */, X86::XOR16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
35979 { 15652 /* xor */, X86::XOR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
35980 { 15652 /* xor */, X86::XOR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
35981 { 15652 /* xor */, X86::XOR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
35982 { 15652 /* xor */, X86::XOR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
35983 { 15652 /* xor */, X86::XOR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
35984 { 15652 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
35985 { 15652 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
35986 { 15652 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
35987 { 15652 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
35988 { 15652 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
35989 { 15652 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
35990 { 15652 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
35991 { 15652 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
35992 { 15652 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
35993 { 15652 /* xor */, X86::XOR64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
35994 { 15652 /* xor */, X86::XOR64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
35995 { 15652 /* xor */, X86::XOR64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
35996 { 15652 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
35997 { 15652 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
35998 { 15652 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
35999 { 15652 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
36000 { 15652 /* xor */, X86::XOR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
36001 { 15652 /* xor */, X86::XOR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
36002 { 15652 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
36003 { 15652 /* xor */, X86::XOR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
36004 { 15652 /* xor */, X86::XOR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
36005 { 15652 /* xor */, X86::XOR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
36006 { 15652 /* xor */, X86::XOR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
36007 { 15652 /* xor */, X86::XOR64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
36008 { 15652 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
36009 { 15652 /* xor */, X86::XOR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
36010 { 15666 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
36011 { 15666 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
36012 { 15672 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
36013 { 15672 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
36014 { 15688 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, { }, },
36015 { 15697 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
36016 { 15704 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36017 { 15713 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
36018 { 15721 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36019 { 15731 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
36020 { 15737 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36021 { 15745 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
36022 { 15752 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36023 { 15761 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
36024 { 15770 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36025 { 15781 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
36026 { 15788 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36027 { 15797 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, { }, },
36028 { 15804 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, { }, },
36029 { 15810 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, { }, },
36030 { 15818 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, { }, },
36031 { 15825 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, { }, },
36032 { 15835 /* xtest */, X86::XTEST, Convert_NoOperands, 0, { }, },
36033};
36034
36035#include "llvm/Support/Debug.h"
36036#include "llvm/Support/Format.h"
36037
36038unsigned X86AsmParser::
36039MatchInstructionImpl(const OperandVector &Operands,
36040 MCInst &Inst,
36041 uint64_t &ErrorInfo,
36042 bool matchingInlineAsm, unsigned VariantID) {
36043 // Eliminate obvious mismatches.
36044 if (Operands.size() > 10) {
36045 ErrorInfo = 10;
36046 return Match_InvalidOperand;
36047 }
36048
36049 // Get the current feature set.
36050 uint64_t AvailableFeatures = getAvailableFeatures();
36051
36052 // Get the instruction mnemonic, which is the first token.
36053 StringRef Mnemonic = ((X86Operand&)*Operands[0]).getToken();
36054
36055 // Process all MnemonicAliases to remap the mnemonic.
36056 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
36057
36058 // Some state to try to produce better error messages.
36059 bool HadMatchOtherThanFeatures = false;
36060 bool HadMatchOtherThanPredicate = false;
36061 unsigned RetCode = Match_InvalidOperand;
36062 uint64_t MissingFeatures = ~0ULL;
36063 // Set ErrorInfo to the operand that mismatches if it is
36064 // wrong for all instances of the instruction.
36065 ErrorInfo = ~0ULL;
36066 // Find the appropriate table for this asm variant.
36067 const MatchEntry *Start, *End;
36068 switch (VariantID) {
36069 default: llvm_unreachable("invalid variant!")::llvm::llvm_unreachable_internal("invalid variant!", "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 36069);
36070 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
36071 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
36072 }
36073 // Search the table.
36074 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
36075
36076 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "AsmMatcher: found " <<
std::distance(MnemonicRange.first, MnemonicRange.second) <<
" encodings with mnemonic '" << Mnemonic << "'\n"
; } } while (false)
36077 std::distance(MnemonicRange.first, MnemonicRange.second) <<do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "AsmMatcher: found " <<
std::distance(MnemonicRange.first, MnemonicRange.second) <<
" encodings with mnemonic '" << Mnemonic << "'\n"
; } } while (false)
36078 " encodings with mnemonic '" << Mnemonic << "'\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "AsmMatcher: found " <<
std::distance(MnemonicRange.first, MnemonicRange.second) <<
" encodings with mnemonic '" << Mnemonic << "'\n"
; } } while (false);
36079
36080 // Return a more specific error code if no mnemonics match.
36081 if (MnemonicRange.first == MnemonicRange.second)
36082 return Match_MnemonicFail;
36083
36084 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
36085 it != ie; ++it) {
36086 bool HasRequiredFeatures =
36087 (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
36088 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Trying to match opcode " <<
MII.getName(it->Opcode) << "\n"; } } while (false)
36089 << MII.getName(it->Opcode) << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Trying to match opcode " <<
MII.getName(it->Opcode) << "\n"; } } while (false);
36090 // equal_range guarantees that instruction mnemonic matches.
36091 assert(Mnemonic == it->getMnemonic())(static_cast <bool> (Mnemonic == it->getMnemonic()) ?
void (0) : __assert_fail ("Mnemonic == it->getMnemonic()"
, "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 36091, __extension__ __PRETTY_FUNCTION__));
36092 bool OperandsValid = true;
36093 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 9; ++FormalIdx) {
36094 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
36095 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " Matching formal operand class "
<< getMatchClassName(Formal) << " against actual operand at index "
<< ActualIdx; } } while (false)
36096 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " Matching formal operand class "
<< getMatchClassName(Formal) << " against actual operand at index "
<< ActualIdx; } } while (false)
36097 << " against actual operand at index " << ActualIdx)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " Matching formal operand class "
<< getMatchClassName(Formal) << " against actual operand at index "
<< ActualIdx; } } while (false);
36098 if (ActualIdx < Operands.size())
36099 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " ("; Operands[ActualIdx]->
print(dbgs()); dbgs() << "): "; } } while (false)
36100 Operands[ActualIdx]->print(dbgs()); dbgs() << "): ")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << " ("; Operands[ActualIdx]->
print(dbgs()); dbgs() << "): "; } } while (false);
36101 else
36102 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << ": "; } } while (false);
36103 if (ActualIdx >= Operands.size()) {
36104 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "actual operand index out of range "
; } } while (false);
36105 OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
36106 if (!OperandsValid) ErrorInfo = ActualIdx;
36107 break;
36108 }
36109 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
36110 unsigned Diag = validateOperandClass(Actual, Formal);
36111 if (Diag == Match_Success) {
36112 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using generic matcher\n"
; } } while (false)
36113 dbgs() << "match success using generic matcher\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using generic matcher\n"
; } } while (false);
36114 ++ActualIdx;
36115 continue;
36116 }
36117 // If the generic handler indicates an invalid operand
36118 // failure, check for a special case.
36119 if (Diag != Match_Success) {
36120 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
36121 if (TargetDiag == Match_Success) {
36122 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using target matcher\n"
; } } while (false)
36123 dbgs() << "match success using target matcher\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "match success using target matcher\n"
; } } while (false);
36124 ++ActualIdx;
36125 continue;
36126 }
36127 // If the target matcher returned a specific error code use
36128 // that, else use the one from the generic matcher.
36129 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
36130 Diag = TargetDiag;
36131 }
36132 // If current formal operand wasn't matched and it is optional
36133 // then try to match next formal operand
36134 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
36135 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "ignoring optional operand\n"
; } } while (false);
36136 continue;
36137 }
36138 // If this operand is broken for all of the instances of this
36139 // mnemonic, keep track of it so we can report loc info.
36140 // If we already had a match that only failed due to a
36141 // target predicate, that diagnostic is preferred.
36142 if (!HadMatchOtherThanPredicate &&
36143 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
36144 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
36145 RetCode = Diag;
36146 ErrorInfo = ActualIdx;
36147 }
36148 // Otherwise, just reject this instance of the mnemonic.
36149 OperandsValid = false;
36150 break;
36151 }
36152
36153 if (!OperandsValid) {
36154 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: multiple "
"operand mismatches, ignoring " "this opcode\n"; } } while (
false)
36155 "operand mismatches, ignoring "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: multiple "
"operand mismatches, ignoring " "this opcode\n"; } } while (
false)
36156 "this opcode\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: multiple "
"operand mismatches, ignoring " "this opcode\n"; } } while (
false);
36157 continue;
36158 }
36159 if (!HasRequiredFeatures) {
36160 HadMatchOtherThanFeatures = true;
36161 uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
36162 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Missing target features: "
<< format_hex(NewMissingFeatures, 18) << "\n"; }
} while (false)
36163 << format_hex(NewMissingFeatures, 18)do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Missing target features: "
<< format_hex(NewMissingFeatures, 18) << "\n"; }
} while (false)
36164 << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Missing target features: "
<< format_hex(NewMissingFeatures, 18) << "\n"; }
} while (false);
36165 if (countPopulation(NewMissingFeatures) <=
36166 countPopulation(MissingFeatures))
36167 MissingFeatures = NewMissingFeatures;
36168 continue;
36169 }
36170
36171 Inst.clear();
36172
36173 Inst.setOpcode(it->Opcode);
36174 // We have a potential match but have not rendered the operands.
36175 // Check the target predicate to handle any context sensitive
36176 // constraints.
36177 // For example, Ties that are referenced multiple times must be
36178 // checked here to ensure the input is the same for each match
36179 // constraints. If we leave it any later the ties will have been
36180 // canonicalized
36181 unsigned MatchResult;
36182 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
36183 Inst.clear();
36184 DEBUG_WITH_TYPE(do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
36185 "asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
36186 dbgs() << "Early target match predicate failed with diag code "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
36187 << MatchResult << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Early target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false);
36188 RetCode = MatchResult;
36189 HadMatchOtherThanPredicate = true;
36190 continue;
36191 }
36192
36193 if (matchingInlineAsm) {
36194 convertToMapAndConstraints(it->ConvertFn, Operands);
36195 return Match_Success;
36196 }
36197
36198 // We have selected a definite instruction, convert the parsed
36199 // operands into the appropriate MCInst.
36200 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
36201
36202 // We have a potential match. Check the target predicate to
36203 // handle any context sensitive constraints.
36204 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
36205 DEBUG_WITH_TYPE("asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
36206 dbgs() << "Target match predicate failed with diag code "do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false)
36207 << MatchResult << "\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Target match predicate failed with diag code "
<< MatchResult << "\n"; } } while (false);
36208 Inst.clear();
36209 RetCode = MatchResult;
36210 HadMatchOtherThanPredicate = true;
36211 continue;
36212 }
36213
36214 DEBUG_WITH_TYPE(do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: complete match, selecting this opcode\n"
; } } while (false)
36215 "asm-matcher",do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: complete match, selecting this opcode\n"
; } } while (false)
36216 dbgs() << "Opcode result: complete match, selecting this opcode\n")do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType
("asm-matcher")) { dbgs() << "Opcode result: complete match, selecting this opcode\n"
; } } while (false);
36217 return Match_Success;
36218 }
36219
36220 // Okay, we had no match. Try to return a useful error code.
36221 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
36222 return RetCode;
36223
36224 // Missing feature matches return which features were missing
36225 ErrorInfo = MissingFeatures;
36226 return Match_MissingFeature;
36227}
36228
36229#endif // GET_MATCHER_IMPLEMENTATION
36230
36231
36232#ifdef GET_MNEMONIC_SPELL_CHECKER
36233#undef GET_MNEMONIC_SPELL_CHECKER
36234
36235static std::string X86MnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
36236 const unsigned MaxEditDist = 2;
36237 std::vector<StringRef> Candidates;
36238 StringRef Prev = "";
36239
36240 // Find the appropriate table for this asm variant.
36241 const MatchEntry *Start, *End;
36242 switch (VariantID) {
36243 default: llvm_unreachable("invalid variant!")::llvm::llvm_unreachable_internal("invalid variant!", "/build/llvm-toolchain-snapshot-6.0~svn321639/build-llvm/lib/Target/X86/X86GenAsmMatcher.inc"
, 36243);
36244 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
36245 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
36246 }
36247
36248 for (auto I = Start; I < End; I++) {
36249 // Ignore unsupported instructions.
36250 if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
36251 continue;
36252
36253 StringRef T = I->getMnemonic();
36254 // Avoid recomputing the edit distance for the same string.
36255 if (T.equals(Prev))
36256 continue;
36257
36258 Prev = T;
36259 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
36260 if (Dist <= MaxEditDist)
36261 Candidates.push_back(T);
36262 }
36263
36264 if (Candidates.empty())
36265 return "";
36266
36267 std::string Res = ", did you mean: ";
36268 unsigned i = 0;
36269 for( ; i < Candidates.size() - 1; i++)
36270 Res += Candidates[i].str() + ", ";
36271 return Res + Candidates[i].str() + "?";
36272}
36273
36274#endif // GET_MNEMONIC_SPELL_CHECKER
36275