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LiveIn lists for MBBs are incorrect #25637

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JonPsson opened this issue Oct 20, 2015 · 4 comments
Closed

LiveIn lists for MBBs are incorrect #25637

JonPsson opened this issue Oct 20, 2015 · 4 comments
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bugzilla Issues migrated from bugzilla clang:codegen IR generation bugs: mangling, exceptions, etc.

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@JonPsson
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Bugzilla Link 25263
Resolution FIXED
Resolved on Jul 12, 2016 13:46
Version trunk
OS Linux
Attachments clang input
CC @compnerd,@hfinkel,@MatzeB

Extended Description

The provided test case shows that the LiveIn lists for some MBB have been filled with long lists of non-live registers. This seems to happen after Control Flow Optimizer, and after If Converter. Target is SystemZ.

Test case provided. It is reduced, but still have two small functions due to inlining results required to reproduce the interesting function.

Run with:
./bin/clang -cc1 -triple s390x-ibm-linux-gnu -S -disable-free -mrelocation-model static -mthread-model posix -fmath-errno -target-cpu z13 -momit-leaf-frame-pointer -v -O3 -funroll-loops -vectorize-loops -vectorize-slp -o c-typeck.reduced.s -x ir c-typeck.reduced.bc -mllvm -print-machineinstrs >& out

The file 'out' will have the printed instructions.
The 'build_function_call' function displays the problem.

In the fragments of the dump below, it is clear that some return-blocks or their fall-through predecessor have very long lists of live-in regs that do not belong there. This is bad because it will make later optimizations more limited - for instance those using LivePhysRegs for liveness tracking.

After Control Flow Optimizer:

BB#114: derived from LLVM BB %cleanup
Live Ins: %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D %F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S %F14S %F15S %R2D %R3D %R2
H %R3H %R2L %R3L %R2Q %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D %F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S %F14S %F15S %R2D
%R2H %R2L %R2Q %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D %F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S %F14S %F15S
Predecessors according to CFG: BB#113 BB#12 BB#10
%R2D = LGRL ga:@global_trees; mem:LD8getelementptr inbounds ([51 x %union.tree_node*], [51 x %union.tree_node*]* @​global_trees, i64 0, i64 0)
Successors according to CFG: BB#115

BB#115: derived from LLVM BB %cleanup
Live Ins: %R2D
Predecessors according to CFG: BB#106 BB#110 BB#108 BB#112 BB#114 BB#109
%R6D, %R15D = LMG %R15D, 248, %R7D, %R8D, %R9D, %R10D, %R11D, %R12D, %R13D, %R14D
Return %R2D

After If Converter:

BB#114:
Live Ins: %R1D %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D %F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S %F14S %F15S %R1D %R1H %R1L %R0Q
Predecessors according to CFG: BB#107 BB#110
%R2D = LGR %R1D
%R6D, %R15D = LMG %R15D, 248, %R7D, %R8D, %R9D, %R10D, %R11D, %R12D, %R13D, %R14D
Return %R2D

@JonPsson
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assigned to @MatzeB

@MatzeB
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MatzeB commented Jul 7, 2016

This is probably caused by the BranchFolder adding all the pristine register as well as all subregisters. I may have accidentally fixed this here: http://reviews.llvm.org/D22027

@MatzeB
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MatzeB commented Jul 7, 2016

I tried confirming my guess that D22027 fixes this, but when I run the (huge) reproducer through llc I don't get any BB#114

@MatzeB
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MatzeB commented Jul 12, 2016

Marking this as fixed now that http://reviews.llvm.org/D22027 has landed in r275201.

I believe it to be fixed even though I cannot reproduce with the original testcase. Please verify and re-open if necessary.

@llvmbot llvmbot transferred this issue from llvm/llvm-bugzilla-archive Dec 10, 2021
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