Extended Description

See win.mir.

It fails with:

$ ./build/bin/llc -verify-machineinstrs win.mir -run-pass prologepilog -mtriple=x86_64-pc-win32-coreclr *[master]

After Prologue/Epilogue Insertion & Frame Finalization

Machine code for function main4k: IsSSA, NoPHIs, TracksLiveness, NoVRegs

Frame Objects:
fi#0: size=4096, align=1, at location [SP-4096]

bb.0.entry:
successors: %bb.3(0x40000000), %bb.1(0x40000000); %bb.3(200.00%), %bb.1(200.00%)

$eax = frame-setup MOV32ri 4096
frame-setup MOV64mr $rsp, 1, $noreg, 8, $noreg, $rcx
frame-setup MOV64mr $rsp, 1, $noreg, 16, $noreg, $rdx
$rcx = frame-setup XOR64rr undef $rcx, undef $rcx, implicit-def $eflags
$rdx = frame-setup MOV64rr $rsp
$rdx = frame-setup SUB64rr $rdx, $rax, implicit-def $eflags
$rdx = frame-setup CMOVB64rr $rdx, $rcx, implicit $eflags
$rcx = frame-setup MOV64rm $noreg, 1, $noreg, 16, $gs
frame-setup CMP64rr $rdx, $rcx, implicit-def $eflags
frame-setup JAE_1 %bb.3, implicit $eflags

bb.1.entry:
; predecessors: %bb.0
successors: %bb.2(0x80000000); %bb.2(200.00%)

$rdx = frame-setup AND64ri32 $rdx, -4096, implicit-def $eflags
frame-setup JMP_1 %bb.2

bb.2.entry:
; predecessors: %bb.1, %bb.2
successors: %bb.3(0x40000000), %bb.2(0x40000000); %bb.3(200.00%), %bb.2(200.00%)

$rcx = frame-setup LEA64r $rcx, 1, $noreg, -4096, $noreg
frame-setup MOV8mi $rcx, 1, $noreg, 0, $noreg, 0
frame-setup CMP64rr $rdx, $rcx, implicit-def $eflags
frame-setup JNE_1 %bb.2, implicit $eflags

bb.3.entry:
; predecessors: %bb.0, %bb.2

$rcx = frame-setup MOV64rm $rsp, 1, $noreg, 8, $noreg
$rdx = frame-setup MOV64rm $rsp, 1, $noreg, 16, $noreg
$rsp = frame-setup SUB64rr $rsp, $rax, implicit-def $eflags
frame-setup SEH_StackAlloc 4096
frame-setup SEH_EndPrologue
$eax = IMPLICIT_DEF
SEH_Epilogue
$rsp = frame-destroy ADD64ri32 $rsp, 4096, implicit-def dead $eflags
RET 0, killed $eax

End machine code for function main4k.

*** Bad machine code: Using an undefined physical register ***

• function: main4k
• basic block: %bb.0 entry (0x7fa418837478)
• instruction: frame-setup MOV64mr $rsp, 1, $noreg, 8, $noreg, $rcx
• operand 5: $rcx

*** Bad machine code: Using an undefined physical register ***

• function: main4k
• basic block: %bb.0 entry (0x7fa418837478)
• instruction: frame-setup MOV64mr $rsp, 1, $noreg, 16, $noreg, $rdx
• operand 5: $rdx

*** Bad machine code: Using an undefined physical register ***

• function: main4k
• basic block: %bb.1 entry (0x7fa4188379a8)
• instruction: $rdx = frame-setup AND64ri32 $rdx, -4096, implicit-def $eflags
• operand 1: $rdx(tied-def 0)

*** Bad machine code: Using an undefined physical register ***

• function: main4k
• basic block: %bb.2 entry (0x7fa418837a70)
• instruction: $rcx = frame-setup LEA64r $rcx, 1, $noreg, -4096, $noreg
• operand 1: $rcx

*** Bad machine code: Using an undefined physical register ***

• function: main4k
• basic block: %bb.2 entry (0x7fa418837a70)
• instruction: frame-setup CMP64rr $rdx, $rcx, implicit-def $eflags
• operand 0: $rdx

*** Bad machine code: Using an undefined physical register ***

• function: main4k
• basic block: %bb.3 entry (0x7fa418837b38)
• instruction: $rsp = frame-setup SUB64rr $rsp, $rax, implicit-def $eflags
• operand 2: $rax
  LLVM ERROR: Found 6 machine code errors.

There are multiple reasons this doesn't work properly:

1. The code always spills RCX and RDX if InProlog == true, which results in an use of undefined phys reg.
2. FinalReg, JoinReg, RoundedReg, SizeReg are not added as live-ins to the basic blocks that use them, therefore they are seen undefined.
3. The basic block (where the stack probe is inlined) is split in two: the original block and the continue block. The liveins and the defs from the original block are not propagated to the continue block when splitting.

For 1), checking if RCX and RDX are part of the MBB's liveins should be enough.
For 2), adding the registers to their MBB's liveins before the usage should be enough.
For 3), I thought of using LivePhysRegs but I seem to be missing something as it breaks somewhere else.