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Incorrect instcombine transform urem -> icmp+zext with vectors #43531

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nunoplopes opened this issue Nov 30, 2019 · 1 comment
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Incorrect instcombine transform urem -> icmp+zext with vectors #43531

nunoplopes opened this issue Nov 30, 2019 · 1 comment
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bugzilla Issues migrated from bugzilla miscompilation

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@nunoplopes
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Bugzilla Link 44186
Resolution FIXED
Resolved on Dec 20, 2019 11:25
Version trunk
OS All
CC @LebedevRI,@RKSimon,@regehr,@rotateright
Fixed by commit(s) af4e599

Extended Description

Testcase from Transforms/InstCombine/vector-urem.ll:

define <4 x i32> @​test_v4i32_one_undef(<4 x i32> %a0) {
%1 = urem <4 x i32> { 1, 1, 1, undef }, %a0
ret <4 x i32> %1
}
=>
define <4 x i32> @​test_v4i32_one_undef(<4 x i32> %a0) {
%1 = icmp ne <4 x i32> %a0, { 1, 1, 1, undef }
%2 = zext <4 x i1> %1 to <4 x i32>
ret <4 x i32> %2
}
Transformation doesn't verify!
ERROR: Value mismatch

Example:
<4 x i32> %a0 = < #x00000010 (16), #x00000001 (1), #x00000400 (1024), #x00000001 (1) >

Source:
<4 x i32> %1 = < #x00000001 (1), #x00000000 (0), #x00000001 (1), #x00000000 (0) >

Target:
<4 x i1> %1 = < #x1 (1), #x0 (0), #x1 (1), #x1 (1) >
<4 x i32> %2 = < #x00000001 (1), #x00000000 (0), #x00000001 (1), #x00000001 (1) >
Source value: < #x00000001 (1), #x00000000 (0), #x00000001 (1), #x00000000 (0) >
Target value: < #x00000001 (1), #x00000000 (0), #x00000001 (1), #x00000001 (1) >

Essentially, "x urem 1" is 0 for any 'x'. However, the optimized code can produce 0 or 1.
I guess the easiest fix is to change undef to 1 in the icmp.

@rotateright
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I guess the easiest fix is to change undef to 1 in the icmp.

Yes, I agree. We have other transforms where we do something similar.
Should be fixed with:
https://reviews.llvm.org/rGaf4e59949cc4

@llvmbot llvmbot transferred this issue from llvm/llvm-bugzilla-archive Dec 10, 2021
This issue was closed.
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