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I'm not sure if there's overlap between this and related rotate bugs, but filing it so we have a reference:
define i32 @src(i32 %shamt) { %r = lshr i32 -1, %shamt %s = sub i32 32, %shamt %l = shl i32 -1, %s %o = or i32 %r, %l ret i32 %o }
define i32 @tgt(i32 %shamt) { ret i32 -1 }
https://alive2.llvm.org/ce/z/gDke_c
We do handle the sibling rotate-of-zero (probably via known bits or simpler folds since all bits are the same in that case).
The text was updated successfully, but these errors were encountered:
Also missing the easier pattern with a funnel shift intrinsic:
define i64 @src(i64 %x) { %r = tail call i64 @llvm.fshl.i64(i64 -1, i64 -1, i64 %x) ret i64 %r }
define i64 @tgt(i64 %x) { ret i64 -1 }
https://alive2.llvm.org/ce/z/GpkFCt
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And we miss the intrinsic case even with zero: https://alive2.llvm.org/ce/z/fjKwqv
The intrinsic patterns should be fixed with: https://reviews.llvm.org/rGd41e308f109e https://reviews.llvm.org/rGdcf659e8219b
Handle the original, non-intrinsic rotate pattern: https://reviews.llvm.org/rG204038d52e03
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Extended Description
I'm not sure if there's overlap between this and related rotate bugs, but filing it so we have a reference:
define i32 @src(i32 %shamt) {
%r = lshr i32 -1, %shamt
%s = sub i32 32, %shamt
%l = shl i32 -1, %s
%o = or i32 %r, %l
ret i32 %o
}
define i32 @tgt(i32 %shamt) {
ret i32 -1
}
https://alive2.llvm.org/ce/z/gDke_c
We do handle the sibling rotate-of-zero (probably via known bits or simpler folds since all bits are the same in that case).
The text was updated successfully, but these errors were encountered: