LLVM Bugzilla is read-only and represents the historical archive of all LLVM issues filled before November 26, 2021. Use github to submit LLVM bugs

Bug 27559 - Generate conjunction or disjunction condition to reduce ISL Ast duplication
Summary: Generate conjunction or disjunction condition to reduce ISL Ast duplication
Status: RESOLVED FIXED
Alias: None
Product: Polly
Classification: Unclassified
Component: isl (show other bugs)
Version: unspecified
Hardware: PC Windows NT
: P normal
Assignee: Polly Development Mailinglist
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2016-04-28 12:10 PDT by Zino
Modified: 2016-06-11 23:31 PDT (History)
2 users (show)

See Also:
Fixed By Commit(s):


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Zino 2016-04-28 12:10:49 PDT
The testcase is a unit test:
test/Isl/CodeGen/pointer-type-pointer-type-comparison.ll

produced Isl AST:

; CHECK: if (Q >= P + 1) {
; CHECK:   for (int c0 = 0; c0 < N; c0 += 1)
; CHECK:     Stmt_store(c0);
; CHECK: } else if (P >= Q + 1)
; CHECK:   for (int c0 = 0; c0 < N; c0 += 1)
; CHECK:     Stmt_store(c0);
; CHECK: }

In some cases the duplication is severe and it end up impacting compile-time and code size (LLVM optimization will not CSE the code).
Comment 1 Tobias Grosser 2016-04-29 00:17:51 PDT
The input schedule tree is rather simple:

domain: "[N, Q, P] -> { Stmt_store[i0] : 0 <= i0 < N and (P > Q or P < Q) }"
child:
  schedule: "[N, Q, P] -> [{ Stmt_store[i0] -> [(i0)] }]"
Comment 2 Tobias Grosser 2016-06-11 23:31:18 PDT
Fixed in r272500.