LLVM Bugzilla is read-only and represents the historical archive of all LLVM issues filled before November 26, 2021. Use github to submit LLVM bugs

Bug 32146 - [Meta] Enable -verify-machineinstrs with EXPENSIVE_CHECKS
Summary: [Meta] Enable -verify-machineinstrs with EXPENSIVE_CHECKS
Status: NEW
Alias: None
Product: libraries
Classification: Unclassified
Component: Common Code Generator Code (show other bugs)
Version: trunk
Hardware: PC All
: P enhancement
Assignee: Unassigned LLVM Bugs
URL:
Keywords:
Depends on: 27458 27460 27483 28295 33037 33045 33049 33111 12416 27456 27461 27479 27480 27481 30999 33046 33047 33048 33050
Blocks:
  Show dependency tree
 
Reported: 2017-03-05 12:05 PST by Florian Hahn
Modified: 2021-08-11 03:14 PDT (History)
10 users (show)

See Also:
Fixed By Commit(s):

Attachments
Add an attachment (proposed patch, testcase, etc.)

Note You need to log in before you can comment on or make changes to this bug.
Description Florian Hahn 2017-03-05 12:05:37 PST 
Adding -verify-machineinstr for EXPENSIVE_CHECKS was suggested in PR30999.

At the moment, the following tests fail:

********************
Testing Time: 475.89s
********************
Failing Tests (241):
    LLVM :: Bindings/Go/go.test
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/combine_vloads.ll
    LLVM :: CodeGen/AMDGPU/kernel-args.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
    LLVM :: CodeGen/AMDGPU/load-global-i16.ll
    LLVM :: CodeGen/AMDGPU/load-global-i8.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/load-local-i16.ll
    LLVM :: CodeGen/AMDGPU/load-local-i8.ll
    LLVM :: CodeGen/AMDGPU/min.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
    LLVM :: CodeGen/AMDGPU/setcc.ll
    LLVM :: CodeGen/AMDGPU/sext-in-reg.ll
    LLVM :: CodeGen/AMDGPU/shl.ll
    LLVM :: CodeGen/AMDGPU/sra.ll
    LLVM :: CodeGen/AMDGPU/store-global.ll
    LLVM :: CodeGen/AMDGPU/store-local.ll
    LLVM :: CodeGen/AMDGPU/store-private.ll
    LLVM :: CodeGen/AMDGPU/sub.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll
    LLVM :: CodeGen/AMDGPU/unknown-processor.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
    LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
    LLVM :: CodeGen/ARM/GlobalISel/arm-irtranslator.ll
    LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
    LLVM :: CodeGen/ARM/execute-only.ll
    LLVM :: CodeGen/ARM/jump-table-tbh.ll
    LLVM :: CodeGen/Generic/llc-start-stop.ll
    LLVM :: CodeGen/Generic/print-machineinstrs.ll
    LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
    LLVM :: CodeGen/Hexagon/expand-vstorerw-undef2.ll
    LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
    LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
    LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
    LLVM :: CodeGen/MSP430/vararg.ll
    LLVM :: CodeGen/Mips/largeimmprinting.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
    LLVM :: CodeGen/Mips/longbranch.ll
    LLVM :: CodeGen/Mips/mips64fpldst.ll
    LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/Mips/return_address.ll
    LLVM :: CodeGen/Mips/select.ll
    LLVM :: CodeGen/Mips/tnaked.ll
    LLVM :: CodeGen/NVPTX/LoadStoreVectorizer.ll
    LLVM :: CodeGen/NVPTX/MachineSink-call.ll
    LLVM :: CodeGen/NVPTX/MachineSink-convergent.ll
    LLVM :: CodeGen/NVPTX/access-non-generic.ll
    LLVM :: CodeGen/NVPTX/addrspacecast.ll
    LLVM :: CodeGen/NVPTX/aggregate-return.ll
    LLVM :: CodeGen/NVPTX/arg-lowering.ll
    LLVM :: CodeGen/NVPTX/arithmetic-fp-sm20.ll
    LLVM :: CodeGen/NVPTX/arithmetic-int.ll
    LLVM :: CodeGen/NVPTX/atomics.ll
    LLVM :: CodeGen/NVPTX/bfe.ll
    LLVM :: CodeGen/NVPTX/branch-fold.ll
    LLVM :: CodeGen/NVPTX/bug17709.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/combine-min-max.ll
    LLVM :: CodeGen/NVPTX/compare-int.ll
    LLVM :: CodeGen/NVPTX/convert-fp.ll
    LLVM :: CodeGen/NVPTX/convert-int-sm20.ll
    LLVM :: CodeGen/NVPTX/ctlz.ll
    LLVM :: CodeGen/NVPTX/ctpop.ll
    LLVM :: CodeGen/NVPTX/cttz.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/div-ri.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/f16-instructions.ll
    LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
    LLVM :: CodeGen/NVPTX/fast-math.ll
    LLVM :: CodeGen/NVPTX/fma-assoc.ll
    LLVM :: CodeGen/NVPTX/fma-disable.ll
    LLVM :: CodeGen/NVPTX/fma.ll
    LLVM :: CodeGen/NVPTX/fp-contract.ll
    LLVM :: CodeGen/NVPTX/fp-literals.ll
    LLVM :: CodeGen/NVPTX/i1-int-to-fp.ll
    LLVM :: CodeGen/NVPTX/i8-param.ll
    LLVM :: CodeGen/NVPTX/idioms.ll
    LLVM :: CodeGen/NVPTX/imad.ll
    LLVM :: CodeGen/NVPTX/implicit-def.ll
    LLVM :: CodeGen/NVPTX/inline-asm.ll
    LLVM :: CodeGen/NVPTX/intrinsic-old.ll
    LLVM :: CodeGen/NVPTX/intrinsics.ll
    LLVM :: CodeGen/NVPTX/isspacep.ll
    LLVM :: CodeGen/NVPTX/ld-addrspace.ll
    LLVM :: CodeGen/NVPTX/ld-generic.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-aggr-copies.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/machine-sink.ll
    LLVM :: CodeGen/NVPTX/math-intrins.ll
    LLVM :: CodeGen/NVPTX/misaligned-vector-ldst.ll
    LLVM :: CodeGen/NVPTX/mulwide.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/param-load-store.ll
    LLVM :: CodeGen/NVPTX/pr16278.ll
    LLVM :: CodeGen/NVPTX/refl1.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/NVPTX/rotate.ll
    LLVM :: CodeGen/NVPTX/sext-params.ll
    LLVM :: CodeGen/NVPTX/shfl.ll
    LLVM :: CodeGen/NVPTX/simple-call.ll
    LLVM :: CodeGen/NVPTX/sqrt-approx.ll
    LLVM :: CodeGen/NVPTX/symbol-naming.ll
    LLVM :: CodeGen/NVPTX/texsurf-queries.ll
    LLVM :: CodeGen/NVPTX/tid-range.ll
    LLVM :: CodeGen/NVPTX/vec-param-load.ll
    LLVM :: CodeGen/NVPTX/vector-args.ll
    LLVM :: CodeGen/NVPTX/vector-call.ll
    LLVM :: CodeGen/NVPTX/weak-global.ll
    LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
    LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
    LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
    LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
    LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
    LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
    LLVM :: CodeGen/PowerPC/Frames-alloca.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/cr_spilling.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/emutls_generic.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc32-pic-large.ll
    LLVM :: CodeGen/PowerPC/ppc32-pic.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/sjlj.ll
    LLVM :: CodeGen/PowerPC/stack-realign.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsel-prom.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/reserved-regs.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/SystemZ/cond-load-01.ll
    LLVM :: CodeGen/SystemZ/stack-guard.ll
    LLVM :: CodeGen/SystemZ/trap-01.ll
    LLVM :: CodeGen/SystemZ/trap-02.ll
    LLVM :: CodeGen/SystemZ/trap-03.ll
    LLVM :: CodeGen/SystemZ/trap-04.ll
    LLVM :: CodeGen/SystemZ/trap-05.ll
    LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
    LLVM :: CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll
    LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/cleanuppad-inalloca.ll
    LLVM :: CodeGen/X86/fast-isel-select-sse.ll
    LLVM :: CodeGen/X86/inalloca-ctor.ll
    LLVM :: CodeGen/X86/inalloca-invoke.ll
    LLVM :: CodeGen/X86/inalloca-regparm.ll
    LLVM :: CodeGen/X86/inalloca-stdcall.ll
    LLVM :: CodeGen/X86/inalloca.ll
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/musttail-indirect.ll
    LLVM :: CodeGen/X86/musttail-thiscall.ll
    LLVM :: CodeGen/X86/rtm.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/shrink-wrap-chkstk.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/sse-intrinsics-fast-isel.ll
    LLVM :: CodeGen/X86/sse-intrinsics-x86.ll
    LLVM :: CodeGen/X86/sse-regcall.ll
    LLVM :: CodeGen/X86/system-intrinsics-64.ll
    LLVM :: CodeGen/X86/system-intrinsics.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
    LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
    LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll

  Expected Passes    : 19171
  Expected Failures  : 144
  Unsupported Tests  : 401
  Unexpected Failures: 241
Comment 1 Florian Hahn 2017-03-05 12:09:25 PST 
I've put up a simple patch to enable -verify-machineinstr for EXPENSIVE_CHECKS: https://reviews.llvm.org/D30625
Comment 2 Simon Dardis 2017-03-05 13:58:48 PST 
Adding previously mentioned bug: PR27458 which notes failing tests for MIPS with the machine verifier enabled.
Comment 3 Matthias Braun 2017-03-17 15:18:44 PDT 
Yep this is the very sad state of affairs. A while ago we did the exercise to cleanup AArch64 and have put a bot running on greendragon which makes sure it stays that way. I would love people pushing to get more targets clean.

Maybe we can add some whitelisting or blacklisting mechanism so we can at least enable it for targets that are clean today?
Comment 4 Simon Pilgrim 2017-03-22 05:02:09 PDT 
Updated list:

Failing Tests (230):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/kernel-args.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
    LLVM :: CodeGen/AMDGPU/load-global-i16.ll
    LLVM :: CodeGen/AMDGPU/load-global-i8.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/load-local-i16.ll
    LLVM :: CodeGen/AMDGPU/load-local-i8.ll
    LLVM :: CodeGen/AMDGPU/min.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
    LLVM :: CodeGen/AMDGPU/setcc.ll
    LLVM :: CodeGen/AMDGPU/shl.ll
    LLVM :: CodeGen/AMDGPU/sra.ll
    LLVM :: CodeGen/AMDGPU/store-global.ll
    LLVM :: CodeGen/AMDGPU/store-private.ll
    LLVM :: CodeGen/AMDGPU/sub.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/unknown-processor.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
    LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
    LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
    LLVM :: CodeGen/ARM/execute-only.ll
    LLVM :: CodeGen/ARM/jump-table-tbh.ll
    LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
    LLVM :: CodeGen/Generic/llc-start-stop.ll
    LLVM :: CodeGen/Generic/print-machineinstrs.ll
    LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
    LLVM :: CodeGen/Hexagon/expand-vstorerw-undef2.ll
    LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
    LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
    LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
    LLVM :: CodeGen/MSP430/vararg.ll
    LLVM :: CodeGen/Mips/largeimmprinting.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
    LLVM :: CodeGen/Mips/longbranch.ll
    LLVM :: CodeGen/Mips/mips64fpldst.ll
    LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/Mips/select.ll
    LLVM :: CodeGen/Mips/tailcall/tailcall.ll
    LLVM :: CodeGen/NVPTX/LoadStoreVectorizer.ll
    LLVM :: CodeGen/NVPTX/MachineSink-call.ll
    LLVM :: CodeGen/NVPTX/MachineSink-convergent.ll
    LLVM :: CodeGen/NVPTX/access-non-generic.ll
    LLVM :: CodeGen/NVPTX/addrspacecast.ll
    LLVM :: CodeGen/NVPTX/aggregate-return.ll
    LLVM :: CodeGen/NVPTX/arg-lowering.ll
    LLVM :: CodeGen/NVPTX/arithmetic-fp-sm20.ll
    LLVM :: CodeGen/NVPTX/arithmetic-int.ll
    LLVM :: CodeGen/NVPTX/atomics.ll
    LLVM :: CodeGen/NVPTX/bfe.ll
    LLVM :: CodeGen/NVPTX/branch-fold.ll
    LLVM :: CodeGen/NVPTX/bug17709.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/combine-min-max.ll
    LLVM :: CodeGen/NVPTX/compare-int.ll
    LLVM :: CodeGen/NVPTX/convert-fp.ll
    LLVM :: CodeGen/NVPTX/convert-int-sm20.ll
    LLVM :: CodeGen/NVPTX/ctlz.ll
    LLVM :: CodeGen/NVPTX/ctpop.ll
    LLVM :: CodeGen/NVPTX/cttz.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/div-ri.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/f16-instructions.ll
    LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
    LLVM :: CodeGen/NVPTX/fast-math.ll
    LLVM :: CodeGen/NVPTX/fma-assoc.ll
    LLVM :: CodeGen/NVPTX/fma-disable.ll
    LLVM :: CodeGen/NVPTX/fma.ll
    LLVM :: CodeGen/NVPTX/fp-contract.ll
    LLVM :: CodeGen/NVPTX/fp-literals.ll
    LLVM :: CodeGen/NVPTX/i1-int-to-fp.ll
    LLVM :: CodeGen/NVPTX/i8-param.ll
    LLVM :: CodeGen/NVPTX/idioms.ll
    LLVM :: CodeGen/NVPTX/imad.ll
    LLVM :: CodeGen/NVPTX/implicit-def.ll
    LLVM :: CodeGen/NVPTX/inline-asm.ll
    LLVM :: CodeGen/NVPTX/intrinsic-old.ll
    LLVM :: CodeGen/NVPTX/intrinsics.ll
    LLVM :: CodeGen/NVPTX/isspacep.ll
    LLVM :: CodeGen/NVPTX/ld-addrspace.ll
    LLVM :: CodeGen/NVPTX/ld-generic.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-aggr-copies.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/machine-sink.ll
    LLVM :: CodeGen/NVPTX/math-intrins.ll
    LLVM :: CodeGen/NVPTX/misaligned-vector-ldst.ll
    LLVM :: CodeGen/NVPTX/mulwide.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/param-load-store.ll
    LLVM :: CodeGen/NVPTX/pr16278.ll
    LLVM :: CodeGen/NVPTX/refl1.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/NVPTX/rotate.ll
    LLVM :: CodeGen/NVPTX/sext-params.ll
    LLVM :: CodeGen/NVPTX/shfl.ll
    LLVM :: CodeGen/NVPTX/simple-call.ll
    LLVM :: CodeGen/NVPTX/sqrt-approx.ll
    LLVM :: CodeGen/NVPTX/symbol-naming.ll
    LLVM :: CodeGen/NVPTX/texsurf-queries.ll
    LLVM :: CodeGen/NVPTX/tid-range.ll
    LLVM :: CodeGen/NVPTX/vec-param-load.ll
    LLVM :: CodeGen/NVPTX/vector-args.ll
    LLVM :: CodeGen/NVPTX/vector-call.ll
    LLVM :: CodeGen/NVPTX/weak-global.ll
    LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
    LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
    LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
    LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
    LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
    LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
    LLVM :: CodeGen/PowerPC/Frames-alloca.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/cr_spilling.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/emutls_generic.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc32-pic-large.ll
    LLVM :: CodeGen/PowerPC/ppc32-pic.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/sjlj.ll
    LLVM :: CodeGen/PowerPC/stack-realign.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsel-prom.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/SystemZ/cond-load-01.ll
    LLVM :: CodeGen/SystemZ/stack-guard.ll
    LLVM :: CodeGen/SystemZ/trap-01.ll
    LLVM :: CodeGen/SystemZ/trap-02.ll
    LLVM :: CodeGen/SystemZ/trap-03.ll
    LLVM :: CodeGen/SystemZ/trap-04.ll
    LLVM :: CodeGen/SystemZ/trap-05.ll
    LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
    LLVM :: CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll
    LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/cleanuppad-inalloca.ll
    LLVM :: CodeGen/X86/fast-isel-select-sse.ll
    LLVM :: CodeGen/X86/inalloca-ctor.ll
    LLVM :: CodeGen/X86/inalloca-invoke.ll
    LLVM :: CodeGen/X86/inalloca-regparm.ll
    LLVM :: CodeGen/X86/inalloca-stdcall.ll
    LLVM :: CodeGen/X86/inalloca.ll
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/musttail-indirect.ll
    LLVM :: CodeGen/X86/musttail-thiscall.ll
    LLVM :: CodeGen/X86/rtm.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/shrink-wrap-chkstk.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
    LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
    LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll

  Expected Passes    : 19172
  Expected Failures  : 182
  Unsupported Tests  : 531
  Unexpected Failures: 230
Comment 5 Simon Pilgrim 2017-05-09 10:19:56 PDT 
Failing Tests (212):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/kernel-args.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
    LLVM :: CodeGen/AMDGPU/load-global-i16.ll
    LLVM :: CodeGen/AMDGPU/load-global-i8.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/load-local-i16.ll
    LLVM :: CodeGen/AMDGPU/load-local-i8.ll
    LLVM :: CodeGen/AMDGPU/min.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
    LLVM :: CodeGen/AMDGPU/setcc.ll
    LLVM :: CodeGen/AMDGPU/shl.ll
    LLVM :: CodeGen/AMDGPU/sra.ll
    LLVM :: CodeGen/AMDGPU/store-global.ll
    LLVM :: CodeGen/AMDGPU/store-private.ll
    LLVM :: CodeGen/AMDGPU/sub.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/unknown-processor.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
    LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
    LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
    LLVM :: CodeGen/ARM/execute-only.ll
    LLVM :: CodeGen/ARM/jump-table-tbh.ll
    LLVM :: CodeGen/ARM/unschedule-first-call.ll
    LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
    LLVM :: CodeGen/Generic/llc-start-stop.ll
    LLVM :: CodeGen/Generic/print-machineinstrs.ll
    LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
    LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
    LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
    LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
    LLVM :: CodeGen/MSP430/vararg.ll
    LLVM :: CodeGen/Mips/largeimmprinting.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
    LLVM :: CodeGen/Mips/longbranch.ll
    LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/Mips/select.ll
    LLVM :: CodeGen/Mips/tailcall/tailcall.ll
    LLVM :: CodeGen/NVPTX/LoadStoreVectorizer.ll
    LLVM :: CodeGen/NVPTX/MachineSink-call.ll
    LLVM :: CodeGen/NVPTX/MachineSink-convergent.ll
    LLVM :: CodeGen/NVPTX/access-non-generic.ll
    LLVM :: CodeGen/NVPTX/addrspacecast.ll
    LLVM :: CodeGen/NVPTX/aggregate-return.ll
    LLVM :: CodeGen/NVPTX/arg-lowering.ll
    LLVM :: CodeGen/NVPTX/arithmetic-fp-sm20.ll
    LLVM :: CodeGen/NVPTX/arithmetic-int.ll
    LLVM :: CodeGen/NVPTX/atomics.ll
    LLVM :: CodeGen/NVPTX/bfe.ll
    LLVM :: CodeGen/NVPTX/branch-fold.ll
    LLVM :: CodeGen/NVPTX/bug17709.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/combine-min-max.ll
    LLVM :: CodeGen/NVPTX/compare-int.ll
    LLVM :: CodeGen/NVPTX/convert-fp.ll
    LLVM :: CodeGen/NVPTX/convert-int-sm20.ll
    LLVM :: CodeGen/NVPTX/ctlz.ll
    LLVM :: CodeGen/NVPTX/ctpop.ll
    LLVM :: CodeGen/NVPTX/cttz.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/div-ri.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/f16-instructions.ll
    LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
    LLVM :: CodeGen/NVPTX/fast-math.ll
    LLVM :: CodeGen/NVPTX/fma-assoc.ll
    LLVM :: CodeGen/NVPTX/fma-disable.ll
    LLVM :: CodeGen/NVPTX/fma.ll
    LLVM :: CodeGen/NVPTX/fp-contract.ll
    LLVM :: CodeGen/NVPTX/fp-literals.ll
    LLVM :: CodeGen/NVPTX/i1-int-to-fp.ll
    LLVM :: CodeGen/NVPTX/i8-param.ll
    LLVM :: CodeGen/NVPTX/idioms.ll
    LLVM :: CodeGen/NVPTX/imad.ll
    LLVM :: CodeGen/NVPTX/implicit-def.ll
    LLVM :: CodeGen/NVPTX/inline-asm.ll
    LLVM :: CodeGen/NVPTX/intrinsic-old.ll
    LLVM :: CodeGen/NVPTX/intrinsics.ll
    LLVM :: CodeGen/NVPTX/isspacep.ll
    LLVM :: CodeGen/NVPTX/ld-addrspace.ll
    LLVM :: CodeGen/NVPTX/ld-generic.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-aggr-copies.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/machine-sink.ll
    LLVM :: CodeGen/NVPTX/math-intrins.ll
    LLVM :: CodeGen/NVPTX/misaligned-vector-ldst.ll
    LLVM :: CodeGen/NVPTX/mulwide.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/param-load-store.ll
    LLVM :: CodeGen/NVPTX/pr16278.ll
    LLVM :: CodeGen/NVPTX/refl1.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/NVPTX/rotate.ll
    LLVM :: CodeGen/NVPTX/sext-params.ll
    LLVM :: CodeGen/NVPTX/shfl.ll
    LLVM :: CodeGen/NVPTX/simple-call.ll
    LLVM :: CodeGen/NVPTX/sqrt-approx.ll
    LLVM :: CodeGen/NVPTX/symbol-naming.ll
    LLVM :: CodeGen/NVPTX/texsurf-queries.ll
    LLVM :: CodeGen/NVPTX/tid-range.ll
    LLVM :: CodeGen/NVPTX/vec-param-load.ll
    LLVM :: CodeGen/NVPTX/vector-args.ll
    LLVM :: CodeGen/NVPTX/vector-call.ll
    LLVM :: CodeGen/NVPTX/weak-global.ll
    LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
    LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
    LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
    LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
    LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
    LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
    LLVM :: CodeGen/PowerPC/Frames-alloca.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/sjlj.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/SystemZ/stack-guard.ll
    LLVM :: CodeGen/SystemZ/trap-01.ll
    LLVM :: CodeGen/SystemZ/trap-02.ll
    LLVM :: CodeGen/SystemZ/trap-03.ll
    LLVM :: CodeGen/SystemZ/trap-04.ll
    LLVM :: CodeGen/SystemZ/trap-05.ll
    LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
    LLVM :: CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll
    LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/rtm.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
    LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
    LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll
Comment 6 Simon Pilgrim 2017-05-12 13:23:57 PDT 
Failing Tests (166):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/kernel-args.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
    LLVM :: CodeGen/AMDGPU/load-global-i16.ll
    LLVM :: CodeGen/AMDGPU/load-global-i8.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/load-local-i16.ll
    LLVM :: CodeGen/AMDGPU/load-local-i8.ll
    LLVM :: CodeGen/AMDGPU/min.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
    LLVM :: CodeGen/AMDGPU/setcc.ll
    LLVM :: CodeGen/AMDGPU/shl.ll
    LLVM :: CodeGen/AMDGPU/sra.ll
    LLVM :: CodeGen/AMDGPU/store-global.ll
    LLVM :: CodeGen/AMDGPU/store-private.ll
    LLVM :: CodeGen/AMDGPU/sub.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/unknown-processor.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
    LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
    LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
    LLVM :: CodeGen/ARM/execute-only.ll
    LLVM :: CodeGen/ARM/jump-table-tbh.ll
    LLVM :: CodeGen/ARM/unschedule-first-call.ll
    LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
    LLVM :: CodeGen/Generic/llc-start-stop.ll
    LLVM :: CodeGen/Generic/print-machineinstrs.ll
    LLVM :: CodeGen/Hexagon/eliminate-pred-spill.ll
    LLVM :: CodeGen/Hexagon/reg-scavengebug-3.ll
    LLVM :: CodeGen/Hexagon/reg-scavenger-valid-slot.ll
    LLVM :: CodeGen/Hexagon/vec-pred-spill1.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/masking_setccs.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
    LLVM :: CodeGen/MSP430/vararg.ll
    LLVM :: CodeGen/Mips/largeimmprinting.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
    LLVM :: CodeGen/Mips/longbranch.ll
    LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/Mips/select.ll
    LLVM :: CodeGen/Mips/tailcall/tailcall.ll
    LLVM :: CodeGen/NVPTX/access-non-generic.ll
    LLVM :: CodeGen/NVPTX/aggregate-return.ll
    LLVM :: CodeGen/NVPTX/branch-fold.ll
    LLVM :: CodeGen/NVPTX/bug17709.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/f16-instructions.ll
    LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
    LLVM :: CodeGen/NVPTX/fma.ll
    LLVM :: CodeGen/NVPTX/i8-param.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/param-load-store.ll
    LLVM :: CodeGen/NVPTX/refl1.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/NVPTX/simple-call.ll
    LLVM :: CodeGen/NVPTX/symbol-naming.ll
    LLVM :: CodeGen/NVPTX/vector-call.ll
    LLVM :: CodeGen/NVPTX/zeroext-32bit.ll
    LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
    LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
    LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
    LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
    LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
    LLVM :: CodeGen/PowerPC/Frames-alloca.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/sjlj.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/SystemZ/stack-guard.ll
    LLVM :: CodeGen/SystemZ/trap-01.ll
    LLVM :: CodeGen/SystemZ/trap-02.ll
    LLVM :: CodeGen/SystemZ/trap-03.ll
    LLVM :: CodeGen/SystemZ/trap-04.ll
    LLVM :: CodeGen/SystemZ/trap-05.ll
    LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
    LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
    LLVM :: CodeGen/X86/O0-pipeline.ll
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/rtm.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
    LLVM :: Transforms/NaryReassociate/NVPTX/nary-slsr.ll
    LLVM :: Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
    LLVM :: Transforms/StraightLineStrengthReduce/NVPTX/speculative-slsr.ll
Comment 7 Simon Pilgrim 2017-05-22 13:42:02 PDT 
Failing Tests (148):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/kernel-args.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i16.ll
    LLVM :: CodeGen/AMDGPU/load-constant-i8.ll
    LLVM :: CodeGen/AMDGPU/load-global-i16.ll
    LLVM :: CodeGen/AMDGPU/load-global-i8.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/load-local-i16.ll
    LLVM :: CodeGen/AMDGPU/load-local-i8.ll
    LLVM :: CodeGen/AMDGPU/min.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/parallelandifcollapse.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.bitcast.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
    LLVM :: CodeGen/AMDGPU/setcc.ll
    LLVM :: CodeGen/AMDGPU/shl.ll
    LLVM :: CodeGen/AMDGPU/sra.ll
    LLVM :: CodeGen/AMDGPU/store-global.ll
    LLVM :: CodeGen/AMDGPU/store-private.ll
    LLVM :: CodeGen/AMDGPU/sub.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/unknown-processor.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/ARM/2011-04-11-MachineLICMBug.ll
    LLVM :: CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
    LLVM :: CodeGen/ARM/GlobalISel/arm-irtranslator.ll
    LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
    LLVM :: CodeGen/ARM/execute-only.ll
    LLVM :: CodeGen/ARM/jump-table-tbh.ll
    LLVM :: CodeGen/ARM/unschedule-first-call.ll
    LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
    LLVM :: CodeGen/Generic/llc-start-stop.ll
    LLVM :: CodeGen/Generic/print-machineinstrs.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/masking_setccs.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
    LLVM :: CodeGen/MSP430/vararg.ll
    LLVM :: CodeGen/Mips/largeimmprinting.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
    LLVM :: CodeGen/Mips/longbranch.ll
    LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/Mips/select.ll
    LLVM :: CodeGen/Mips/tailcall/tailcall.ll
    LLVM :: CodeGen/NVPTX/branch-fold.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
    LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
    LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
    LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
    LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
    LLVM :: CodeGen/PowerPC/Frames-alloca.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics-indexed.ll
    LLVM :: CodeGen/PowerPC/atomics-regression.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/pr30451.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/sjlj.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/SystemZ/stack-guard.ll
    LLVM :: CodeGen/SystemZ/trap-01.ll
    LLVM :: CodeGen/SystemZ/trap-02.ll
    LLVM :: CodeGen/SystemZ/trap-03.ll
    LLVM :: CodeGen/SystemZ/trap-04.ll
    LLVM :: CodeGen/SystemZ/trap-05.ll
    LLVM :: CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll
    LLVM :: CodeGen/Thumb2/thumb2-ifcvt1.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
    LLVM :: CodeGen/X86/O0-pipeline.ll
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
Comment 8 Simon Pilgrim 2017-05-30 13:48:36 PDT 
Failing Tests (127):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/llvm.r600.group.barrier.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/r600.work-item-intrinsics.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/ARM/GlobalISel/arm-irtranslator.ll
    LLVM :: CodeGen/ARM/arm-position-independence-jump-table.ll
    LLVM :: CodeGen/ARM/constant-island-crash.ll
    LLVM :: CodeGen/ARM/jump-table-tbh.ll
    LLVM :: CodeGen/ARM/unschedule-first-call.ll
    LLVM :: CodeGen/ARM/v6-jumptable-clobber.mir
    LLVM :: CodeGen/Generic/llc-start-stop.ll
    LLVM :: CodeGen/Generic/print-machineinstrs.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/masking_setccs.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/Generic/multiRunPass.mir
    LLVM :: CodeGen/Mips/largeimmprinting.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-dbl.ll
    LLVM :: CodeGen/Mips/llvm-ir/select-flt.ll
    LLVM :: CodeGen/Mips/longbranch.ll
    LLVM :: CodeGen/Mips/msa/f16-llvm-ir.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/Mips/select.ll
    LLVM :: CodeGen/Mips/tailcall/tailcall.ll
    LLVM :: CodeGen/NVPTX/branch-fold.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
    LLVM :: CodeGen/PowerPC/2007-11-16-landingpad-split.ll
    LLVM :: CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
    LLVM :: CodeGen/PowerPC/2012-10-11-dynalloc.ll
    LLVM :: CodeGen/PowerPC/2016-04-28-setjmp.ll
    LLVM :: CodeGen/PowerPC/Frames-alloca.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics-constant.ll
    LLVM :: CodeGen/PowerPC/atomics-indexed.ll
    LLVM :: CodeGen/PowerPC/atomics-regression.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/dyn-alloca-offset.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/pr30451.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/sjlj.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/SystemZ/trap-01.ll
    LLVM :: CodeGen/SystemZ/trap-02.ll
    LLVM :: CodeGen/SystemZ/trap-03.ll
    LLVM :: CodeGen/SystemZ/trap-04.ll
    LLVM :: CodeGen/SystemZ/trap-05.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbb.ll
    LLVM :: CodeGen/Thumb2/thumb2-tbh.ll
    LLVM :: CodeGen/X86/O0-pipeline.ll
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-complex.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg-piece.mir
    LLVM :: DebugInfo/MIR/ARM/split-superreg.mir
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
    LLVM :: DebugInfo/MIR/X86/empty-inline.mir
Comment 9 Matthias Braun 2017-05-30 14:54:14 PDT 
I just proposed a "pragmatic" way forward where we would fix targets one by one and indicate clean/broken by a targetmachine callback: https://reviews.llvm.org/D33696
Comment 10 Diana Picus 2017-06-05 06:33:20 PDT 
Fixed CodeGen/ARM/GlobalISel/arm-irtranslator.ll in r304712. Sorry I didn't notice this sooner!
Comment 11 Florian Hahn 2017-06-26 03:48:00 PDT 
I just put https://reviews.llvm.org/D34610 up for review, which should fix all remaining failures on ARM except 
  CodeGen/ARM/unschedule-first-call.ll
Comment 12 Francis Visoiu Mistrih 2018-07-11 08:05:49 PDT 
Update:

Failing Tests (114):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/Generic/zero-probability.mir
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/masking_setccs.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/MIR/X86/diexpr-win32.mir
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/read-global-variable-constant.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsel-prom.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xray-ret-is-terminator.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: CodeGen/SPARC/sjlj.ll
    LLVM :: CodeGen/X86/O0-pipeline.ll
    LLVM :: CodeGen/X86/O3-pipeline.ll
    LLVM :: CodeGen/X86/PR37310.mir
    LLVM :: CodeGen/X86/avx512-regcall-NoMask.ll
    LLVM :: CodeGen/X86/branch_instruction_and_target_split_perf_nops.mir
    LLVM :: CodeGen/X86/branchfolding-undef.mir
    LLVM :: CodeGen/X86/fentry-insertion.ll
    LLVM :: CodeGen/X86/icall-branch-funnel.ll
    LLVM :: CodeGen/X86/indirect-branch-tracking.ll
    LLVM :: CodeGen/X86/local_stack_symbol_ordering.ll
    LLVM :: CodeGen/X86/machine-outliner-disubprogram.ll
    LLVM :: CodeGen/X86/machine-outliner-tailcalls.ll
    LLVM :: CodeGen/X86/patchable-prologue.ll
    LLVM :: CodeGen/X86/retpoline-regparm.ll
    LLVM :: CodeGen/X86/retpoline.ll
    LLVM :: CodeGen/X86/scheduler-backtracking.ll
    LLVM :: CodeGen/X86/shadow-stack.ll
    LLVM :: CodeGen/X86/sibcall-2.ll
    LLVM :: CodeGen/X86/sibcall.ll
    LLVM :: CodeGen/X86/sjlj-eh.ll
    LLVM :: CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll
    LLVM :: CodeGen/X86/sse-intrinsics-fast-isel.ll
    LLVM :: CodeGen/X86/sse2-intrinsics-fast-isel-x86_64.ll
    LLVM :: CodeGen/X86/sse2-intrinsics-fast-isel.ll
    LLVM :: CodeGen/X86/sse42-intrinsics-fast-isel.ll
    LLVM :: CodeGen/X86/sse42-intrinsics-x86.ll
    LLVM :: CodeGen/X86/sttni.ll
    LLVM :: CodeGen/X86/win_coreclr_chkstk.ll
    LLVM :: CodeGen/X86/xray-attribute-instrumentation.ll
    LLVM :: CodeGen/X86/xray-custom-log.ll
    LLVM :: CodeGen/X86/xray-log-args.ll
    LLVM :: CodeGen/X86/xray-loop-detection.ll
    LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir
    LLVM :: CodeGen/X86/xray-section-group.ll
    LLVM :: CodeGen/X86/xray-selective-instrumentation.ll
    LLVM :: CodeGen/X86/xray-tail-call-sled.ll
    LLVM :: CodeGen/X86/xray-typed-event-log.ll
    LLVM :: DebugInfo/Generic/linear-dbg-value.ll
    LLVM :: DebugInfo/MIR/X86/bit-piece-dh.mir
    LLVM :: DebugInfo/MIR/X86/empty-inline.mir
    LLVM :: DebugInfo/NVPTX/dbg-declare-alloca.ll
    LLVM :: DebugInfo/X86/live-debug-vars-discard-invalid.mir
Comment 13 Reid Kleckner 2018-10-23 17:27:42 PDT 
Given that tons of tests already enable the machine verifier, why don't we flip the default, at least for llc, our testing tool of choice?

Consider:
$ git grep -l '[-]verify-machine' ../llvm/test/ | wc -l
2862

If we flip the default, we can explicitly mark the remaining llc tests as verifier unclean, and target maintainers have additional incentive to make standard codegen patterns verifier-clean.

Is the verifier really so slow that it has to be behind EXPENSIVE_CHECKS?
Comment 14 Matthias Braun 2018-10-23 17:46:34 PDT 
I would be fine with enabling verify machineinstrs in debug builds for llc by default.
I think there are some projects out there that use llc as a code generator which may feed large inputs to it, but to my knowledge that was never the intended use case for llc and we don't/shouldn't think about it and it will only affect release versions anyway.
Comment 15 Simon Pilgrim 2018-10-24 01:24:20 PDT 
(In reply to Matthias Braun from comment #14)
> I would be fine with enabling verify machineinstrs in debug builds for llc
> by default.

Do we have debug build bot coverage or would we be relying on developer's local debug builds to recognise/fix test failures?
Comment 16 Matthias Braun 2018-10-24 09:01:49 PDT 
(In reply to Simon Pilgrim from comment #15)
> (In reply to Matthias Braun from comment #14)
> > I would be fine with enabling verify machineinstrs in debug builds for llc
> > by default.
> 
> Do we have debug build bot coverage or would we be relying on developer's
> local debug builds to recognise/fix test failures?

We do have bots like http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-expensive/ that build with expensive checks enabled and run `ninja check`. However that is a pretty late signal after someone committed something. It would be better not to require people to be actively aware that verify-machineinstrs is a thing they should use for their personal testing...
Comment 17 Reid Kleckner 2018-10-24 09:53:06 PDT 
We have plenty of bots that build with assertions enabled (-DLLVM_ENABLE_ASSERTIONS=ON) that would catch these issues. This approach has mostly worked well for clang. In !NDEBUG builds, we run the IR verifier after IR gen and after each pass, and that usually catches invalid IR generated by clang.
Comment 18 Simon Pilgrim 2018-11-02 12:01:26 PDT 
Failing Tests (81):
    LLVM :: CodeGen/AMDGPU/amdgpu.private-memory.ll
    LLVM :: CodeGen/AMDGPU/big_alu.ll
    LLVM :: CodeGen/AMDGPU/literals.ll
    LLVM :: CodeGen/AMDGPU/load-input-fold.ll
    LLVM :: CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
    LLVM :: CodeGen/AMDGPU/private-memory-r600.ll
    LLVM :: CodeGen/AMDGPU/pv-packing.ll
    LLVM :: CodeGen/AMDGPU/pv.ll
    LLVM :: CodeGen/AMDGPU/r600.private-memory.ll
    LLVM :: CodeGen/AMDGPU/swizzle-export.ll
    LLVM :: CodeGen/AMDGPU/vector-alloca.ll
    LLVM :: CodeGen/Lanai/codemodel.ll
    LLVM :: CodeGen/Lanai/comparisons_i32.ll
    LLVM :: CodeGen/Lanai/comparisons_i64.ll
    LLVM :: CodeGen/Lanai/constant_multiply.ll
    LLVM :: CodeGen/Lanai/delay_filler.ll
    LLVM :: CodeGen/Lanai/i32.ll
    LLVM :: CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    LLVM :: CodeGen/Lanai/lshift64.ll
    LLVM :: CodeGen/Lanai/masking_setccs.ll
    LLVM :: CodeGen/Lanai/mem_alu_combiner.ll
    LLVM :: CodeGen/Lanai/multiply.ll
    LLVM :: CodeGen/Lanai/rshift64.ll
    LLVM :: CodeGen/Lanai/select.ll
    LLVM :: CodeGen/Lanai/set_and_hi.ll
    LLVM :: CodeGen/Lanai/shift.ll
    LLVM :: CodeGen/Lanai/stack-frame.ll
    LLVM :: CodeGen/Lanai/sub-cmp-peephole.ll
    LLVM :: CodeGen/Lanai/subword.ll
    LLVM :: CodeGen/Mips/longbranch/long-branch-expansion-3.ll
    LLVM :: CodeGen/Mips/no-odd-spreg-msa.ll
    LLVM :: CodeGen/NVPTX/bug26185-2.ll
    LLVM :: CodeGen/NVPTX/bug26185.ll
    LLVM :: CodeGen/NVPTX/call-with-alloca-buffer.ll
    LLVM :: CodeGen/NVPTX/disable-opt.ll
    LLVM :: CodeGen/NVPTX/envreg.ll
    LLVM :: CodeGen/NVPTX/ldg-invariant.ll
    LLVM :: CodeGen/NVPTX/ldu-i8.ll
    LLVM :: CodeGen/NVPTX/ldu-ldg.ll
    LLVM :: CodeGen/NVPTX/ldu-reg-plus-offset.ll
    LLVM :: CodeGen/NVPTX/load-with-non-coherent-cache.ll
    LLVM :: CodeGen/NVPTX/local-stack-frame.ll
    LLVM :: CodeGen/NVPTX/lower-alloca.ll
    LLVM :: CodeGen/NVPTX/param-align.ll
    LLVM :: CodeGen/NVPTX/read-global-variable-constant.ll
    LLVM :: CodeGen/NVPTX/reg-copy.ll
    LLVM :: CodeGen/NVPTX/reg-types.ll
    LLVM :: CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
    LLVM :: CodeGen/PowerPC/aantidep-inline-asm-use.ll
    LLVM :: CodeGen/PowerPC/atomic-2.ll
    LLVM :: CodeGen/PowerPC/atomic-minmax.ll
    LLVM :: CodeGen/PowerPC/atomics.ll
    LLVM :: CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
    LLVM :: CodeGen/PowerPC/cr-spills.ll
    LLVM :: CodeGen/PowerPC/ctr-cleanup.ll
    LLVM :: CodeGen/PowerPC/ctrloop-large-ec.ll
    LLVM :: CodeGen/PowerPC/ctrloop-udivti3.ll
    LLVM :: CodeGen/PowerPC/early-ret2.ll
    LLVM :: CodeGen/PowerPC/fast-isel-fcmp-nan.ll
    LLVM :: CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
    LLVM :: CodeGen/PowerPC/merge-st-chain-op.ll
    LLVM :: CodeGen/PowerPC/negctr.ll
    LLVM :: CodeGen/PowerPC/ppc-shrink-wrapping.ll
    LLVM :: CodeGen/PowerPC/ppc-vaarg-agg.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc-crash.ll
    LLVM :: CodeGen/PowerPC/ppc64-anyregcc.ll
    LLVM :: CodeGen/PowerPC/ppc64-patchpoint.ll
    LLVM :: CodeGen/PowerPC/ppc64-stackmap.ll
    LLVM :: CodeGen/PowerPC/pr16556.ll
    LLVM :: CodeGen/PowerPC/pr25157-peephole.ll
    LLVM :: CodeGen/PowerPC/pr25157.ll
    LLVM :: CodeGen/PowerPC/pr26180.ll
    LLVM :: CodeGen/PowerPC/sj-ctr-loop.ll
    LLVM :: CodeGen/PowerPC/stwux.ll
    LLVM :: CodeGen/PowerPC/vsel-prom.ll
    LLVM :: CodeGen/PowerPC/vsx-fma-mutate-undef.ll
    LLVM :: CodeGen/PowerPC/vsx-self-copy.ll
    LLVM :: CodeGen/PowerPC/xray-ret-is-terminator.ll
    LLVM :: CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
    LLVM :: DebugInfo/NVPTX/dbg-declare-alloca.ll
    LLVM :: DebugInfo/NVPTX/dbg-value-const-byref.ll
Comment 19 Shivam Gupta 2021-08-10 09:17:30 PDT 
Seems this issue is fixed?. I run `make check-llvm` after building LLVM with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON and didn't get any Unexpected Failures.

Testing Time: 1163.15s
  Unsupported      :   768
  Passed           : 44072
  Expectedly Failed:   160
[100%] Built target check-llvm
Comment 20 Matthias Braun 2021-08-10 09:47:56 PDT 
> Seems this issue is fixed?. I run `make check-llvm` after building LLVM with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON and didn't get any Unexpected Failures.

- We also have buildbots that run `-DLLVM_ENABLE_EXPENSIVE_CHECKS=ON` regularily.
- This bug is about enabling additional checks when `LLVM_ENABLE_EXPENSIVE_CHECKS` is enabled. Which wasn't possible because not all targets pass those checks cleanly.
- Anyway this has been kinda solved with https://reviews.llvm.org/D33696 which allows targets to opt-in to the extra checks. This bug has become an umbrella for all the targets that did not managed to enable `isMachineVerifierClean()`.
Comment 21 Matthias Braun 2021-08-10 09:51:58 PDT 
For the record, targets that currently opt-out of the verify-machineinstrs checks:
```
[matthiasb@devvm2948] ~/dev/llvm/lib/Target > grep "isMachineVerifierClean" * -r
AMDGPU/AMDGPUTargetMachine.h:  bool isMachineVerifierClean() const override {
AVR/AVRTargetMachine.h:  bool isMachineVerifierClean() const override {
Lanai/LanaiTargetMachine.h:  bool isMachineVerifierClean() const override {
NVPTX/NVPTXTargetMachine.h:  bool isMachineVerifierClean() const override {
VE/VETargetMachine.h:  bool isMachineVerifierClean() const override { return false; }
```
Comment 22 Simon Pilgrim 2021-08-11 03:14:09 PDT 
I've renamed this to make it clear that this is the meta ticket for the various verifier issues that we've been trying to ignore.

This ticket has a long way to go IMO, its not just removing the isMachineVerifierClean() overrides (and then isMachineVerifierClean() itself).

We have a load of tests that were hacked with "-verify-machineinstrs=0" to let us ignore the verifier errors in conjunction with isMachineVerifierClean, all of which need fixing once and for all.

On top of that, it you look inside this bug's dependencies (even the resolved ones....) you'll find a huge number of unresolved verifier issues on most targets.