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Bug 33057 - Regalloc basic asserts with "Interference after spill."
Summary: Regalloc basic asserts with "Interference after spill."
Status: RESOLVED FIXED
Alias: None
Product: libraries
Classification: Unclassified
Component: Register Allocator (show other bugs)
Version: trunk
Hardware: PC Linux
: P enhancement
Assignee: Unassigned LLVM Bugs
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2017-05-16 06:44 PDT by Jonas Paulsson
Modified: 2017-06-02 15:44 PDT (History)
3 users (show)

See Also:
Fixed By Commit(s):


Attachments
reduced testcase (2.01 KB, text/plain)
2017-05-16 06:44 PDT, Jonas Paulsson
Details
Possible fix (2.54 KB, patch)
2017-05-31 15:41 PDT, Quentin Colombet
Details

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Description Jonas Paulsson 2017-05-16 06:44:44 PDT
Created attachment 18450 [details]
reduced testcase

llc -mtriple=s390x-linux-gnu -mcpu=z13 -disable-cgp -disable-machine-dce -regalloc=basic  -o /dev/null ./tc_regallocbasic.ll 

llc: llvm/lib/CodeGen/RegAllocBasic.cpp:253: virtual unsigned int {anonymous}::RABasic::selectOrSplit(llvm::LiveInterval&, llvm::SmallVectorImpl<unsigned int>&): Assertion `!Matrix->checkInterference(VirtReg, *PhysRegI) && "Interference after spill."' failed.
Comment 1 Quentin Colombet 2017-05-31 15:10:20 PDT
Looking at the regalloc dump I see this:
selectOrSplit GR64Bit:%vreg123 [1944r,1952r:0)  0@1944r w=INF
spilling R1D interferences with %vreg123 [1944r,1952r:0)  0@1944r
unassigning %vreg96 from %R1L: R1L
Inline spilling GR32Bit:%vreg96 EMPTY

Thus, vreg123 interferes with vreg96. However, vreg96 is an empty live-range so it shouldn't interfere to being with. Going pass this shock, the fact that vreg96 is empty implies that the liveregmatrix does not need to update anything when unassigning it. Therefore the interference stays and boom!

The bottom line is why this vreg96 live-range didn't get removed from the liveregmatrix.
Comment 2 Quentin Colombet 2017-05-31 15:21:40 PDT
I found it suspicious that RABasic is not a delegate of LiveRangeEdit.
Let me see if that's problem.
Comment 3 Quentin Colombet 2017-05-31 15:41:28 PDT
Created attachment 18552 [details]
Possible fix

Yes, that's a problem.
Attached a quick patch to fix it.

The proper way to fix that is IMHO to do that in the base class so that we don't duplicate the code between RABasic and RAGreedy.
Comment 4 Quentin Colombet 2017-05-31 16:50:39 PDT
One problem with the proposed fix is that it changes the behavior of the basic allocator. Now, each time a register live-range is shrunk, the live-range is re-queued for assignment.

Previously we would shrink the live-range but not give back the register for the holes we created.
This means two things:
- Compile time overhead: More live-range will be processed
- Regalloc choices diffs

I am guessing that's not too concerning.
With the current LiveRegMatrix API, to preserve the behavior, we would need to do something like:
1. unassign the live-range to X
2. shrink the live-range
3. reassign the shrunk live-ranges to X

Right now, we cannot do #3 because of:
A. the lack of call back (fixable)
B. the coupling/state will would introduce between 1, 2 and 3

Because of #B, I don't think we should try to fix that.
Comment 5 Jonas Paulsson 2017-06-01 00:59:34 PDT
It seems all good to me, but I think someone with more insight should be the reviewer.
Comment 6 Quentin Colombet 2017-06-01 10:05:30 PDT
(In reply to Jonas Paulsson from comment #5)
> It seems all good to me, but I think someone with more insight should be the
> reviewer.

Don't worry, I'll commit shortly, I need to clean-up the test case. (Producing the mir and adding check lines.)
Comment 7 Quentin Colombet 2017-06-02 15:44:48 PDT
Fixed in r304603.