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Bug 43056 - Assertion failure in AArch64 backend: "Detected cycle in SelectionDAG"
Summary: Assertion failure in AArch64 backend: "Detected cycle in SelectionDAG"
Status: RESOLVED FIXED
Alias: None
Product: libraries
Classification: Unclassified
Component: Backend: AArch64 (show other bugs)
Version: trunk
Hardware: PC Linux
: P enhancement
Assignee: Tim Northover
URL:
Keywords:
Depends on:
Blocks: release-9.0.0
  Show dependency tree
 
Reported: 2019-08-19 19:24 PDT by Tom Stellard
Modified: 2019-08-27 07:31 PDT (History)
6 users (show)

See Also:
Fixed By Commit(s):


Attachments
Original Test Case (59.66 KB, text/plain)
2019-08-19 19:24 PDT, Tom Stellard
Details
Reduced test case (2.12 KB, text/plain)
2019-08-19 19:24 PDT, Tom Stellard
Details

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Description Tom Stellard 2019-08-19 19:24:24 PDT
Created attachment 22397 [details]
Original Test Case

Reproduce with:

llc -march=aarch64 -mcpu=thunderxt88 < aarch64-sdag-cycle-reduced.ll

Full error message:

Detected cycle in SelectionDAG
Offending node:
t659: v4f32,i64,ch = AArch64ISD::LD1DUPpost<(load 4 from %ir.96)> t489, t460, t120
  t460: i64,ch = load<(load 8 from %ir."&context.constants_ptr[]7")> t456, t2, undef:i64
    t2: i64,ch = CopyFromReg t0, Register:i64 %7
      t1: i64 = Register %7
    t11: i64 = undef
  t120: i64 = shl t118, Constant:i64<2>
    t118: i64 = sign_extend t117
      t117: i32 = extract_vector_elt t589, Constant:i64<0>
        t589: v4i32 = and t584, t587
          t584: v4i32 = AArch64ISD::VSHL t407, Constant:i32<2>
            t407: v4i32 = add t582, t655
              t582: v4i32 = AArch64ISD::VSHL t96, Constant:i32<1>
                t96: v4i32 = bitcast t659
                  t659: v4f32,i64,ch = AArch64ISD::LD1DUPpost<(load 4 from %ir.96)> t489, t460, t120


                t124: i32 = Constant<1>
              t655: v4i32 = AArch64ISD::MOVIshift Constant:i32<3>, Constant:i32<0>
                t106: i32 = Constant<3>
                t19: i32 = Constant<0>
            t97: i32 = Constant<2>
          t587: v4i32 = xor t583, t586
            t583: v4i32 = AArch64ISD::CMHS t407, t647
              t407: v4i32 = add t582, t655
                t582: v4i32 = AArch64ISD::VSHL t96, Constant:i32<1>
                  t96: v4i32 = bitcast t659

                  t124: i32 = Constant<1>
                t655: v4i32 = AArch64ISD::MOVIshift Constant:i32<3>, Constant:i32<0>
                  t106: i32 = Constant<3>
                  t19: i32 = Constant<0>
              t647: v4i32 = AArch64ISD::DUP t457
                t457: i32,ch = load<(load 4 from %ir.95)> t456, t73, undef:i64
                  t73: i64 = add t2, Constant:i64<128>


                  t11: i64 = undef
            t586: v4i32 = BUILD_VECTOR Constant:i32<-1>, Constant:i32<-1>, Constant:i32<-1>, Constant:i32<-1>
              t585: i32 = Constant<-1>
              t585: i32 = Constant<-1>
              t585: i32 = Constant<-1>
              t585: i32 = Constant<-1>
        t10: i64 = Constant<0>
    t119: i64 = Constant<2>
Comment 1 Tom Stellard 2019-08-19 19:24:47 PDT
Created attachment 22398 [details]
Reduced test case
Comment 2 Hans Wennborg 2019-08-22 08:49:55 PDT
Tim, could you help triage this?
Comment 3 Tim Northover 2019-08-23 01:13:51 PDT
Yep, looking into it now.
Comment 4 Tim Northover 2019-08-23 04:05:15 PDT
Trunk's affected too so I'll fix there first.

I think the issue is that when searching for cycles we pre-insert the vector-building node into Visited (AArch64ISelLowering.cpp:10695). This has the effect of terminating the search if that node is seen, which isn't right because it can be part of a cycle.

The corresponding code in DAGCombiner.cpp inserts the base address, which I think is a performance optimization: since it's known to be a cycle-free predecessor of everything we care about we can stop looking if we see it. I think that's what we should be doing here too.

So: https://reviews.llvm.org/D66639
Comment 5 Hans Wennborg 2019-08-27 07:31:08 PDT
> So: https://reviews.llvm.org/D66639

Merged that to release_90 in r370063.