LLVM Bugzilla is read-only and represents the historical archive of all LLVM issues filled before November 26, 2021. Use github to submit LLVM bugs

Bug 43665 - Incorrect fold of ashr+xor -> lshr w/ vectors
Summary: Incorrect fold of ashr+xor -> lshr w/ vectors
Status: RESOLVED FIXED
Alias: None
Product: libraries
Classification: Unclassified
Component: Scalar Optimizations (show other bugs)
Version: trunk
Hardware: All All
: P normal
Assignee: Unassigned LLVM Bugs
URL:
Keywords: miscompilation
Depends on:
Blocks:
 
Reported: 2019-10-13 14:51 PDT by Nuno Lopes
Modified: 2020-03-26 11:13 PDT (History)
7 users (show)

See Also:
Fixed By Commit(s):


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Nuno Lopes 2019-10-13 14:51:08 PDT
The following test in Transforms/InstCombine/vector-xor.ll shows an incorrect transformation. I reproduce it here with a smaller vector size & bitwidth to make it easier to understand.
The issue is that "undef >> 4" is "ssss.sxyz" (s = sign bit), while "undef u>> 4" is "0000.xyzw", so it can produce the value "0000.1000", while ashr cannot. See details below:


define <2 x i8> @test_v4i32_not_ashr_negative_const_undef(<2 x i8> %a0) {
  %1 = ashr <2 x i8> { 251, undef }, %a0
  %2 = xor <2 x i8> { 255, 255 }, %1
  ret <2 x i8> %2
}
=>
define <2 x i8> @test_v4i32_not_ashr_negative_const_undef(<2 x i8> %a0) {
  %1 = lshr <2 x i8> { 4, undef }, %a0
  ret <2 x i8> %1
}
Transformation doesn't verify!
ERROR: Value mismatch

Example:
<2 x i8> %a0 = < #x00 (0), #x04 (4) >

Source:
<2 x i8> %1 = < #xfb (251, -5), #x00 (0)        [based on undef value] >
<2 x i8> %2 = < #x04 (4), #xff (255, -1) >

Target:
<2 x i8> %1 = < #x04 (4), #x08 (8) >
Source value: < #x04 (4), #xff (255, -1) >
Target value: < #x04 (4), #x08 (8) >
Comment 1 Jon Roelofs 2020-03-25 13:57:56 PDT
https://reviews.llvm.org/D76800