aarch32.cpp File Reference
#include "llvm/ExecutionEngine/JITLink/aarch32.h"#include "llvm/ADT/StringExtras.h"#include "llvm/ExecutionEngine/JITLink/JITLink.h"#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Endian.h"#include "llvm/Support/ManagedStatic.h"#include "llvm/Support/MathExtras.h"Go to the source code of this file.
Namespaces | |
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
| namespace | llvm::jitlink |
| namespace | llvm::jitlink::aarch32 |
Macros | |
| #define | DEBUG_TYPE "jitlink" |
| #define | KIND_NAME_CASE(K) |
| #define | CPUARCH_NAME_CASE(K) |
Functions | |
| LLVM_ABI bool | llvm::jitlink::aarch32::hasTargetFlags (Symbol &Sym, TargetFlagsType Flags) |
| Check whether the given target flags are set for this Symbol. | |
| HalfWords | llvm::jitlink::aarch32::encodeImmBT4BlT1BlxT2 (int64_t Value) |
| Encode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2). | |
| int64_t | llvm::jitlink::aarch32::decodeImmBT4BlT1BlxT2 (uint32_t Hi, uint32_t Lo) |
| Decode 22-bit immediate value for branch instructions without J1J2 range extension (formats B T4, BL T1 and BLX T2). | |
| LLVM_ABI HalfWords | llvm::jitlink::aarch32::encodeImmBT4BlT1BlxT2_J1J2 (int64_t Value) |
| Encode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2). | |
| LLVM_ABI int64_t | llvm::jitlink::aarch32::decodeImmBT4BlT1BlxT2_J1J2 (uint32_t Hi, uint32_t Lo) |
| Decode 25-bit immediate value for branch instructions with J1J2 range extension (formats B T4, BL T1 and BLX T2). | |
| LLVM_ABI uint32_t | llvm::jitlink::aarch32::encodeImmBA1BlA1BlxA2 (int64_t Value) |
| Encode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2). | |
| LLVM_ABI int64_t | llvm::jitlink::aarch32::decodeImmBA1BlA1BlxA2 (int64_t Value) |
| Decode 26-bit immediate value for branch instructions (formats B A1, BL A1 and BLX A2). | |
| LLVM_ABI HalfWords | llvm::jitlink::aarch32::encodeImmMovtT1MovwT3 (uint16_t Value) |
| Encode 16-bit immediate value for move instruction formats MOVT T1 and MOVW T3. | |
| LLVM_ABI uint16_t | llvm::jitlink::aarch32::decodeImmMovtT1MovwT3 (uint32_t Hi, uint32_t Lo) |
| Decode 16-bit immediate value from move instruction formats MOVT T1 and MOVW T3. | |
| LLVM_ABI HalfWords | llvm::jitlink::aarch32::encodeRegMovtT1MovwT3 (int64_t Value) |
| Encode register ID for instruction formats MOVT T1 and MOVW T3. | |
| LLVM_ABI int64_t | llvm::jitlink::aarch32::decodeRegMovtT1MovwT3 (uint32_t Hi, uint32_t Lo) |
| Decode register ID from instruction formats MOVT T1 and MOVW T3. | |
| LLVM_ABI uint32_t | llvm::jitlink::aarch32::encodeImmMovtA1MovwA2 (uint16_t Value) |
| Encode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2. | |
| LLVM_ABI uint16_t | llvm::jitlink::aarch32::decodeImmMovtA1MovwA2 (uint64_t Value) |
| Decode 16-bit immediate value for move instruction formats MOVT A1 and MOVW A2. | |
| LLVM_ABI uint32_t | llvm::jitlink::aarch32::encodeRegMovtA1MovwA2 (int64_t Value) |
| Encode register ID for instruction formats MOVT A1 and MOVW A2. | |
| LLVM_ABI int64_t | llvm::jitlink::aarch32::decodeRegMovtA1MovwA2 (uint64_t Value) |
| Decode register ID for instruction formats MOVT A1 and MOVW A2. | |
| static Error | llvm::jitlink::aarch32::checkOpcode (LinkGraph &G, const ArmRelocation &R, Edge::Kind Kind) |
| static Error | llvm::jitlink::aarch32::checkOpcode (LinkGraph &G, const ThumbRelocation &R, Edge::Kind Kind) |
| template<EdgeKind_aarch32 Kind> | |
| bool | llvm::jitlink::aarch32::checkRegister (const ThumbRelocation &R, HalfWords Reg) |
| template<EdgeKind_aarch32 Kind> | |
| bool | llvm::jitlink::aarch32::checkRegister (const ArmRelocation &R, uint32_t Reg) |
| template<EdgeKind_aarch32 Kind> | |
| void | llvm::jitlink::aarch32::writeRegister (WritableThumbRelocation &R, HalfWords Reg) |
| template<EdgeKind_aarch32 Kind> | |
| void | llvm::jitlink::aarch32::writeRegister (WritableArmRelocation &R, uint32_t Reg) |
| template<EdgeKind_aarch32 Kind> | |
| void | llvm::jitlink::aarch32::writeImmediate (WritableThumbRelocation &R, HalfWords Imm) |
| template<EdgeKind_aarch32 Kind> | |
| void | llvm::jitlink::aarch32::writeImmediate (WritableArmRelocation &R, uint32_t Imm) |
| LLVM_ABI Expected< int64_t > | llvm::jitlink::aarch32::readAddendData (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind) |
| Helper function to read the initial addend for Data-class relocations. | |
| LLVM_ABI Expected< int64_t > | llvm::jitlink::aarch32::readAddendArm (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind) |
| Helper function to read the initial addend for Arm-class relocations. | |
| LLVM_ABI Expected< int64_t > | llvm::jitlink::aarch32::readAddendThumb (LinkGraph &G, Block &B, Edge::OffsetT Offset, Edge::Kind Kind, const ArmConfig &ArmCfg) |
| Helper function to read the initial addend for Thumb-class relocations. | |
| LLVM_ABI Error | llvm::jitlink::aarch32::applyFixupData (LinkGraph &G, Block &B, const Edge &E) |
| Helper function to apply the fixup for Data-class relocations. | |
| LLVM_ABI Error | llvm::jitlink::aarch32::applyFixupArm (LinkGraph &G, Block &B, const Edge &E) |
| Helper function to apply the fixup for Arm-class relocations. | |
| LLVM_ABI Error | llvm::jitlink::aarch32::applyFixupThumb (LinkGraph &G, Block &B, const Edge &E, const ArmConfig &ArmCfg) |
| Helper function to apply the fixup for Thumb-class relocations. | |
| template<size_t Size> | |
| static Block & | llvm::jitlink::aarch32::allocPointer (LinkGraph &G, Section &S, const uint8_t(&Content)[Size]) |
| Create a new node in the link-graph for the given pointer value. | |
| template<size_t Size> | |
| static Block & | llvm::jitlink::aarch32::allocStub (LinkGraph &G, Section &S, const uint8_t(&Code)[Size]) |
| Create a new node in the link-graph for the given stub template. | |
| static Block & | llvm::jitlink::aarch32::createStubPrev7 (LinkGraph &G, Section &S, Symbol &Target) |
| static Block & | llvm::jitlink::aarch32::createStubThumbv7 (LinkGraph &G, Section &S, Symbol &Target) |
| static Block & | llvm::jitlink::aarch32::createStubArmv7 (LinkGraph &G, Section &S, Symbol &Target) |
| static bool | llvm::jitlink::aarch32::needsStub (const Edge &E) |
| LLVM_ABI const char * | llvm::jitlink::aarch32::getEdgeKindName (Edge::Kind K) |
| Get a human-readable name for the given AArch32 edge kind. | |
| LLVM_ABI const char * | llvm::jitlink::aarch32::getCPUArchName (ARMBuildAttrs::CPUArch K) |
| Human-readable name for a given CPU architecture kind. | |
Macro Definition Documentation
◆ CPUARCH_NAME_CASE
| #define CPUARCH_NAME_CASE | ( | K | ) |
Value:
case K: \
return #K;
Referenced by llvm::jitlink::aarch32::getCPUArchName().
◆ DEBUG_TYPE
| #define DEBUG_TYPE "jitlink" |
Definition at line 23 of file aarch32.cpp.
◆ KIND_NAME_CASE
| #define KIND_NAME_CASE | ( | K | ) |
Value:
case K: \
return #K;
Referenced by llvm::jitlink::aarch32::getEdgeKindName(), and llvm::jitlink::loongarch::getEdgeKindName().
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