| applyAshShlToSextInreg(MachineInstr &MI, std::tuple< Register, int64_t > &MatchInfo) | llvm::CombinerHelper | |
| applyBuildFn(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| applyBuildFnMO(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| applyBuildFnNoErase(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| applyBuildInstructionSteps(MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo) | llvm::CombinerHelper | |
| applyCombineAddP2IToPtrAdd(MachineInstr &MI, std::pair< Register, bool > &PtrRegAndCommute) | llvm::CombinerHelper | |
| applyCombineConcatVectors(MachineInstr &MI, SmallVector< Register > &Ops) | llvm::CombinerHelper | |
| applyCombineConstantFoldFpUnary(MachineInstr &MI, const ConstantFP *Cst) | llvm::CombinerHelper | |
| applyCombineConstPtrAddToI2P(MachineInstr &MI, APInt &NewCst) | llvm::CombinerHelper | |
| applyCombineCopy(MachineInstr &MI) | llvm::CombinerHelper | |
| applyCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI) | llvm::CombinerHelper | |
| applyCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo) | llvm::CombinerHelper | |
| applyCombineI2PToP2I(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| applyCombineIndexedLoadStore(MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo) | llvm::CombinerHelper | |
| applyCombineInsertVecElts(MachineInstr &MI, SmallVectorImpl< Register > &MatchInfo) | llvm::CombinerHelper | |
| applyCombineMulToShl(MachineInstr &MI, unsigned &ShiftVal) | llvm::CombinerHelper | |
| applyCombineP2IToI2P(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| applyCombineShiftToUnmerge(MachineInstr &MI, const unsigned &ShiftVal) | llvm::CombinerHelper | |
| applyCombineShlOfExtend(MachineInstr &MI, const RegisterImmPair &MatchData) | llvm::CombinerHelper | |
| applyCombineShuffleConcat(MachineInstr &MI, SmallVector< Register > &Ops) | llvm::CombinerHelper | |
| applyCombineShuffleVector(MachineInstr &MI, const ArrayRef< Register > Ops) | llvm::CombinerHelper | |
| applyCombineTruncOfShift(MachineInstr &MI, std::pair< MachineInstr *, LLT > &MatchInfo) | llvm::CombinerHelper | |
| applyCombineUnmergeConstant(MachineInstr &MI, SmallVectorImpl< APInt > &Csts) | llvm::CombinerHelper | |
| applyCombineUnmergeMergeToPlainValues(MachineInstr &MI, SmallVectorImpl< Register > &Operands) | llvm::CombinerHelper | |
| applyCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI) | llvm::CombinerHelper | |
| applyCombineUnmergeZExtToZExt(MachineInstr &MI) | llvm::CombinerHelper | |
| applyCommuteBinOpOperands(MachineInstr &MI) | llvm::CombinerHelper | |
| applyExpandFPowI(MachineInstr &MI, int64_t Exponent) | llvm::CombinerHelper | |
| applyExpandPromotedF16FMed3(MachineInstr &MI, Register Src0, Register Src1, Register Src2) | llvm::AMDGPUCombinerHelper | |
| applyExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI) | llvm::CombinerHelper | |
| applyExtractAllEltsFromBuildVector(MachineInstr &MI, SmallVectorImpl< std::pair< Register, MachineInstr * > > &MatchInfo) | llvm::CombinerHelper | |
| applyExtractVecEltBuildVec(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| applyFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) | llvm::AMDGPUCombinerHelper | |
| applyFoldBinOpIntoSelect(MachineInstr &MI, const unsigned &SelectOpNo) | llvm::CombinerHelper | |
| applyFsubToFneg(MachineInstr &MI, Register &MatchInfo) | llvm::CombinerHelper | |
| applyFunnelShiftConstantModulo(MachineInstr &MI) | llvm::CombinerHelper | |
| applyFunnelShiftToRotate(MachineInstr &MI) | llvm::CombinerHelper | |
| applyNotCmp(MachineInstr &MI, SmallVectorImpl< Register > &RegsToNegate) | llvm::CombinerHelper | |
| applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond) | llvm::CombinerHelper | |
| applyPtrAddImmedChain(MachineInstr &MI, PtrAddChain &MatchInfo) | llvm::CombinerHelper | |
| applyPtrAddZero(MachineInstr &MI) | llvm::CombinerHelper | |
| applyRotateOutOfRange(MachineInstr &MI) | llvm::CombinerHelper | |
| applySDivByConst(MachineInstr &MI) | llvm::CombinerHelper | |
| applySDivByPow2(MachineInstr &MI) | llvm::CombinerHelper | |
| applySextInRegOfLoad(MachineInstr &MI, std::tuple< Register, unsigned > &MatchInfo) | llvm::CombinerHelper | |
| applySextTruncSextLoad(MachineInstr &MI) | llvm::CombinerHelper | |
| applyShiftImmedChain(MachineInstr &MI, RegisterImmPair &MatchInfo) | llvm::CombinerHelper | |
| applyShiftOfShiftedLogic(MachineInstr &MI, ShiftOfShiftedLogic &MatchInfo) | llvm::CombinerHelper | |
| applyShuffleToExtract(MachineInstr &MI) | llvm::CombinerHelper | |
| applySimplifyAddToSub(MachineInstr &MI, std::tuple< Register, Register > &MatchInfo) | llvm::CombinerHelper | |
| applySimplifyURemByPow2(MachineInstr &MI) | llvm::CombinerHelper | |
| applyUDivByConst(MachineInstr &MI) | llvm::CombinerHelper | |
| applyUDivByPow2(MachineInstr &MI) | llvm::CombinerHelper | |
| applyUMulHToLShr(MachineInstr &MI) | llvm::CombinerHelper | |
| applyXorOfAndWithSameReg(MachineInstr &MI, std::pair< Register, Register > &MatchInfo) | llvm::CombinerHelper | |
| Builder | llvm::CombinerHelper | protected |
| buildSDivUsingMul(MachineInstr &MI) | llvm::CombinerHelper | |
| buildUDivUsingMul(MachineInstr &MI) | llvm::CombinerHelper | |
| canCombineFMadOrFMA(MachineInstr &MI, bool &AllowFusionGlobally, bool &HasFMAD, bool &Aggressive, bool CanReassociate=false) | llvm::CombinerHelper | |
| CombinerHelper(GISelChangeObserver &Observer, MachineIRBuilder &B, bool IsPreLegalize, GISelKnownBits *KB=nullptr, MachineDominatorTree *MDT=nullptr, const LegalizerInfo *LI=nullptr) | llvm::AMDGPUCombinerHelper | |
| dominates(const MachineInstr &DefMI, const MachineInstr &UseMI) | llvm::CombinerHelper | |
| eraseInst(MachineInstr &MI) | llvm::CombinerHelper | |
| getBuilder() const | llvm::CombinerHelper | inline |
| getContext() const | llvm::CombinerHelper | |
| getDataLayout() const | llvm::CombinerHelper | |
| getKnownBits() const | llvm::CombinerHelper | inline |
| getMachineFunction() const | llvm::CombinerHelper | |
| getRegBank(Register Reg) const | llvm::CombinerHelper | |
| getTargetLowering() const | llvm::CombinerHelper | |
| isConstantLegalOrBeforeLegalizer(const LLT Ty) const | llvm::CombinerHelper | |
| isLegal(const LegalityQuery &Query) const | llvm::CombinerHelper | |
| isLegalOrBeforeLegalizer(const LegalityQuery &Query) const | llvm::CombinerHelper | |
| isPredecessor(const MachineInstr &DefMI, const MachineInstr &UseMI) | llvm::CombinerHelper | |
| isPreLegalize() const | llvm::CombinerHelper | |
| IsPreLegalize | llvm::CombinerHelper | protected |
| KB | llvm::CombinerHelper | protected |
| LI | llvm::CombinerHelper | protected |
| matchAddEToAddO(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchAddOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchAddOverflow(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchAddSubSameReg(MachineInstr &MI, Register &Src) | llvm::CombinerHelper | |
| matchAllExplicitUsesAreUndef(MachineInstr &MI) | llvm::CombinerHelper | |
| matchAnd(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchAndOrDisjointMask(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchAnyExplicitUseIsUndef(MachineInstr &MI) | llvm::CombinerHelper | |
| matchAshrShlToSextInreg(MachineInstr &MI, std::tuple< Register, int64_t > &MatchInfo) | llvm::CombinerHelper | |
| matchBinOpSameVal(MachineInstr &MI) | llvm::CombinerHelper | |
| matchBitfieldExtractFromAnd(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchBitfieldExtractFromSExtInReg(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchBitfieldExtractFromShr(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchBitfieldExtractFromShrAnd(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchBuildVectorIdentityFold(MachineInstr &MI, Register &MatchInfo) | llvm::CombinerHelper | |
| matchCastOfBuildVector(const MachineInstr &CastMI, const MachineInstr &BVMI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCastOfSelect(const MachineInstr &Cast, const MachineInstr &SelectMI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineAddP2IToPtrAdd(MachineInstr &MI, std::pair< Register, bool > &PtrRegAndCommute) | llvm::CombinerHelper | |
| matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| matchCombineConcatVectors(MachineInstr &MI, SmallVector< Register > &Ops) | llvm::CombinerHelper | |
| matchCombineConstPtrAddToI2P(MachineInstr &MI, APInt &NewCst) | llvm::CombinerHelper | |
| matchCombineCopy(MachineInstr &MI) | llvm::CombinerHelper | |
| matchCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI) | llvm::CombinerHelper | |
| matchCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo) | llvm::CombinerHelper | |
| matchCombineExtractedVectorLoad(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFAddFMAFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFAddFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFAddFpExtFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFAddFpExtFMulToFMadOrFMAAggressive(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFMinMaxNaN(MachineInstr &MI, unsigned &Info) | llvm::CombinerHelper | |
| matchCombineFSubFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFSubFNegFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFSubFpExtFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineFSubFpExtFNegFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineI2PToP2I(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| matchCombineIndexedLoadStore(MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo) | llvm::CombinerHelper | |
| matchCombineInsertVecElts(MachineInstr &MI, SmallVectorImpl< Register > &MatchInfo) | llvm::CombinerHelper | |
| matchCombineLoadWithAndMask(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchCombineMergeUnmerge(MachineInstr &MI, Register &MatchInfo) | llvm::CombinerHelper | |
| matchCombineMulToShl(MachineInstr &MI, unsigned &ShiftVal) | llvm::CombinerHelper | |
| matchCombineShiftToUnmerge(MachineInstr &MI, unsigned TargetShiftSize, unsigned &ShiftVal) | llvm::CombinerHelper | |
| matchCombineShlOfExtend(MachineInstr &MI, RegisterImmPair &MatchData) | llvm::CombinerHelper | |
| matchCombineShuffleConcat(MachineInstr &MI, SmallVector< Register > &Ops) | llvm::CombinerHelper | |
| matchCombineShuffleVector(MachineInstr &MI, SmallVectorImpl< Register > &Ops) | llvm::CombinerHelper | |
| matchCombineTruncOfShift(MachineInstr &MI, std::pair< MachineInstr *, LLT > &MatchInfo) | llvm::CombinerHelper | |
| matchCombineUnmergeConstant(MachineInstr &MI, SmallVectorImpl< APInt > &Csts) | llvm::CombinerHelper | |
| matchCombineUnmergeMergeToPlainValues(MachineInstr &MI, SmallVectorImpl< Register > &Operands) | llvm::CombinerHelper | |
| matchCombineUnmergeUndef(MachineInstr &MI, std::function< void(MachineIRBuilder &)> &MatchInfo) | llvm::CombinerHelper | |
| matchCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI) | llvm::CombinerHelper | |
| matchCombineUnmergeZExtToZExt(MachineInstr &MI) | llvm::CombinerHelper | |
| matchCombineZextTrunc(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| matchCommuteConstantToRHS(MachineInstr &MI) | llvm::CombinerHelper | |
| matchCommuteFPConstantToRHS(MachineInstr &MI) | llvm::CombinerHelper | |
| matchCommuteShift(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchConstantFoldBinOp(MachineInstr &MI, APInt &MatchInfo) | llvm::CombinerHelper | |
| matchConstantFoldCastOp(MachineInstr &MI, APInt &MatchInfo) | llvm::CombinerHelper | |
| matchConstantFoldFMA(MachineInstr &MI, ConstantFP *&MatchInfo) | llvm::CombinerHelper | |
| matchConstantFoldFPBinOp(MachineInstr &MI, ConstantFP *&MatchInfo) | llvm::CombinerHelper | |
| matchConstantFPOp(const MachineOperand &MOP, double C) | llvm::CombinerHelper | |
| matchConstantLargerBitWidth(MachineInstr &MI, unsigned ConstIdx) | llvm::CombinerHelper | |
| matchConstantOp(const MachineOperand &MOP, int64_t C) | llvm::CombinerHelper | |
| matchConstantSelectCmp(MachineInstr &MI, unsigned &OpIdx) | llvm::CombinerHelper | |
| matchDivByPow2(MachineInstr &MI, bool IsSigned) | llvm::CombinerHelper | |
| matchEqualDefs(const MachineOperand &MOP1, const MachineOperand &MOP2) | llvm::CombinerHelper | |
| matchExpandPromotedF16FMed3(MachineInstr &MI, Register Src0, Register Src1, Register Src2) | llvm::AMDGPUCombinerHelper | |
| matchExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI) | llvm::CombinerHelper | |
| matchExtOfExt(const MachineInstr &FirstMI, const MachineInstr &SecondMI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchExtractAllEltsFromBuildVector(MachineInstr &MI, SmallVectorImpl< std::pair< Register, MachineInstr * > > &MatchInfo) | llvm::CombinerHelper | |
| matchExtractVecEltBuildVec(MachineInstr &MI, Register &Reg) | llvm::CombinerHelper | |
| matchExtractVectorElement(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchExtractVectorElementWithBuildVector(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchExtractVectorElementWithBuildVectorTrunc(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchExtractVectorElementWithDifferentIndices(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchExtractVectorElementWithShuffleVector(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) | llvm::AMDGPUCombinerHelper | |
| matchFoldAMinusC1MinusC2(const MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFoldAMinusC1PlusC2(const MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFoldAPlusC1MinusC2(const MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFoldBinOpIntoSelect(MachineInstr &MI, unsigned &SelectOpNo) | llvm::CombinerHelper | |
| matchFoldC1Minus2MinusC2(const MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFoldC2MinusAPlusC1(const MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFPowIExpansion(MachineInstr &MI, int64_t Exponent) | llvm::CombinerHelper | |
| matchFreezeOfSingleMaybePoisonOperand(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchFsubToFneg(MachineInstr &MI, Register &MatchInfo) | llvm::CombinerHelper | |
| matchFunnelShiftToRotate(MachineInstr &MI) | llvm::CombinerHelper | |
| matchHoistLogicOpWithSameOpcodeHands(MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo) | llvm::CombinerHelper | |
| matchICmpToLHSKnownBits(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchICmpToTrueFalseKnownBits(MachineInstr &MI, int64_t &MatchInfo) | llvm::CombinerHelper | |
| matchInsertExtractVecEltOutOfBounds(MachineInstr &MI) | llvm::CombinerHelper | |
| matchInsertVectorElementOOB(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchLoadOrCombine(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchMulOBy0(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchMulOBy2(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchMulOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchNarrowBinopFeedingAnd(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchNonNegZext(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchNotCmp(MachineInstr &MI, SmallVectorImpl< Register > &RegsToNegate) | llvm::CombinerHelper | |
| matchOperandIsKnownToBeAPowerOfTwo(MachineInstr &MI, unsigned OpIdx) | llvm::CombinerHelper | |
| matchOperandIsUndef(MachineInstr &MI, unsigned OpIdx) | llvm::CombinerHelper | |
| matchOperandIsZero(MachineInstr &MI, unsigned OpIdx) | llvm::CombinerHelper | |
| matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond) | llvm::CombinerHelper | |
| matchOr(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchOrShiftToFunnelShift(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchOverlappingAnd(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchPtrAddImmedChain(MachineInstr &MI, PtrAddChain &MatchInfo) | llvm::CombinerHelper | |
| matchPtrAddZero(MachineInstr &MI) | llvm::CombinerHelper | |
| matchReassocCommBinOp(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchReassocConstantInnerLHS(GPtrAdd &MI, MachineInstr *LHS, MachineInstr *RHS, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchReassocConstantInnerRHS(GPtrAdd &MI, MachineInstr *RHS, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchReassocFoldConstantsInSubTree(GPtrAdd &MI, MachineInstr *LHS, MachineInstr *RHS, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchReassocPtrAdd(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchRedundantAnd(MachineInstr &MI, Register &Replacement) | llvm::CombinerHelper | |
| matchRedundantBinOpInEquality(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchRedundantNegOperands(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchRedundantOr(MachineInstr &MI, Register &Replacement) | llvm::CombinerHelper | |
| matchRedundantSExtInReg(MachineInstr &MI) | llvm::CombinerHelper | |
| matchRotateOutOfRange(MachineInstr &MI) | llvm::CombinerHelper | |
| matchSDivByConst(MachineInstr &MI) | llvm::CombinerHelper | |
| matchSelect(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchSelectIMinMax(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchSelectSameVal(MachineInstr &MI) | llvm::CombinerHelper | |
| matchSextInRegOfLoad(MachineInstr &MI, std::tuple< Register, unsigned > &MatchInfo) | llvm::CombinerHelper | |
| matchSextOfTrunc(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchSextTruncSextLoad(MachineInstr &MI) | llvm::CombinerHelper | |
| matchShiftImmedChain(MachineInstr &MI, RegisterImmPair &MatchInfo) | llvm::CombinerHelper | |
| matchShiftOfShiftedLogic(MachineInstr &MI, ShiftOfShiftedLogic &MatchInfo) | llvm::CombinerHelper | |
| matchShiftsTooBig(MachineInstr &MI) | llvm::CombinerHelper | |
| matchShlOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchShuffleToExtract(MachineInstr &MI) | llvm::CombinerHelper | |
| matchSimplifyAddToSub(MachineInstr &MI, std::tuple< Register, Register > &MatchInfo) | llvm::CombinerHelper | |
| matchSimplifySelectToMinMax(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchSubAddSameReg(MachineInstr &MI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchSubOfVScale(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchTruncateOfExt(const MachineInstr &Root, const MachineInstr &ExtMI, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| matchTruncBuildVectorFold(MachineInstr &MI, Register &MatchInfo) | llvm::CombinerHelper | |
| matchTruncLshrBuildVectorFold(MachineInstr &MI, Register &MatchInfo) | llvm::CombinerHelper | |
| matchUDivByConst(MachineInstr &MI) | llvm::CombinerHelper | |
| matchUMulHToLShr(MachineInstr &MI) | llvm::CombinerHelper | |
| matchUndefSelectCmp(MachineInstr &MI) | llvm::CombinerHelper | |
| matchUndefShuffleVectorMask(MachineInstr &MI) | llvm::CombinerHelper | |
| matchUndefStore(MachineInstr &MI) | llvm::CombinerHelper | |
| matchXorOfAndWithSameReg(MachineInstr &MI, std::pair< Register, Register > &MatchInfo) | llvm::CombinerHelper | |
| matchZextOfTrunc(const MachineOperand &MO, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
| MDT | llvm::CombinerHelper | protected |
| MRI | llvm::CombinerHelper | protected |
| Observer | llvm::CombinerHelper | protected |
| RBI | llvm::CombinerHelper | protected |
| replaceInstWithConstant(MachineInstr &MI, int64_t C) | llvm::CombinerHelper | |
| replaceInstWithConstant(MachineInstr &MI, APInt C) | llvm::CombinerHelper | |
| replaceInstWithFConstant(MachineInstr &MI, double C) | llvm::CombinerHelper | |
| replaceInstWithFConstant(MachineInstr &MI, ConstantFP *CFP) | llvm::CombinerHelper | |
| replaceInstWithUndef(MachineInstr &MI) | llvm::CombinerHelper | |
| replaceOpcodeWith(MachineInstr &FromMI, unsigned ToOpcode) const | llvm::CombinerHelper | |
| replaceRegOpWith(MachineRegisterInfo &MRI, MachineOperand &FromRegOp, Register ToReg) const | llvm::CombinerHelper | |
| replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const | llvm::CombinerHelper | |
| replaceSingleDefInstWithOperand(MachineInstr &MI, unsigned OpIdx) | llvm::CombinerHelper | |
| replaceSingleDefInstWithReg(MachineInstr &MI, Register Replacement) | llvm::CombinerHelper | |
| setRegBank(Register Reg, const RegisterBank *RegBank) | llvm::CombinerHelper | |
| TRI | llvm::CombinerHelper | protected |
| tryCombine(MachineInstr &MI) | llvm::CombinerHelper | |
| tryCombineCopy(MachineInstr &MI) | llvm::CombinerHelper | |
| tryCombineExtendingLoads(MachineInstr &MI) | llvm::CombinerHelper | |
| tryCombineMemCpyFamily(MachineInstr &MI, unsigned MaxLen=0) | llvm::CombinerHelper | |
| tryCombineShiftToUnmerge(MachineInstr &MI, unsigned TargetShiftAmount) | llvm::CombinerHelper | |
| tryCombineShuffleVector(MachineInstr &MI) | llvm::CombinerHelper | |
| tryEmitMemcpyInline(MachineInstr &MI) | llvm::CombinerHelper | |
| tryReassocBinOp(unsigned Opc, Register DstReg, Register Op0, Register Op1, BuildFnTy &MatchInfo) | llvm::CombinerHelper | |
