This is the complete list of members for llvm::ARCInstrInfo, including all inherited members.

analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override	llvm::ARCInstrInfo
ARCInstrInfo(const ARCSubtarget &)	llvm::ARCInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override	llvm::ARCInstrInfo
getBaseAndOffsetPosition(const MachineInstr &MI, unsigned &BasePos, unsigned &OffsetPos) const override	llvm::ARCInstrInfo	virtual
getInstSizeInBytes(const MachineInstr &MI) const override	llvm::ARCInstrInfo
getRegisterInfo() const	llvm::ARCInstrInfo	inline
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock TBB, MachineBasicBlock FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &, int *BytesAdded=nullptr) const override	llvm::ARCInstrInfo
isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override	llvm::ARCInstrInfo
isPostIncrement(const MachineInstr &MI) const override	llvm::ARCInstrInfo
isPreIncrement(const MachineInstr &MI) const	llvm::ARCInstrInfo
isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override	llvm::ARCInstrInfo
loadImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const	llvm::ARCInstrInfo
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI, Register VReg) const override	llvm::ARCInstrInfo
removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override	llvm::ARCInstrInfo
reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override	llvm::ARCInstrInfo
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI, Register VReg) const override	llvm::ARCInstrInfo