| AddressableLocalMemorySize | llvm::AMDGPUSubtarget | protected |
| AMDGPUSubtarget(Triple TT) | llvm::AMDGPUSubtarget | |
| enableMachineScheduler() const override | llvm::R600Subtarget | inline |
| EnablePromoteAlloca | llvm::AMDGPUSubtarget | protected |
| EnableRealTrue16Insts | llvm::AMDGPUSubtarget | protected |
| enableSubRegLiveness() const override | llvm::R600Subtarget | inline |
| EUsPerCU | llvm::AMDGPUSubtarget | protected |
| EVERGREEN enum value | llvm::AMDGPUSubtarget | |
| FastFMAF32 | llvm::AMDGPUSubtarget | protected |
| GCN3Encoding | llvm::AMDGPUSubtarget | protected |
| Generation enum name | llvm::AMDGPUSubtarget | |
| get(const MachineFunction &MF) | llvm::AMDGPUSubtarget | static |
| get(const TargetMachine &TM, const Function &F) | llvm::AMDGPUSubtarget | static |
| getAddressableLocalMemorySize() const | llvm::AMDGPUSubtarget | inline |
| getAlignmentForImplicitArgPtr() const | llvm::AMDGPUSubtarget | inline |
| getAMDGPUDwarfFlavour() const | llvm::AMDGPUSubtarget | |
| getDefaultFlatWorkGroupSize(CallingConv::ID CC) const | llvm::AMDGPUSubtarget | |
| getEffectiveWavesPerEU(std::pair< unsigned, unsigned > WavesPerEU, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const | llvm::AMDGPUSubtarget | |
| getEUsPerCU() const | llvm::AMDGPUSubtarget | inline |
| getExplicitKernArgSize(const Function &F, Align &MaxAlign) const | llvm::AMDGPUSubtarget | |
| getExplicitKernelArgOffset() const | llvm::AMDGPUSubtarget | inline |
| getFlatWorkGroupSizes(const Function &F) const | llvm::AMDGPUSubtarget | |
| getFrameLowering() const override | llvm::R600Subtarget | inline |
| getGeneration() const | llvm::R600Subtarget | inline |
| getImplicitArgNumBytes(const Function &F) const | llvm::AMDGPUSubtarget | |
| getInstrInfo() const override | llvm::R600Subtarget | inline |
| getInstrItineraryData() const override | llvm::R600Subtarget | inline |
| getKernArgSegmentSize(const Function &F, Align &MaxAlign) const | llvm::AMDGPUSubtarget | |
| getLocalMemorySize() const | llvm::AMDGPUSubtarget | inline |
| getMaxFlatWorkGroupSize() const override | llvm::R600Subtarget | inlinevirtual |
| getMaxLocalMemSizeWithWaveCount(unsigned WaveCount, const Function &) const | llvm::AMDGPUSubtarget | |
| getMaxNumWorkGroups(const Function &F) const | llvm::AMDGPUSubtarget | |
| getMaxWavesPerEU() const | llvm::AMDGPUSubtarget | inline |
| getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const override | llvm::R600Subtarget | inlinevirtual |
| getMaxWorkitemID(const Function &Kernel, unsigned Dimension) const | llvm::AMDGPUSubtarget | |
| getMinFlatWorkGroupSize() const override | llvm::R600Subtarget | inlinevirtual |
| getMinWavesPerEU() const override | llvm::R600Subtarget | inlinevirtual |
| getOccupancyWithLocalMemSize(uint32_t Bytes, const Function &) const | llvm::AMDGPUSubtarget | |
| getOccupancyWithLocalMemSize(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | |
| getRegisterInfo() const override | llvm::R600Subtarget | inline |
| getSelectionDAGInfo() const override | llvm::R600Subtarget | |
| getStackAlignment() const | llvm::R600Subtarget | inline |
| getTargetLowering() const override | llvm::R600Subtarget | inline |
| getTexVTXClauseSize() const | llvm::R600Subtarget | inline |
| getWavefrontSize() const | llvm::AMDGPUSubtarget | inline |
| getWavefrontSizeLog2() const | llvm::AMDGPUSubtarget | inline |
| getWavesPerEU(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| getWavesPerEU(const Function &F, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const | llvm::AMDGPUSubtarget | |
| getWavesPerEUForWorkGroup(unsigned FlatWorkGroupSize) const override | llvm::R600Subtarget | inlinevirtual |
| GFX10 enum value | llvm::AMDGPUSubtarget | |
| GFX11 enum value | llvm::AMDGPUSubtarget | |
| GFX12 enum value | llvm::AMDGPUSubtarget | |
| GFX9 enum value | llvm::AMDGPUSubtarget | |
| Has16BitInsts | llvm::AMDGPUSubtarget | protected |
| has16BitInsts() const | llvm::AMDGPUSubtarget | inline |
| hasBCNT(unsigned Size) const | llvm::R600Subtarget | inline |
| hasBF16ConversionInsts() const | llvm::AMDGPUSubtarget | inline |
| HasBF16ConversionInsts | llvm::AMDGPUSubtarget | protected |
| hasBF8ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasBF8ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasBFE() const | llvm::R600Subtarget | inline |
| hasBFI() const | llvm::R600Subtarget | inline |
| hasBORROW() const | llvm::R600Subtarget | inline |
| hasCARRY() const | llvm::R600Subtarget | inline |
| hasCaymanISA() const | llvm::R600Subtarget | inline |
| hasCFAluBug() const | llvm::R600Subtarget | inline |
| HasCvtPkF16F32Inst | llvm::AMDGPUSubtarget | protected |
| hasCvtPkF16F32Inst() const | llvm::AMDGPUSubtarget | inline |
| HasDsSrc2Insts | llvm::AMDGPUSubtarget | protected |
| hasDsSrc2Insts() const | llvm::AMDGPUSubtarget | inline |
| HasF16BF16ToFP6BF6ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasF16BF16ToFP6BF6ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| hasF32ToF16BF16ConversionSRInsts() const | llvm::AMDGPUSubtarget | inline |
| HasF32ToF16BF16ConversionSRInsts | llvm::AMDGPUSubtarget | protected |
| hasFastFMAF32() const | llvm::AMDGPUSubtarget | inline |
| hasFFBH() const | llvm::R600Subtarget | inline |
| hasFFBL() const | llvm::R600Subtarget | inline |
| hasFMA() const | llvm::R600Subtarget | inline |
| hasFminFmaxLegacy() const | llvm::AMDGPUSubtarget | inline |
| HasFminFmaxLegacy | llvm::AMDGPUSubtarget | protected |
| hasFP4ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasFP4ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasFP6BF6ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasFP6BF6ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasFP8ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasFP8ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasInv2PiInlineImm() const | llvm::AMDGPUSubtarget | inline |
| HasInv2PiInlineImm | llvm::AMDGPUSubtarget | protected |
| HasMadMacF32Insts | llvm::AMDGPUSubtarget | protected |
| hasMadMacF32Insts() const | llvm::AMDGPUSubtarget | inline |
| hasMadMixInsts() const | llvm::AMDGPUSubtarget | inline |
| HasMadMixInsts | llvm::AMDGPUSubtarget | protected |
| HasMulI24 | llvm::AMDGPUSubtarget | protected |
| hasMulI24() const | llvm::AMDGPUSubtarget | inline |
| HasMulU24 | llvm::AMDGPUSubtarget | protected |
| hasMulU24() const | llvm::AMDGPUSubtarget | inline |
| hasSDWA() const | llvm::AMDGPUSubtarget | inline |
| HasSDWA | llvm::AMDGPUSubtarget | protected |
| HasSMulHi | llvm::AMDGPUSubtarget | protected |
| hasSMulHi() const | llvm::AMDGPUSubtarget | inline |
| HasTrigReducedRange | llvm::AMDGPUSubtarget | protected |
| hasTrigReducedRange() const | llvm::AMDGPUSubtarget | inline |
| HasTrue16BitInsts | llvm::AMDGPUSubtarget | protected |
| hasTrue16BitInsts() const | llvm::AMDGPUSubtarget | inline |
| hasVertexCache() const | llvm::R600Subtarget | inline |
| HasVOP3PInsts | llvm::AMDGPUSubtarget | protected |
| hasVOP3PInsts() const | llvm::AMDGPUSubtarget | inline |
| initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS) | llvm::R600Subtarget | |
| INVALID enum value | llvm::AMDGPUSubtarget | |
| isAmdHsaOrMesa(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| isAmdHsaOS() const | llvm::AMDGPUSubtarget | inline |
| isAmdPalOS() const | llvm::AMDGPUSubtarget | inline |
| isGCN() const | llvm::AMDGPUSubtarget | inline |
| isGCN3Encoding() const | llvm::AMDGPUSubtarget | inline |
| isMesa3DOS() const | llvm::AMDGPUSubtarget | inline |
| isMesaKernel(const Function &F) const | llvm::AMDGPUSubtarget | |
| isPromoteAllocaEnabled() const | llvm::AMDGPUSubtarget | inline |
| isSingleLaneExecution(const Function &Kernel) const | llvm::AMDGPUSubtarget | |
| LocalMemorySize | llvm::AMDGPUSubtarget | protected |
| makeLIDRangeMetadata(Instruction *I) const | llvm::AMDGPUSubtarget | |
| MaxWavesPerEU | llvm::AMDGPUSubtarget | protected |
| NORTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) | llvm::R600Subtarget | |
| R600 enum value | llvm::AMDGPUSubtarget | |
| R600Subtarget(const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM) | llvm::R600Subtarget | |
| R700 enum value | llvm::AMDGPUSubtarget | |
| requiresDisjointEarlyClobberAndUndef() const override | llvm::R600Subtarget | inline |
| SEA_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| SOUTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| useRealTrue16Insts() const | llvm::AMDGPUSubtarget | |
| VOLCANIC_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| WavefrontSizeLog2 | llvm::AMDGPUSubtarget | protected |
| ~AMDGPUSubtarget()=default | llvm::AMDGPUSubtarget | virtual |
| ~R600Subtarget() override | llvm::R600Subtarget | |
