LLVM 20.0.0git
llvm::X86RegisterInfo Member List

This is the complete list of members for llvm::X86RegisterInfo, including all inherited members.

adjustStackMapLiveOutMask(uint32_t *Mask) const overridellvm::X86RegisterInfo
canRealignStack(const MachineFunction &MF) const overridellvm::X86RegisterInfo
eliminateFrameIndex(MachineBasicBlock::iterator II, unsigned FIOperandNum, Register BaseReg, int FIOffset) constllvm::X86RegisterInfo
eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const overridellvm::X86RegisterInfo
eliminateFrameIndicesBackwards() const overridellvm::X86RegisterInfoinline
findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI) constllvm::X86RegisterInfo
getBaseRegister() constllvm::X86RegisterInfoinline
getCalleeSavedRegs(const MachineFunction *MF) const overridellvm::X86RegisterInfo
getCalleeSavedRegsViaCopy(const MachineFunction *MF) constllvm::X86RegisterInfo
getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const overridellvm::X86RegisterInfo
getCrossCopyRegClass(const TargetRegisterClass *RC) const overridellvm::X86RegisterInfo
getDarwinTLSCallPreservedMask() constllvm::X86RegisterInfo
getFramePtr() constllvm::X86RegisterInfoinline
getFrameRegister(const MachineFunction &MF) const overridellvm::X86RegisterInfo
getGPRsForTailCall(const MachineFunction &MF) constllvm::X86RegisterInfo
getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const overridellvm::X86RegisterInfo
getMatchingSuperRegClass(const TargetRegisterClass *A, const TargetRegisterClass *B, unsigned Idx) const overridellvm::X86RegisterInfo
getNoPreservedMask() const overridellvm::X86RegisterInfo
getNumSupportedRegs(const MachineFunction &MF) const overridellvm::X86RegisterInfo
getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const overridellvm::X86RegisterInfo
getPtrSizedFrameRegister(const MachineFunction &MF) constllvm::X86RegisterInfo
getPtrSizedStackRegister(const MachineFunction &MF) constllvm::X86RegisterInfo
getRegAllocationHints(Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const overridellvm::X86RegisterInfo
getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const overridellvm::X86RegisterInfo
getReservedRegs(const MachineFunction &MF) const overridellvm::X86RegisterInfo
getSEHRegNum(unsigned i) constllvm::X86RegisterInfo
getSlotSize() constllvm::X86RegisterInfoinline
getStackRegister() constllvm::X86RegisterInfoinline
getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const overridellvm::X86RegisterInfo
hasBasePointer(const MachineFunction &MF) constllvm::X86RegisterInfo
isArgumentRegister(const MachineFunction &MF, MCRegister Reg) const overridellvm::X86RegisterInfo
isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const overridellvm::X86RegisterInfo
isTileRegisterClass(const TargetRegisterClass *RC) constllvm::X86RegisterInfo
requiresRegisterScavenging(const MachineFunction &MF) const overridellvm::X86RegisterInfoinline
shouldRealignStack(const MachineFunction &MF) const overridellvm::X86RegisterInfo
shouldRewriteCopySrc(const TargetRegisterClass *DefRC, unsigned DefSubReg, const TargetRegisterClass *SrcRC, unsigned SrcSubReg) const overridellvm::X86RegisterInfo
X86RegisterInfo(const Triple &TT)llvm::X86RegisterInfoexplicit