HexagonCopyToCombine.cpp File Reference

#include "HexagonInstrInfo.h"
#include "HexagonSubtarget.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "hexagon-copy-combine"

Functions
	INITIALIZE_PASS (HexagonCopyToCombine, "hexagon-copy-combine", "Hexagon Copy-To-Combine Pass", false, false) static bool isCombinableInstType(MachineInstr &MI
template<unsigned N>
static bool	isGreaterThanNBitTFRI (const MachineInstr &I)
static bool	areCombinableOperations (const TargetRegisterInfo *TRI, MachineInstr &HighRegInst, MachineInstr &LowRegInst, bool AllowC64)
	areCombinableOperations - Returns true if the two instruction can be merge into a combine (ignoring register constraints).
static bool	isEvenReg (unsigned Reg)
static void	removeKillInfo (MachineInstr &MI, unsigned RegNotKilled)
static bool	isUnsafeToMoveAcross (MachineInstr &MI, unsigned UseReg, unsigned DestReg, const TargetRegisterInfo *TRI)
	Returns true if it is unsafe to move a copy instruction from UseReg to DestReg over the instruction MI.
static Register	UseReg (const MachineOperand &MO)

Variables
static cl::opt< bool >	IsCombinesDisabled ("disable-merge-into-combines", cl::Hidden, cl::desc("Disable merging into combines"))
static cl::opt< bool >	IsConst64Disabled ("disable-const64", cl::Hidden, cl::desc("Disable generation of const64"))
static cl::opt< unsigned >	MaxNumOfInstsBetweenNewValueStoreAndTFR ("max-num-inst-between-tfr-and-nv-store", cl::Hidden, cl::init(4), cl::desc("Maximum distance between a tfr feeding a store we " "consider the store still to be newifiable"))
const HexagonInstrInfo *	TII
const HexagonInstrInfo bool	ShouldCombineAggressively

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-copy-combine"

Definition at line 34 of file HexagonCopyToCombine.cpp.

Function Documentation

areCombinableOperations()

bool areCombinableOperations ( const TargetRegisterInfo * TRI, MachineInstr & HighRegInst, MachineInstr & LowRegInst, bool AllowC64 )

static

areCombinableOperations - Returns true if the two instruction can be merge into a combine (ignoring register constraints).

Definition at line 174 of file HexagonCopyToCombine.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), IsConst64Disabled, isGreaterThanNBitTFRI(), llvm::MachineOperand::isImm(), llvm_unreachable, Opc, and TRI.

INITIALIZE_PASS()

INITIALIZE_PASS	(	HexagonCopyToCombine	,
		"hexagon-copy-combine"	,
		"Hexagon Copy-To-Combine Pass"	,
		false	,
		false	) &

isEvenReg()

bool isEvenReg ( unsigned Reg )

static

Definition at line 219 of file HexagonCopyToCombine.cpp.

References assert(), contains(), llvm::Register::isPhysicalRegister(), llvm_unreachable, and Reg.

isGreaterThanNBitTFRI()

template<unsigned N>

bool isGreaterThanNBitTFRI ( const MachineInstr & I )

static

Definition at line 163 of file HexagonCopyToCombine.cpp.

References I, and llvm::isInt().

Referenced by areCombinableOperations().

isUnsafeToMoveAcross()

bool isUnsafeToMoveAcross ( MachineInstr & MI, unsigned UseReg, unsigned DestReg, const TargetRegisterInfo * TRI )

static

Returns true if it is unsafe to move a copy instruction from UseReg to DestReg over the instruction MI.

Definition at line 236 of file HexagonCopyToCombine.cpp.

References MI, TRI, and UseReg().

removeKillInfo()

void removeKillInfo ( MachineInstr & MI, unsigned RegNotKilled )

static

Definition at line 228 of file HexagonCopyToCombine.cpp.

References MI.

UseReg()

Register UseReg ( const MachineOperand & MO )

static

Definition at line 245 of file HexagonCopyToCombine.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and Register.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::AMDGPU::RegBankLegalizeHelper::applyMappingPHI(), llvm::finalizeBundle(), llvm::HexagonMCCodeEmitter::getMachineOpValue(), and isUnsafeToMoveAcross().

Variable Documentation

IsCombinesDisabled

cl::opt< bool > IsCombinesDisabled("disable-merge-into-combines", cl::Hidden, cl::desc("Disable merging into combines")) ( "disable-merge-into-combines" , cl::Hidden , cl::desc("Disable merging into combines")  )

static

IsConst64Disabled

cl::opt< bool > IsConst64Disabled("disable-const64", cl::Hidden, cl::desc("Disable generation of const64")) ( "disable-const64" , cl::Hidden , cl::desc("Disable generation of const64")  )

static

Referenced by areCombinableOperations().

MaxNumOfInstsBetweenNewValueStoreAndTFR

cl::opt< unsigned > MaxNumOfInstsBetweenNewValueStoreAndTFR("max-num-inst-between-tfr-and-nv-store", cl::Hidden, cl::init(4), cl::desc("Maximum distance between a tfr feeding a store we " "consider the store still to be newifiable")) ( "max-num-inst-between-tfr-and-nv-store" , cl::Hidden , cl::init(4) , cl::desc("Maximum distance between a tfr feeding a store we " "consider the store still to be newifiable")  )

static

ShouldCombineAggressively

const HexagonInstrInfo bool ShouldCombineAggressively

Definition at line 119 of file HexagonCopyToCombine.cpp.

TII

const HexagonInstrInfo* TII

Definition at line 118 of file HexagonCopyToCombine.cpp.