LLVM 17.0.0git
AMDGPUMCCodeEmitter.h
Go to the documentation of this file.
1//===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// CodeEmitter interface for SI codegen.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
15#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
16
17#include "llvm/ADT/APInt.h"
19
20namespace llvm {
21
22class MCInst;
23class MCInstrInfo;
24class MCOperand;
25class MCSubtargetInfo;
26
28 virtual void anchor();
29
30protected:
32
33 AMDGPUMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
34
35public:
37 APInt &Inst, APInt &Scratch,
38 const MCSubtargetInfo &STI) const;
39
40 virtual void getMachineOpValue(const MCInst &MI, const MCOperand &MO,
42 const MCSubtargetInfo &STI) const = 0;
43
44 virtual void getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
46 const MCSubtargetInfo &STI) const = 0;
47
48 virtual void getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
50 const MCSubtargetInfo &STI) const = 0;
51
52 virtual void getSDWASrcEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
54 const MCSubtargetInfo &STI) const = 0;
55
56 virtual void getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo,
57 APInt &Op,
59 const MCSubtargetInfo &STI) const = 0;
60
61 virtual void getAVOperandEncoding(const MCInst &MI, unsigned OpNo, APInt &Op,
63 const MCSubtargetInfo &STI) const = 0;
64};
65
66} // End namespace llvm
67
68#endif
This file implements a class to represent arbitrary precision integral constant values and operations...
IRTranslator LLVM IR MI
virtual void getAVOperandEncoding(const MCInst &MI, unsigned OpNo, APInt &Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
virtual void getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo, APInt &Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
virtual void getSDWASrcEncoding(const MCInst &MI, unsigned OpNo, APInt &Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
void getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, APInt &Inst, APInt &Scratch, const MCSubtargetInfo &STI) const
virtual void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
virtual void getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo, APInt &Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
AMDGPUMCCodeEmitter(const MCInstrInfo &mcii)
virtual void getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, APInt &Op, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const =0
Class for arbitrary precision integers.
Definition: APInt.h:75
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
Generic base class for all target subtargets.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18