LLVM 17.0.0git
PPCFixupKinds.h
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1//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H
10#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H
11
12#include "llvm/MC/MCFixup.h"
13
14#undef PPC
15
16namespace llvm {
17namespace PPC {
18enum Fixups {
19 // 24-bit PC relative relocation for direct branches like 'b' and 'bl'.
21
22 // 24-bit PC relative relocation for direct branches like 'b' and 'bl' where
23 // the caller does not use the TOC.
25
26 /// 14-bit PC relative relocation for conditional branches.
28
29 /// 24-bit absolute relocation for direct branches like 'ba' and 'bla'.
31
32 /// 14-bit absolute relocation for conditional branches.
34
35 /// A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like
36 /// 'li' or 'addis'.
38
39 /// A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for
40 /// instrs like 'std'.
42
43 // A 34-bit fixup corresponding to PC-relative paddi.
45
46 // A 34-bit fixup corresponding to Non-PC-relative paddi.
48
49 /// Not a true fixup, but ties a symbol to a call to __tls_get_addr for the
50 /// TLS general and local dynamic models, or inserts the thread-pointer
51 /// register number.
53
54 /// A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for
55 /// instrs like 'lxv'. Produces the same relocation as fixup_ppc_half16ds.
57
58 // Marker
61};
62}
63}
64
65#endif
@ fixup_ppc_pcrel34
Definition: PPCFixupKinds.h:44
@ fixup_ppc_brcond14abs
14-bit absolute relocation for conditional branches.
Definition: PPCFixupKinds.h:33
@ fixup_ppc_half16
A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like 'li' or 'addis'.
Definition: PPCFixupKinds.h:37
@ NumTargetFixupKinds
Definition: PPCFixupKinds.h:60
@ LastTargetFixupKind
Definition: PPCFixupKinds.h:59
@ fixup_ppc_br24_notoc
Definition: PPCFixupKinds.h:24
@ fixup_ppc_brcond14
14-bit PC relative relocation for conditional branches.
Definition: PPCFixupKinds.h:27
@ fixup_ppc_half16dq
A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for instrs like 'lxv'.
Definition: PPCFixupKinds.h:56
@ fixup_ppc_half16ds
A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for instrs like 'std'.
Definition: PPCFixupKinds.h:41
@ fixup_ppc_nofixup
Not a true fixup, but ties a symbol to a call to __tls_get_addr for the TLS general and local dynamic...
Definition: PPCFixupKinds.h:52
@ fixup_ppc_br24abs
24-bit absolute relocation for direct branches like 'ba' and 'bla'.
Definition: PPCFixupKinds.h:30
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ FirstTargetFixupKind
Definition: MCFixup.h:45