LLVM 20.0.0git
llvm::ARMBaseRegisterInfo Member List

This is the complete list of members for llvm::ARMBaseRegisterInfo, including all inherited members.

ARMBaseRegisterInfo()llvm::ARMBaseRegisterInfoexplicitprotected
BasePtrllvm::ARMBaseRegisterInfoprotected
cannotEliminateFrame(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
canRealignStack(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
doesRegClassHavePseudoInitUndef(const TargetRegisterClass *RC) const overridellvm::ARMBaseRegisterInfoinline
eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const overridellvm::ARMBaseRegisterInfo
emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, Register PredReg=Register(), unsigned MIFlags=MachineInstr::NoFlags) constllvm::ARMBaseRegisterInfovirtual
getBaseRegister() constllvm::ARMBaseRegisterInfoinline
getCalleeSavedRegs(const MachineFunction *MF) const overridellvm::ARMBaseRegisterInfo
getCalleeSavedRegsViaCopy(const MachineFunction *MF) constllvm::ARMBaseRegisterInfo
getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const overridellvm::ARMBaseRegisterInfo
getCrossCopyRegClass(const TargetRegisterClass *RC) const overridellvm::ARMBaseRegisterInfo
getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const overridellvm::ARMBaseRegisterInfo
getFrameRegister(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getIntraCallClobberedRegs(const MachineFunction *MF) const overridellvm::ARMBaseRegisterInfo
getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getLargestSuperClass(const TargetRegisterClass *RC) const overridellvm::ARMBaseRegisterInfoinline
getNoPreservedMask() const overridellvm::ARMBaseRegisterInfo
getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const overridellvm::ARMBaseRegisterInfo
getRegAllocationHints(Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const overridellvm::ARMBaseRegisterInfo
getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getReservedRegs(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getSEHRegNum(unsigned i) constllvm::ARMBaseRegisterInfoinline
getSjLjDispatchPreservedMask(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID) constllvm::ARMBaseRegisterInfo
getTLSCallPreservedMask(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
hasBasePointer(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const overridellvm::ARMBaseRegisterInfo
isFrameOffsetLegal(const MachineInstr *MI, Register BaseReg, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
isInlineAsmReadOnlyReg(const MachineFunction &MF, unsigned PhysReg) const overridellvm::ARMBaseRegisterInfo
materializeFrameBaseRegister(MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
requiresFrameIndexScavenging(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
requiresRegisterScavenging(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
requiresVirtualBaseRegisters(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
resolveFrameIndex(MachineInstr &MI, Register BaseReg, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const overridellvm::ARMBaseRegisterInfo
shouldRewriteCopySrc(const TargetRegisterClass *DefRC, unsigned DefSubReg, const TargetRegisterClass *SrcRC, unsigned SrcSubReg) const overridellvm::ARMBaseRegisterInfo
updateRegAllocHint(Register Reg, Register NewReg, MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo