LLVM  11.0.0git
llvm::HexagonMCShuffler Member List

This is the complete list of members for llvm::HexagonMCShuffler, including all inherited members.

append(MCInst const &ID, MCInst const *Extender, unsigned S)llvm::HexagonShuffler
AppliedRestrictionsllvm::HexagonShufflerprotected
applySlotRestrictions(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected
begin()llvm::HexagonShufflerinline
BundleFlagsllvm::HexagonShufflerprotected
cbegin() constllvm::HexagonShufflerinline
cend() constllvm::HexagonShufflerinline
check()llvm::HexagonShuffler
CheckFailurellvm::HexagonShufflerprotected
const_iterator typedefllvm::HexagonShuffler
const_packet_range typedefllvm::HexagonShuffler
Contextllvm::HexagonShufflerprotected
copyTo(MCInst &MCB)llvm::HexagonMCShuffler
end()llvm::HexagonShufflerinline
GetPacketSummary()llvm::HexagonShufflerprotected
HasInstWith(InstPredicate Pred) constllvm::HexagonShufflerinline
HexagonMCShuffler(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &MCB)llvm::HexagonMCShufflerinline
HexagonMCShuffler(MCContext &Context, bool Fatal, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &MCB, MCInst const &AddMI, bool InsertAtFront)llvm::HexagonMCShufflerinline
HexagonShuffler(MCContext &Context, bool ReportErrors, MCInstrInfo const &MCII, MCSubtargetInfo const &STI)llvm::HexagonShuffler
InstPredicate typedefllvm::HexagonShuffler
insts(HexagonPacket &P)llvm::HexagonShufflerinline
insts(HexagonPacket const &P) constllvm::HexagonShufflerinline
insts()llvm::HexagonShufflerinline
insts() constllvm::HexagonShufflerinline
isMemReorderDisabled() constllvm::HexagonShufflerinline
iterator typedefllvm::HexagonShuffler
Locllvm::HexagonShufflerprotected
MCIIllvm::HexagonShufflerprotected
packet_range typedefllvm::HexagonShuffler
permitNonSlot()llvm::HexagonShufflerprotected
reportError(Twine const &Msg)llvm::HexagonShuffler
ReportErrorsllvm::HexagonShufflerprotected
reset()llvm::HexagonShuffler
reshuffleTo(MCInst &MCB)llvm::HexagonMCShuffler
restrictBranchOrder(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected
restrictNoSlot1()llvm::HexagonShufflerprotected
restrictNoSlot1Store(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected
restrictPreferSlot3(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected
restrictSlot1AOK(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected
restrictStoreLoadOrder(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected
shuffle()llvm::HexagonShuffler
size() constllvm::HexagonShufflerinline
STIllvm::HexagonShufflerprotected
tryAuction(HexagonPacketSummary const &Summary) constllvm::HexagonShufflerprotected
validPacketInsts() constllvm::HexagonShufflerprotected
ValidPacketMemoryOps(HexagonPacketSummary const &Summary) constllvm::HexagonShufflerprotected
ValidResourceUsage(HexagonPacketSummary const &Summary)llvm::HexagonShufflerprotected