LLVM  15.0.0git
llvm::TargetTransformInfo::Concept Member List

This is the complete list of members for llvm::TargetTransformInfo::Concept, including all inherited members.

adjustInliningThreshold(const CallBase *CB)=0llvm::TargetTransformInfo::Conceptpure virtual
allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, bool *Fast)=0llvm::TargetTransformInfo::Conceptpure virtual
areInlineCompatible(const Function *Caller, const Function *Callee) const =0llvm::TargetTransformInfo::Conceptpure virtual
areTypesABICompatible(const Function *Caller, const Function *Callee, const ArrayRef< Type * > &Types) const =0llvm::TargetTransformInfo::Conceptpure virtual
canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const =0llvm::TargetTransformInfo::Conceptpure virtual
canMacroFuseCmp()=0llvm::TargetTransformInfo::Conceptpure virtual
canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo)=0llvm::TargetTransformInfo::Conceptpure virtual
collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const =0llvm::TargetTransformInfo::Conceptpure virtual
emitGetActiveLaneMask()=0llvm::TargetTransformInfo::Conceptpure virtual
enableAggressiveInterleaving(bool LoopHasReductions)=0llvm::TargetTransformInfo::Conceptpure virtual
enableInterleavedAccessVectorization()=0llvm::TargetTransformInfo::Conceptpure virtual
enableMaskedInterleavedAccessVectorization()=0llvm::TargetTransformInfo::Conceptpure virtual
enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const =0llvm::TargetTransformInfo::Conceptpure virtual
enableOrderedReductions()=0llvm::TargetTransformInfo::Conceptpure virtual
enableScalableVectorization() const =0llvm::TargetTransformInfo::Conceptpure virtual
enableWritePrefetching() const =0llvm::TargetTransformInfo::Conceptpure virtual
forceScalarizeMaskedGather(VectorType *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
forceScalarizeMaskedScatter(VectorType *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr)=0llvm::TargetTransformInfo::Conceptpure virtual
getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, OperandValueKind Opd1Info, OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr)=0llvm::TargetTransformInfo::Conceptpure virtual
getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, Optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getAssumedAddrSpace(const Value *V) const =0llvm::TargetTransformInfo::Conceptpure virtual
getAtomicMemIntrinsicMaxElementSize() const =0llvm::TargetTransformInfo::Conceptpure virtual
getCacheAssociativity(CacheLevel Level) const =0llvm::TargetTransformInfo::Conceptpure virtual
getCacheLineSize() const =0llvm::TargetTransformInfo::Conceptpure virtual
getCacheSize(CacheLevel Level) const =0llvm::TargetTransformInfo::Conceptpure virtual
getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)=0llvm::TargetTransformInfo::Conceptpure virtual
getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys)=0llvm::TargetTransformInfo::Conceptpure virtual
getDataLayout() const =0llvm::TargetTransformInfo::Conceptpure virtual
getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI)=0llvm::TargetTransformInfo::Conceptpure virtual
getExtendedAddReductionCost(bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput)=0llvm::TargetTransformInfo::Conceptpure virtual
getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)=0llvm::TargetTransformInfo::Conceptpure virtual
getFlatAddressSpace()=0llvm::TargetTransformInfo::Conceptpure virtual
getFPOpCost(Type *Ty)=0llvm::TargetTransformInfo::Conceptpure virtual
getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)=0llvm::TargetTransformInfo::Conceptpure virtual
getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getGISelRematGlobalCost() const =0llvm::TargetTransformInfo::Conceptpure virtual
getInlinerVectorBonusPercent()=0llvm::TargetTransformInfo::Conceptpure virtual
getInliningThresholdMultiplier()=0llvm::TargetTransformInfo::Conceptpure virtual
getInstructionLatency(const Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)=0llvm::TargetTransformInfo::Conceptpure virtual
getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty)=0llvm::TargetTransformInfo::Conceptpure virtual
getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr)=0llvm::TargetTransformInfo::Conceptpure virtual
getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getLoadStoreVecRegBitWidth(unsigned AddrSpace) const =0llvm::TargetTransformInfo::Conceptpure virtual
getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const =0llvm::TargetTransformInfo::Conceptpure virtual
getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getMaximumVF(unsigned ElemWidth, unsigned Opcode) const =0llvm::TargetTransformInfo::Conceptpure virtual
getMaxInterleaveFactor(unsigned VF)=0llvm::TargetTransformInfo::Conceptpure virtual
getMaxPrefetchIterationsAhead() const =0llvm::TargetTransformInfo::Conceptpure virtual
getMaxVScale() const =0llvm::TargetTransformInfo::Conceptpure virtual
getMemcpyCost(const Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, Optional< uint32_t > AtomicElementSize) const =0llvm::TargetTransformInfo::Conceptpure virtual
getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, Optional< uint32_t > AtomicCpySize) const =0llvm::TargetTransformInfo::Conceptpure virtual
getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
getMinimumVF(unsigned ElemWidth, bool IsScalable) const =0llvm::TargetTransformInfo::Conceptpure virtual
getMinMaxReductionCost(VectorType *Ty, VectorType *CondTy, bool IsUnsigned, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const =0llvm::TargetTransformInfo::Conceptpure virtual
getMinVectorRegisterBitWidth() const =0llvm::TargetTransformInfo::Conceptpure virtual
getNumberOfParts(Type *Tp)=0llvm::TargetTransformInfo::Conceptpure virtual
getNumberOfRegisters(unsigned ClassID) const =0llvm::TargetTransformInfo::Conceptpure virtual
getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys)=0llvm::TargetTransformInfo::Conceptpure virtual
getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType)=0llvm::TargetTransformInfo::Conceptpure virtual
getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP)=0llvm::TargetTransformInfo::Conceptpure virtual
getPopcntSupport(unsigned IntTyWidthInBit)=0llvm::TargetTransformInfo::Conceptpure virtual
getPredicatedAddrSpace(const Value *V) const =0llvm::TargetTransformInfo::Conceptpure virtual
getPredictableBranchThreshold()=0llvm::TargetTransformInfo::Conceptpure virtual
getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const =0llvm::TargetTransformInfo::Conceptpure virtual
getPrefetchDistance() const =0llvm::TargetTransformInfo::Conceptpure virtual
getRegisterBitWidth(RegisterKind K) const =0llvm::TargetTransformInfo::Conceptpure virtual
getRegisterClassForType(bool Vector, Type *Ty=nullptr) const =0llvm::TargetTransformInfo::Conceptpure virtual
getRegisterClassName(unsigned ClassID) const =0llvm::TargetTransformInfo::Conceptpure virtual
getRegUsageForType(Type *Ty)=0llvm::TargetTransformInfo::Conceptpure virtual
getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract)=0llvm::TargetTransformInfo::Conceptpure virtual
getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace)=0llvm::TargetTransformInfo::Conceptpure virtual
getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, int Index, VectorType *SubTp, ArrayRef< const Value * > Args)=0llvm::TargetTransformInfo::Conceptpure virtual
getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const =0llvm::TargetTransformInfo::Conceptpure virtual
getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const =0llvm::TargetTransformInfo::Conceptpure virtual
getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)=0llvm::TargetTransformInfo::Conceptpure virtual
getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE)=0llvm::TargetTransformInfo::Conceptpure virtual
getUserCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind)=0llvm::TargetTransformInfo::Conceptpure virtual
getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)=0llvm::TargetTransformInfo::Conceptpure virtual
getVPLegalizationStrategy(const VPIntrinsic &PI) const =0llvm::TargetTransformInfo::Conceptpure virtual
getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
getVScaleForTuning() const =0llvm::TargetTransformInfo::Conceptpure virtual
hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const =0llvm::TargetTransformInfo::Conceptpure virtual
hasBranchDivergence()=0llvm::TargetTransformInfo::Conceptpure virtual
hasDivRemOp(Type *DataType, bool IsSigned)=0llvm::TargetTransformInfo::Conceptpure virtual
hasVolatileVariant(Instruction *I, unsigned AddrSpace)=0llvm::TargetTransformInfo::Conceptpure virtual
haveFastSqrt(Type *Ty)=0llvm::TargetTransformInfo::Conceptpure virtual
instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II)=0llvm::TargetTransformInfo::Conceptpure virtual
isAlwaysUniform(const Value *V)=0llvm::TargetTransformInfo::Conceptpure virtual
isElementTypeLegalForScalableVector(Type *Ty) const =0llvm::TargetTransformInfo::Conceptpure virtual
isFCmpOrdCheaperThanFCmpZero(Type *Ty)=0llvm::TargetTransformInfo::Conceptpure virtual
isFPVectorizationPotentiallyUnsafe()=0llvm::TargetTransformInfo::Conceptpure virtual
isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo)=0llvm::TargetTransformInfo::Conceptpure virtual
isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const =0llvm::TargetTransformInfo::Conceptpure virtual
isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalAddImmediate(int64_t Imm)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalICmpImmediate(int64_t Imm)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalMaskedCompressStore(Type *DataType)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalMaskedExpandLoad(Type *DataType)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalMaskedGather(Type *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalMaskedLoad(Type *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalMaskedScatter(Type *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalMaskedStore(Type *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalNTLoad(Type *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalNTStore(Type *DataType, Align Alignment)=0llvm::TargetTransformInfo::Conceptpure virtual
isLegalToVectorizeLoad(LoadInst *LI) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalToVectorizeStore(StoreInst *SI) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const =0llvm::TargetTransformInfo::Conceptpure virtual
isLoweredToCall(const Function *F)=0llvm::TargetTransformInfo::Conceptpure virtual
isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2)=0llvm::TargetTransformInfo::Conceptpure virtual
isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const =0llvm::TargetTransformInfo::Conceptpure virtual
isNumRegsMajorCostOfLSR()=0llvm::TargetTransformInfo::Conceptpure virtual
isProfitableLSRChainElement(Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
isProfitableToHoist(Instruction *I)=0llvm::TargetTransformInfo::Conceptpure virtual
isSourceOfDivergence(const Value *V)=0llvm::TargetTransformInfo::Conceptpure virtual
isTruncateFree(Type *Ty1, Type *Ty2)=0llvm::TargetTransformInfo::Conceptpure virtual
isTypeLegal(Type *Ty)=0llvm::TargetTransformInfo::Conceptpure virtual
LSRWithInstrQueries()=0llvm::TargetTransformInfo::Conceptpure virtual
preferInLoopReduction(unsigned Opcode, Type *Ty, ReductionFlags) const =0llvm::TargetTransformInfo::Conceptpure virtual
preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, ReductionFlags) const =0llvm::TargetTransformInfo::Conceptpure virtual
preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *TLI, DominatorTree *DT, const LoopAccessInfo *LAI)=0llvm::TargetTransformInfo::Conceptpure virtual
prefersVectorizedAddressing()=0llvm::TargetTransformInfo::Conceptpure virtual
rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const =0llvm::TargetTransformInfo::Conceptpure virtual
shouldBuildLookupTables()=0llvm::TargetTransformInfo::Conceptpure virtual
shouldBuildLookupTablesForConstant(Constant *C)=0llvm::TargetTransformInfo::Conceptpure virtual
shouldBuildRelLookupTables()=0llvm::TargetTransformInfo::Conceptpure virtual
shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader)=0llvm::TargetTransformInfo::Conceptpure virtual
shouldExpandReduction(const IntrinsicInst *II) const =0llvm::TargetTransformInfo::Conceptpure virtual
shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const =0llvm::TargetTransformInfo::Conceptpure virtual
simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)=0llvm::TargetTransformInfo::Conceptpure virtual
simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)=0llvm::TargetTransformInfo::Conceptpure virtual
supportsEfficientVectorElementLoadStore()=0llvm::TargetTransformInfo::Conceptpure virtual
supportsScalableVectors() const =0llvm::TargetTransformInfo::Conceptpure virtual
supportsTailCalls()=0llvm::TargetTransformInfo::Conceptpure virtual
useAA()=0llvm::TargetTransformInfo::Conceptpure virtual
useColdCCForColdCall(Function &F)=0llvm::TargetTransformInfo::Conceptpure virtual
useGPUDivergenceAnalysis()=0llvm::TargetTransformInfo::Conceptpure virtual
~Concept()=0llvm::TargetTransformInfo::Conceptpure virtual