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LLVM 20.0.0git
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This is the complete list of members for llvm::ARMRegisterInfo, including all inherited members.
| anchor() | llvm::ARMRegisterInfo | virtual |
| ARMBaseRegisterInfo() | llvm::ARMBaseRegisterInfo | explicitprotected |
| ARMRegisterInfo() | llvm::ARMRegisterInfo | |
| BasePtr | llvm::ARMBaseRegisterInfo | protected |
| cannotEliminateFrame(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| canRealignStack(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override | llvm::ARMBaseRegisterInfo | |
| emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, Register PredReg=Register(), unsigned MIFlags=MachineInstr::NoFlags) const | llvm::ARMBaseRegisterInfo | virtual |
| getBaseRegister() const | llvm::ARMBaseRegisterInfo | inline |
| getCalleeSavedRegs(const MachineFunction *MF) const override | llvm::ARMBaseRegisterInfo | |
| getCalleeSavedRegsViaCopy(const MachineFunction *MF) const | llvm::ARMBaseRegisterInfo | |
| getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override | llvm::ARMBaseRegisterInfo | |
| getCrossCopyRegClass(const TargetRegisterClass *RC) const override | llvm::ARMBaseRegisterInfo | |
| getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const override | llvm::ARMBaseRegisterInfo | |
| getFrameRegister(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getIntraCallClobberedRegs(const MachineFunction *MF) const override | llvm::ARMBaseRegisterInfo | |
| getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getNoPreservedMask() const override | llvm::ARMBaseRegisterInfo | |
| getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override | llvm::ARMBaseRegisterInfo | |
| getRegAllocationHints(Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override | llvm::ARMBaseRegisterInfo | |
| getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getReservedRegs(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| getSEHRegNum(unsigned i) const | llvm::ARMBaseRegisterInfo | inline |
| getSjLjDispatchPreservedMask(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID) const | llvm::ARMBaseRegisterInfo | |
| getTLSCallPreservedMask(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| hasBasePointer(const MachineFunction &MF) const | llvm::ARMBaseRegisterInfo | |
| isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const override | llvm::ARMBaseRegisterInfo | |
| isFrameOffsetLegal(const MachineInstr *MI, Register BaseReg, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| isInlineAsmReadOnlyReg(const MachineFunction &MF, unsigned PhysReg) const override | llvm::ARMBaseRegisterInfo | |
| materializeFrameBaseRegister(MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| requiresFrameIndexScavenging(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| requiresRegisterScavenging(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| requiresVirtualBaseRegisters(const MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo | |
| resolveFrameIndex(MachineInstr &MI, Register BaseReg, int64_t Offset) const override | llvm::ARMBaseRegisterInfo | |
| shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override | llvm::ARMBaseRegisterInfo | |
| shouldRewriteCopySrc(const TargetRegisterClass *DefRC, unsigned DefSubReg, const TargetRegisterClass *SrcRC, unsigned SrcSubReg) const override | llvm::ARMBaseRegisterInfo | |
| updateRegAllocHint(Register Reg, Register NewReg, MachineFunction &MF) const override | llvm::ARMBaseRegisterInfo |
1.9.6