| addAbsMemOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addAVX512RCOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addDstIdxOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addExpr(MCInst &Inst, const MCExpr *Expr) const | llvm::X86Operand | inline |
| addGR16orGR32orGR64Operands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addGR32orGR64Operands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addImmOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addMaskPairOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addMemOffsOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addMemOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addRegOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| AddressOf | llvm::X86Operand | |
| addSrcIdxOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| addTILEPairOperands(MCInst &Inst, unsigned N) const | llvm::X86Operand | inline |
| CreateDXReg(SMLoc StartLoc, SMLoc EndLoc) | llvm::X86Operand | inlinestatic |
| CreateImm(const MCExpr *Val, SMLoc StartLoc, SMLoc EndLoc, StringRef SymName=StringRef(), void *OpDecl=nullptr, bool GlobalRef=true) | llvm::X86Operand | inlinestatic |
| CreateMem(unsigned ModeSize, const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc, unsigned Size=0, StringRef SymName=StringRef(), void *OpDecl=nullptr, unsigned FrontendSize=0, bool UseUpRegs=false, bool MaybeDirectBranchDest=true) | llvm::X86Operand | inlinestatic |
| CreateMem(unsigned ModeSize, MCRegister SegReg, const MCExpr *Disp, MCRegister BaseReg, MCRegister IndexReg, unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size=0, MCRegister DefaultBaseReg=MCRegister(), StringRef SymName=StringRef(), void *OpDecl=nullptr, unsigned FrontendSize=0, bool UseUpRegs=false, bool MaybeDirectBranchDest=true) | llvm::X86Operand | inlinestatic |
| CreatePrefix(unsigned Prefixes, SMLoc StartLoc, SMLoc EndLoc) | llvm::X86Operand | inlinestatic |
| CreateReg(MCRegister Reg, SMLoc StartLoc, SMLoc EndLoc, bool AddressOf=false, SMLoc OffsetOfLoc=SMLoc(), StringRef SymName=StringRef(), void *OpDecl=nullptr) | llvm::X86Operand | inlinestatic |
| CreateToken(StringRef Str, SMLoc Loc) | llvm::X86Operand | inlinestatic |
| dump() const | llvm::MCParsedAsmOperand | virtual |
| DXRegister enum value | llvm::X86Operand | |
| EndLoc | llvm::X86Operand | |
| getConstraint() | llvm::MCParsedAsmOperand | inline |
| getEndLoc() const override | llvm::X86Operand | inlinevirtual |
| getImm() const | llvm::X86Operand | inline |
| getLocRange() const | llvm::X86Operand | inline |
| getMCOperandNum() | llvm::MCParsedAsmOperand | inline |
| getMemBaseReg() const | llvm::X86Operand | inline |
| getMemDefaultBaseReg() const | llvm::X86Operand | inline |
| getMemDisp() const | llvm::X86Operand | inline |
| getMemFrontendSize() const | llvm::X86Operand | inline |
| getMemIndexReg() const | llvm::X86Operand | inline |
| getMemModeSize() const | llvm::X86Operand | inline |
| getMemScale() const | llvm::X86Operand | inline |
| getMemSegReg() const | llvm::X86Operand | inline |
| getOffsetOfLoc() const override | llvm::X86Operand | inlinevirtual |
| getOpDecl() override | llvm::X86Operand | inlinevirtual |
| getPrefix() const | llvm::X86Operand | inline |
| getReg() const override | llvm::X86Operand | inlinevirtual |
| getStartLoc() const override | llvm::X86Operand | inlinevirtual |
| getSymName() override | llvm::X86Operand | inlinevirtual |
| getToken() const | llvm::X86Operand | inline |
| Imm | llvm::X86Operand | |
| Immediate enum value | llvm::X86Operand | |
| isAbsMem() const | llvm::X86Operand | inline |
| isAbsMem16() const | llvm::X86Operand | inline |
| isAVX512RC() const | llvm::X86Operand | inline |
| isDstIdx() const | llvm::X86Operand | inline |
| isDstIdx16() const | llvm::X86Operand | inline |
| isDstIdx32() const | llvm::X86Operand | inline |
| isDstIdx64() const | llvm::X86Operand | inline |
| isDstIdx8() const | llvm::X86Operand | inline |
| isDXReg() const | llvm::X86Operand | inline |
| isGR16orGR32orGR64() const | llvm::X86Operand | inline |
| isGR32orGR64() const | llvm::X86Operand | inline |
| isImm() const override | llvm::X86Operand | inlinevirtual |
| isImmSExti16i8() const | llvm::X86Operand | inline |
| isImmSExti32i8() const | llvm::X86Operand | inline |
| isImmSExti64i32() const | llvm::X86Operand | inline |
| isImmSExti64i8() const | llvm::X86Operand | inline |
| isImmUnsignedi4() const | llvm::X86Operand | inline |
| isImmUnsignedi8() const | llvm::X86Operand | inline |
| isMaybeDirectBranchDest() const | llvm::X86Operand | inline |
| isMem() const override | llvm::X86Operand | inlinevirtual |
| isMem128() const | llvm::X86Operand | inline |
| isMem128_RC128() const | llvm::X86Operand | inline |
| isMem128_RC128X() const | llvm::X86Operand | inline |
| isMem128_RC256() const | llvm::X86Operand | inline |
| isMem128_RC256X() const | llvm::X86Operand | inline |
| isMem16() const | llvm::X86Operand | inline |
| isMem256() const | llvm::X86Operand | inline |
| isMem256_RC128() const | llvm::X86Operand | inline |
| isMem256_RC128X() const | llvm::X86Operand | inline |
| isMem256_RC256() const | llvm::X86Operand | inline |
| isMem256_RC256X() const | llvm::X86Operand | inline |
| isMem256_RC512() const | llvm::X86Operand | inline |
| isMem32() const | llvm::X86Operand | inline |
| isMem512() const | llvm::X86Operand | inline |
| isMem512_GR16() const | llvm::X86Operand | inline |
| isMem512_GR32() const | llvm::X86Operand | inline |
| isMem512_GR64() const | llvm::X86Operand | inline |
| isMem512_RC256X() const | llvm::X86Operand | inline |
| isMem512_RC512() const | llvm::X86Operand | inline |
| isMem64() const | llvm::X86Operand | inline |
| isMem64_RC128() const | llvm::X86Operand | inline |
| isMem64_RC128X() const | llvm::X86Operand | inline |
| isMem8() const | llvm::X86Operand | inline |
| isMem80() const | llvm::X86Operand | inline |
| isMemIndexReg(unsigned LowR, unsigned HighR) const | llvm::X86Operand | inline |
| isMemOffs() const | llvm::X86Operand | inline |
| isMemOffs16_16() const | llvm::X86Operand | inline |
| isMemOffs16_32() const | llvm::X86Operand | inline |
| isMemOffs16_8() const | llvm::X86Operand | inline |
| isMemOffs32_16() const | llvm::X86Operand | inline |
| isMemOffs32_32() const | llvm::X86Operand | inline |
| isMemOffs32_64() const | llvm::X86Operand | inline |
| isMemOffs32_8() const | llvm::X86Operand | inline |
| isMemOffs64_16() const | llvm::X86Operand | inline |
| isMemOffs64_32() const | llvm::X86Operand | inline |
| isMemOffs64_64() const | llvm::X86Operand | inline |
| isMemOffs64_8() const | llvm::X86Operand | inline |
| isMemUnsized() const | llvm::X86Operand | inline |
| isMemUseUpRegs() const override | llvm::X86Operand | inlinevirtual |
| isOffsetOfLocal() const override | llvm::X86Operand | inlinevirtual |
| isPrefix() const | llvm::X86Operand | inline |
| isReg() const override | llvm::X86Operand | inlinevirtual |
| isSibMem() const | llvm::X86Operand | inline |
| isSrcIdx() const | llvm::X86Operand | inline |
| isSrcIdx16() const | llvm::X86Operand | inline |
| isSrcIdx32() const | llvm::X86Operand | inline |
| isSrcIdx64() const | llvm::X86Operand | inline |
| isSrcIdx8() const | llvm::X86Operand | inline |
| isTILEPair() const | llvm::X86Operand | inline |
| isToken() const override | llvm::X86Operand | inlinevirtual |
| isVectorReg() const | llvm::X86Operand | inline |
| isVK16Pair() const | llvm::X86Operand | inline |
| isVK1Pair() const | llvm::X86Operand | inline |
| isVK2Pair() const | llvm::X86Operand | inline |
| isVK4Pair() const | llvm::X86Operand | inline |
| isVK8Pair() const | llvm::X86Operand | inline |
| Kind | llvm::X86Operand | |
| KindTy enum name | llvm::X86Operand | |
| MCParsedAsmOperand()=default | llvm::MCParsedAsmOperand | protected |
| MCParsedAsmOperand(const MCParsedAsmOperand &RHS)=default | llvm::MCParsedAsmOperand | protected |
| Mem | llvm::X86Operand | |
| Memory enum value | llvm::X86Operand | |
| needAddressOf() const override | llvm::X86Operand | inlinevirtual |
| OffsetOfLoc | llvm::X86Operand | |
| OpDecl | llvm::X86Operand | |
| operator=(const MCParsedAsmOperand &)=default | llvm::MCParsedAsmOperand | protected |
| Pref | llvm::X86Operand | |
| Prefix enum value | llvm::X86Operand | |
| print(raw_ostream &OS) const override | llvm::X86Operand | inlinevirtual |
| Reg | llvm::X86Operand | |
| Register enum value | llvm::X86Operand | |
| setConstraint(StringRef C) | llvm::MCParsedAsmOperand | inline |
| setMCOperandNum(unsigned OpNum) | llvm::MCParsedAsmOperand | inline |
| setTokenValue(StringRef Value) | llvm::X86Operand | inline |
| StartLoc | llvm::X86Operand | |
| SymName | llvm::X86Operand | |
| Tok | llvm::X86Operand | |
| Token enum value | llvm::X86Operand | |
| UseUpRegs | llvm::X86Operand | |
| X86Operand(KindTy K, SMLoc Start, SMLoc End) | llvm::X86Operand | inline |
| ~MCParsedAsmOperand()=default | llvm::MCParsedAsmOperand | virtual |
