Line data Source code
1 : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2 : |* *|
3 : |* Calling Convention Implementation Fragment *|
4 : |* *|
5 : |* Automatically generated file, do not edit! *|
6 : |* *|
7 : \*===----------------------------------------------------------------------===*/
8 :
9 : static bool CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
10 : MVT LocVT, CCValAssign::LocInfo LocInfo,
11 : ISD::ArgFlagsTy ArgFlags, CCState &State);
12 : static bool CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT,
13 : MVT LocVT, CCValAssign::LocInfo LocInfo,
14 : ISD::ArgFlagsTy ArgFlags, CCState &State);
15 : static bool CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT,
16 : MVT LocVT, CCValAssign::LocInfo LocInfo,
17 : ISD::ArgFlagsTy ArgFlags, CCState &State);
18 : static bool CC_AArch64_GHC(unsigned ValNo, MVT ValVT,
19 : MVT LocVT, CCValAssign::LocInfo LocInfo,
20 : ISD::ArgFlagsTy ArgFlags, CCState &State);
21 : static bool CC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
22 : MVT LocVT, CCValAssign::LocInfo LocInfo,
23 : ISD::ArgFlagsTy ArgFlags, CCState &State);
24 : static bool CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT,
25 : MVT LocVT, CCValAssign::LocInfo LocInfo,
26 : ISD::ArgFlagsTy ArgFlags, CCState &State);
27 : static bool RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
28 : MVT LocVT, CCValAssign::LocInfo LocInfo,
29 : ISD::ArgFlagsTy ArgFlags, CCState &State);
30 : static bool RetCC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
31 : MVT LocVT, CCValAssign::LocInfo LocInfo,
32 : ISD::ArgFlagsTy ArgFlags, CCState &State);
33 :
34 :
35 23080 : static bool CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
36 : MVT LocVT, CCValAssign::LocInfo LocInfo,
37 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
38 :
39 23080 : if (LocVT == MVT::iPTR) {
40 0 : LocVT = MVT::i64;
41 0 : LocInfo = CCValAssign::BCvt;
42 : }
43 :
44 23080 : if (LocVT == MVT::v2f32) {
45 490 : LocVT = MVT::v2i32;
46 490 : LocInfo = CCValAssign::BCvt;
47 : }
48 :
49 23080 : if (LocVT == MVT::v2f64 ||
50 : LocVT == MVT::v4f32) {
51 1090 : LocVT = MVT::v2i64;
52 1090 : LocInfo = CCValAssign::BCvt;
53 : }
54 :
55 23080 : if (State.getMachineFunction().getDataLayout().isBigEndian()) {
56 1554 : if (LocVT == MVT::v2i32 ||
57 1554 : LocVT == MVT::v2f32 ||
58 1517 : LocVT == MVT::v4i16 ||
59 3132 : LocVT == MVT::v4f16 ||
60 : LocVT == MVT::v8i8) {
61 139 : LocVT = MVT::f64;
62 139 : LocInfo = CCValAssign::BCvt;
63 : }
64 : }
65 :
66 23080 : if (State.getMachineFunction().getDataLayout().isBigEndian()) {
67 1532 : if (LocVT == MVT::v2i64 ||
68 1532 : LocVT == MVT::v2f64 ||
69 1496 : LocVT == MVT::v4i32 ||
70 1496 : LocVT == MVT::v4f32 ||
71 1460 : LocVT == MVT::v8i16 ||
72 3074 : LocVT == MVT::v8f16 ||
73 : LocVT == MVT::v16i8) {
74 196 : LocVT = MVT::f128;
75 196 : LocInfo = CCValAssign::BCvt;
76 : }
77 : }
78 :
79 23080 : if (ArgFlags.isSRet()) {
80 13 : if (LocVT == MVT::i64) {
81 13 : if (unsigned Reg = State.AllocateReg(AArch64::X8, AArch64::W8)) {
82 26 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
83 13 : return false;
84 : }
85 : }
86 : }
87 :
88 23067 : if (ArgFlags.isByVal()) {
89 15 : State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
90 15 : return false;
91 : }
92 :
93 23052 : if (ArgFlags.isNest()) {
94 : if (unsigned Reg = State.AllocateReg(AArch64::X18)) {
95 4 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
96 2 : return false;
97 : }
98 : }
99 :
100 23050 : if (ArgFlags.isSwiftSelf()) {
101 14 : if (LocVT == MVT::i64) {
102 14 : if (unsigned Reg = State.AllocateReg(AArch64::X20, AArch64::W20)) {
103 28 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
104 14 : return false;
105 : }
106 : }
107 : }
108 :
109 23036 : if (ArgFlags.isSwiftError()) {
110 6 : if (LocVT == MVT::i64) {
111 6 : if (unsigned Reg = State.AllocateReg(AArch64::X21, AArch64::W21)) {
112 12 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
113 6 : return false;
114 : }
115 : }
116 : }
117 :
118 23030 : if (ArgFlags.isInConsecutiveRegs()) {
119 873 : if (CC_AArch64_Custom_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
120 : return false;
121 : }
122 :
123 22667 : if (LocVT == MVT::i1 ||
124 44696 : LocVT == MVT::i8 ||
125 : LocVT == MVT::i16) {
126 1259 : LocVT = MVT::i32;
127 1259 : if (ArgFlags.isSExt())
128 6 : LocInfo = CCValAssign::SExt;
129 1253 : else if (ArgFlags.isZExt())
130 42 : LocInfo = CCValAssign::ZExt;
131 : else
132 1211 : LocInfo = CCValAssign::AExt;
133 : }
134 :
135 22677 : if (LocVT == MVT::i32) {
136 : static const MCPhysReg RegList1[] = {
137 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
138 : };
139 : static const MCPhysReg RegList2[] = {
140 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
141 : };
142 4572 : if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
143 9016 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
144 4508 : return false;
145 : }
146 : }
147 :
148 18169 : if (LocVT == MVT::i64) {
149 6675 : if (ArgFlags.isSplit()) {
150 : static const MCPhysReg RegList3[] = {
151 : AArch64::X0, AArch64::X2, AArch64::X4, AArch64::X6
152 : };
153 : static const MCPhysReg RegList4[] = {
154 : AArch64::X0, AArch64::X1, AArch64::X3, AArch64::X5
155 : };
156 160 : if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
157 222 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
158 111 : return false;
159 : }
160 : }
161 : }
162 :
163 18058 : if (LocVT == MVT::i64) {
164 6564 : if (ArgFlags.isSplit()) {
165 : static const MCPhysReg ShadowRegList5[] = {
166 : AArch64::X7
167 : };
168 49 : unsigned Offset6 = State.AllocateStack(8, 16, ShadowRegList5);
169 98 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
170 49 : return false;
171 : }
172 : }
173 :
174 18009 : if (LocVT == MVT::i64) {
175 : static const MCPhysReg RegList7[] = {
176 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
177 : };
178 : static const MCPhysReg RegList8[] = {
179 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
180 : };
181 6515 : if (unsigned Reg = State.AllocateReg(RegList7, RegList8)) {
182 12816 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
183 6408 : return false;
184 : }
185 : }
186 :
187 11601 : if (LocVT == MVT::f16) {
188 : static const MCPhysReg RegList9[] = {
189 : AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
190 : };
191 : static const MCPhysReg RegList10[] = {
192 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
193 : };
194 346 : if (unsigned Reg = State.AllocateReg(RegList9, RegList10)) {
195 692 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
196 346 : return false;
197 : }
198 : }
199 :
200 11255 : if (LocVT == MVT::f32) {
201 : static const MCPhysReg RegList11[] = {
202 : AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
203 : };
204 : static const MCPhysReg RegList12[] = {
205 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
206 : };
207 925 : if (unsigned Reg = State.AllocateReg(RegList11, RegList12)) {
208 1840 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
209 920 : return false;
210 : }
211 : }
212 :
213 10335 : if (LocVT == MVT::f64) {
214 : static const MCPhysReg RegList13[] = {
215 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
216 : };
217 : static const MCPhysReg RegList14[] = {
218 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
219 : };
220 800 : if (unsigned Reg = State.AllocateReg(RegList13, RegList14)) {
221 1564 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
222 782 : return false;
223 : }
224 : }
225 :
226 9343 : if (LocVT == MVT::v1i64 ||
227 7961 : LocVT == MVT::v2i32 ||
228 6933 : LocVT == MVT::v4i16 ||
229 6416 : LocVT == MVT::v8i8 ||
230 6272 : LocVT == MVT::v1f64 ||
231 15825 : LocVT == MVT::v2f32 ||
232 : LocVT == MVT::v4f16) {
233 : static const MCPhysReg RegList15[] = {
234 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
235 : };
236 : static const MCPhysReg RegList16[] = {
237 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
238 : };
239 3504 : if (unsigned Reg = State.AllocateReg(RegList15, RegList16)) {
240 7006 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
241 3503 : return false;
242 : }
243 : }
244 :
245 5497 : if (LocVT == MVT::f128 ||
246 3814 : LocVT == MVT::v2i64 ||
247 2074 : LocVT == MVT::v4i32 ||
248 1029 : LocVT == MVT::v8i16 ||
249 421 : LocVT == MVT::v16i8 ||
250 421 : LocVT == MVT::v4f32 ||
251 6471 : LocVT == MVT::v2f64 ||
252 : LocVT == MVT::v8f16) {
253 : static const MCPhysReg RegList17[] = {
254 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
255 : };
256 5850 : if (unsigned Reg = State.AllocateReg(RegList17)) {
257 11690 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
258 5845 : return false;
259 : }
260 : }
261 :
262 205 : if (LocVT == MVT::i1 ||
263 205 : LocVT == MVT::i8 ||
264 410 : LocVT == MVT::i16 ||
265 : LocVT == MVT::f16) {
266 0 : unsigned Offset18 = State.AllocateStack(8, 8);
267 0 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset18, LocVT, LocInfo));
268 0 : return false;
269 : }
270 :
271 205 : if (LocVT == MVT::i32 ||
272 : LocVT == MVT::f32) {
273 69 : unsigned Offset19 = State.AllocateStack(8, 8);
274 138 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset19, LocVT, LocInfo));
275 69 : return false;
276 : }
277 :
278 29 : if (LocVT == MVT::i64 ||
279 11 : LocVT == MVT::f64 ||
280 11 : LocVT == MVT::v1f64 ||
281 11 : LocVT == MVT::v2f32 ||
282 11 : LocVT == MVT::v1i64 ||
283 11 : LocVT == MVT::v2i32 ||
284 11 : LocVT == MVT::v4i16 ||
285 147 : LocVT == MVT::v8i8 ||
286 : LocVT == MVT::v4f16) {
287 126 : unsigned Offset20 = State.AllocateStack(8, 8);
288 252 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset20, LocVT, LocInfo));
289 126 : return false;
290 : }
291 :
292 9 : if (LocVT == MVT::f128 ||
293 6 : LocVT == MVT::v2i64 ||
294 6 : LocVT == MVT::v4i32 ||
295 6 : LocVT == MVT::v8i16 ||
296 6 : LocVT == MVT::v16i8 ||
297 6 : LocVT == MVT::v4f32 ||
298 16 : LocVT == MVT::v2f64 ||
299 : LocVT == MVT::v8f16) {
300 5 : unsigned Offset21 = State.AllocateStack(16, 16);
301 10 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset21, LocVT, LocInfo));
302 5 : return false;
303 : }
304 :
305 : return true; // CC didn't match.
306 : }
307 :
308 :
309 7856 : static bool CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT,
310 : MVT LocVT, CCValAssign::LocInfo LocInfo,
311 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
312 :
313 7856 : if (LocVT == MVT::iPTR) {
314 0 : LocVT = MVT::i64;
315 0 : LocInfo = CCValAssign::BCvt;
316 : }
317 :
318 7856 : if (LocVT == MVT::v2f32) {
319 98 : LocVT = MVT::v2i32;
320 98 : LocInfo = CCValAssign::BCvt;
321 : }
322 :
323 7755 : if (LocVT == MVT::v2f64 ||
324 15503 : LocVT == MVT::v4f32 ||
325 : LocVT == MVT::f128) {
326 225 : LocVT = MVT::v2i64;
327 225 : LocInfo = CCValAssign::BCvt;
328 : }
329 :
330 7856 : if (ArgFlags.isSRet()) {
331 27 : if (LocVT == MVT::i64) {
332 27 : if (unsigned Reg = State.AllocateReg(AArch64::X8, AArch64::W8)) {
333 54 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
334 27 : return false;
335 : }
336 : }
337 : }
338 :
339 7829 : if (ArgFlags.isByVal()) {
340 0 : State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
341 0 : return false;
342 : }
343 :
344 7829 : if (ArgFlags.isSwiftSelf()) {
345 43 : if (LocVT == MVT::i64) {
346 43 : if (unsigned Reg = State.AllocateReg(AArch64::X20, AArch64::W20)) {
347 86 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
348 43 : return false;
349 : }
350 : }
351 : }
352 :
353 7786 : if (ArgFlags.isSwiftError()) {
354 46 : if (LocVT == MVT::i64) {
355 46 : if (unsigned Reg = State.AllocateReg(AArch64::X21, AArch64::W21)) {
356 92 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
357 46 : return false;
358 : }
359 : }
360 : }
361 :
362 7740 : if (ArgFlags.isInConsecutiveRegs()) {
363 273 : if (CC_AArch64_Custom_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
364 : return false;
365 : }
366 :
367 7448 : if (LocVT == MVT::i1 ||
368 14723 : LocVT == MVT::i8 ||
369 : LocVT == MVT::i16) {
370 277 : LocVT = MVT::i32;
371 277 : if (ArgFlags.isSExt())
372 105 : LocInfo = CCValAssign::SExt;
373 172 : else if (ArgFlags.isZExt())
374 107 : LocInfo = CCValAssign::ZExt;
375 : else
376 65 : LocInfo = CCValAssign::AExt;
377 : }
378 :
379 7467 : if (LocVT == MVT::i32) {
380 : static const MCPhysReg RegList1[] = {
381 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
382 : };
383 : static const MCPhysReg RegList2[] = {
384 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
385 : };
386 1312 : if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
387 2390 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
388 1195 : return false;
389 : }
390 : }
391 :
392 6272 : if (LocVT == MVT::i64) {
393 4367 : if (ArgFlags.isSplit()) {
394 : static const MCPhysReg RegList3[] = {
395 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6
396 : };
397 : static const MCPhysReg RegList4[] = {
398 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6
399 : };
400 63 : if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
401 86 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
402 43 : return false;
403 : }
404 : }
405 : }
406 :
407 6229 : if (LocVT == MVT::i64) {
408 4324 : if (ArgFlags.isSplit()) {
409 : static const MCPhysReg ShadowRegList5[] = {
410 : AArch64::X7
411 : };
412 20 : unsigned Offset6 = State.AllocateStack(8, 16, ShadowRegList5);
413 40 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
414 20 : return false;
415 : }
416 : }
417 :
418 6209 : if (LocVT == MVT::i64) {
419 : static const MCPhysReg RegList7[] = {
420 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
421 : };
422 : static const MCPhysReg RegList8[] = {
423 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
424 : };
425 4304 : if (unsigned Reg = State.AllocateReg(RegList7, RegList8)) {
426 5258 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
427 2629 : return false;
428 : }
429 : }
430 :
431 3580 : if (LocVT == MVT::f16) {
432 : static const MCPhysReg RegList9[] = {
433 : AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
434 : };
435 : static const MCPhysReg RegList10[] = {
436 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
437 : };
438 14 : if (unsigned Reg = State.AllocateReg(RegList9, RegList10)) {
439 28 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
440 14 : return false;
441 : }
442 : }
443 :
444 3566 : if (LocVT == MVT::f32) {
445 : static const MCPhysReg RegList11[] = {
446 : AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
447 : };
448 : static const MCPhysReg RegList12[] = {
449 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
450 : };
451 282 : if (unsigned Reg = State.AllocateReg(RegList11, RegList12)) {
452 538 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
453 269 : return false;
454 : }
455 : }
456 :
457 3297 : if (LocVT == MVT::f64) {
458 : static const MCPhysReg RegList13[] = {
459 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
460 : };
461 : static const MCPhysReg RegList14[] = {
462 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
463 : };
464 277 : if (unsigned Reg = State.AllocateReg(RegList13, RegList14)) {
465 498 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
466 249 : return false;
467 : }
468 : }
469 :
470 2973 : if (LocVT == MVT::v1i64 ||
471 2761 : LocVT == MVT::v2i32 ||
472 2672 : LocVT == MVT::v4i16 ||
473 2589 : LocVT == MVT::v8i8 ||
474 2512 : LocVT == MVT::v1f64 ||
475 5560 : LocVT == MVT::v2f32 ||
476 : LocVT == MVT::v4f16) {
477 : static const MCPhysReg RegList15[] = {
478 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
479 : };
480 : static const MCPhysReg RegList16[] = {
481 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
482 : };
483 537 : if (unsigned Reg = State.AllocateReg(RegList15, RegList16)) {
484 1066 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
485 533 : return false;
486 : }
487 : }
488 :
489 2208 : if (LocVT == MVT::v2i64 ||
490 2037 : LocVT == MVT::v4i32 ||
491 1950 : LocVT == MVT::v8i16 ||
492 1837 : LocVT == MVT::v16i8 ||
493 1837 : LocVT == MVT::v4f32 ||
494 4352 : LocVT == MVT::v2f64 ||
495 : LocVT == MVT::v8f16) {
496 : static const MCPhysReg RegList17[] = {
497 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
498 : };
499 678 : if (unsigned Reg = State.AllocateReg(RegList17)) {
500 1348 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
501 674 : return false;
502 : }
503 : }
504 :
505 1841 : if (ValVT == MVT::i1 || ValVT == MVT::i8) {
506 39 : unsigned Offset18 = State.AllocateStack(1, 1);
507 78 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset18, LocVT, LocInfo));
508 39 : return false;
509 : }
510 :
511 1802 : if (ValVT == MVT::i16 || ValVT == MVT::f16) {
512 8 : unsigned Offset19 = State.AllocateStack(2, 2);
513 16 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset19, LocVT, LocInfo));
514 8 : return false;
515 : }
516 :
517 1794 : if (LocVT == MVT::i32 ||
518 : LocVT == MVT::f32) {
519 83 : unsigned Offset20 = State.AllocateStack(4, 4);
520 166 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset20, LocVT, LocInfo));
521 83 : return false;
522 : }
523 :
524 36 : if (LocVT == MVT::i64 ||
525 8 : LocVT == MVT::f64 ||
526 8 : LocVT == MVT::v1f64 ||
527 8 : LocVT == MVT::v2f32 ||
528 8 : LocVT == MVT::v1i64 ||
529 4 : LocVT == MVT::v2i32 ||
530 4 : LocVT == MVT::v4i16 ||
531 1715 : LocVT == MVT::v8i8 ||
532 : LocVT == MVT::v4f16) {
533 1707 : unsigned Offset21 = State.AllocateStack(8, 8);
534 3414 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset21, LocVT, LocInfo));
535 1707 : return false;
536 : }
537 :
538 4 : if (LocVT == MVT::v2i64 ||
539 0 : LocVT == MVT::v4i32 ||
540 0 : LocVT == MVT::v8i16 ||
541 0 : LocVT == MVT::v16i8 ||
542 0 : LocVT == MVT::v4f32 ||
543 4 : LocVT == MVT::v2f64 ||
544 : LocVT == MVT::v8f16) {
545 4 : unsigned Offset22 = State.AllocateStack(16, 16);
546 8 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset22, LocVT, LocInfo));
547 4 : return false;
548 : }
549 :
550 : return true; // CC didn't match.
551 : }
552 :
553 :
554 48 : static bool CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT,
555 : MVT LocVT, CCValAssign::LocInfo LocInfo,
556 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
557 :
558 48 : if (LocVT == MVT::iPTR) {
559 0 : LocVT = MVT::i64;
560 : LocInfo = CCValAssign::BCvt;
561 : }
562 :
563 48 : if (LocVT == MVT::v2f32) {
564 0 : LocVT = MVT::v2i32;
565 : LocInfo = CCValAssign::BCvt;
566 : }
567 :
568 48 : if (LocVT == MVT::v2f64 ||
569 96 : LocVT == MVT::v4f32 ||
570 : LocVT == MVT::f128) {
571 0 : LocVT = MVT::v2i64;
572 : LocInfo = CCValAssign::BCvt;
573 : }
574 :
575 48 : if (ArgFlags.isInConsecutiveRegs()) {
576 5 : if (CC_AArch64_Custom_Stack_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
577 : return false;
578 : }
579 :
580 42 : if (LocVT == MVT::i8 ||
581 84 : LocVT == MVT::i16 ||
582 : LocVT == MVT::i32) {
583 35 : LocVT = MVT::i64;
584 35 : if (ArgFlags.isSExt())
585 : LocInfo = CCValAssign::SExt;
586 35 : else if (ArgFlags.isZExt())
587 : LocInfo = CCValAssign::ZExt;
588 : else
589 : LocInfo = CCValAssign::AExt;
590 : }
591 :
592 43 : if (LocVT == MVT::f16 ||
593 : LocVT == MVT::f32) {
594 2 : LocVT = MVT::f64;
595 : LocInfo = CCValAssign::FPExt;
596 : }
597 :
598 43 : if (LocVT == MVT::i64) {
599 38 : if (ArgFlags.isSplit()) {
600 1 : unsigned Offset1 = State.AllocateStack(8, 16);
601 1 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
602 1 : return false;
603 : }
604 : }
605 :
606 5 : if (LocVT == MVT::i64 ||
607 1 : LocVT == MVT::f64 ||
608 1 : LocVT == MVT::v1i64 ||
609 1 : LocVT == MVT::v2i32 ||
610 1 : LocVT == MVT::v4i16 ||
611 1 : LocVT == MVT::v8i8 ||
612 1 : LocVT == MVT::v1f64 ||
613 43 : LocVT == MVT::v2f32 ||
614 : LocVT == MVT::v4f16) {
615 41 : unsigned Offset2 = State.AllocateStack(8, 8);
616 41 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
617 41 : return false;
618 : }
619 :
620 1 : if (LocVT == MVT::v2i64 ||
621 0 : LocVT == MVT::v4i32 ||
622 0 : LocVT == MVT::v8i16 ||
623 0 : LocVT == MVT::v16i8 ||
624 0 : LocVT == MVT::v4f32 ||
625 1 : LocVT == MVT::v2f64 ||
626 : LocVT == MVT::v8f16) {
627 1 : unsigned Offset3 = State.AllocateStack(16, 16);
628 1 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
629 1 : return false;
630 : }
631 :
632 : return true; // CC didn't match.
633 : }
634 :
635 :
636 8 : static bool CC_AArch64_GHC(unsigned ValNo, MVT ValVT,
637 : MVT LocVT, CCValAssign::LocInfo LocInfo,
638 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
639 :
640 8 : if (LocVT == MVT::iPTR) {
641 : LocVT = MVT::i64;
642 : LocInfo = CCValAssign::BCvt;
643 : }
644 :
645 8 : if (LocVT == MVT::v1i64 ||
646 8 : LocVT == MVT::v2i32 ||
647 8 : LocVT == MVT::v4i16 ||
648 16 : LocVT == MVT::v8i8 ||
649 : LocVT == MVT::v2f32) {
650 : LocVT = MVT::f64;
651 : LocInfo = CCValAssign::BCvt;
652 : }
653 :
654 8 : if (LocVT == MVT::v2i64 ||
655 8 : LocVT == MVT::v4i32 ||
656 8 : LocVT == MVT::v8i16 ||
657 8 : LocVT == MVT::v16i8 ||
658 16 : LocVT == MVT::v4f32 ||
659 : LocVT == MVT::f128) {
660 : LocVT = MVT::v2f64;
661 : LocInfo = CCValAssign::BCvt;
662 : }
663 :
664 8 : if (LocVT == MVT::v2f64) {
665 : static const MCPhysReg RegList1[] = {
666 : AArch64::Q4, AArch64::Q5
667 : };
668 0 : if (unsigned Reg = State.AllocateReg(RegList1)) {
669 0 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
670 0 : return false;
671 : }
672 : }
673 :
674 8 : if (LocVT == MVT::f32) {
675 : static const MCPhysReg RegList2[] = {
676 : AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11
677 : };
678 2 : if (unsigned Reg = State.AllocateReg(RegList2)) {
679 2 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
680 2 : return false;
681 : }
682 : }
683 :
684 6 : if (LocVT == MVT::f64) {
685 : static const MCPhysReg RegList3[] = {
686 : AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15
687 : };
688 1 : if (unsigned Reg = State.AllocateReg(RegList3)) {
689 1 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
690 1 : return false;
691 : }
692 : }
693 :
694 5 : if (LocVT == MVT::i8 ||
695 10 : LocVT == MVT::i16 ||
696 : LocVT == MVT::i32) {
697 : LocVT = MVT::i64;
698 0 : if (ArgFlags.isSExt())
699 : LocInfo = CCValAssign::SExt;
700 0 : else if (ArgFlags.isZExt())
701 : LocInfo = CCValAssign::ZExt;
702 : else
703 : LocInfo = CCValAssign::AExt;
704 : }
705 :
706 5 : if (LocVT == MVT::i64) {
707 : static const MCPhysReg RegList4[] = {
708 : AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28
709 : };
710 5 : if (unsigned Reg = State.AllocateReg(RegList4)) {
711 5 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
712 5 : return false;
713 : }
714 : }
715 :
716 : return true; // CC didn't match.
717 : }
718 :
719 :
720 129 : static bool CC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
721 : MVT LocVT, CCValAssign::LocInfo LocInfo,
722 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
723 :
724 129 : if (LocVT == MVT::i1 ||
725 258 : LocVT == MVT::i8 ||
726 : LocVT == MVT::i16) {
727 : LocVT = MVT::i32;
728 6 : if (ArgFlags.isSExt())
729 : LocInfo = CCValAssign::SExt;
730 6 : else if (ArgFlags.isZExt())
731 : LocInfo = CCValAssign::ZExt;
732 : else
733 : LocInfo = CCValAssign::AExt;
734 : }
735 :
736 129 : if (LocVT == MVT::i32) {
737 27 : if (unsigned Reg = State.AllocateReg(AArch64::W0, AArch64::X0)) {
738 3 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
739 3 : return false;
740 : }
741 : }
742 :
743 126 : if (LocVT == MVT::i64) {
744 102 : if (unsigned Reg = State.AllocateReg(AArch64::X0, AArch64::W0)) {
745 17 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
746 17 : return false;
747 : }
748 : }
749 :
750 109 : if (LocVT == MVT::i32 ||
751 : LocVT == MVT::f32) {
752 24 : unsigned Offset1 = State.AllocateStack(4, 4);
753 24 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
754 24 : return false;
755 : }
756 :
757 85 : if (LocVT == MVT::i64 ||
758 : LocVT == MVT::f64) {
759 85 : unsigned Offset2 = State.AllocateStack(8, 8);
760 85 : State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
761 85 : return false;
762 : }
763 :
764 : return true; // CC didn't match.
765 : }
766 :
767 :
768 19 : static bool CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT,
769 : MVT LocVT, CCValAssign::LocInfo LocInfo,
770 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
771 :
772 19 : if (LocVT == MVT::f16 ||
773 : LocVT == MVT::f32) {
774 : LocVT = MVT::f64;
775 : LocInfo = CCValAssign::FPExt;
776 : }
777 :
778 19 : if (LocVT == MVT::f64) {
779 : LocVT = MVT::i64;
780 : LocInfo = CCValAssign::BCvt;
781 : }
782 :
783 19 : if (!CC_AArch64_AAPCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
784 19 : return false;
785 :
786 : return true; // CC didn't match.
787 : }
788 :
789 :
790 28771 : static bool RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
791 : MVT LocVT, CCValAssign::LocInfo LocInfo,
792 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
793 :
794 28771 : if (LocVT == MVT::iPTR) {
795 : LocVT = MVT::i64;
796 : LocInfo = CCValAssign::BCvt;
797 : }
798 :
799 28771 : if (LocVT == MVT::v2f32) {
800 : LocVT = MVT::v2i32;
801 : LocInfo = CCValAssign::BCvt;
802 : }
803 :
804 28771 : if (LocVT == MVT::v2f64 ||
805 : LocVT == MVT::v4f32) {
806 : LocVT = MVT::v2i64;
807 : LocInfo = CCValAssign::BCvt;
808 : }
809 :
810 28771 : if (ArgFlags.isSwiftError()) {
811 54 : if (LocVT == MVT::i64) {
812 54 : if (unsigned Reg = State.AllocateReg(AArch64::X21, AArch64::W21)) {
813 54 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
814 54 : return false;
815 : }
816 : }
817 : }
818 :
819 28717 : if (State.getMachineFunction().getDataLayout().isBigEndian()) {
820 1761 : if (LocVT == MVT::v2i32 ||
821 1761 : LocVT == MVT::v2f32 ||
822 1701 : LocVT == MVT::v4i16 ||
823 3582 : LocVT == MVT::v4f16 ||
824 : LocVT == MVT::v8i8) {
825 : LocVT = MVT::f64;
826 : LocInfo = CCValAssign::BCvt;
827 : }
828 : }
829 :
830 28717 : if (State.getMachineFunction().getDataLayout().isBigEndian()) {
831 1701 : if (LocVT == MVT::v2i64 ||
832 1701 : LocVT == MVT::v2f64 ||
833 1641 : LocVT == MVT::v4i32 ||
834 1641 : LocVT == MVT::v4f32 ||
835 1581 : LocVT == MVT::v8i16 ||
836 3462 : LocVT == MVT::v8f16 ||
837 : LocVT == MVT::v16i8) {
838 : LocVT = MVT::f128;
839 : LocInfo = CCValAssign::BCvt;
840 : }
841 : }
842 :
843 28715 : if (LocVT == MVT::i1 ||
844 57426 : LocVT == MVT::i8 ||
845 : LocVT == MVT::i16) {
846 : LocVT = MVT::i32;
847 10 : if (ArgFlags.isSExt())
848 : LocInfo = CCValAssign::SExt;
849 6 : else if (ArgFlags.isZExt())
850 : LocInfo = CCValAssign::ZExt;
851 : else
852 : LocInfo = CCValAssign::AExt;
853 : }
854 :
855 28717 : if (LocVT == MVT::i32) {
856 : static const MCPhysReg RegList1[] = {
857 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
858 : };
859 : static const MCPhysReg RegList2[] = {
860 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
861 : };
862 7291 : if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
863 7291 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
864 7291 : return false;
865 : }
866 : }
867 :
868 21426 : if (LocVT == MVT::i64) {
869 : static const MCPhysReg RegList3[] = {
870 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
871 : };
872 : static const MCPhysReg RegList4[] = {
873 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
874 : };
875 4129 : if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
876 4119 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
877 4119 : return false;
878 : }
879 : }
880 :
881 17307 : if (LocVT == MVT::f16) {
882 : static const MCPhysReg RegList5[] = {
883 : AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
884 : };
885 : static const MCPhysReg RegList6[] = {
886 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
887 : };
888 378 : if (unsigned Reg = State.AllocateReg(RegList5, RegList6)) {
889 378 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
890 378 : return false;
891 : }
892 : }
893 :
894 16929 : if (LocVT == MVT::f32) {
895 : static const MCPhysReg RegList7[] = {
896 : AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
897 : };
898 : static const MCPhysReg RegList8[] = {
899 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
900 : };
901 1405 : if (unsigned Reg = State.AllocateReg(RegList7, RegList8)) {
902 1405 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
903 1405 : return false;
904 : }
905 : }
906 :
907 15524 : if (LocVT == MVT::f64) {
908 : static const MCPhysReg RegList9[] = {
909 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
910 : };
911 : static const MCPhysReg RegList10[] = {
912 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
913 : };
914 1330 : if (unsigned Reg = State.AllocateReg(RegList9, RegList10)) {
915 1330 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
916 1330 : return false;
917 : }
918 : }
919 :
920 13724 : if (LocVT == MVT::v1i64 ||
921 11837 : LocVT == MVT::v2i32 ||
922 10563 : LocVT == MVT::v4i16 ||
923 9505 : LocVT == MVT::v8i8 ||
924 9213 : LocVT == MVT::v1f64 ||
925 23407 : LocVT == MVT::v2f32 ||
926 : LocVT == MVT::v4f16) {
927 : static const MCPhysReg RegList11[] = {
928 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
929 : };
930 : static const MCPhysReg RegList12[] = {
931 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
932 : };
933 5250 : if (unsigned Reg = State.AllocateReg(RegList11, RegList12)) {
934 5250 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
935 5250 : return false;
936 : }
937 : }
938 :
939 8218 : if (LocVT == MVT::f128 ||
940 5172 : LocVT == MVT::v2i64 ||
941 2774 : LocVT == MVT::v4i32 ||
942 1323 : LocVT == MVT::v8i16 ||
943 280 : LocVT == MVT::v16i8 ||
944 280 : LocVT == MVT::v4f32 ||
945 9224 : LocVT == MVT::v2f64 ||
946 : LocVT == MVT::v8f16) {
947 : static const MCPhysReg RegList13[] = {
948 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
949 : };
950 8932 : if (unsigned Reg = State.AllocateReg(RegList13)) {
951 8932 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
952 8932 : return false;
953 : }
954 : }
955 :
956 : return true; // CC didn't match.
957 : }
958 :
959 :
960 21 : static bool RetCC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
961 : MVT LocVT, CCValAssign::LocInfo LocInfo,
962 : ISD::ArgFlagsTy ArgFlags, CCState &State) {
963 :
964 21 : if (LocVT == MVT::i32) {
965 : static const MCPhysReg RegList1[] = {
966 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
967 : };
968 : static const MCPhysReg RegList2[] = {
969 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
970 : };
971 6 : if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
972 6 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
973 6 : return false;
974 : }
975 : }
976 :
977 15 : if (LocVT == MVT::i64) {
978 : static const MCPhysReg RegList3[] = {
979 : AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
980 : };
981 : static const MCPhysReg RegList4[] = {
982 : AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
983 : };
984 15 : if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
985 15 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
986 15 : return false;
987 : }
988 : }
989 :
990 0 : if (LocVT == MVT::f32) {
991 : static const MCPhysReg RegList5[] = {
992 : AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
993 : };
994 : static const MCPhysReg RegList6[] = {
995 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
996 : };
997 0 : if (unsigned Reg = State.AllocateReg(RegList5, RegList6)) {
998 0 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
999 0 : return false;
1000 : }
1001 : }
1002 :
1003 0 : if (LocVT == MVT::f64) {
1004 : static const MCPhysReg RegList7[] = {
1005 : AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
1006 : };
1007 : static const MCPhysReg RegList8[] = {
1008 : AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
1009 : };
1010 0 : if (unsigned Reg = State.AllocateReg(RegList7, RegList8)) {
1011 0 : State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1012 0 : return false;
1013 : }
1014 : }
1015 :
1016 : return true; // CC didn't match.
1017 : }
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