LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/AMDGPU - R600GenRegisterInfo.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 33 48 68.8 %
Date: 2018-10-20 13:21:21 Functions: 9 16 56.2 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZN4llvm19R600GenRegisterInfo16getFrameLoweringERKNS_15MachineFunctionE 0
_ZN4llvm19R600GenRegisterInfoC2Ejjjjj 291
_ZN4llvmL22InitR600MCRegisterInfoEPNS_14MCRegisterInfoEjjjj 0
_ZNK4llvm19R600GenRegisterInfo11getRegMasksEv 0
_ZNK4llvm19R600GenRegisterInfo15getRegMaskNamesEv 0
_ZNK4llvm19R600GenRegisterInfo16getRegUnitWeightEj 1760
_ZNK4llvm19R600GenRegisterInfo21getNumRegPressureSetsEv 14425
_ZNK4llvm19R600GenRegisterInfo21getRegPressureSetNameEj 0
_ZNK4llvm19R600GenRegisterInfo22getRegPressureSetLimitERKNS_15MachineFunctionEj 62084
_ZNK4llvm19R600GenRegisterInfo22getRegUnitPressureSetsEj 1760
_ZNK4llvm19R600GenRegisterInfo24composeSubRegIndicesImplEjj 0
_ZNK4llvm19R600GenRegisterInfo30composeSubRegIndexLaneMaskImplEjNS_11LaneBitmaskE 12590

Generated by: LCOV version 1.13