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1 : //===- llvm/CallingConvLower.h - Calling Conventions ------------*- C++ -*-===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file declares the CCState and CCValAssign classes, used for lowering
11 : // and implementing calling conventions.
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 : #define LLVM_CODEGEN_CALLINGCONVLOWER_H
17 :
18 : #include "llvm/ADT/SmallVector.h"
19 : #include "llvm/CodeGen/MachineFrameInfo.h"
20 : #include "llvm/CodeGen/MachineFunction.h"
21 : #include "llvm/CodeGen/TargetCallingConv.h"
22 : #include "llvm/IR/CallingConv.h"
23 : #include "llvm/MC/MCRegisterInfo.h"
24 :
25 : namespace llvm {
26 :
27 : class CCState;
28 : class MVT;
29 : class TargetMachine;
30 : class TargetRegisterInfo;
31 :
32 : /// CCValAssign - Represent assignment of one arg/retval to a location.
33 : class CCValAssign {
34 : public:
35 : enum LocInfo {
36 : Full, // The value fills the full location.
37 : SExt, // The value is sign extended in the location.
38 : ZExt, // The value is zero extended in the location.
39 : AExt, // The value is extended with undefined upper bits.
40 : SExtUpper, // The value is in the upper bits of the location and should be
41 : // sign extended when retrieved.
42 : ZExtUpper, // The value is in the upper bits of the location and should be
43 : // zero extended when retrieved.
44 : AExtUpper, // The value is in the upper bits of the location and should be
45 : // extended with undefined upper bits when retrieved.
46 : BCvt, // The value is bit-converted in the location.
47 : VExt, // The value is vector-widened in the location.
48 : // FIXME: Not implemented yet. Code that uses AExt to mean
49 : // vector-widen should be fixed to use VExt instead.
50 : FPExt, // The floating-point value is fp-extended in the location.
51 : Indirect // The location contains pointer to the value.
52 : // TODO: a subset of the value is in the location.
53 : };
54 :
55 : private:
56 : /// ValNo - This is the value number begin assigned (e.g. an argument number).
57 : unsigned ValNo;
58 :
59 : /// Loc is either a stack offset or a register number.
60 : unsigned Loc;
61 :
62 : /// isMem - True if this is a memory loc, false if it is a register loc.
63 : unsigned isMem : 1;
64 :
65 : /// isCustom - True if this arg/retval requires special handling.
66 : unsigned isCustom : 1;
67 :
68 : /// Information about how the value is assigned.
69 : LocInfo HTP : 6;
70 :
71 : /// ValVT - The type of the value being assigned.
72 : MVT ValVT;
73 :
74 : /// LocVT - The type of the location being assigned to.
75 : MVT LocVT;
76 : public:
77 :
78 : static CCValAssign getReg(unsigned ValNo, MVT ValVT,
79 : unsigned RegNo, MVT LocVT,
80 : LocInfo HTP) {
81 : CCValAssign Ret;
82 : Ret.ValNo = ValNo;
83 : Ret.Loc = RegNo;
84 : Ret.isMem = false;
85 : Ret.isCustom = false;
86 6179249 : Ret.HTP = HTP;
87 : Ret.ValVT = ValVT;
88 : Ret.LocVT = LocVT;
89 : return Ret;
90 : }
91 :
92 : static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
93 : unsigned RegNo, MVT LocVT,
94 : LocInfo HTP) {
95 : CCValAssign Ret;
96 0 : Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
97 : Ret.isCustom = true;
98 : return Ret;
99 : }
100 :
101 : static CCValAssign getMem(unsigned ValNo, MVT ValVT,
102 : unsigned Offset, MVT LocVT,
103 : LocInfo HTP) {
104 : CCValAssign Ret;
105 : Ret.ValNo = ValNo;
106 : Ret.Loc = Offset;
107 : Ret.isMem = true;
108 : Ret.isCustom = false;
109 217579 : Ret.HTP = HTP;
110 : Ret.ValVT = ValVT;
111 : Ret.LocVT = LocVT;
112 : return Ret;
113 : }
114 :
115 : static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
116 : unsigned Offset, MVT LocVT,
117 : LocInfo HTP) {
118 : CCValAssign Ret;
119 0 : Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
120 : Ret.isCustom = true;
121 : return Ret;
122 : }
123 :
124 : // There is no need to differentiate between a pending CCValAssign and other
125 : // kinds, as they are stored in a different list.
126 : static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
127 : LocInfo HTP, unsigned ExtraInfo = 0) {
128 : return getReg(ValNo, ValVT, ExtraInfo, LocVT, HTP);
129 : }
130 :
131 : void convertToReg(unsigned RegNo) {
132 762 : Loc = RegNo;
133 762 : isMem = false;
134 : }
135 :
136 : void convertToMem(unsigned Offset) {
137 163 : Loc = Offset;
138 163 : isMem = true;
139 : }
140 :
141 0 : unsigned getValNo() const { return ValNo; }
142 0 : MVT getValVT() const { return ValVT; }
143 :
144 4579326 : bool isRegLoc() const { return !isMem; }
145 64889 : bool isMemLoc() const { return isMem; }
146 :
147 2919398 : bool needsCustom() const { return isCustom; }
148 :
149 0 : unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
150 0 : unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
151 0 : unsigned getExtraInfo() const { return Loc; }
152 0 : MVT getLocVT() const { return LocVT; }
153 :
154 5023245 : LocInfo getLocInfo() const { return HTP; }
155 : bool isExtInLoc() const {
156 657327 : return (HTP == AExt || HTP == SExt || HTP == ZExt);
157 : }
158 :
159 : bool isUpperBitsInLoc() const {
160 2408 : return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
161 : }
162 : };
163 :
164 : /// Describes a register that needs to be forwarded from the prologue to a
165 : /// musttail call.
166 : struct ForwardedRegister {
167 : ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
168 315 : : VReg(VReg), PReg(PReg), VT(VT) {}
169 : unsigned VReg;
170 : MCPhysReg PReg;
171 : MVT VT;
172 : };
173 :
174 : /// CCAssignFn - This function assigns a location for Val, updating State to
175 : /// reflect the change. It returns 'true' if it failed to handle Val.
176 : typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
177 : MVT LocVT, CCValAssign::LocInfo LocInfo,
178 : ISD::ArgFlagsTy ArgFlags, CCState &State);
179 :
180 : /// CCCustomFn - This function assigns a location for Val, possibly updating
181 : /// all args to reflect changes and indicates if it handled it. It must set
182 : /// isCustom if it handles the arg and returns true.
183 : typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
184 : MVT &LocVT, CCValAssign::LocInfo &LocInfo,
185 : ISD::ArgFlagsTy &ArgFlags, CCState &State);
186 :
187 : /// CCState - This class holds information needed while lowering arguments and
188 : /// return values. It captures which registers are already assigned and which
189 : /// stack slots are used. It provides accessors to allocate these values.
190 : class CCState {
191 : private:
192 : CallingConv::ID CallingConv;
193 : bool IsVarArg;
194 : bool AnalyzingMustTailForwardedRegs = false;
195 : MachineFunction &MF;
196 : const TargetRegisterInfo &TRI;
197 : SmallVectorImpl<CCValAssign> &Locs;
198 : LLVMContext &Context;
199 :
200 : unsigned StackOffset;
201 : unsigned MaxStackArgAlign;
202 : SmallVector<uint32_t, 16> UsedRegs;
203 : SmallVector<CCValAssign, 4> PendingLocs;
204 : SmallVector<ISD::ArgFlagsTy, 4> PendingArgFlags;
205 :
206 : // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
207 : //
208 : // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
209 : // tracking.
210 : // Or, in another words it tracks byval parameters that are stored in
211 : // general purpose registers.
212 : //
213 : // For 4 byte stack alignment,
214 : // instance index means byval parameter number in formal
215 : // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
216 : // then, for function "foo":
217 : //
218 : // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
219 : //
220 : // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
221 : // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
222 : //
223 : // In case of 8 bytes stack alignment,
224 : // ByValRegs may also contain information about wasted registers.
225 : // In function shown above, r3 would be wasted according to AAPCS rules.
226 : // And in that case ByValRegs[1].Waste would be "true".
227 : // ByValRegs vector size still would be 2,
228 : // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
229 : //
230 : // Supposed use-case for this collection:
231 : // 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
232 : // 2. HandleByVal fillups ByValRegs.
233 : // 3. Argument analysis (LowerFormatArguments, for example). After
234 : // some byval argument was analyzed, InRegsParamsProcessed is increased.
235 : struct ByValInfo {
236 470 : ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
237 470 : Begin(B), End(E), Waste(IsWaste) {}
238 : // First register allocated for current parameter.
239 : unsigned Begin;
240 :
241 : // First after last register allocated for current parameter.
242 : unsigned End;
243 :
244 : // Means that current range of registers doesn't belong to any
245 : // parameters. It was wasted due to stack alignment rules.
246 : // For more information see:
247 : // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
248 : bool Waste;
249 : };
250 : SmallVector<ByValInfo, 4 > ByValRegs;
251 :
252 : // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
253 : // during argument analysis.
254 : unsigned InRegsParamsProcessed;
255 :
256 : public:
257 : CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
258 : SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
259 :
260 0 : void addLoc(const CCValAssign &V) {
261 6445511 : Locs.push_back(V);
262 0 : }
263 :
264 0 : LLVMContext &getContext() const { return Context; }
265 0 : MachineFunction &getMachineFunction() const { return MF; }
266 0 : CallingConv::ID getCallingConv() const { return CallingConv; }
267 0 : bool isVarArg() const { return IsVarArg; }
268 :
269 : /// getNextStackOffset - Return the next stack offset such that all stack
270 : /// slots satisfy their alignment requirements.
271 0 : unsigned getNextStackOffset() const {
272 0 : return StackOffset;
273 : }
274 :
275 : /// getAlignedCallFrameSize - Return the size of the call frame needed to
276 : /// be able to store all arguments and such that the alignment requirement
277 : /// of each of the arguments is satisfied.
278 0 : unsigned getAlignedCallFrameSize() const {
279 4314570 : return alignTo(StackOffset, MaxStackArgAlign);
280 : }
281 :
282 : /// isAllocated - Return true if the specified register (or an alias) is
283 : /// allocated.
284 : bool isAllocated(unsigned Reg) const {
285 21733420 : return UsedRegs[Reg/32] & (1 << (Reg&31));
286 : }
287 :
288 : /// AnalyzeFormalArguments - Analyze an array of argument values,
289 : /// incorporating info about the formals into this state.
290 : void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
291 : CCAssignFn Fn);
292 :
293 : /// The function will invoke AnalyzeFormalArguments.
294 : void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
295 : CCAssignFn Fn) {
296 121210 : AnalyzeFormalArguments(Ins, Fn);
297 : }
298 :
299 : /// AnalyzeReturn - Analyze the returned values of a return,
300 : /// incorporating info about the result values into this state.
301 : void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
302 : CCAssignFn Fn);
303 :
304 : /// CheckReturn - Analyze the return values of a function, returning
305 : /// true if the return can be performed without sret-demotion, and
306 : /// false otherwise.
307 : bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
308 : CCAssignFn Fn);
309 :
310 : /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
311 : /// incorporating info about the passed values into this state.
312 : void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
313 : CCAssignFn Fn);
314 :
315 : /// AnalyzeCallOperands - Same as above except it takes vectors of types
316 : /// and argument flags.
317 : void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
318 : SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
319 : CCAssignFn Fn);
320 :
321 : /// The function will invoke AnalyzeCallOperands.
322 : void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs,
323 : CCAssignFn Fn) {
324 987412 : AnalyzeCallOperands(Outs, Fn);
325 : }
326 :
327 : /// AnalyzeCallResult - Analyze the return values of a call,
328 : /// incorporating info about the passed values into this state.
329 : void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
330 : CCAssignFn Fn);
331 :
332 : /// A shadow allocated register is a register that was allocated
333 : /// but wasn't added to the location list (Locs).
334 : /// \returns true if the register was allocated as shadow or false otherwise.
335 : bool IsShadowAllocatedReg(unsigned Reg) const;
336 :
337 : /// AnalyzeCallResult - Same as above except it's specialized for calls which
338 : /// produce a single value.
339 : void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
340 :
341 : /// getFirstUnallocated - Return the index of the first unallocated register
342 : /// in the set, or Regs.size() if they are all allocated.
343 : unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const {
344 11194663 : for (unsigned i = 0; i < Regs.size(); ++i)
345 22188038 : if (!isAllocated(Regs[i]))
346 : return i;
347 100610 : return Regs.size();
348 : }
349 :
350 : /// AllocateReg - Attempt to allocate one register. If it is not available,
351 : /// return zero. Otherwise, return the register, marking it and any aliases
352 : /// as allocated.
353 75904 : unsigned AllocateReg(unsigned Reg) {
354 82993 : if (isAllocated(Reg)) return 0;
355 81139 : MarkAllocated(Reg);
356 74399 : return Reg;
357 : }
358 :
359 : /// Version of AllocateReg with extra register to be shadowed.
360 525 : unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
361 525 : if (isAllocated(Reg)) return 0;
362 416 : MarkAllocated(Reg);
363 416 : MarkAllocated(ShadowReg);
364 416 : return Reg;
365 : }
366 :
367 : /// AllocateReg - Attempt to allocate one of the specified registers. If none
368 : /// are available, return zero. Otherwise, return the first one available,
369 : /// marking it and any aliases as allocated.
370 6234965 : unsigned AllocateReg(ArrayRef<MCPhysReg> Regs) {
371 : unsigned FirstUnalloc = getFirstUnallocated(Regs);
372 6234965 : if (FirstUnalloc == Regs.size())
373 : return 0; // Didn't find the reg.
374 :
375 : // Mark the register and any aliases as allocated.
376 6137620 : unsigned Reg = Regs[FirstUnalloc];
377 6137620 : MarkAllocated(Reg);
378 6137620 : return Reg;
379 : }
380 :
381 : /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
382 : /// registers. If this is not possible, return zero. Otherwise, return the first
383 : /// register of the block that were allocated, marking the entire block as allocated.
384 3442 : unsigned AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
385 3442 : if (RegsRequired > Regs.size())
386 : return 0;
387 :
388 7128 : for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired;
389 : ++StartIdx) {
390 : bool BlockAvailable = true;
391 : // Check for already-allocated regs in this block
392 10818 : for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
393 22539 : if (isAllocated(Regs[StartIdx + BlockIdx])) {
394 : BlockAvailable = false;
395 : break;
396 : }
397 : }
398 6992 : if (BlockAvailable) {
399 : // Mark the entire block as allocated
400 7128 : for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
401 7646 : MarkAllocated(Regs[StartIdx + BlockIdx]);
402 : }
403 3305 : return Regs[StartIdx];
404 : }
405 : }
406 : // No block was available
407 : return 0;
408 : }
409 :
410 : /// Version of AllocateReg with list of registers to be shadowed.
411 64752 : unsigned AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
412 : unsigned FirstUnalloc = getFirstUnallocated(Regs);
413 64752 : if (FirstUnalloc == Regs.size())
414 : return 0; // Didn't find the reg.
415 :
416 : // Mark the register and any aliases as allocated.
417 61538 : unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
418 61538 : MarkAllocated(Reg);
419 61538 : MarkAllocated(ShadowReg);
420 61538 : return Reg;
421 : }
422 :
423 : /// AllocateStack - Allocate a chunk of stack space with the specified size
424 : /// and alignment.
425 242677 : unsigned AllocateStack(unsigned Size, unsigned Align) {
426 : assert(Align && ((Align - 1) & Align) == 0); // Align is power of 2.
427 242677 : StackOffset = alignTo(StackOffset, Align);
428 : unsigned Result = StackOffset;
429 242677 : StackOffset += Size;
430 242677 : MaxStackArgAlign = std::max(Align, MaxStackArgAlign);
431 242677 : ensureMaxAlignment(Align);
432 242677 : return Result;
433 : }
434 :
435 0 : void ensureMaxAlignment(unsigned Align) {
436 247358 : if (!AnalyzingMustTailForwardedRegs)
437 247293 : MF.getFrameInfo().ensureMaxAlignment(Align);
438 0 : }
439 :
440 : /// Version of AllocateStack with extra register to be shadowed.
441 : unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
442 : MarkAllocated(ShadowReg);
443 : return AllocateStack(Size, Align);
444 : }
445 :
446 : /// Version of AllocateStack with list of extra registers to be shadowed.
447 : /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
448 2033 : unsigned AllocateStack(unsigned Size, unsigned Align,
449 : ArrayRef<MCPhysReg> ShadowRegs) {
450 9958 : for (unsigned i = 0; i < ShadowRegs.size(); ++i)
451 15850 : MarkAllocated(ShadowRegs[i]);
452 2033 : return AllocateStack(Size, Align);
453 : }
454 :
455 : // HandleByVal - Allocate a stack slot large enough to pass an argument by
456 : // value. The size and alignment information of the argument is encoded in its
457 : // parameter attribute.
458 : void HandleByVal(unsigned ValNo, MVT ValVT,
459 : MVT LocVT, CCValAssign::LocInfo LocInfo,
460 : int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
461 :
462 : // Returns count of byval arguments that are to be stored (even partly)
463 : // in registers.
464 24429 : unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
465 :
466 : // Returns count of byval in-regs arguments proceed.
467 0 : unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
468 :
469 : // Get information about N-th byval parameter that is stored in registers.
470 : // Here "ByValParamIndex" is N.
471 : void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
472 : unsigned& BeginReg, unsigned& EndReg) const {
473 : assert(InRegsParamRecordIndex < ByValRegs.size() &&
474 : "Wrong ByVal parameter index");
475 :
476 504 : const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
477 114 : BeginReg = info.Begin;
478 470 : EndReg = info.End;
479 : }
480 :
481 : // Add information about parameter that is kept in registers.
482 : void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
483 470 : ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
484 : }
485 :
486 : // Goes either to next byval parameter (excluding "waste" record), or
487 : // to the end of collection.
488 : // Returns false, if end is reached.
489 : bool nextInRegsParam() {
490 483 : unsigned e = ByValRegs.size();
491 483 : if (InRegsParamsProcessed < e)
492 504 : ++InRegsParamsProcessed;
493 : return InRegsParamsProcessed < e;
494 : }
495 :
496 : // Clear byval registers tracking info.
497 : void clearByValRegsInfo() {
498 7349797 : InRegsParamsProcessed = 0;
499 : ByValRegs.clear();
500 : }
501 :
502 : // Rewind byval registers tracking info.
503 0 : void rewindByValRegsInfo() {
504 29139 : InRegsParamsProcessed = 0;
505 0 : }
506 :
507 : // Get list of pending assignments
508 : SmallVectorImpl<CCValAssign> &getPendingLocs() {
509 626 : return PendingLocs;
510 : }
511 :
512 : // Get a list of argflags for pending assignments.
513 : SmallVectorImpl<ISD::ArgFlagsTy> &getPendingArgFlags() {
514 : return PendingArgFlags;
515 : }
516 :
517 : /// Compute the remaining unused register parameters that would be used for
518 : /// the given value type. This is useful when varargs are passed in the
519 : /// registers that normal prototyped parameters would be passed in, or for
520 : /// implementing perfect forwarding.
521 : void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
522 : CCAssignFn Fn);
523 :
524 : /// Compute the set of registers that need to be preserved and forwarded to
525 : /// any musttail calls.
526 : void analyzeMustTailForwardedRegisters(
527 : SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
528 : CCAssignFn Fn);
529 :
530 : /// Returns true if the results of the two calling conventions are compatible.
531 : /// This is usually part of the check for tailcall eligibility.
532 : static bool resultsCompatible(CallingConv::ID CalleeCC,
533 : CallingConv::ID CallerCC, MachineFunction &MF,
534 : LLVMContext &C,
535 : const SmallVectorImpl<ISD::InputArg> &Ins,
536 : CCAssignFn CalleeFn, CCAssignFn CallerFn);
537 :
538 : /// The function runs an additional analysis pass over function arguments.
539 : /// It will mark each argument with the attribute flag SecArgPass.
540 : /// After running, it will sort the locs list.
541 : template <class T>
542 61 : void AnalyzeArgumentsSecondPass(const SmallVectorImpl<T> &Args,
543 : CCAssignFn Fn) {
544 61 : unsigned NumFirstPassLocs = Locs.size();
545 :
546 : /// Creates similar argument list to \p Args in which each argument is
547 : /// marked using SecArgPass flag.
548 : SmallVector<T, 16> SecPassArg;
549 : // SmallVector<ISD::InputArg, 16> SecPassArg;
550 244 : for (auto Arg : Args) {
551 : Arg.Flags.setSecArgPass();
552 183 : SecPassArg.push_back(Arg);
553 : }
554 :
555 : // Run the second argument pass
556 : AnalyzeArguments(SecPassArg, Fn);
557 :
558 : // Sort the locations of the arguments according to their original position.
559 : SmallVector<CCValAssign, 16> TmpArgLocs;
560 61 : std::swap(TmpArgLocs, Locs);
561 : auto B = TmpArgLocs.begin(), E = TmpArgLocs.end();
562 61 : std::merge(B, B + NumFirstPassLocs, B + NumFirstPassLocs, E,
563 : std::back_inserter(Locs),
564 : [](const CCValAssign &A, const CCValAssign &B) -> bool {
565 52 : return A.getValNo() < B.getValNo();
566 : });
567 61 : }
568 8 :
569 : private:
570 8 : /// MarkAllocated - Mark a register and all of its aliases as allocated.
571 : void MarkAllocated(unsigned Reg);
572 : };
573 :
574 : } // end namespace llvm
575 :
576 27 : #endif // LLVM_CODEGEN_CALLINGCONVLOWER_H
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