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1 : //===- llvm/CodeGen/LiveRegUnits.h - Register Unit Set ----------*- C++ -*-===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : /// \file
11 : /// A set of register units. It is intended for register liveness tracking.
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #ifndef LLVM_CODEGEN_LIVEREGUNITS_H
16 : #define LLVM_CODEGEN_LIVEREGUNITS_H
17 :
18 : #include "llvm/ADT/BitVector.h"
19 : #include "llvm/CodeGen/MachineRegisterInfo.h"
20 : #include "llvm/CodeGen/TargetRegisterInfo.h"
21 : #include "llvm/MC/LaneBitmask.h"
22 : #include "llvm/MC/MCRegisterInfo.h"
23 : #include <cstdint>
24 :
25 : namespace llvm {
26 :
27 : class MachineInstr;
28 : class MachineBasicBlock;
29 :
30 : /// A set of register units used to track register liveness.
31 : class LiveRegUnits {
32 : const TargetRegisterInfo *TRI = nullptr;
33 : BitVector Units;
34 :
35 : public:
36 : /// Constructs a new empty LiveRegUnits set.
37 223124 : LiveRegUnits() = default;
38 :
39 : /// Constructs and initialize an empty LiveRegUnits set.
40 18435 : LiveRegUnits(const TargetRegisterInfo &TRI) {
41 18435 : init(TRI);
42 : }
43 :
44 : /// For a machine instruction \p MI, adds all register units used in
45 : /// \p UsedRegUnits and defined or clobbered in \p ModifiedRegUnits. This is
46 : /// useful when walking over a range of instructions to track registers
47 : /// used or defined seperately.
48 643338 : static void accumulateUsedDefed(const MachineInstr &MI,
49 : LiveRegUnits &ModifiedRegUnits,
50 : LiveRegUnits &UsedRegUnits,
51 : const TargetRegisterInfo *TRI) {
52 3227680 : for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
53 2584342 : if (O->isRegMask())
54 1128 : ModifiedRegUnits.addRegsInMask(O->getRegMask());
55 2584342 : if (!O->isReg())
56 : continue;
57 1662868 : unsigned Reg = O->getReg();
58 1662868 : if (!TargetRegisterInfo::isPhysicalRegister(Reg))
59 : continue;
60 1263314 : if (O->isDef()) {
61 : // Some architectures (e.g. AArch64 XZR/WZR) have registers that are
62 : // constant and may be used as destinations to indicate the generated
63 : // value is discarded. No need to track such case as a def.
64 539575 : if (!TRI->isConstantPhysReg(Reg))
65 538994 : ModifiedRegUnits.addReg(Reg);
66 : } else {
67 : assert(O->isUse() && "Reg operand not a def and not a use");
68 723739 : UsedRegUnits.addReg(Reg);
69 : }
70 : }
71 643338 : return;
72 : }
73 :
74 : /// Initialize and clear the set.
75 493315 : void init(const TargetRegisterInfo &TRI) {
76 493315 : this->TRI = &TRI;
77 : Units.reset();
78 493315 : Units.resize(TRI.getNumRegUnits());
79 493315 : }
80 :
81 : /// Clears the set.
82 : void clear() { Units.reset(); }
83 :
84 : /// Returns true if the set is empty.
85 : bool empty() const { return Units.none(); }
86 :
87 : /// Adds register units covered by physical register \p Reg.
88 1388838 : void addReg(unsigned Reg) {
89 5031422 : for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
90 : Units.set(*Unit);
91 1388838 : }
92 :
93 : /// Adds register units covered by physical register \p Reg that are
94 : /// part of the lanemask \p Mask.
95 65461 : void addRegMasked(unsigned Reg, LaneBitmask Mask) {
96 284831 : for (MCRegUnitMaskIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
97 : LaneBitmask UnitMask = (*Unit).second;
98 153909 : if (UnitMask.none() || (UnitMask & Mask).any())
99 : Units.set((*Unit).first);
100 : }
101 65461 : }
102 :
103 : /// Removes all register units covered by physical register \p Reg.
104 45708 : void removeReg(unsigned Reg) {
105 157217 : for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
106 : Units.reset(*Unit);
107 45708 : }
108 :
109 : /// Removes register units not preserved by the regmask \p RegMask.
110 : /// The regmask has the same format as the one in the RegMask machine operand.
111 : void removeRegsNotPreserved(const uint32_t *RegMask);
112 :
113 : /// Adds register units not preserved by the regmask \p RegMask.
114 : /// The regmask has the same format as the one in the RegMask machine operand.
115 : void addRegsInMask(const uint32_t *RegMask);
116 :
117 : /// Returns true if no part of physical register \p Reg is live.
118 188919 : bool available(unsigned Reg) const {
119 594472 : for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
120 254048 : if (Units.test(*Unit))
121 : return false;
122 : }
123 151505 : return true;
124 : }
125 :
126 : /// Updates liveness when stepping backwards over the instruction \p MI.
127 : /// This removes all register units defined or clobbered in \p MI and then
128 : /// adds the units used (as in use operands) in \p MI.
129 : void stepBackward(const MachineInstr &MI);
130 :
131 : /// Adds all register units used, defined or clobbered in \p MI.
132 : /// This is useful when walking over a range of instruction to find registers
133 : /// unused over the whole range.
134 : void accumulate(const MachineInstr &MI);
135 :
136 : /// Adds registers living out of block \p MBB.
137 : /// Live out registers are the union of the live-in registers of the successor
138 : /// blocks and pristine registers. Live out registers of the end block are the
139 : /// callee saved registers.
140 : void addLiveOuts(const MachineBasicBlock &MBB);
141 :
142 : /// Adds registers living into block \p MBB.
143 : void addLiveIns(const MachineBasicBlock &MBB);
144 :
145 : /// Adds all register units marked in the bitvector \p RegUnits.
146 : void addUnits(const BitVector &RegUnits) {
147 5383 : Units |= RegUnits;
148 : }
149 : /// Removes all register units marked in the bitvector \p RegUnits.
150 : void removeUnits(const BitVector &RegUnits) {
151 5383 : Units.reset(RegUnits);
152 : }
153 : /// Return the internal bitvector representation of the set.
154 : const BitVector &getBitVector() const {
155 : return Units;
156 : }
157 :
158 : private:
159 : /// Adds pristine registers. Pristine registers are callee saved registers
160 : /// that are unused in the function.
161 : void addPristines(const MachineFunction &MF);
162 : };
163 :
164 : } // end namespace llvm
165 :
166 : #endif // LLVM_CODEGEN_LIVEREGUNITS_H
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