LCOV - code coverage report

Current view: top level - include/llvm/CodeGen - TargetPassConfig.h (source / functions) Hit Total Coverage Test: llvm-toolchain.info Lines: 25 41 61.0 % Date: 2018-10-20 13:21:21 Functions: 13 42 31.0 % Legend: Lines: hit not hit

Function Name	Hit count
_ZN4llvm16TargetPassConfig14setInitializedEv	0
_ZN4llvm16TargetPassConfig15addIRTranslatorEv	0
_ZN4llvm16TargetPassConfig15addInstSelectorEv	0
_ZN4llvm16TargetPassConfig16addRegBankSelectEv	0
_ZN4llvm16TargetPassConfig20addLegalizeMachineIREv	0
_ZN4llvm16TargetPassConfig26addGlobalInstructionSelectEv	0
_ZNK4llvm16TargetPassConfig18getEnableTailMergeEv	0
_ZNK4llvm16TargetPassConfig23requiresCodeGenSCCOrderEv	0
_ZNK4llvm16TargetPassConfig5getTMINS_13TargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_16AVRTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_16BPFTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_16PPCTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_16X86TargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_17MipsTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_18LanaiTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_18NVPTXTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_18SparcTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_18XCoreTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_19AMDGPUTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_19MSP430TargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_20AArch64TargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_20ARMBaseTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_20HexagonTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_20SystemZTargetMachineEEERT_v	0
_ZNK4llvm16TargetPassConfig5getTMINS_24WebAssemblyTargetMachineEEERT_v	0
_ZNK4llvm18IdentifyingPassPtr10isInstanceEv	0
_ZNK4llvm18IdentifyingPassPtr11getInstanceEv	0
_ZNK4llvm18IdentifyingPassPtr5getIDEv	0
_ZNK4llvm18IdentifyingPassPtr7isValidEv	0
_ZN4llvm16TargetPassConfig23addPreLegalizeMachineIREv	127
_ZN4llvm16TargetPassConfig29addPreGlobalInstructionSelectEv	127
_ZN4llvm16TargetPassConfig19addPreRegBankSelectEv	199
_ZN4llvm16TargetPassConfig14addPreEmitPassEv	246
_ZN4llvm16TargetPassConfig14addPreRegAllocEv	1855
_ZN4llvm16TargetPassConfig12addPreSched2Ev	2907
_ZN4llvm16TargetPassConfig10addPreISelEv	4730
_ZN4llvm16TargetPassConfig10addILPOptsEv	6452
_ZN4llvm16TargetPassConfig15addPostRegAllocEv	8039
_ZNK4llvm16TargetPassConfig26createPostMachineSchedulerEPNS_19MachineSchedContextE	8783
_ZN4llvm16TargetPassConfig15addPreEmitPass2Ev	12678
_ZNK4llvm16TargetPassConfig22createMachineSchedulerEPNS_19MachineSchedContextE	16520
_ZN4llvm16TargetPassConfig13addPreRewriteEv	19677

Generated by: LCOV version 1.13