Line data Source code
1 : //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file defines the TargetMachine and LLVMTargetMachine classes.
11 : //
12 : //===----------------------------------------------------------------------===//
13 :
14 : #ifndef LLVM_TARGET_TARGETMACHINE_H
15 : #define LLVM_TARGET_TARGETMACHINE_H
16 :
17 : #include "llvm/ADT/StringRef.h"
18 : #include "llvm/ADT/Triple.h"
19 : #include "llvm/IR/DataLayout.h"
20 : #include "llvm/Pass.h"
21 : #include "llvm/Support/CodeGen.h"
22 : #include "llvm/Target/TargetOptions.h"
23 : #include <string>
24 :
25 : namespace llvm {
26 :
27 : class Function;
28 : class GlobalValue;
29 : class MachineModuleInfo;
30 : class Mangler;
31 : class MCAsmInfo;
32 : class MCContext;
33 : class MCInstrInfo;
34 : class MCRegisterInfo;
35 : class MCSubtargetInfo;
36 : class MCSymbol;
37 : class raw_pwrite_stream;
38 : class PassManagerBuilder;
39 : class Target;
40 : class TargetIntrinsicInfo;
41 : class TargetIRAnalysis;
42 : class TargetTransformInfo;
43 : class TargetLoweringObjectFile;
44 : class TargetPassConfig;
45 : class TargetSubtargetInfo;
46 :
47 : // The old pass manager infrastructure is hidden in a legacy namespace now.
48 : namespace legacy {
49 : class PassManagerBase;
50 : }
51 : using legacy::PassManagerBase;
52 :
53 : //===----------------------------------------------------------------------===//
54 : ///
55 : /// Primary interface to the complete machine description for the target
56 : /// machine. All target-specific information should be accessible through this
57 : /// interface.
58 : ///
59 68596 : class TargetMachine {
60 : protected: // Can only create subclasses.
61 : TargetMachine(const Target &T, StringRef DataLayoutString,
62 : const Triple &TargetTriple, StringRef CPU, StringRef FS,
63 : const TargetOptions &Options);
64 :
65 : /// The Target that this machine was created for.
66 : const Target &TheTarget;
67 :
68 : /// DataLayout for the target: keep ABI type size and alignment.
69 : ///
70 : /// The DataLayout is created based on the string representation provided
71 : /// during construction. It is kept here only to avoid reparsing the string
72 : /// but should not really be used during compilation, because it has an
73 : /// internal cache that is context specific.
74 : const DataLayout DL;
75 :
76 : /// Triple string, CPU name, and target feature strings the TargetMachine
77 : /// instance is created with.
78 : Triple TargetTriple;
79 : std::string TargetCPU;
80 : std::string TargetFS;
81 :
82 : Reloc::Model RM = Reloc::Static;
83 : CodeModel::Model CMModel = CodeModel::Small;
84 : CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
85 :
86 : /// Contains target specific asm information.
87 : std::unique_ptr<const MCAsmInfo> AsmInfo;
88 : std::unique_ptr<const MCRegisterInfo> MRI;
89 : std::unique_ptr<const MCInstrInfo> MII;
90 : std::unique_ptr<const MCSubtargetInfo> STI;
91 :
92 : unsigned RequireStructuredCFG : 1;
93 : unsigned O0WantsFastISel : 1;
94 :
95 : public:
96 : const TargetOptions DefaultOptions;
97 : mutable TargetOptions Options;
98 :
99 : TargetMachine(const TargetMachine &) = delete;
100 : void operator=(const TargetMachine &) = delete;
101 : virtual ~TargetMachine();
102 :
103 0 : const Target &getTarget() const { return TheTarget; }
104 :
105 618005 : const Triple &getTargetTriple() const { return TargetTriple; }
106 : StringRef getTargetCPU() const { return TargetCPU; }
107 : StringRef getTargetFeatureString() const { return TargetFS; }
108 :
109 : /// Virtual method implemented by subclasses that returns a reference to that
110 : /// target's TargetSubtargetInfo-derived member variable.
111 0 : virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
112 0 : return nullptr;
113 : }
114 3 : virtual TargetLoweringObjectFile *getObjFileLowering() const {
115 3 : return nullptr;
116 : }
117 :
118 : /// This method returns a pointer to the specified type of
119 : /// TargetSubtargetInfo. In debug builds, it verifies that the object being
120 : /// returned is of the correct type.
121 : template <typename STC> const STC &getSubtarget(const Function &F) const {
122 122001 : return *static_cast<const STC*>(getSubtargetImpl(F));
123 : }
124 :
125 : /// Create a DataLayout.
126 42551 : const DataLayout createDataLayout() const { return DL; }
127 :
128 : /// Test if a DataLayout if compatible with the CodeGen for this target.
129 : ///
130 : /// The LLVM Module owns a DataLayout that is used for the target independent
131 : /// optimizations and code generation. This hook provides a target specific
132 : /// check on the validity of this DataLayout.
133 : bool isCompatibleDataLayout(const DataLayout &Candidate) const {
134 : return DL == Candidate;
135 : }
136 :
137 : /// Get the pointer size for this target.
138 : ///
139 : /// This is the only time the DataLayout in the TargetMachine is used.
140 : unsigned getPointerSize(unsigned AS) const {
141 1303542 : return DL.getPointerSize(AS);
142 : }
143 :
144 : unsigned getPointerSizeInBits(unsigned AS) const {
145 48896 : return DL.getPointerSizeInBits(AS);
146 : }
147 :
148 : unsigned getProgramPointerSize() const {
149 33 : return DL.getPointerSize(DL.getProgramAddressSpace());
150 : }
151 :
152 : unsigned getAllocaPointerSize() const {
153 11 : return DL.getPointerSize(DL.getAllocaAddrSpace());
154 : }
155 :
156 : /// Reset the target options based on the function's attributes.
157 : // FIXME: Remove TargetOptions that affect per-function code generation
158 : // from TargetMachine.
159 : void resetTargetOptions(const Function &F) const;
160 :
161 : /// Return target specific asm information.
162 : const MCAsmInfo *getMCAsmInfo() const { return AsmInfo.get(); }
163 :
164 : const MCRegisterInfo *getMCRegisterInfo() const { return MRI.get(); }
165 : const MCInstrInfo *getMCInstrInfo() const { return MII.get(); }
166 : const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); }
167 :
168 : /// If intrinsic information is available, return it. If not, return null.
169 351748 : virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
170 351748 : return nullptr;
171 : }
172 :
173 1079019 : bool requiresStructuredCFG() const { return RequireStructuredCFG; }
174 705 : void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
175 :
176 : /// Returns the code generation relocation model. The choices are static, PIC,
177 : /// and dynamic-no-pic, and target default.
178 : Reloc::Model getRelocationModel() const;
179 :
180 : /// Returns the code model. The choices are small, kernel, medium, large, and
181 : /// target default.
182 : CodeModel::Model getCodeModel() const;
183 :
184 : bool isPositionIndependent() const;
185 :
186 : bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const;
187 :
188 : /// Returns true if this target uses emulated TLS.
189 : bool useEmulatedTLS() const;
190 :
191 : /// Returns the TLS model which should be used for the given global variable.
192 : TLSModel::Model getTLSModel(const GlobalValue *GV) const;
193 :
194 : /// Returns the optimization level: None, Less, Default, or Aggressive.
195 : CodeGenOpt::Level getOptLevel() const;
196 :
197 : /// Overrides the optimization level.
198 : void setOptLevel(CodeGenOpt::Level Level);
199 :
200 7893 : void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
201 7333 : bool getO0WantsFastISel() { return O0WantsFastISel; }
202 27453 : void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
203 562 : void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; }
204 : void setMachineOutliner(bool Enable) {
205 21245 : Options.EnableMachineOutliner = Enable;
206 : }
207 : void setSupportsDefaultOutlining(bool Enable) {
208 1843 : Options.SupportsDefaultOutlining = Enable;
209 : }
210 :
211 1379817 : bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
212 :
213 246934 : bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
214 :
215 : /// Return true if data objects should be emitted into their own section,
216 : /// corresponds to -fdata-sections.
217 : bool getDataSections() const {
218 78677 : return Options.DataSections;
219 : }
220 :
221 : /// Return true if functions should be emitted into their own section,
222 : /// corresponding to -ffunction-sections.
223 : bool getFunctionSections() const {
224 383975 : return Options.FunctionSections;
225 : }
226 :
227 : /// Get a \c TargetIRAnalysis appropriate for the target.
228 : ///
229 : /// This is used to construct the new pass manager's target IR analysis pass,
230 : /// set up appropriately for this target machine. Even the old pass manager
231 : /// uses this to answer queries about the IR.
232 : TargetIRAnalysis getTargetIRAnalysis();
233 :
234 : /// Return a TargetTransformInfo for a given function.
235 : ///
236 : /// The returned TargetTransformInfo is specialized to the subtarget
237 : /// corresponding to \p F.
238 : virtual TargetTransformInfo getTargetTransformInfo(const Function &F);
239 :
240 : /// Allow the target to modify the pass manager, e.g. by calling
241 : /// PassManagerBuilder::addExtension.
242 14197 : virtual void adjustPassManager(PassManagerBuilder &) {}
243 :
244 : /// These enums are meant to be passed into addPassesToEmitFile to indicate
245 : /// what type of file to emit, and returned by it to indicate what type of
246 : /// file could actually be made.
247 : enum CodeGenFileType {
248 : CGFT_AssemblyFile,
249 : CGFT_ObjectFile,
250 : CGFT_Null // Do not emit any output.
251 : };
252 :
253 : /// Add passes to the specified pass manager to get the specified file
254 : /// emitted. Typically this will involve several steps of code generation.
255 : /// This method should return true if emission of this file type is not
256 : /// supported, or false on success.
257 : /// \p MMI is an optional parameter that, if set to non-nullptr,
258 : /// will be used to set the MachineModuloInfo for this PM.
259 0 : virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
260 : raw_pwrite_stream *, CodeGenFileType,
261 : bool /*DisableVerify*/ = true,
262 : MachineModuleInfo *MMI = nullptr) {
263 0 : return true;
264 : }
265 :
266 : /// Add passes to the specified pass manager to get machine code emitted with
267 : /// the MCJIT. This method returns true if machine code is not supported. It
268 : /// fills the MCContext Ctx pointer which can be used to build custom
269 : /// MCStreamer.
270 : ///
271 0 : virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
272 : raw_pwrite_stream &,
273 : bool /*DisableVerify*/ = true) {
274 0 : return true;
275 : }
276 :
277 : /// True if subtarget inserts the final scheduling pass on its own.
278 : ///
279 : /// Branch relaxation, which must happen after block placement, can
280 : /// on some targets (e.g. SystemZ) expose additional post-RA
281 : /// scheduling opportunities.
282 19326 : virtual bool targetSchedulesPostRAScheduling() const { return false; };
283 :
284 : void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
285 : Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
286 : MCSymbol *getSymbol(const GlobalValue *GV) const;
287 :
288 : /// True if the target uses physical regs at Prolog/Epilog insertion
289 : /// time. If true (most machines), all vregs must be allocated before
290 : /// PEI. If false (virtual-register machines), then callee-save register
291 : /// spilling and scavenging are not needed or used.
292 401409 : virtual bool usesPhysRegsForPEI() const { return true; }
293 :
294 : /// True if the target wants to use interprocedural register allocation by
295 : /// default. The -enable-ipra flag can be used to override this.
296 29632 : virtual bool useIPRA() const {
297 29632 : return false;
298 : }
299 : };
300 :
301 : /// This class describes a target machine that is implemented with the LLVM
302 : /// target-independent code generator.
303 : ///
304 34088 : class LLVMTargetMachine : public TargetMachine {
305 : protected: // Can only create subclasses.
306 : LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
307 : const Triple &TT, StringRef CPU, StringRef FS,
308 : const TargetOptions &Options, Reloc::Model RM,
309 : CodeModel::Model CM, CodeGenOpt::Level OL);
310 :
311 : void initAsmInfo();
312 :
313 : public:
314 : /// Get a TargetTransformInfo implementation for the target.
315 : ///
316 : /// The TTI returned uses the common code generator to answer queries about
317 : /// the IR.
318 : TargetTransformInfo getTargetTransformInfo(const Function &F) override;
319 :
320 : /// Create a pass configuration object to be used by addPassToEmitX methods
321 : /// for generating a pipeline of CodeGen passes.
322 : virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
323 :
324 : /// Add passes to the specified pass manager to get the specified file
325 : /// emitted. Typically this will involve several steps of code generation.
326 : /// \p MMI is an optional parameter that, if set to non-nullptr,
327 : /// will be used to set the MachineModuloInfofor this PM.
328 : bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
329 : raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
330 : bool DisableVerify = true,
331 : MachineModuleInfo *MMI = nullptr) override;
332 :
333 : /// Add passes to the specified pass manager to get machine code emitted with
334 : /// the MCJIT. This method returns true if machine code is not supported. It
335 : /// fills the MCContext Ctx pointer which can be used to build custom
336 : /// MCStreamer.
337 : bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
338 : raw_pwrite_stream &Out,
339 : bool DisableVerify = true) override;
340 :
341 : /// Returns true if the target is expected to pass all machine verifier
342 : /// checks. This is a stopgap measure to fix targets one by one. We will
343 : /// remove this at some point and always enable the verifier when
344 : /// EXPENSIVE_CHECKS is enabled.
345 0 : virtual bool isMachineVerifierClean() const { return true; }
346 :
347 : /// Adds an AsmPrinter pass to the pipeline that prints assembly or
348 : /// machine code from the MI representation.
349 : bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
350 : raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
351 : MCContext &Context);
352 : };
353 :
354 : } // end namespace llvm
355 :
356 : #endif // LLVM_TARGET_TARGETMACHINE_H
|