Line data Source code
1 : //===- llvm/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp --------------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 :
10 : #include "DbgValueHistoryCalculator.h"
11 : #include "llvm/ADT/BitVector.h"
12 : #include "llvm/ADT/STLExtras.h"
13 : #include "llvm/ADT/SmallVector.h"
14 : #include "llvm/CodeGen/MachineBasicBlock.h"
15 : #include "llvm/CodeGen/MachineFunction.h"
16 : #include "llvm/CodeGen/MachineInstr.h"
17 : #include "llvm/CodeGen/MachineOperand.h"
18 : #include "llvm/CodeGen/TargetLowering.h"
19 : #include "llvm/CodeGen/TargetRegisterInfo.h"
20 : #include "llvm/CodeGen/TargetSubtargetInfo.h"
21 : #include "llvm/IR/DebugInfoMetadata.h"
22 : #include "llvm/IR/DebugLoc.h"
23 : #include "llvm/MC/MCRegisterInfo.h"
24 : #include "llvm/Support/Debug.h"
25 : #include "llvm/Support/raw_ostream.h"
26 : #include <cassert>
27 : #include <map>
28 : #include <utility>
29 :
30 : using namespace llvm;
31 :
32 : #define DEBUG_TYPE "dwarfdebug"
33 :
34 : // If @MI is a DBG_VALUE with debug value described by a
35 : // defined register, returns the number of this register.
36 : // In the other case, returns 0.
37 : static unsigned isDescribedByReg(const MachineInstr &MI) {
38 : assert(MI.isDebugValue());
39 : assert(MI.getNumOperands() == 4);
40 : // If location of variable is described using a register (directly or
41 : // indirectly), this register is always a first operand.
42 170056 : return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
43 : }
44 :
45 72861 : void DbgValueHistoryMap::startInstrRange(InlinedVariable Var,
46 : const MachineInstr &MI) {
47 : // Instruction range should start with a DBG_VALUE instruction for the
48 : // variable.
49 : assert(MI.isDebugValue() && "not a DBG_VALUE");
50 72861 : auto &Ranges = VarInstrRanges[Var];
51 85028 : if (!Ranges.empty() && Ranges.back().second == nullptr &&
52 12167 : Ranges.back().first->isIdenticalTo(MI)) {
53 : LLVM_DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
54 : << "\t" << Ranges.back().first << "\t" << MI << "\n");
55 : return;
56 : }
57 135928 : Ranges.push_back(std::make_pair(&MI, nullptr));
58 : }
59 :
60 53664 : void DbgValueHistoryMap::endInstrRange(InlinedVariable Var,
61 : const MachineInstr &MI) {
62 53664 : auto &Ranges = VarInstrRanges[Var];
63 : // Verify that the current instruction range is not yet closed.
64 : assert(!Ranges.empty() && Ranges.back().second == nullptr);
65 : // For now, instruction ranges are not allowed to cross basic block
66 : // boundaries.
67 : assert(Ranges.back().first->getParent() == MI.getParent());
68 53664 : Ranges.back().second = &MI;
69 53664 : }
70 :
71 72861 : unsigned DbgValueHistoryMap::getRegisterForVar(InlinedVariable Var) const {
72 72861 : const auto &I = VarInstrRanges.find(Var);
73 : if (I == VarInstrRanges.end())
74 : return 0;
75 : const auto &Ranges = I->second;
76 49461 : if (Ranges.empty() || Ranges.back().second != nullptr)
77 : return 0;
78 12167 : return isDescribedByReg(*Ranges.back().first);
79 : }
80 :
81 : namespace {
82 :
83 : // Maps physreg numbers to the variables they describe.
84 : using InlinedVariable = DbgValueHistoryMap::InlinedVariable;
85 : using RegDescribedVarsMap = std::map<unsigned, SmallVector<InlinedVariable, 1>>;
86 :
87 : } // end anonymous namespace
88 :
89 : // Claim that @Var is not described by @RegNo anymore.
90 8969 : static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
91 : InlinedVariable Var) {
92 : const auto &I = RegVars.find(RegNo);
93 : assert(RegNo != 0U && I != RegVars.end());
94 : auto &VarSet = I->second;
95 : const auto &VarPos = llvm::find(VarSet, Var);
96 : assert(VarPos != VarSet.end());
97 : VarSet.erase(VarPos);
98 : // Don't keep empty sets in a map to keep it as small as possible.
99 8969 : if (VarSet.empty())
100 : RegVars.erase(I);
101 8969 : }
102 :
103 : // Claim that @Var is now described by @RegNo.
104 : static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
105 : InlinedVariable Var) {
106 : assert(RegNo != 0U);
107 63809 : auto &VarSet = RegVars[RegNo];
108 : assert(!is_contained(VarSet, Var));
109 63809 : VarSet.push_back(Var);
110 : }
111 :
112 : // Terminate the location range for variables described by register at
113 : // @I by inserting @ClobberingInstr to their history.
114 29799 : static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
115 : RegDescribedVarsMap::iterator I,
116 : DbgValueHistoryMap &HistMap,
117 : const MachineInstr &ClobberingInstr) {
118 : // Iterate over all variables described by this register and add this
119 : // instruction to their history, clobbering it.
120 137127 : for (const auto &Var : I->second)
121 53664 : HistMap.endInstrRange(Var, ClobberingInstr);
122 : RegVars.erase(I);
123 29799 : }
124 :
125 : // Terminate the location range for variables described by register
126 : // @RegNo by inserting @ClobberingInstr to their history.
127 53997495 : static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
128 : DbgValueHistoryMap &HistMap,
129 : const MachineInstr &ClobberingInstr) {
130 : const auto &I = RegVars.find(RegNo);
131 53997495 : if (I == RegVars.end())
132 : return;
133 4713 : clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
134 : }
135 :
136 : // Returns the first instruction in @MBB which corresponds to
137 : // the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
138 198586 : static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
139 : auto LastMI = MBB.getLastNonDebugInstr();
140 396563 : if (LastMI == MBB.end() || !LastMI->isReturn())
141 : return nullptr;
142 : // Assume that epilogue starts with instruction having the same debug location
143 : // as the return instruction.
144 : DebugLoc LastLoc = LastMI->getDebugLoc();
145 : auto Res = LastMI;
146 36203 : for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(),
147 : E = MBB.rend();
148 216448 : I != E; ++I) {
149 211688 : if (I->getDebugLoc() != LastLoc)
150 31443 : return &*Res;
151 : Res = &*I;
152 : }
153 : // If all instructions have the same debug location, assume whole MBB is
154 : // an epilogue.
155 : return &*MBB.begin();
156 : }
157 :
158 : // Collect registers that are modified in the function body (their
159 : // contents is changed outside of the prologue and epilogue).
160 36158 : static void collectChangingRegs(const MachineFunction *MF,
161 : const TargetRegisterInfo *TRI,
162 : BitVector &Regs) {
163 234744 : for (const auto &MBB : *MF) {
164 198586 : auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
165 :
166 2419857 : for (const auto &MI : MBB) {
167 : // Avoid looking at prologue or epilogue instructions.
168 2058888 : if (&MI == FirstEpilogueInst)
169 : break;
170 2022685 : if (MI.getFlag(MachineInstr::FrameSetup))
171 100776 : continue;
172 :
173 : // Look for register defs and register masks. Register masks are
174 : // typically on calls and they clobber everything not in the mask.
175 19634737 : for (const MachineOperand &MO : MI.operands()) {
176 : // Skip virtual registers since they are handled by the parent.
177 16218036 : if (MO.isReg() && MO.isDef() && MO.getReg() &&
178 : !TRI->isVirtualRegister(MO.getReg())) {
179 24162795 : for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
180 9875355 : ++AI)
181 : Regs.set(*AI);
182 7385719 : } else if (MO.isRegMask()) {
183 178121 : Regs.setBitsNotInMask(MO.getRegMask());
184 : }
185 : }
186 : }
187 : }
188 36158 : }
189 :
190 36158 : void llvm::calculateDbgValueHistory(const MachineFunction *MF,
191 : const TargetRegisterInfo *TRI,
192 : DbgValueHistoryMap &Result) {
193 36158 : BitVector ChangingRegs(TRI->getNumRegs());
194 36158 : collectChangingRegs(MF, TRI, ChangingRegs);
195 :
196 36158 : const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
197 36158 : unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
198 : RegDescribedVarsMap RegVars;
199 234744 : for (const auto &MBB : *MF) {
200 2600102 : for (const auto &MI : MBB) {
201 : if (!MI.isDebugInstr()) {
202 : // Not a DBG_VALUE instruction. It may clobber registers which describe
203 : // some variables.
204 20704137 : for (const MachineOperand &MO : MI.operands()) {
205 15633454 : if (MO.isReg() && MO.isDef() && MO.getReg()) {
206 : // Ignore call instructions that claim to clobber SP. The AArch64
207 : // backend does this for aggregate function arguments.
208 1893350 : if (MI.isCall() && MO.getReg() == SP)
209 135355 : continue;
210 : // If this is a virtual register, only clobber it since it doesn't
211 : // have aliases.
212 3245280 : if (TRI->isVirtualRegister(MO.getReg()))
213 175 : clobberRegisterUses(RegVars, MO.getReg(), Result, MI);
214 : // If this is a register def operand, it may end a debug value
215 : // range.
216 : else {
217 25211138 : for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
218 10983104 : ++AI)
219 10983104 : if (ChangingRegs.test(*AI))
220 10053466 : clobberRegisterUses(RegVars, *AI, Result, MI);
221 : }
222 7529039 : } else if (MO.isRegMask()) {
223 : // If this is a register mask operand, clobber all debug values in
224 : // non-CSRs.
225 47315411 : for (unsigned I : ChangingRegs.set_bits()) {
226 : // Don't consider SP to be clobbered by register masks.
227 93907300 : if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
228 : MO.clobbersPhysReg(I)) {
229 43943854 : clobberRegisterUses(RegVars, I, Result, MI);
230 : }
231 : }
232 : }
233 : }
234 2130069 : continue;
235 : }
236 :
237 : // Skip DBG_LABEL instructions.
238 72861 : if (MI.isDebugLabel())
239 0 : continue;
240 :
241 : assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
242 : // Use the base variable (without any DW_OP_piece expressions)
243 : // as index into History. The full variables including the
244 : // piece expressions are attached to the MI.
245 72861 : const DILocalVariable *RawVar = MI.getDebugVariable();
246 : assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
247 : "Expected inlined-at fields to agree");
248 : InlinedVariable Var(RawVar, MI.getDebugLoc()->getInlinedAt());
249 :
250 72861 : if (unsigned PrevReg = Result.getRegisterForVar(Var))
251 8969 : dropRegDescribedVar(RegVars, PrevReg, Var);
252 :
253 72861 : Result.startInstrRange(Var, MI);
254 :
255 71369 : if (unsigned NewReg = isDescribedByReg(MI))
256 : addRegDescribedVar(RegVars, NewReg, Var);
257 : }
258 :
259 : // Make sure locations for register-described variables are valid only
260 : // until the end of the basic block (unless it's the last basic block, in
261 : // which case let their liveness run off to the end of the function).
262 396651 : if (!MBB.empty() && &MBB != &MF->back()) {
263 188186 : for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
264 : auto CurElem = I++; // CurElem can be erased below.
265 77953 : if (TRI->isVirtualRegister(CurElem->first) ||
266 : ChangingRegs.test(CurElem->first))
267 25086 : clobberRegisterUses(RegVars, CurElem, Result, MBB.back());
268 : }
269 : }
270 : }
271 36158 : }
272 :
273 : #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
274 : LLVM_DUMP_METHOD void DbgValueHistoryMap::dump() const {
275 : dbgs() << "DbgValueHistoryMap:\n";
276 : for (const auto &VarRangePair : *this) {
277 : const InlinedVariable &Var = VarRangePair.first;
278 : const InstrRanges &Ranges = VarRangePair.second;
279 :
280 : const DILocalVariable *LocalVar = Var.first;
281 : const DILocation *Location = Var.second;
282 :
283 : dbgs() << " - " << LocalVar->getName() << " at ";
284 :
285 : if (Location)
286 : dbgs() << Location->getFilename() << ":" << Location->getLine() << ":"
287 : << Location->getColumn();
288 : else
289 : dbgs() << "<unknown location>";
290 :
291 : dbgs() << " --\n";
292 :
293 : for (const InstrRange &Range : Ranges) {
294 : dbgs() << " Begin: " << *Range.first;
295 : if (Range.second)
296 : dbgs() << " End : " << *Range.second;
297 : dbgs() << "\n";
298 : }
299 : }
300 : }
301 : #endif
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