Line data Source code
1 : //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file implements the CCState class, used for lowering and implementing
11 : // calling conventions.
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #include "llvm/CodeGen/CallingConvLower.h"
16 : #include "llvm/CodeGen/MachineFrameInfo.h"
17 : #include "llvm/CodeGen/MachineRegisterInfo.h"
18 : #include "llvm/CodeGen/TargetLowering.h"
19 : #include "llvm/CodeGen/TargetRegisterInfo.h"
20 : #include "llvm/CodeGen/TargetSubtargetInfo.h"
21 : #include "llvm/IR/DataLayout.h"
22 : #include "llvm/Support/Debug.h"
23 : #include "llvm/Support/ErrorHandling.h"
24 : #include "llvm/Support/SaveAndRestore.h"
25 : #include "llvm/Support/raw_ostream.h"
26 : #include <algorithm>
27 :
28 : using namespace llvm;
29 :
30 7349796 : CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
31 7349796 : SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
32 : : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
33 7349796 : TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
34 : // No stack is used.
35 7349797 : StackOffset = 0;
36 7349797 : MaxStackArgAlign = 1;
37 :
38 : clearByValRegsInfo();
39 7349797 : UsedRegs.resize((TRI.getNumRegs()+31)/32);
40 7349797 : }
41 :
42 : /// Allocate space on the stack large enough to pass an argument by value.
43 : /// The size and alignment information of the argument is encoded in
44 : /// its parameter attribute.
45 4681 : void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
46 : MVT LocVT, CCValAssign::LocInfo LocInfo,
47 : int MinSize, int MinAlign,
48 : ISD::ArgFlagsTy ArgFlags) {
49 : unsigned Align = ArgFlags.getByValAlign();
50 4681 : unsigned Size = ArgFlags.getByValSize();
51 4681 : if (MinSize > (int)Size)
52 62 : Size = MinSize;
53 4681 : if (MinAlign > (int)Align)
54 237 : Align = MinAlign;
55 4681 : ensureMaxAlignment(Align);
56 4681 : MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Align);
57 4681 : Size = unsigned(alignTo(Size, MinAlign));
58 4681 : unsigned Offset = AllocateStack(Size, Align);
59 4681 : addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
60 4681 : }
61 :
62 : /// Mark a register and all of its aliases as allocated.
63 6354415 : void CCState::MarkAllocated(unsigned Reg) {
64 72201593 : for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
65 131694356 : UsedRegs[*AI/32] |= 1 << (*AI&31);
66 6354415 : }
67 :
68 70 : bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
69 70 : if (!isAllocated(Reg))
70 : return false;
71 :
72 211 : for (auto const &ValAssign : Locs) {
73 197 : if (ValAssign.isRegLoc()) {
74 1116 : for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
75 2035 : AI.isValid(); ++AI) {
76 975 : if (*AI == Reg)
77 56 : return false;
78 : }
79 : }
80 : }
81 : return true;
82 : }
83 :
84 : /// Analyze an array of argument values,
85 : /// incorporating info about the formals into this state.
86 : void
87 166176 : CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
88 : CCAssignFn Fn) {
89 166176 : unsigned NumArgs = Ins.size();
90 :
91 517253 : for (unsigned i = 0; i != NumArgs; ++i) {
92 351077 : MVT ArgVT = Ins[i].VT;
93 351077 : ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
94 351077 : if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
95 : #ifndef NDEBUG
96 : dbgs() << "Formal argument #" << i << " has unhandled type "
97 : << EVT(ArgVT).getEVTString() << '\n';
98 : #endif
99 0 : llvm_unreachable(nullptr);
100 : }
101 : }
102 166176 : }
103 :
104 : /// Analyze the return values of a function, returning true if the return can
105 : /// be performed without sret-demotion and false otherwise.
106 2555835 : bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
107 : CCAssignFn Fn) {
108 : // Determine which register each value should be copied into.
109 3500963 : for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
110 946081 : MVT VT = Outs[i].VT;
111 946081 : ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
112 946081 : if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
113 953 : return false;
114 : }
115 : return true;
116 : }
117 :
118 : /// Analyze the returned values of a return,
119 : /// incorporating info about the result values into this state.
120 244943 : void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
121 : CCAssignFn Fn) {
122 : // Determine which register each value should be copied into.
123 471458 : for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
124 226515 : MVT VT = Outs[i].VT;
125 226515 : ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
126 226515 : if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
127 : #ifndef NDEBUG
128 : dbgs() << "Return operand #" << i << " has unhandled type "
129 : << EVT(VT).getEVTString() << '\n';
130 : #endif
131 0 : llvm_unreachable(nullptr);
132 : }
133 : }
134 244943 : }
135 :
136 : /// Analyze the outgoing arguments to a call,
137 : /// incorporating info about the passed values into this state.
138 1005745 : void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
139 : CCAssignFn Fn) {
140 1005745 : unsigned NumOps = Outs.size();
141 3182411 : for (unsigned i = 0; i != NumOps; ++i) {
142 2176666 : MVT ArgVT = Outs[i].VT;
143 2176666 : ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
144 2176666 : if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
145 : #ifndef NDEBUG
146 : dbgs() << "Call operand #" << i << " has unhandled type "
147 : << EVT(ArgVT).getEVTString() << '\n';
148 : #endif
149 0 : llvm_unreachable(nullptr);
150 : }
151 : }
152 1005745 : }
153 :
154 : /// Same as above except it takes vectors of types and argument flags.
155 1170072 : void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
156 : SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
157 : CCAssignFn Fn) {
158 1170072 : unsigned NumOps = ArgVTs.size();
159 3134887 : for (unsigned i = 0; i != NumOps; ++i) {
160 3929630 : MVT ArgVT = ArgVTs[i];
161 1964815 : ISD::ArgFlagsTy ArgFlags = Flags[i];
162 1964815 : if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
163 : #ifndef NDEBUG
164 : dbgs() << "Call operand #" << i << " has unhandled type "
165 : << EVT(ArgVT).getEVTString() << '\n';
166 : #endif
167 0 : llvm_unreachable(nullptr);
168 : }
169 : }
170 1170072 : }
171 :
172 : /// Analyze the return values of a call, incorporating info about the passed
173 : /// values into this state.
174 2168800 : void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
175 : CCAssignFn Fn) {
176 2894716 : for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
177 725916 : MVT VT = Ins[i].VT;
178 725916 : ISD::ArgFlagsTy Flags = Ins[i].Flags;
179 725916 : if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
180 : #ifndef NDEBUG
181 : dbgs() << "Call result #" << i << " has unhandled type "
182 : << EVT(VT).getEVTString() << '\n';
183 : #endif
184 0 : llvm_unreachable(nullptr);
185 : }
186 : }
187 2168800 : }
188 :
189 : /// Same as above except it's specialized for calls that produce a single value.
190 317 : void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
191 317 : if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
192 : #ifndef NDEBUG
193 : dbgs() << "Call result has unhandled type "
194 : << EVT(VT).getEVTString() << '\n';
195 : #endif
196 0 : llvm_unreachable(nullptr);
197 : }
198 317 : }
199 :
200 : static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
201 65 : if (VT.isVector())
202 : return true; // Assume -msse-regparm might be in effect.
203 34 : if (!VT.isInteger())
204 : return false;
205 34 : if (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall)
206 : return true;
207 : return false;
208 : }
209 :
210 65 : void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
211 : MVT VT, CCAssignFn Fn) {
212 65 : unsigned SavedStackOffset = StackOffset;
213 65 : unsigned SavedMaxStackArgAlign = MaxStackArgAlign;
214 65 : unsigned NumLocs = Locs.size();
215 :
216 : // Set the 'inreg' flag if it is used for this calling convention.
217 : ISD::ArgFlagsTy Flags;
218 65 : if (isValueTypeInRegForCC(CallingConv, VT))
219 : Flags.setInReg();
220 :
221 : // Allocate something of this value type repeatedly until we get assigned a
222 : // location in memory.
223 : bool HaveRegParm = true;
224 425 : while (HaveRegParm) {
225 360 : if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
226 : #ifndef NDEBUG
227 : dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
228 : << " while computing remaining regparms\n";
229 : #endif
230 0 : llvm_unreachable(nullptr);
231 : }
232 360 : HaveRegParm = Locs.back().isRegLoc();
233 : }
234 :
235 : // Copy all the registers from the value locations we added.
236 : assert(NumLocs < Locs.size() && "CC assignment failed to add location");
237 425 : for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
238 720 : if (Locs[I].isRegLoc())
239 295 : Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
240 :
241 : // Clear the assigned values and stack memory. We leave the registers marked
242 : // as allocated so that future queries don't return the same registers, i.e.
243 : // when i64 and f64 are both passed in GPRs.
244 65 : StackOffset = SavedStackOffset;
245 65 : MaxStackArgAlign = SavedMaxStackArgAlign;
246 65 : Locs.resize(NumLocs);
247 65 : }
248 :
249 34 : void CCState::analyzeMustTailForwardedRegisters(
250 : SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
251 : CCAssignFn Fn) {
252 : // Oftentimes calling conventions will not user register parameters for
253 : // variadic functions, so we need to assume we're not variadic so that we get
254 : // all the registers that might be used in a non-variadic call.
255 34 : SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
256 34 : SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
257 :
258 99 : for (MVT RegVT : RegParmTypes) {
259 : SmallVector<MCPhysReg, 8> RemainingRegs;
260 65 : getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
261 65 : const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
262 65 : const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
263 360 : for (MCPhysReg PReg : RemainingRegs) {
264 295 : unsigned VReg = MF.addLiveIn(PReg, RC);
265 590 : Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
266 : }
267 : }
268 34 : }
269 :
270 5309 : bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
271 : CallingConv::ID CallerCC, MachineFunction &MF,
272 : LLVMContext &C,
273 : const SmallVectorImpl<ISD::InputArg> &Ins,
274 : CCAssignFn CalleeFn, CCAssignFn CallerFn) {
275 5309 : if (CalleeCC == CallerCC)
276 : return true;
277 : SmallVector<CCValAssign, 4> RVLocs1;
278 770 : CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
279 385 : CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
280 :
281 : SmallVector<CCValAssign, 4> RVLocs2;
282 770 : CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
283 385 : CCInfo2.AnalyzeCallResult(Ins, CallerFn);
284 :
285 385 : if (RVLocs1.size() != RVLocs2.size())
286 : return false;
287 685 : for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
288 323 : const CCValAssign &Loc1 = RVLocs1[I];
289 : const CCValAssign &Loc2 = RVLocs2[I];
290 323 : if (Loc1.getLocInfo() != Loc2.getLocInfo())
291 : return false;
292 : bool RegLoc1 = Loc1.isRegLoc();
293 318 : if (RegLoc1 != Loc2.isRegLoc())
294 : return false;
295 318 : if (RegLoc1) {
296 318 : if (Loc1.getLocReg() != Loc2.getLocReg())
297 : return false;
298 : } else {
299 0 : if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
300 : return false;
301 : }
302 : }
303 : return true;
304 : }
|
