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       1             : //===- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file implements the CriticalAntiDepBreaker class, which
      11             : // implements register anti-dependence breaking along a blocks
      12             : // critical path during post-RA scheduler.
      13             : //
      14             : //===----------------------------------------------------------------------===//
      15             : 
      16             : #ifndef LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
      17             : #define LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
      18             : 
      19             : #include "AntiDepBreaker.h"
      20             : #include "llvm/ADT/BitVector.h"
      21             : #include "llvm/Support/Compiler.h"
      22             : #include <map>
      23             : #include <vector>
      24             : 
      25             : namespace llvm {
      26             : 
      27             : class MachineBasicBlock;
      28             : class MachineFunction;
      29             : class MachineInstr;
      30             : class MachineOperand;
      31             : class MachineRegisterInfo;
      32             : class RegisterClassInfo;
      33             : class TargetInstrInfo;
      34             : class TargetRegisterClass;
      35             : class TargetRegisterInfo;
      36             : 
      37       20184 : class LLVM_LIBRARY_VISIBILITY CriticalAntiDepBreaker : public AntiDepBreaker {
      38             :     MachineFunction& MF;
      39             :     MachineRegisterInfo &MRI;
      40             :     const TargetInstrInfo *TII;
      41             :     const TargetRegisterInfo *TRI;
      42             :     const RegisterClassInfo &RegClassInfo;
      43             : 
      44             :     /// The set of allocatable registers.
      45             :     /// We'll be ignoring anti-dependencies on non-allocatable registers,
      46             :     /// because they may not be safe to break.
      47             :     const BitVector AllocatableSet;
      48             : 
      49             :     /// For live regs that are only used in one register class in a
      50             :     /// live range, the register class. If the register is not live, the
      51             :     /// corresponding value is null. If the register is live but used in
      52             :     /// multiple register classes, the corresponding value is -1 casted to a
      53             :     /// pointer.
      54             :     std::vector<const TargetRegisterClass *> Classes;
      55             : 
      56             :     /// Map registers to all their references within a live range.
      57             :     std::multimap<unsigned, MachineOperand *> RegRefs;
      58             : 
      59             :     using RegRefIter =
      60             :         std::multimap<unsigned, MachineOperand *>::const_iterator;
      61             : 
      62             :     /// The index of the most recent kill (proceeding bottom-up),
      63             :     /// or ~0u if the register is not live.
      64             :     std::vector<unsigned> KillIndices;
      65             : 
      66             :     /// The index of the most recent complete def (proceeding
      67             :     /// bottom up), or ~0u if the register is live.
      68             :     std::vector<unsigned> DefIndices;
      69             : 
      70             :     /// A set of registers which are live and cannot be changed to
      71             :     /// break anti-dependencies.
      72             :     BitVector KeepRegs;
      73             : 
      74             :   public:
      75             :     CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
      76             :     ~CriticalAntiDepBreaker() override;
      77             : 
      78             :     /// Initialize anti-dep breaking for a new basic block.
      79             :     void StartBlock(MachineBasicBlock *BB) override;
      80             : 
      81             :     /// Identifiy anti-dependencies along the critical path
      82             :     /// of the ScheduleDAG and break them by renaming registers.
      83             :     unsigned BreakAntiDependencies(const std::vector<SUnit> &SUnits,
      84             :                                    MachineBasicBlock::iterator Begin,
      85             :                                    MachineBasicBlock::iterator End,
      86             :                                    unsigned InsertPosIndex,
      87             :                                    DbgValueVector &DbgValues) override;
      88             : 
      89             :     /// Update liveness information to account for the current
      90             :     /// instruction, which will not be scheduled.
      91             :     void Observe(MachineInstr &MI, unsigned Count,
      92             :                  unsigned InsertPosIndex) override;
      93             : 
      94             :     /// Finish anti-dep breaking for a basic block.
      95             :     void FinishBlock() override;
      96             : 
      97             :   private:
      98             :     void PrescanInstruction(MachineInstr &MI);
      99             :     void ScanInstruction(MachineInstr &MI, unsigned Count);
     100             :     bool isNewRegClobberedByRefs(RegRefIter RegRefBegin,
     101             :                                  RegRefIter RegRefEnd,
     102             :                                  unsigned NewReg);
     103             :     unsigned findSuitableFreeRegister(RegRefIter RegRefBegin,
     104             :                                       RegRefIter RegRefEnd,
     105             :                                       unsigned AntiDepReg,
     106             :                                       unsigned LastNewReg,
     107             :                                       const TargetRegisterClass *RC,
     108             :                                       SmallVectorImpl<unsigned> &Forbid);
     109             :   };
     110             : 
     111             : } // end namespace llvm
     112             : 
     113             : #endif // LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H