Line data Source code
1 : //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This is an extremely simple MachineInstr-level copy propagation pass.
11 : //
12 : // This pass forwards the source of COPYs to the users of their destinations
13 : // when doing so is legal. For example:
14 : //
15 : // %reg1 = COPY %reg0
16 : // ...
17 : // ... = OP %reg1
18 : //
19 : // If
20 : // - %reg0 has not been clobbered by the time of the use of %reg1
21 : // - the register class constraints are satisfied
22 : // - the COPY def is the only value that reaches OP
23 : // then this pass replaces the above with:
24 : //
25 : // %reg1 = COPY %reg0
26 : // ...
27 : // ... = OP %reg0
28 : //
29 : // This pass also removes some redundant COPYs. For example:
30 : //
31 : // %R1 = COPY %R0
32 : // ... // No clobber of %R1
33 : // %R0 = COPY %R1 <<< Removed
34 : //
35 : // or
36 : //
37 : // %R1 = COPY %R0
38 : // ... // No clobber of %R0
39 : // %R1 = COPY %R0 <<< Removed
40 : //
41 : //===----------------------------------------------------------------------===//
42 :
43 : #include "llvm/ADT/DenseMap.h"
44 : #include "llvm/ADT/STLExtras.h"
45 : #include "llvm/ADT/SetVector.h"
46 : #include "llvm/ADT/SmallVector.h"
47 : #include "llvm/ADT/Statistic.h"
48 : #include "llvm/ADT/iterator_range.h"
49 : #include "llvm/CodeGen/MachineBasicBlock.h"
50 : #include "llvm/CodeGen/MachineFunction.h"
51 : #include "llvm/CodeGen/MachineFunctionPass.h"
52 : #include "llvm/CodeGen/MachineInstr.h"
53 : #include "llvm/CodeGen/MachineOperand.h"
54 : #include "llvm/CodeGen/MachineRegisterInfo.h"
55 : #include "llvm/CodeGen/TargetInstrInfo.h"
56 : #include "llvm/CodeGen/TargetRegisterInfo.h"
57 : #include "llvm/CodeGen/TargetSubtargetInfo.h"
58 : #include "llvm/MC/MCRegisterInfo.h"
59 : #include "llvm/Pass.h"
60 : #include "llvm/Support/Debug.h"
61 : #include "llvm/Support/DebugCounter.h"
62 : #include "llvm/Support/raw_ostream.h"
63 : #include <cassert>
64 : #include <iterator>
65 :
66 : using namespace llvm;
67 :
68 : #define DEBUG_TYPE "machine-cp"
69 :
70 : STATISTIC(NumDeletes, "Number of dead copies deleted");
71 : STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
72 : DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
73 : "Controls which register COPYs are forwarded");
74 :
75 : namespace {
76 :
77 : class CopyTracker {
78 : using RegList = SmallVector<unsigned, 4>;
79 : using SourceMap = DenseMap<unsigned, RegList>;
80 : using Reg2MIMap = DenseMap<unsigned, MachineInstr *>;
81 :
82 : /// Def -> available copies map.
83 : Reg2MIMap AvailCopyMap;
84 :
85 : /// Def -> copies map.
86 : Reg2MIMap CopyMap;
87 :
88 : /// Src -> Def map
89 : SourceMap SrcMap;
90 :
91 : public:
92 : /// Mark all of the given registers and their subregisters as unavailable for
93 : /// copying.
94 119184 : void markRegsUnavailable(const RegList &Regs, const TargetRegisterInfo &TRI) {
95 242778 : for (unsigned Reg : Regs) {
96 : // Source of copy is no longer available for propagation.
97 544470 : for (MCSubRegIterator SR(Reg, &TRI, true); SR.isValid(); ++SR)
98 841752 : AvailCopyMap.erase(*SR);
99 : }
100 119184 : }
101 :
102 : /// Clobber a single register, removing it from the tracker's copy maps.
103 6083572 : void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) {
104 44409232 : for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) {
105 76651320 : CopyMap.erase(*AI);
106 76651320 : AvailCopyMap.erase(*AI);
107 :
108 76651320 : SourceMap::iterator SI = SrcMap.find(*AI);
109 38325660 : if (SI != SrcMap.end()) {
110 119184 : markRegsUnavailable(SI->second, TRI);
111 : SrcMap.erase(SI);
112 : }
113 : }
114 6083572 : }
115 :
116 : /// Add this copy's registers into the tracker's copy maps.
117 396954 : void trackCopy(MachineInstr *Copy, const TargetRegisterInfo &TRI) {
118 : assert(Copy->isCopy() && "Tracking non-copy?");
119 :
120 396954 : unsigned Def = Copy->getOperand(0).getReg();
121 396954 : unsigned Src = Copy->getOperand(1).getReg();
122 :
123 : // Remember Def is defined by the copy.
124 1697480 : for (MCSubRegIterator SR(Def, &TRI, /*IncludeSelf=*/true); SR.isValid();
125 : ++SR) {
126 1300526 : CopyMap[*SR] = Copy;
127 1300526 : AvailCopyMap[*SR] = Copy;
128 : }
129 :
130 : // Remember source that's copied to Def. Once it's clobbered, then
131 : // it's no longer available for copy propagation.
132 396954 : RegList &DestList = SrcMap[Src];
133 396954 : if (!is_contained(DestList, Def))
134 388745 : DestList.push_back(Def);
135 396954 : }
136 :
137 : bool hasAvailableCopies() { return !AvailCopyMap.empty(); }
138 :
139 1358114 : MachineInstr *findAvailCopy(MachineInstr &DestCopy, unsigned Reg) {
140 1358114 : auto CI = AvailCopyMap.find(Reg);
141 1358114 : if (CI == AvailCopyMap.end())
142 : return nullptr;
143 113911 : MachineInstr &AvailCopy = *CI->second;
144 :
145 : // Check that the available copy isn't clobbered by any regmasks between
146 : // itself and the destination.
147 113911 : unsigned AvailSrc = AvailCopy.getOperand(1).getReg();
148 113911 : unsigned AvailDef = AvailCopy.getOperand(0).getReg();
149 : for (const MachineInstr &MI :
150 1063251 : make_range(AvailCopy.getIterator(), DestCopy.getIterator()))
151 5735159 : for (const MachineOperand &MO : MI.operands())
152 4785819 : if (MO.isRegMask())
153 28351 : if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
154 : return nullptr;
155 :
156 : return &AvailCopy;
157 : }
158 :
159 : MachineInstr *findCopy(unsigned Reg) {
160 66819600 : auto CI = CopyMap.find(Reg);
161 66819600 : if (CI != CopyMap.end())
162 1640138 : return CI->second;
163 : return nullptr;
164 : }
165 :
166 910376 : void clear() {
167 910376 : AvailCopyMap.clear();
168 910376 : CopyMap.clear();
169 910376 : SrcMap.clear();
170 910375 : }
171 : };
172 :
173 : class MachineCopyPropagation : public MachineFunctionPass {
174 : const TargetRegisterInfo *TRI;
175 : const TargetInstrInfo *TII;
176 : const MachineRegisterInfo *MRI;
177 :
178 : public:
179 : static char ID; // Pass identification, replacement for typeid
180 :
181 39373 : MachineCopyPropagation() : MachineFunctionPass(ID) {
182 39373 : initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry());
183 39373 : }
184 :
185 39050 : void getAnalysisUsage(AnalysisUsage &AU) const override {
186 39050 : AU.setPreservesCFG();
187 39050 : MachineFunctionPass::getAnalysisUsage(AU);
188 39050 : }
189 :
190 : bool runOnMachineFunction(MachineFunction &MF) override;
191 :
192 39056 : MachineFunctionProperties getRequiredProperties() const override {
193 39056 : return MachineFunctionProperties().set(
194 39056 : MachineFunctionProperties::Property::NoVRegs);
195 : }
196 :
197 : private:
198 : void ClobberRegister(unsigned Reg);
199 : void ReadRegister(unsigned Reg);
200 : void CopyPropagateBlock(MachineBasicBlock &MBB);
201 : bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
202 : void forwardUses(MachineInstr &MI);
203 : bool isForwardableRegClassCopy(const MachineInstr &Copy,
204 : const MachineInstr &UseI, unsigned UseIdx);
205 : bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
206 :
207 : /// Candidates for deletion.
208 : SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
209 :
210 : CopyTracker Tracker;
211 :
212 : bool Changed;
213 : };
214 :
215 : } // end anonymous namespace
216 :
217 : char MachineCopyPropagation::ID = 0;
218 :
219 : char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
220 :
221 124520 : INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
222 : "Machine Copy Propagation Pass", false, false)
223 :
224 8917837 : void MachineCopyPropagation::ReadRegister(unsigned Reg) {
225 : // If 'Reg' is defined by a copy, the copy is no longer a candidate
226 : // for elimination.
227 75737437 : for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
228 66819600 : if (MachineInstr *Copy = Tracker.findCopy(*AI)) {
229 : LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
230 1640138 : MaybeDeadCopies.remove(Copy);
231 : }
232 : }
233 8917837 : }
234 :
235 : /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
236 : /// This fact may have been obscured by sub register usage or may not be true at
237 : /// all even though Src and Def are subregisters of the registers used in
238 : /// PreviousCopy. e.g.
239 : /// isNopCopy("ecx = COPY eax", AX, CX) == true
240 : /// isNopCopy("ecx = COPY eax", AH, CL) == false
241 17021 : static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src,
242 : unsigned Def, const TargetRegisterInfo *TRI) {
243 17021 : unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg();
244 17021 : unsigned PreviousDef = PreviousCopy.getOperand(0).getReg();
245 17021 : if (Src == PreviousSrc) {
246 : assert(Def == PreviousDef);
247 : return true;
248 : }
249 14160 : if (!TRI->isSubRegister(PreviousSrc, Src))
250 : return false;
251 77 : unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
252 77 : return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
253 : }
254 :
255 : /// Remove instruction \p Copy if there exists a previous copy that copies the
256 : /// register \p Src to the register \p Def; This may happen indirectly by
257 : /// copying the super registers.
258 798226 : bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src,
259 : unsigned Def) {
260 : // Avoid eliminating a copy from/to a reserved registers as we cannot predict
261 : // the value (Example: The sparc zero register is writable but stays zero).
262 1596452 : if (MRI->isReserved(Src) || MRI->isReserved(Def))
263 : return false;
264 :
265 : // Search for an existing copy.
266 778030 : MachineInstr *PrevCopy = Tracker.findAvailCopy(Copy, Def);
267 778030 : if (!PrevCopy)
268 : return false;
269 :
270 : // Check that the existing copy uses the correct sub registers.
271 34048 : if (PrevCopy->getOperand(0).isDead())
272 : return false;
273 17021 : if (!isNopCopy(*PrevCopy, Src, Def, TRI))
274 : return false;
275 :
276 : LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
277 :
278 : // Copy was redundantly redefining either Src or Def. Remove earlier kill
279 : // flags between Copy and PrevCopy because the value will be reused now.
280 : assert(Copy.isCopy());
281 2927 : unsigned CopyDef = Copy.getOperand(0).getReg();
282 : assert(CopyDef == Src || CopyDef == Def);
283 : for (MachineInstr &MI :
284 46045 : make_range(PrevCopy->getIterator(), Copy.getIterator()))
285 43118 : MI.clearRegisterKills(CopyDef, TRI);
286 :
287 2927 : Copy.eraseFromParent();
288 2927 : Changed = true;
289 : ++NumDeletes;
290 2927 : return true;
291 : }
292 :
293 : /// Decide whether we should forward the source of \param Copy to its use in
294 : /// \param UseI based on the physical register class constraints of the opcode
295 : /// and avoiding introducing more cross-class COPYs.
296 0 : bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
297 : const MachineInstr &UseI,
298 : unsigned UseIdx) {
299 :
300 0 : unsigned CopySrcReg = Copy.getOperand(1).getReg();
301 :
302 : // If the new register meets the opcode register constraints, then allow
303 : // forwarding.
304 0 : if (const TargetRegisterClass *URC =
305 0 : UseI.getRegClassConstraint(UseIdx, TII, TRI))
306 0 : return URC->contains(CopySrcReg);
307 :
308 0 : if (!UseI.isCopy())
309 0 : return false;
310 :
311 : /// COPYs don't have register class constraints, so if the user instruction
312 : /// is a COPY, we just try to avoid introducing additional cross-class
313 : /// COPYs. For example:
314 : ///
315 : /// RegClassA = COPY RegClassB // Copy parameter
316 : /// ...
317 : /// RegClassB = COPY RegClassA // UseI parameter
318 : ///
319 : /// which after forwarding becomes
320 : ///
321 : /// RegClassA = COPY RegClassB
322 : /// ...
323 : /// RegClassB = COPY RegClassB
324 : ///
325 : /// so we have reduced the number of cross-class COPYs and potentially
326 : /// introduced a nop COPY that can be removed.
327 : const TargetRegisterClass *UseDstRC =
328 0 : TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg());
329 :
330 : const TargetRegisterClass *SuperRC = UseDstRC;
331 0 : for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses();
332 0 : SuperRC; SuperRC = *SuperRCI++)
333 0 : if (SuperRC->contains(CopySrcReg))
334 0 : return true;
335 :
336 : return false;
337 : }
338 :
339 : /// Check that \p MI does not have implicit uses that overlap with it's \p Use
340 : /// operand (the register being replaced), since these can sometimes be
341 : /// implicitly tied to other operands. For example, on AMDGPU:
342 : ///
343 : /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
344 : ///
345 : /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
346 : /// way of knowing we need to update the latter when updating the former.
347 0 : bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
348 : const MachineOperand &Use) {
349 0 : for (const MachineOperand &MIUse : MI.uses())
350 0 : if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
351 0 : MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
352 0 : return true;
353 :
354 : return false;
355 : }
356 :
357 : /// Look for available copies whose destination register is used by \p MI and
358 : /// replace the use in \p MI with the copy's source register.
359 6848929 : void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
360 6848929 : if (!Tracker.hasAvailableCopies())
361 : return;
362 :
363 : // Look for non-tied explicit vreg uses that have an active COPY
364 : // instruction that defines the physical register allocated to them.
365 : // Replace the vreg with the source of the active COPY.
366 6368894 : for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
367 : ++OpIdx) {
368 5248780 : MachineOperand &MOUse = MI.getOperand(OpIdx);
369 : // Don't forward into undef use operands since doing so can cause problems
370 : // with the machine verifier, since it doesn't treat undef reads as reads,
371 : // so we can end up with a live range that ends on an undef read, leading to
372 : // an error that the live range doesn't end on a read of the live range
373 : // register.
374 5248780 : if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
375 : MOUse.isImplicit())
376 : continue;
377 :
378 1532886 : if (!MOUse.getReg())
379 : continue;
380 :
381 : // Check that the register is marked 'renamable' so we know it is safe to
382 : // rename it without violating any constraints that aren't expressed in the
383 : // IR (e.g. ABI or opcode requirements).
384 1004514 : if (!MOUse.isRenamable())
385 : continue;
386 :
387 580084 : MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg());
388 580084 : if (!Copy)
389 : continue;
390 :
391 68595 : unsigned CopyDstReg = Copy->getOperand(0).getReg();
392 : const MachineOperand &CopySrc = Copy->getOperand(1);
393 68595 : unsigned CopySrcReg = CopySrc.getReg();
394 :
395 : // FIXME: Don't handle partial uses of wider COPYs yet.
396 68595 : if (MOUse.getReg() != CopyDstReg) {
397 : LLVM_DEBUG(
398 : dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n "
399 : << MI);
400 : continue;
401 : }
402 :
403 : // Don't forward COPYs of reserved regs unless they are constant.
404 128822 : if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
405 : continue;
406 :
407 62694 : if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
408 : continue;
409 :
410 11192 : if (hasImplicitOverlap(MI, MOUse))
411 : continue;
412 :
413 : if (!DebugCounter::shouldExecute(FwdCounter)) {
414 : LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n "
415 : << MI);
416 : continue;
417 : }
418 :
419 : LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
420 : << "\n with " << printReg(CopySrcReg, TRI)
421 : << "\n in " << MI << " from " << *Copy);
422 :
423 11161 : MOUse.setReg(CopySrcReg);
424 11161 : if (!CopySrc.isRenamable())
425 9289 : MOUse.setIsRenamable(false);
426 :
427 : LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
428 :
429 : // Clear kill markers that may have been invalidated.
430 : for (MachineInstr &KMI :
431 176415 : make_range(Copy->getIterator(), std::next(MI.getIterator())))
432 154093 : KMI.clearRegisterKills(CopySrcReg, TRI);
433 :
434 : ++NumCopyForwards;
435 11161 : Changed = true;
436 : }
437 : }
438 :
439 910376 : void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
440 : LLVM_DEBUG(dbgs() << "MCP: CopyPropagateBlock " << MBB.getName() << "\n");
441 :
442 7762232 : for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) {
443 6851856 : MachineInstr *MI = &*I;
444 : ++I;
445 :
446 : // Analyze copies (which don't overlap themselves).
447 7251798 : if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
448 399942 : MI->getOperand(1).getReg())) {
449 399881 : unsigned Def = MI->getOperand(0).getReg();
450 399881 : unsigned Src = MI->getOperand(1).getReg();
451 :
452 : assert(!TargetRegisterInfo::isVirtualRegister(Def) &&
453 : !TargetRegisterInfo::isVirtualRegister(Src) &&
454 : "MachineCopyPropagation should be run after register allocation!");
455 :
456 : // The two copies cancel out and the source of the first copy
457 : // hasn't been overridden, eliminate the second one. e.g.
458 : // %ecx = COPY %eax
459 : // ... nothing clobbered eax.
460 : // %eax = COPY %ecx
461 : // =>
462 : // %ecx = COPY %eax
463 : //
464 : // or
465 : //
466 : // %ecx = COPY %eax
467 : // ... nothing clobbered eax.
468 : // %ecx = COPY %eax
469 : // =>
470 : // %ecx = COPY %eax
471 399881 : if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def))
472 399881 : continue;
473 :
474 396954 : forwardUses(*MI);
475 :
476 : // Src may have been changed by forwardUses()
477 396954 : Src = MI->getOperand(1).getReg();
478 :
479 : // If Src is defined by a previous copy, the previous copy cannot be
480 : // eliminated.
481 396954 : ReadRegister(Src);
482 837861 : for (const MachineOperand &MO : MI->implicit_operands()) {
483 43953 : if (!MO.isReg() || !MO.readsReg())
484 : continue;
485 39910 : unsigned Reg = MO.getReg();
486 39910 : if (!Reg)
487 : continue;
488 39910 : ReadRegister(Reg);
489 : }
490 :
491 : LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump());
492 :
493 : // Copy is now a candidate for deletion.
494 793908 : if (!MRI->isReserved(Def))
495 394998 : MaybeDeadCopies.insert(MI);
496 :
497 : // If 'Def' is previously source of another copy, then this earlier copy's
498 : // source is no longer available. e.g.
499 : // %xmm9 = copy %xmm2
500 : // ...
501 : // %xmm2 = copy %xmm0
502 : // ...
503 : // %xmm2 = copy %xmm9
504 396954 : Tracker.clobberRegister(Def, *TRI);
505 837861 : for (const MachineOperand &MO : MI->implicit_operands()) {
506 43953 : if (!MO.isReg() || !MO.isDef())
507 : continue;
508 4043 : unsigned Reg = MO.getReg();
509 4043 : if (!Reg)
510 : continue;
511 4043 : Tracker.clobberRegister(Reg, *TRI);
512 : }
513 :
514 396954 : Tracker.trackCopy(MI, *TRI);
515 :
516 396954 : continue;
517 : }
518 :
519 : // Clobber any earlyclobber regs first.
520 36960249 : for (const MachineOperand &MO : MI->operands())
521 30508274 : if (MO.isReg() && MO.isEarlyClobber()) {
522 102750 : unsigned Reg = MO.getReg();
523 : // If we have a tied earlyclobber, that means it is also read by this
524 : // instruction, so we need to make sure we don't remove it as dead
525 : // later.
526 102750 : if (MO.isTied())
527 7286 : ReadRegister(Reg);
528 102750 : Tracker.clobberRegister(Reg, *TRI);
529 : }
530 :
531 6451975 : forwardUses(*MI);
532 :
533 : // Not a copy.
534 : SmallVector<unsigned, 2> Defs;
535 : const MachineOperand *RegMask = nullptr;
536 36960249 : for (const MachineOperand &MO : MI->operands()) {
537 30508274 : if (MO.isRegMask())
538 : RegMask = &MO;
539 30508274 : if (!MO.isReg())
540 21724046 : continue;
541 19183363 : unsigned Reg = MO.getReg();
542 19183363 : if (!Reg)
543 : continue;
544 :
545 : assert(!TargetRegisterInfo::isVirtualRegister(Reg) &&
546 : "MachineCopyPropagation should be run after register allocation!");
547 :
548 14363985 : if (MO.isDef() && !MO.isEarlyClobber()) {
549 5579757 : Defs.push_back(Reg);
550 5579757 : continue;
551 8784228 : } else if (!MO.isDebug() && MO.readsReg())
552 8473687 : ReadRegister(Reg);
553 : }
554 :
555 : // The instruction has a register mask operand which means that it clobbers
556 : // a large set of registers. Treat clobbered registers the same way as
557 : // defined registers.
558 6451975 : if (RegMask) {
559 : // Erase any MaybeDeadCopies whose destination register is clobbered.
560 : for (SmallSetVector<MachineInstr *, 8>::iterator DI =
561 : MaybeDeadCopies.begin();
562 293408 : DI != MaybeDeadCopies.end();) {
563 41439 : MachineInstr *MaybeDead = *DI;
564 41439 : unsigned Reg = MaybeDead->getOperand(0).getReg();
565 : assert(!MRI->isReserved(Reg));
566 :
567 41439 : if (!RegMask->clobbersPhysReg(Reg)) {
568 41371 : ++DI;
569 41371 : continue;
570 : }
571 :
572 : LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
573 : MaybeDead->dump());
574 :
575 : // Make sure we invalidate any entries in the copy maps before erasing
576 : // the instruction.
577 68 : Tracker.clobberRegister(Reg, *TRI);
578 :
579 : // erase() will return the next valid iterator pointing to the next
580 : // element after the erased one.
581 68 : DI = MaybeDeadCopies.erase(DI);
582 68 : MaybeDead->eraseFromParent();
583 68 : Changed = true;
584 : ++NumDeletes;
585 : }
586 : }
587 :
588 : // Any previous copy definition or reading the Defs is no longer available.
589 12031732 : for (unsigned Reg : Defs)
590 5579757 : Tracker.clobberRegister(Reg, *TRI);
591 : }
592 :
593 : // If MBB doesn't have successors, delete the copies whose defs are not used.
594 : // If MBB does have successors, then conservative assume the defs are live-out
595 : // since we don't want to trust live-in lists.
596 910376 : if (MBB.succ_empty()) {
597 430627 : for (MachineInstr *MaybeDead : MaybeDeadCopies) {
598 : LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
599 : MaybeDead->dump());
600 : assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg()));
601 :
602 : // Update matching debug values.
603 : assert(MaybeDead->isCopy());
604 193 : MaybeDead->changeDebugValuesDefReg(MaybeDead->getOperand(1).getReg());
605 :
606 193 : MaybeDead->eraseFromParent();
607 194 : Changed = true;
608 : ++NumDeletes;
609 : }
610 : }
611 :
612 : MaybeDeadCopies.clear();
613 910376 : Tracker.clear();
614 910375 : }
615 :
616 387914 : bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
617 387914 : if (skipFunction(MF.getFunction()))
618 : return false;
619 :
620 387584 : Changed = false;
621 :
622 387584 : TRI = MF.getSubtarget().getRegisterInfo();
623 387584 : TII = MF.getSubtarget().getInstrInfo();
624 387584 : MRI = &MF.getRegInfo();
625 :
626 1297959 : for (MachineBasicBlock &MBB : MF)
627 910376 : CopyPropagateBlock(MBB);
628 :
629 387583 : return Changed;
630 : }
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