LCOV - code coverage report
Current view: top level - lib/CodeGen - RegisterCoalescer.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 2 11 18.2 %
Date: 2018-10-20 13:21:21 Functions: 0 9 0.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file contains the abstract interface for register coalescers,
      11             : // allowing them to interact with and query register allocators.
      12             : //
      13             : //===----------------------------------------------------------------------===//
      14             : 
      15             : #ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
      16             : #define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
      17             : 
      18             : namespace llvm {
      19             : 
      20             : class MachineInstr;
      21             : class TargetRegisterClass;
      22             : class TargetRegisterInfo;
      23             : 
      24             :   /// A helper class for register coalescers. When deciding if
      25             :   /// two registers can be coalesced, CoalescerPair can determine if a copy
      26             :   /// instruction would become an identity copy after coalescing.
      27             :   class CoalescerPair {
      28             :     const TargetRegisterInfo &TRI;
      29             : 
      30             :     /// The register that will be left after coalescing. It can be a
      31             :     /// virtual or physical register.
      32             :     unsigned DstReg = 0;
      33             : 
      34             :     /// The virtual register that will be coalesced into dstReg.
      35             :     unsigned SrcReg = 0;
      36             : 
      37             :     /// The sub-register index of the old DstReg in the new coalesced register.
      38             :     unsigned DstIdx = 0;
      39             : 
      40             :     /// The sub-register index of the old SrcReg in the new coalesced register.
      41             :     unsigned SrcIdx = 0;
      42             : 
      43             :     /// True when the original copy was a partial subregister copy.
      44             :     bool Partial = false;
      45             : 
      46             :     /// True when both regs are virtual and newRC is constrained.
      47             :     bool CrossClass = false;
      48             : 
      49             :     /// True when DstReg and SrcReg are reversed from the original
      50             :     /// copy instruction.
      51             :     bool Flipped = false;
      52             : 
      53             :     /// The register class of the coalesced register, or NULL if DstReg
      54             :     /// is a physreg. This register class may be a super-register of both
      55             :     /// SrcReg and DstReg.
      56             :     const TargetRegisterClass *NewRC = nullptr;
      57             : 
      58             :   public:
      59     1855502 :     CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {}
      60             : 
      61             :     /// Create a CoalescerPair representing a virtreg-to-physreg copy.
      62             :     /// No need to call setRegisters().
      63             :     CoalescerPair(unsigned VirtReg, unsigned PhysReg,
      64             :                   const TargetRegisterInfo &tri)
      65     5674436 :       : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg) {}
      66             : 
      67             :     /// Set registers to match the copy instruction MI. Return
      68             :     /// false if MI is not a coalescable copy instruction.
      69             :     bool setRegisters(const MachineInstr*);
      70             : 
      71             :     /// Swap SrcReg and DstReg. Return false if swapping is impossible
      72             :     /// because DstReg is a physical register, or SubIdx is set.
      73             :     bool flip();
      74             : 
      75             :     /// Return true if MI is a copy instruction that will become
      76             :     /// an identity copy after coalescing.
      77             :     bool isCoalescable(const MachineInstr*) const;
      78             : 
      79             :     /// Return true if DstReg is a physical register.
      80           0 :     bool isPhys() const { return !NewRC; }
      81             : 
      82             :     /// Return true if the original copy instruction did not copy
      83             :     /// the full register, but was a subreg operation.
      84           0 :     bool isPartial() const { return Partial; }
      85             : 
      86             :     /// Return true if DstReg is virtual and NewRC is a smaller
      87             :     /// register class than DstReg's.
      88           0 :     bool isCrossClass() const { return CrossClass; }
      89             : 
      90             :     /// Return true when getSrcReg is the register being defined by
      91             :     /// the original copy instruction.
      92           0 :     bool isFlipped() const { return Flipped; }
      93             : 
      94             :     /// Return the register (virtual or physical) that will remain
      95             :     /// after coalescing.
      96           0 :     unsigned getDstReg() const { return DstReg; }
      97             : 
      98             :     /// Return the virtual register that will be coalesced away.
      99           0 :     unsigned getSrcReg() const { return SrcReg; }
     100             : 
     101             :     /// Return the subregister index that DstReg will be coalesced into, or 0.
     102           0 :     unsigned getDstIdx() const { return DstIdx; }
     103             : 
     104             :     /// Return the subregister index that SrcReg will be coalesced into, or 0.
     105           0 :     unsigned getSrcIdx() const { return SrcIdx; }
     106             : 
     107             :     /// Return the register class of the coalesced register.
     108           0 :     const TargetRegisterClass *getNewRC() const { return NewRC; }
     109             :   };
     110             : 
     111             : } // end namespace llvm
     112             : 
     113             : #endif // LLVM_LIB_CODEGEN_REGISTERCOALESCER_H

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