Line data Source code
1 : //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file implements float type expansion and softening for LegalizeTypes.
11 : // Softening is the act of turning a computation in an illegal floating point
12 : // type into a computation in an integer type of the same size; also known as
13 : // "soft float". For example, turning f32 arithmetic into operations using i32.
14 : // The resulting integer value is the same as what you would get by performing
15 : // the floating point operation and bitcasting the result to the integer type.
16 : // Expansion is the act of changing a computation in an illegal type to be a
17 : // computation in two identical registers of a smaller type. For example,
18 : // implementing ppcf128 arithmetic in two f64 registers.
19 : //
20 : //===----------------------------------------------------------------------===//
21 :
22 : #include "LegalizeTypes.h"
23 : #include "llvm/Support/ErrorHandling.h"
24 : #include "llvm/Support/raw_ostream.h"
25 : using namespace llvm;
26 :
27 : #define DEBUG_TYPE "legalize-types"
28 :
29 : /// GetFPLibCall - Return the right libcall for the given floating point type.
30 0 : static RTLIB::Libcall GetFPLibCall(EVT VT,
31 : RTLIB::Libcall Call_F32,
32 : RTLIB::Libcall Call_F64,
33 : RTLIB::Libcall Call_F80,
34 : RTLIB::Libcall Call_F128,
35 : RTLIB::Libcall Call_PPCF128) {
36 : return
37 0 : VT == MVT::f32 ? Call_F32 :
38 0 : VT == MVT::f64 ? Call_F64 :
39 0 : VT == MVT::f80 ? Call_F80 :
40 0 : VT == MVT::f128 ? Call_F128 :
41 0 : VT == MVT::ppcf128 ? Call_PPCF128 :
42 0 : RTLIB::UNKNOWN_LIBCALL;
43 : }
44 :
45 : //===----------------------------------------------------------------------===//
46 : // Convert Float Results to Integer for Non-HW-supported Operations.
47 : //===----------------------------------------------------------------------===//
48 :
49 3870 : bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
50 : LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
51 : dbgs() << "\n");
52 3870 : SDValue R = SDValue();
53 :
54 7740 : switch (N->getOpcode()) {
55 0 : default:
56 : #ifndef NDEBUG
57 : dbgs() << "SoftenFloatResult #" << ResNo << ": ";
58 : N->dump(&DAG); dbgs() << "\n";
59 : #endif
60 0 : llvm_unreachable("Do not know how to soften the result of this operator!");
61 :
62 : case ISD::Register:
63 : case ISD::CopyFromReg:
64 : case ISD::CopyToReg:
65 : assert(isLegalInHWReg(N->getValueType(ResNo)) &&
66 : "Unsupported SoftenFloatRes opcode!");
67 : // Only when isLegalInHWReg, we can skip check of the operands.
68 250 : R = SDValue(N, ResNo);
69 250 : break;
70 0 : case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
71 1028 : case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break;
72 0 : case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
73 222 : case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
74 45 : case ISD::EXTRACT_VECTOR_ELT:
75 45 : R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
76 18 : case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
77 2 : case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
78 3 : case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
79 226 : case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
80 11 : case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
81 20 : case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
82 7 : case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
83 94 : case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
84 5 : case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
85 5 : case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
86 13 : case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
87 5 : case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
88 5 : case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
89 5 : case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
90 7 : case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
91 112 : case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
92 12 : case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
93 6 : case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break;
94 159 : case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
95 31 : case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
96 227 : case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break;
97 24 : case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
98 12 : case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
99 4 : case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
100 10 : case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
101 12 : case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break;
102 8 : case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
103 8 : case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
104 60 : case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
105 7 : case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
106 860 : case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break;
107 89 : case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break;
108 4 : case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break;
109 234 : case ISD::SINT_TO_FP:
110 234 : case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
111 19 : case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
112 1 : case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
113 : }
114 :
115 3870 : if (R.getNode() && R.getNode() != N) {
116 3404 : SetSoftenedFloat(SDValue(N, ResNo), R);
117 : // Return true only if the node is changed, assuming that the operands
118 : // are also converted when necessary.
119 3404 : return true;
120 : }
121 :
122 : // Otherwise, return false to tell caller to scan operands.
123 : return false;
124 : }
125 :
126 1028 : SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127 2056 : if (isLegalInHWReg(N->getValueType(ResNo)))
128 38 : return SDValue(N, ResNo);
129 1980 : return BitConvertToInteger(N->getOperand(0));
130 : }
131 :
132 0 : SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
133 : unsigned ResNo) {
134 0 : SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135 0 : return BitConvertToInteger(Op);
136 : }
137 :
138 0 : SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139 : // Convert the inputs to integers, and build a new pair out of them.
140 0 : return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141 0 : TLI.getTypeToTransformTo(*DAG.getContext(),
142 : N->getValueType(0)),
143 0 : BitConvertToInteger(N->getOperand(0)),
144 0 : BitConvertToInteger(N->getOperand(1)));
145 : }
146 :
147 222 : SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148 : // When LegalInHWReg, we can load better from the constant pool.
149 444 : if (isLegalInHWReg(N->getValueType(ResNo)))
150 21 : return SDValue(N, ResNo);
151 : ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152 : // In ppcf128, the high 64 bits are always first in memory regardless
153 : // of Endianness. LLVM's APFloat representation is not Endian sensitive,
154 : // and so always converts into a 128-bit APInt in a non-Endian-sensitive
155 : // way. However, APInt's are serialized in an Endian-sensitive fashion,
156 : // so on big-Endian targets, the two doubles are output in the wrong
157 : // order. Fix this by manually flipping the order of the high 64 bits
158 : // and the low 64 bits here.
159 201 : if (DAG.getDataLayout().isBigEndian() &&
160 5 : CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf128) {
161 2 : uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1],
162 5 : CN->getValueAPF().bitcastToAPInt().getRawData()[0] };
163 1 : APInt Val(128, words);
164 1 : return DAG.getConstant(Val, SDLoc(CN),
165 1 : TLI.getTypeToTransformTo(*DAG.getContext(),
166 1 : CN->getValueType(0)));
167 : } else {
168 600 : return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
169 200 : TLI.getTypeToTransformTo(*DAG.getContext(),
170 400 : CN->getValueType(0)));
171 : }
172 : }
173 :
174 45 : SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
175 : // When LegalInHWReg, keep the extracted value in register.
176 90 : if (isLegalInHWReg(N->getValueType(ResNo)))
177 8 : return SDValue(N, ResNo);
178 74 : SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
179 37 : return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 37 : NewOp.getValueType().getVectorElementType(),
181 148 : NewOp, N->getOperand(1));
182 : }
183 :
184 18 : SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
185 : // When LegalInHWReg, FABS can be implemented as native bitwise operations.
186 36 : if (isLegalInHWReg(N->getValueType(ResNo)))
187 13 : return SDValue(N, ResNo);
188 10 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
189 5 : unsigned Size = NVT.getSizeInBits();
190 :
191 : // Mask = ~(1 << (Size-1))
192 5 : APInt API = APInt::getAllOnesValue(Size);
193 5 : API.clearBit(Size - 1);
194 5 : SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
195 10 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
196 10 : return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
197 : }
198 :
199 2 : SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
200 4 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
201 4 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
202 4 : GetSoftenedFloat(N->getOperand(1)) };
203 2 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
204 : RTLIB::FMIN_F32,
205 : RTLIB::FMIN_F64,
206 : RTLIB::FMIN_F80,
207 : RTLIB::FMIN_F128,
208 : RTLIB::FMIN_PPCF128),
209 2 : NVT, Ops, false, SDLoc(N)).first;
210 : }
211 :
212 3 : SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
213 6 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
214 6 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
215 6 : GetSoftenedFloat(N->getOperand(1)) };
216 3 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
217 : RTLIB::FMAX_F32,
218 : RTLIB::FMAX_F64,
219 : RTLIB::FMAX_F80,
220 : RTLIB::FMAX_F128,
221 : RTLIB::FMAX_PPCF128),
222 4 : NVT, Ops, false, SDLoc(N)).first;
223 : }
224 :
225 226 : SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
226 452 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
227 452 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
228 452 : GetSoftenedFloat(N->getOperand(1)) };
229 226 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
230 : RTLIB::ADD_F32,
231 : RTLIB::ADD_F64,
232 : RTLIB::ADD_F80,
233 : RTLIB::ADD_F128,
234 : RTLIB::ADD_PPCF128),
235 362 : NVT, Ops, false, SDLoc(N)).first;
236 : }
237 :
238 11 : SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
239 22 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
240 22 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
241 11 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
242 : RTLIB::CEIL_F32,
243 : RTLIB::CEIL_F64,
244 : RTLIB::CEIL_F80,
245 : RTLIB::CEIL_F128,
246 : RTLIB::CEIL_PPCF128),
247 18 : NVT, Op, false, SDLoc(N)).first;
248 : }
249 :
250 20 : SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
251 : // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
252 40 : if (isLegalInHWReg(N->getValueType(ResNo)))
253 7 : return SDValue(N, ResNo);
254 26 : SDValue LHS = GetSoftenedFloat(N->getOperand(0));
255 26 : SDValue RHS = BitConvertToInteger(N->getOperand(1));
256 : SDLoc dl(N);
257 :
258 13 : EVT LVT = LHS.getValueType();
259 13 : EVT RVT = RHS.getValueType();
260 :
261 13 : unsigned LSize = LVT.getSizeInBits();
262 13 : unsigned RSize = RVT.getSizeInBits();
263 :
264 : // First get the sign bit of second operand.
265 13 : SDValue SignBit = DAG.getNode(
266 13 : ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
267 13 : DAG.getConstant(RSize - 1, dl,
268 13 : TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
269 26 : SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
270 :
271 : // Shift right or sign-extend it if the two operands have different types.
272 13 : int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
273 13 : if (SizeDiff > 0) {
274 0 : SignBit =
275 0 : DAG.getNode(ISD::SRL, dl, RVT, SignBit,
276 : DAG.getConstant(SizeDiff, dl,
277 0 : TLI.getShiftAmountTy(SignBit.getValueType(),
278 0 : DAG.getDataLayout())));
279 0 : SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
280 13 : } else if (SizeDiff < 0) {
281 4 : SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
282 2 : SignBit =
283 2 : DAG.getNode(ISD::SHL, dl, LVT, SignBit,
284 2 : DAG.getConstant(-SizeDiff, dl,
285 2 : TLI.getShiftAmountTy(SignBit.getValueType(),
286 2 : DAG.getDataLayout())));
287 : }
288 :
289 : // Clear the sign bit of the first operand.
290 13 : SDValue Mask = DAG.getNode(
291 13 : ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
292 13 : DAG.getConstant(LSize - 1, dl,
293 13 : TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
294 26 : Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
295 26 : LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
296 :
297 : // Or the value with the sign bit.
298 26 : return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
299 : }
300 :
301 7 : SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
302 14 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
303 14 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
304 7 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
305 : RTLIB::COS_F32,
306 : RTLIB::COS_F64,
307 : RTLIB::COS_F80,
308 : RTLIB::COS_F128,
309 : RTLIB::COS_PPCF128),
310 9 : NVT, Op, false, SDLoc(N)).first;
311 : }
312 :
313 94 : SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
314 188 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
315 188 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
316 188 : GetSoftenedFloat(N->getOperand(1)) };
317 94 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
318 : RTLIB::DIV_F32,
319 : RTLIB::DIV_F64,
320 : RTLIB::DIV_F80,
321 : RTLIB::DIV_F128,
322 : RTLIB::DIV_PPCF128),
323 176 : NVT, Ops, false, SDLoc(N)).first;
324 : }
325 :
326 5 : SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
327 10 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
328 10 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
329 5 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
330 : RTLIB::EXP_F32,
331 : RTLIB::EXP_F64,
332 : RTLIB::EXP_F80,
333 : RTLIB::EXP_F128,
334 : RTLIB::EXP_PPCF128),
335 7 : NVT, Op, false, SDLoc(N)).first;
336 : }
337 :
338 5 : SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
339 10 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
340 10 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
341 5 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
342 : RTLIB::EXP2_F32,
343 : RTLIB::EXP2_F64,
344 : RTLIB::EXP2_F80,
345 : RTLIB::EXP2_F128,
346 : RTLIB::EXP2_PPCF128),
347 7 : NVT, Op, false, SDLoc(N)).first;
348 : }
349 :
350 13 : SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
351 26 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
352 26 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
353 13 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
354 : RTLIB::FLOOR_F32,
355 : RTLIB::FLOOR_F64,
356 : RTLIB::FLOOR_F80,
357 : RTLIB::FLOOR_F128,
358 : RTLIB::FLOOR_PPCF128),
359 21 : NVT, Op, false, SDLoc(N)).first;
360 : }
361 :
362 5 : SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
363 10 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
364 10 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
365 5 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
366 : RTLIB::LOG_F32,
367 : RTLIB::LOG_F64,
368 : RTLIB::LOG_F80,
369 : RTLIB::LOG_F128,
370 : RTLIB::LOG_PPCF128),
371 7 : NVT, Op, false, SDLoc(N)).first;
372 : }
373 :
374 5 : SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
375 10 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
376 10 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
377 5 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
378 : RTLIB::LOG2_F32,
379 : RTLIB::LOG2_F64,
380 : RTLIB::LOG2_F80,
381 : RTLIB::LOG2_F128,
382 : RTLIB::LOG2_PPCF128),
383 7 : NVT, Op, false, SDLoc(N)).first;
384 : }
385 :
386 5 : SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
387 10 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
388 10 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
389 5 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
390 : RTLIB::LOG10_F32,
391 : RTLIB::LOG10_F64,
392 : RTLIB::LOG10_F80,
393 : RTLIB::LOG10_F128,
394 : RTLIB::LOG10_PPCF128),
395 7 : NVT, Op, false, SDLoc(N)).first;
396 : }
397 :
398 7 : SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
399 14 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
400 14 : SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
401 14 : GetSoftenedFloat(N->getOperand(1)),
402 14 : GetSoftenedFloat(N->getOperand(2)) };
403 7 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
404 : RTLIB::FMA_F32,
405 : RTLIB::FMA_F64,
406 : RTLIB::FMA_F80,
407 : RTLIB::FMA_F128,
408 : RTLIB::FMA_PPCF128),
409 12 : NVT, Ops, false, SDLoc(N)).first;
410 : }
411 :
412 112 : SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
413 224 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
414 224 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
415 224 : GetSoftenedFloat(N->getOperand(1)) };
416 112 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
417 : RTLIB::MUL_F32,
418 : RTLIB::MUL_F64,
419 : RTLIB::MUL_F80,
420 : RTLIB::MUL_F128,
421 : RTLIB::MUL_PPCF128),
422 161 : NVT, Ops, false, SDLoc(N)).first;
423 : }
424 :
425 12 : SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
426 24 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
427 24 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
428 12 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
429 : RTLIB::NEARBYINT_F32,
430 : RTLIB::NEARBYINT_F64,
431 : RTLIB::NEARBYINT_F80,
432 : RTLIB::NEARBYINT_F128,
433 : RTLIB::NEARBYINT_PPCF128),
434 20 : NVT, Op, false, SDLoc(N)).first;
435 : }
436 :
437 6 : SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
438 : // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
439 12 : if (isLegalInHWReg(N->getValueType(ResNo)))
440 2 : return SDValue(N, ResNo);
441 8 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
442 : SDLoc dl(N);
443 : // Expand Y = FNEG(X) -> Y = SUB -0.0, X
444 8 : SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
445 8 : GetSoftenedFloat(N->getOperand(0)) };
446 4 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
447 : RTLIB::SUB_F32,
448 : RTLIB::SUB_F64,
449 : RTLIB::SUB_F80,
450 : RTLIB::SUB_F128,
451 : RTLIB::SUB_PPCF128),
452 4 : NVT, Ops, false, dl).first;
453 : }
454 :
455 159 : SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
456 318 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
457 159 : SDValue Op = N->getOperand(0);
458 :
459 : // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
460 : // entirely possible for both f16 and f32 to be legal, so use the fully
461 : // hard-float FP_EXTEND rather than FP16_TO_FP.
462 159 : if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
463 9 : Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
464 9 : if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
465 9 : AddToWorklist(Op.getNode());
466 : }
467 :
468 318 : if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
469 33 : Op = GetPromotedFloat(Op);
470 : // If the promotion did the FP_EXTEND to the destination type for us,
471 : // there's nothing left to do here.
472 66 : if (Op.getValueType() == N->getValueType(0)) {
473 33 : return BitConvertToInteger(Op);
474 : }
475 : }
476 :
477 378 : RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
478 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
479 126 : return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
480 : }
481 :
482 : // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
483 : // nodes?
484 227 : SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
485 227 : EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
486 227 : SDValue Op = N->getOperand(0);
487 227 : SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
488 227 : false, SDLoc(N)).first;
489 227 : if (N->getValueType(0) == MVT::f32)
490 227 : return Res32;
491 :
492 0 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
493 0 : RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
494 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
495 0 : return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first;
496 : }
497 :
498 31 : SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
499 62 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
500 31 : SDValue Op = N->getOperand(0);
501 31 : if (N->getValueType(0) == MVT::f16) {
502 : // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
503 : // storage-only type get a chance to select things.
504 0 : return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
505 : }
506 :
507 62 : RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
508 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
509 31 : return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
510 : }
511 :
512 24 : SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
513 48 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
514 48 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
515 48 : GetSoftenedFloat(N->getOperand(1)) };
516 24 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
517 : RTLIB::POW_F32,
518 : RTLIB::POW_F64,
519 : RTLIB::POW_F80,
520 : RTLIB::POW_F128,
521 : RTLIB::POW_PPCF128),
522 35 : NVT, Ops, false, SDLoc(N)).first;
523 : }
524 :
525 12 : SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
526 : assert(N->getOperand(1).getValueType() == MVT::i32 &&
527 : "Unsupported power type!");
528 24 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
529 24 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
530 12 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
531 : RTLIB::POWI_F32,
532 : RTLIB::POWI_F64,
533 : RTLIB::POWI_F80,
534 : RTLIB::POWI_F128,
535 : RTLIB::POWI_PPCF128),
536 20 : NVT, Ops, false, SDLoc(N)).first;
537 : }
538 :
539 4 : SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
540 8 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
541 8 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
542 8 : GetSoftenedFloat(N->getOperand(1)) };
543 4 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
544 : RTLIB::REM_F32,
545 : RTLIB::REM_F64,
546 : RTLIB::REM_F80,
547 : RTLIB::REM_F128,
548 : RTLIB::REM_PPCF128),
549 6 : NVT, Ops, false, SDLoc(N)).first;
550 : }
551 :
552 10 : SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
553 20 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
554 20 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
555 10 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
556 : RTLIB::RINT_F32,
557 : RTLIB::RINT_F64,
558 : RTLIB::RINT_F80,
559 : RTLIB::RINT_F128,
560 : RTLIB::RINT_PPCF128),
561 16 : NVT, Op, false, SDLoc(N)).first;
562 : }
563 :
564 12 : SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
565 24 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
566 24 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
567 12 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
568 : RTLIB::ROUND_F32,
569 : RTLIB::ROUND_F64,
570 : RTLIB::ROUND_F80,
571 : RTLIB::ROUND_F128,
572 : RTLIB::ROUND_PPCF128),
573 21 : NVT, Op, false, SDLoc(N)).first;
574 : }
575 :
576 8 : SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
577 16 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
578 16 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
579 8 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
580 : RTLIB::SIN_F32,
581 : RTLIB::SIN_F64,
582 : RTLIB::SIN_F80,
583 : RTLIB::SIN_F128,
584 : RTLIB::SIN_PPCF128),
585 11 : NVT, Op, false, SDLoc(N)).first;
586 : }
587 :
588 8 : SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
589 16 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
590 16 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
591 8 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
592 : RTLIB::SQRT_F32,
593 : RTLIB::SQRT_F64,
594 : RTLIB::SQRT_F80,
595 : RTLIB::SQRT_F128,
596 : RTLIB::SQRT_PPCF128),
597 13 : NVT, Op, false, SDLoc(N)).first;
598 : }
599 :
600 60 : SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
601 120 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
602 120 : SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
603 120 : GetSoftenedFloat(N->getOperand(1)) };
604 60 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
605 : RTLIB::SUB_F32,
606 : RTLIB::SUB_F64,
607 : RTLIB::SUB_F80,
608 : RTLIB::SUB_F128,
609 : RTLIB::SUB_PPCF128),
610 91 : NVT, Ops, false, SDLoc(N)).first;
611 : }
612 :
613 7 : SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
614 14 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
615 7 : if (N->getValueType(0) == MVT::f16)
616 0 : return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
617 :
618 14 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
619 7 : return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
620 : RTLIB::TRUNC_F32,
621 : RTLIB::TRUNC_F64,
622 : RTLIB::TRUNC_F80,
623 : RTLIB::TRUNC_F128,
624 : RTLIB::TRUNC_PPCF128),
625 10 : NVT, Op, false, SDLoc(N)).first;
626 : }
627 :
628 860 : SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
629 1720 : bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
630 : LoadSDNode *L = cast<LoadSDNode>(N);
631 860 : EVT VT = N->getValueType(0);
632 860 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
633 : SDLoc dl(N);
634 :
635 : auto MMOFlags =
636 860 : L->getMemOperand()->getFlags() &
637 : ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
638 : SDValue NewL;
639 860 : if (L->getExtensionType() == ISD::NON_EXTLOAD) {
640 840 : NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
641 : L->getChain(), L->getBasePtr(), L->getOffset(),
642 840 : L->getPointerInfo(), NVT, L->getAlignment(), MMOFlags,
643 840 : L->getAAInfo());
644 : // Legalized the chain result - switch anything that used the old chain to
645 : // use the new one.
646 840 : if (N != NewL.getValue(1).getNode())
647 748 : ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
648 840 : return NewL;
649 : }
650 :
651 : // Do a non-extending load followed by FP_EXTEND.
652 20 : NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
653 : dl, L->getChain(), L->getBasePtr(), L->getOffset(),
654 20 : L->getPointerInfo(), L->getMemoryVT(), L->getAlignment(),
655 20 : MMOFlags, L->getAAInfo());
656 : // Legalized the chain result - switch anything that used the old chain to
657 : // use the new one.
658 20 : ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
659 40 : auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
660 20 : if (LegalInHWReg)
661 8 : return ExtendNode;
662 12 : return BitConvertToInteger(ExtendNode);
663 : }
664 :
665 89 : SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
666 178 : if (isLegalInHWReg(N->getValueType(ResNo)))
667 35 : return SDValue(N, ResNo);
668 108 : SDValue LHS = GetSoftenedFloat(N->getOperand(1));
669 108 : SDValue RHS = GetSoftenedFloat(N->getOperand(2));
670 54 : return DAG.getSelect(SDLoc(N),
671 108 : LHS.getValueType(), N->getOperand(0), LHS, RHS);
672 : }
673 :
674 4 : SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
675 8 : if (isLegalInHWReg(N->getValueType(ResNo)))
676 0 : return SDValue(N, ResNo);
677 8 : SDValue LHS = GetSoftenedFloat(N->getOperand(2));
678 8 : SDValue RHS = GetSoftenedFloat(N->getOperand(3));
679 4 : return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
680 : LHS.getValueType(), N->getOperand(0),
681 8 : N->getOperand(1), LHS, RHS, N->getOperand(4));
682 : }
683 :
684 19 : SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
685 19 : return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
686 19 : N->getValueType(0)));
687 : }
688 :
689 1 : SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
690 1 : SDValue Chain = N->getOperand(0); // Get the chain.
691 1 : SDValue Ptr = N->getOperand(1); // Get the pointer.
692 1 : EVT VT = N->getValueType(0);
693 1 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
694 : SDLoc dl(N);
695 :
696 : SDValue NewVAARG;
697 1 : NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
698 2 : N->getConstantOperandVal(3));
699 :
700 : // Legalized the chain result - switch anything that used the old chain to
701 : // use the new one.
702 1 : if (N != NewVAARG.getValue(1).getNode())
703 1 : ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
704 1 : return NewVAARG;
705 : }
706 :
707 234 : SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
708 234 : bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
709 234 : EVT SVT = N->getOperand(0).getValueType();
710 234 : EVT RVT = N->getValueType(0);
711 234 : EVT NVT = EVT();
712 : SDLoc dl(N);
713 :
714 : // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
715 : // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly
716 : // match. Look for an appropriate libcall.
717 : RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
718 1028 : for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
719 1262 : t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
720 1028 : NVT = (MVT::SimpleValueType)t;
721 : // The source needs to big enough to hold the operand.
722 1028 : if (NVT.bitsGE(SVT))
723 264 : LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT);
724 : }
725 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
726 :
727 : // Sign/zero extend the argument if the libcall takes a larger type.
728 234 : SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
729 586 : NVT, N->getOperand(0));
730 468 : return TLI.makeLibCall(DAG, LC,
731 234 : TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
732 468 : Op, Signed, dl).first;
733 : }
734 :
735 :
736 : //===----------------------------------------------------------------------===//
737 : // Convert Float Operand to Integer for Non-HW-supported Operations.
738 : //===----------------------------------------------------------------------===//
739 :
740 2026 : bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
741 : LLVM_DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
742 : dbgs() << "\n");
743 2026 : SDValue Res = SDValue();
744 :
745 4052 : switch (N->getOpcode()) {
746 0 : default:
747 0 : if (CanSkipSoftenFloatOperand(N, OpNo))
748 : return false;
749 : #ifndef NDEBUG
750 : dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
751 : N->dump(&DAG); dbgs() << "\n";
752 : #endif
753 0 : llvm_unreachable("Do not know how to soften this operator's operand!");
754 :
755 391 : case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
756 332 : case ISD::CopyToReg: Res = SoftenFloatOp_COPY_TO_REG(N); break;
757 0 : case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
758 13 : case ISD::FABS: Res = SoftenFloatOp_FABS(N); break;
759 7 : case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break;
760 2 : case ISD::FNEG: Res = SoftenFloatOp_FNEG(N); break;
761 0 : case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break;
762 180 : case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes
763 180 : case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
764 187 : case ISD::FP_TO_SINT:
765 187 : case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
766 18 : case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break;
767 7 : case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
768 290 : case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
769 599 : case ISD::STORE:
770 599 : Res = SoftenFloatOp_STORE(N, OpNo);
771 : // Do not try to analyze or soften this node again if the value is
772 : // or can be held in a register. In that case, Res.getNode() should
773 : // be equal to N.
774 709 : if (Res.getNode() == N &&
775 330 : isLegalInHWReg(N->getOperand(OpNo).getValueType()))
776 : return false;
777 : // Otherwise, we need to reanalyze and lower the new Res nodes.
778 : break;
779 : }
780 :
781 : // If the result is null, the sub-method took care of registering results etc.
782 1916 : if (!Res.getNode()) return false;
783 :
784 : // If the result is N, the sub-method updated N in place. Tell the legalizer
785 : // core about this to re-analyze.
786 1590 : if (Res.getNode() == N)
787 : return true;
788 :
789 : assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
790 : "Invalid operand expansion");
791 :
792 1257 : ReplaceValueWith(SDValue(N, 0), Res);
793 1257 : return false;
794 : }
795 :
796 0 : bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
797 0 : if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
798 : return false;
799 :
800 : // When the operand type can be kept in registers there is nothing to do for
801 : // the following opcodes.
802 0 : switch (N->getOperand(OpNo).getOpcode()) {
803 : case ISD::BITCAST:
804 : case ISD::ConstantFP:
805 : case ISD::CopyFromReg:
806 : case ISD::CopyToReg:
807 : case ISD::FABS:
808 : case ISD::FCOPYSIGN:
809 : case ISD::FNEG:
810 : case ISD::Register:
811 : case ISD::SELECT:
812 : case ISD::SELECT_CC:
813 : return true;
814 : }
815 :
816 0 : switch (N->getOpcode()) {
817 : case ISD::ConstantFP: // Leaf node.
818 : case ISD::CopyFromReg: // Operand is a register that we know to be left
819 : // unchanged by SoftenFloatResult().
820 : case ISD::Register: // Leaf node.
821 : return true;
822 : }
823 : return false;
824 : }
825 :
826 391 : SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
827 391 : return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
828 782 : GetSoftenedFloat(N->getOperand(0)));
829 : }
830 :
831 332 : SDValue DAGTypeLegalizer::SoftenFloatOp_COPY_TO_REG(SDNode *N) {
832 664 : SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
833 664 : SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
834 :
835 664 : if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
836 288 : return SDValue();
837 :
838 44 : if (N->getNumOperands() == 3)
839 88 : return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2), 0);
840 :
841 0 : return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2,
842 : N->getOperand(3)),
843 0 : 0);
844 : }
845 :
846 0 : SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
847 : // If we get here, the result must be legal but the source illegal.
848 0 : EVT SVT = N->getOperand(0).getValueType();
849 0 : EVT RVT = N->getValueType(0);
850 0 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
851 :
852 : if (SVT == MVT::f16)
853 0 : return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
854 :
855 0 : RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
856 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
857 :
858 0 : return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
859 : }
860 :
861 :
862 180 : SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
863 : // We actually deal with the partially-softened FP_TO_FP16 node too, which
864 : // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
865 : assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
866 :
867 180 : EVT SVT = N->getOperand(0).getValueType();
868 180 : EVT RVT = N->getValueType(0);
869 180 : EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
870 :
871 180 : RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
872 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
873 :
874 360 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
875 180 : return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
876 : }
877 :
878 0 : SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
879 0 : SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
880 0 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
881 :
882 0 : EVT VT = NewLHS.getValueType();
883 0 : NewLHS = GetSoftenedFloat(NewLHS);
884 0 : NewRHS = GetSoftenedFloat(NewRHS);
885 0 : TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
886 :
887 : // If softenSetCCOperands returned a scalar, we need to compare the result
888 : // against zero to select between true and false values.
889 0 : if (!NewRHS.getNode()) {
890 0 : NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
891 0 : CCCode = ISD::SETNE;
892 : }
893 :
894 : // Update N to have the operands specified.
895 0 : return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
896 : DAG.getCondCode(CCCode), NewLHS, NewRHS,
897 0 : N->getOperand(4)),
898 0 : 0);
899 : }
900 :
901 13 : SDValue DAGTypeLegalizer::SoftenFloatOp_FABS(SDNode *N) {
902 26 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
903 :
904 13 : if (Op == N->getOperand(0))
905 13 : return SDValue();
906 :
907 0 : return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
908 : }
909 :
910 7 : SDValue DAGTypeLegalizer::SoftenFloatOp_FCOPYSIGN(SDNode *N) {
911 14 : SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
912 14 : SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
913 :
914 14 : if (Op0 == N->getOperand(0) && Op1 == N->getOperand(1))
915 7 : return SDValue();
916 :
917 0 : return SDValue(DAG.UpdateNodeOperands(N, Op0, Op1), 0);
918 : }
919 :
920 2 : SDValue DAGTypeLegalizer::SoftenFloatOp_FNEG(SDNode *N) {
921 4 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
922 :
923 2 : if (Op == N->getOperand(0))
924 1 : return SDValue();
925 :
926 1 : return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
927 : }
928 :
929 187 : SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
930 187 : bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
931 187 : EVT SVT = N->getOperand(0).getValueType();
932 187 : EVT RVT = N->getValueType(0);
933 187 : EVT NVT = EVT();
934 : SDLoc dl(N);
935 :
936 : // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
937 : // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
938 : // match, eg. we don't have fp -> i8 conversions.
939 : // Look for an appropriate libcall.
940 : RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
941 794 : for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
942 981 : IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
943 : ++IntVT) {
944 794 : NVT = (MVT::SimpleValueType)IntVT;
945 : // The type needs to big enough to hold the result.
946 794 : if (NVT.bitsGE(RVT))
947 199 : LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT);
948 : }
949 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
950 :
951 374 : SDValue Op = GetSoftenedFloat(N->getOperand(0));
952 374 : SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first;
953 :
954 : // Truncate the result if the libcall returns a larger type.
955 374 : return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
956 : }
957 :
958 18 : SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT(SDNode *N) {
959 36 : SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
960 36 : SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
961 :
962 35 : if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
963 17 : return SDValue();
964 :
965 2 : return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2),
966 1 : 0);
967 : }
968 :
969 7 : SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
970 7 : SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
971 7 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
972 :
973 7 : EVT VT = NewLHS.getValueType();
974 7 : NewLHS = GetSoftenedFloat(NewLHS);
975 7 : NewRHS = GetSoftenedFloat(NewRHS);
976 7 : TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
977 :
978 : // If softenSetCCOperands returned a scalar, we need to compare the result
979 : // against zero to select between true and false values.
980 7 : if (!NewRHS.getNode()) {
981 3 : NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
982 3 : CCCode = ISD::SETNE;
983 : }
984 :
985 : // Update N to have the operands specified.
986 7 : return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
987 7 : N->getOperand(2), N->getOperand(3),
988 : DAG.getCondCode(CCCode)),
989 7 : 0);
990 : }
991 :
992 290 : SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
993 290 : SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
994 290 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
995 :
996 290 : EVT VT = NewLHS.getValueType();
997 290 : NewLHS = GetSoftenedFloat(NewLHS);
998 290 : NewRHS = GetSoftenedFloat(NewRHS);
999 290 : TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
1000 :
1001 : // If softenSetCCOperands returned a scalar, use it.
1002 290 : if (!NewRHS.getNode()) {
1003 : assert(NewLHS.getValueType() == N->getValueType(0) &&
1004 : "Unexpected setcc expansion!");
1005 10 : return NewLHS;
1006 : }
1007 :
1008 : // Otherwise, update N to have the operands specified.
1009 280 : return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1010 : DAG.getCondCode(CCCode)),
1011 280 : 0);
1012 : }
1013 :
1014 599 : SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
1015 : assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1016 : assert(OpNo == 1 && "Can only soften the stored value!");
1017 : StoreSDNode *ST = cast<StoreSDNode>(N);
1018 599 : SDValue Val = ST->getValue();
1019 : SDLoc dl(N);
1020 :
1021 599 : if (ST->isTruncatingStore())
1022 : // Do an FP_ROUND followed by a non-truncating store.
1023 6 : Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
1024 6 : Val, DAG.getIntPtrConstant(0, dl)));
1025 : else
1026 593 : Val = GetSoftenedFloat(Val);
1027 :
1028 599 : return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
1029 1198 : ST->getMemOperand());
1030 : }
1031 :
1032 :
1033 : //===----------------------------------------------------------------------===//
1034 : // Float Result Expansion
1035 : //===----------------------------------------------------------------------===//
1036 :
1037 : /// ExpandFloatResult - This method is called when the specified result of the
1038 : /// specified node is found to need expansion. At this point, the node may also
1039 : /// have invalid operands or may have other results that need promotion, we just
1040 : /// know that (at least) one result needs expansion.
1041 241 : void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
1042 : LLVM_DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
1043 : SDValue Lo, Hi;
1044 241 : Lo = Hi = SDValue();
1045 :
1046 : // See if the target wants to custom expand this node.
1047 482 : if (CustomLowerNode(N, N->getValueType(ResNo), true))
1048 0 : return;
1049 :
1050 482 : switch (N->getOpcode()) {
1051 0 : default:
1052 : #ifndef NDEBUG
1053 : dbgs() << "ExpandFloatResult #" << ResNo << ": ";
1054 : N->dump(&DAG); dbgs() << "\n";
1055 : #endif
1056 0 : llvm_unreachable("Do not know how to expand the result of this operator!");
1057 :
1058 0 : case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
1059 3 : case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
1060 4 : case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1061 :
1062 0 : case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
1063 1 : case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
1064 122 : case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
1065 0 : case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
1066 4 : case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
1067 1 : case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
1068 :
1069 33 : case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
1070 1 : case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
1071 2 : case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break;
1072 2 : case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break;
1073 13 : case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
1074 0 : case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break;
1075 7 : case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break;
1076 0 : case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1077 5 : case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
1078 0 : case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break;
1079 0 : case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
1080 0 : case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break;
1081 0 : case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break;
1082 0 : case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break;
1083 0 : case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break;
1084 0 : case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break;
1085 4 : case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
1086 0 : case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break;
1087 1 : case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break;
1088 10 : case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break;
1089 1 : case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
1090 0 : case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
1091 0 : case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
1092 0 : case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break;
1093 0 : case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
1094 1 : case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
1095 8 : case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
1096 0 : case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
1097 10 : case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
1098 7 : case ISD::SINT_TO_FP:
1099 7 : case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1100 1 : case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break;
1101 : }
1102 :
1103 : // If Lo/Hi is null, the sub-method took care of registering results etc.
1104 241 : if (Lo.getNode())
1105 241 : SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1106 : }
1107 :
1108 33 : void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1109 : SDValue &Hi) {
1110 66 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1111 : assert(NVT.getSizeInBits() == 64 &&
1112 : "Do not know how to expand this float constant!");
1113 66 : APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1114 : SDLoc dl(N);
1115 99 : Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1116 33 : APInt(64, C.getRawData()[1])),
1117 33 : dl, NVT);
1118 99 : Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1119 66 : APInt(64, C.getRawData()[0])),
1120 33 : dl, NVT);
1121 33 : }
1122 :
1123 1 : void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1124 : SDValue &Hi) {
1125 : assert(N->getValueType(0) == MVT::ppcf128 &&
1126 : "Logic only correct for ppcf128!");
1127 : SDLoc dl(N);
1128 1 : SDValue Tmp;
1129 2 : GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1130 3 : Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1131 : // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1132 1 : Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1133 : DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1134 2 : ISD::SETEQ);
1135 1 : }
1136 :
1137 2 : void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1138 : SDValue &Hi) {
1139 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1140 : RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1141 : RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1142 : RTLIB::FMIN_PPCF128),
1143 4 : N, false);
1144 2 : GetPairElements(Call, Lo, Hi);
1145 2 : }
1146 :
1147 2 : void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1148 : SDValue &Hi) {
1149 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1150 : RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1151 : RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1152 : RTLIB::FMAX_PPCF128),
1153 4 : N, false);
1154 2 : GetPairElements(Call, Lo, Hi);
1155 2 : }
1156 :
1157 13 : void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1158 : SDValue &Hi) {
1159 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1160 : RTLIB::ADD_F32, RTLIB::ADD_F64,
1161 : RTLIB::ADD_F80, RTLIB::ADD_F128,
1162 : RTLIB::ADD_PPCF128),
1163 26 : N, false);
1164 13 : GetPairElements(Call, Lo, Hi);
1165 13 : }
1166 :
1167 0 : void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1168 : SDValue &Lo, SDValue &Hi) {
1169 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1170 : RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1171 : RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1172 : RTLIB::CEIL_PPCF128),
1173 0 : N, false);
1174 0 : GetPairElements(Call, Lo, Hi);
1175 0 : }
1176 :
1177 7 : void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1178 : SDValue &Lo, SDValue &Hi) {
1179 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1180 : RTLIB::COPYSIGN_F32,
1181 : RTLIB::COPYSIGN_F64,
1182 : RTLIB::COPYSIGN_F80,
1183 : RTLIB::COPYSIGN_F128,
1184 : RTLIB::COPYSIGN_PPCF128),
1185 14 : N, false);
1186 7 : GetPairElements(Call, Lo, Hi);
1187 7 : }
1188 :
1189 0 : void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1190 : SDValue &Lo, SDValue &Hi) {
1191 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1192 : RTLIB::COS_F32, RTLIB::COS_F64,
1193 : RTLIB::COS_F80, RTLIB::COS_F128,
1194 : RTLIB::COS_PPCF128),
1195 0 : N, false);
1196 0 : GetPairElements(Call, Lo, Hi);
1197 0 : }
1198 :
1199 5 : void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1200 : SDValue &Hi) {
1201 5 : SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1202 5 : SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1203 : RTLIB::DIV_F32,
1204 : RTLIB::DIV_F64,
1205 : RTLIB::DIV_F80,
1206 : RTLIB::DIV_F128,
1207 : RTLIB::DIV_PPCF128),
1208 : N->getValueType(0), Ops, false,
1209 10 : SDLoc(N)).first;
1210 5 : GetPairElements(Call, Lo, Hi);
1211 5 : }
1212 :
1213 0 : void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1214 : SDValue &Lo, SDValue &Hi) {
1215 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1216 : RTLIB::EXP_F32, RTLIB::EXP_F64,
1217 : RTLIB::EXP_F80, RTLIB::EXP_F128,
1218 : RTLIB::EXP_PPCF128),
1219 0 : N, false);
1220 0 : GetPairElements(Call, Lo, Hi);
1221 0 : }
1222 :
1223 0 : void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1224 : SDValue &Lo, SDValue &Hi) {
1225 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1226 : RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1227 : RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1228 : RTLIB::EXP2_PPCF128),
1229 0 : N, false);
1230 0 : GetPairElements(Call, Lo, Hi);
1231 0 : }
1232 :
1233 0 : void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1234 : SDValue &Lo, SDValue &Hi) {
1235 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1236 : RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1237 : RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1238 : RTLIB::FLOOR_PPCF128),
1239 0 : N, false);
1240 0 : GetPairElements(Call, Lo, Hi);
1241 0 : }
1242 :
1243 0 : void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1244 : SDValue &Lo, SDValue &Hi) {
1245 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1246 : RTLIB::LOG_F32, RTLIB::LOG_F64,
1247 : RTLIB::LOG_F80, RTLIB::LOG_F128,
1248 : RTLIB::LOG_PPCF128),
1249 0 : N, false);
1250 0 : GetPairElements(Call, Lo, Hi);
1251 0 : }
1252 :
1253 0 : void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1254 : SDValue &Lo, SDValue &Hi) {
1255 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1256 : RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1257 : RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1258 : RTLIB::LOG2_PPCF128),
1259 0 : N, false);
1260 0 : GetPairElements(Call, Lo, Hi);
1261 0 : }
1262 :
1263 0 : void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1264 : SDValue &Lo, SDValue &Hi) {
1265 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1266 : RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1267 : RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1268 : RTLIB::LOG10_PPCF128),
1269 0 : N, false);
1270 0 : GetPairElements(Call, Lo, Hi);
1271 0 : }
1272 :
1273 0 : void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1274 : SDValue &Hi) {
1275 0 : SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1276 0 : SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1277 : RTLIB::FMA_F32,
1278 : RTLIB::FMA_F64,
1279 : RTLIB::FMA_F80,
1280 : RTLIB::FMA_F128,
1281 : RTLIB::FMA_PPCF128),
1282 : N->getValueType(0), Ops, false,
1283 0 : SDLoc(N)).first;
1284 0 : GetPairElements(Call, Lo, Hi);
1285 0 : }
1286 :
1287 4 : void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1288 : SDValue &Hi) {
1289 4 : SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1290 4 : SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1291 : RTLIB::MUL_F32,
1292 : RTLIB::MUL_F64,
1293 : RTLIB::MUL_F80,
1294 : RTLIB::MUL_F128,
1295 : RTLIB::MUL_PPCF128),
1296 : N->getValueType(0), Ops, false,
1297 8 : SDLoc(N)).first;
1298 4 : GetPairElements(Call, Lo, Hi);
1299 4 : }
1300 :
1301 0 : void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1302 : SDValue &Lo, SDValue &Hi) {
1303 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1304 : RTLIB::NEARBYINT_F32,
1305 : RTLIB::NEARBYINT_F64,
1306 : RTLIB::NEARBYINT_F80,
1307 : RTLIB::NEARBYINT_F128,
1308 : RTLIB::NEARBYINT_PPCF128),
1309 0 : N, false);
1310 0 : GetPairElements(Call, Lo, Hi);
1311 0 : }
1312 :
1313 1 : void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1314 : SDValue &Hi) {
1315 : SDLoc dl(N);
1316 2 : GetExpandedFloat(N->getOperand(0), Lo, Hi);
1317 3 : Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1318 3 : Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1319 1 : }
1320 :
1321 10 : void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1322 : SDValue &Hi) {
1323 20 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1324 : SDLoc dl(N);
1325 30 : Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1326 20 : Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1327 30 : APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1328 10 : }
1329 :
1330 1 : void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1331 : SDValue &Lo, SDValue &Hi) {
1332 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1333 : RTLIB::POW_F32, RTLIB::POW_F64,
1334 : RTLIB::POW_F80, RTLIB::POW_F128,
1335 : RTLIB::POW_PPCF128),
1336 2 : N, false);
1337 1 : GetPairElements(Call, Lo, Hi);
1338 1 : }
1339 :
1340 0 : void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1341 : SDValue &Lo, SDValue &Hi) {
1342 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1343 : RTLIB::POWI_F32, RTLIB::POWI_F64,
1344 : RTLIB::POWI_F80, RTLIB::POWI_F128,
1345 : RTLIB::POWI_PPCF128),
1346 0 : N, false);
1347 0 : GetPairElements(Call, Lo, Hi);
1348 0 : }
1349 :
1350 1 : void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1351 : SDValue &Lo, SDValue &Hi) {
1352 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1353 : RTLIB::REM_F32, RTLIB::REM_F64,
1354 : RTLIB::REM_F80, RTLIB::REM_F128,
1355 : RTLIB::REM_PPCF128),
1356 2 : N, false);
1357 1 : GetPairElements(Call, Lo, Hi);
1358 1 : }
1359 :
1360 0 : void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1361 : SDValue &Lo, SDValue &Hi) {
1362 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1363 : RTLIB::RINT_F32, RTLIB::RINT_F64,
1364 : RTLIB::RINT_F80, RTLIB::RINT_F128,
1365 : RTLIB::RINT_PPCF128),
1366 0 : N, false);
1367 0 : GetPairElements(Call, Lo, Hi);
1368 0 : }
1369 :
1370 0 : void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1371 : SDValue &Lo, SDValue &Hi) {
1372 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1373 : RTLIB::ROUND_F32,
1374 : RTLIB::ROUND_F64,
1375 : RTLIB::ROUND_F80,
1376 : RTLIB::ROUND_F128,
1377 : RTLIB::ROUND_PPCF128),
1378 0 : N, false);
1379 0 : GetPairElements(Call, Lo, Hi);
1380 0 : }
1381 :
1382 0 : void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1383 : SDValue &Lo, SDValue &Hi) {
1384 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1385 : RTLIB::SIN_F32, RTLIB::SIN_F64,
1386 : RTLIB::SIN_F80, RTLIB::SIN_F128,
1387 : RTLIB::SIN_PPCF128),
1388 0 : N, false);
1389 0 : GetPairElements(Call, Lo, Hi);
1390 0 : }
1391 :
1392 1 : void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1393 : SDValue &Lo, SDValue &Hi) {
1394 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1395 : RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1396 : RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1397 : RTLIB::SQRT_PPCF128),
1398 2 : N, false);
1399 1 : GetPairElements(Call, Lo, Hi);
1400 1 : }
1401 :
1402 8 : void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1403 : SDValue &Hi) {
1404 8 : SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1405 8 : SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1406 : RTLIB::SUB_F32,
1407 : RTLIB::SUB_F64,
1408 : RTLIB::SUB_F80,
1409 : RTLIB::SUB_F128,
1410 : RTLIB::SUB_PPCF128),
1411 : N->getValueType(0), Ops, false,
1412 16 : SDLoc(N)).first;
1413 8 : GetPairElements(Call, Lo, Hi);
1414 8 : }
1415 :
1416 0 : void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1417 : SDValue &Lo, SDValue &Hi) {
1418 : SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1419 : RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1420 : RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1421 : RTLIB::TRUNC_PPCF128),
1422 0 : N, false);
1423 0 : GetPairElements(Call, Lo, Hi);
1424 0 : }
1425 :
1426 10 : void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1427 : SDValue &Hi) {
1428 : if (ISD::isNormalLoad(N)) {
1429 9 : ExpandRes_NormalLoad(N, Lo, Hi);
1430 9 : return;
1431 : }
1432 :
1433 : assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1434 : LoadSDNode *LD = cast<LoadSDNode>(N);
1435 1 : SDValue Chain = LD->getChain();
1436 1 : SDValue Ptr = LD->getBasePtr();
1437 : SDLoc dl(N);
1438 :
1439 2 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1440 : assert(NVT.isByteSized() && "Expanded type not byte sized!");
1441 : assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1442 :
1443 2 : Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1444 2 : LD->getMemoryVT(), LD->getMemOperand());
1445 :
1446 : // Remember the chain.
1447 1 : Chain = Hi.getValue(1);
1448 :
1449 : // The low part is zero.
1450 2 : Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1451 3 : APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1452 :
1453 : // Modified the chain - switch anything that used the old chain to use the
1454 : // new one.
1455 1 : ReplaceValueWith(SDValue(LD, 1), Chain);
1456 : }
1457 :
1458 7 : void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1459 : SDValue &Hi) {
1460 : assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1461 7 : EVT VT = N->getValueType(0);
1462 7 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1463 7 : SDValue Src = N->getOperand(0);
1464 7 : EVT SrcVT = Src.getValueType();
1465 7 : bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1466 : SDLoc dl(N);
1467 :
1468 : // First do an SINT_TO_FP, whether the original was signed or unsigned.
1469 : // When promoting partial word types to i32 we must honor the signedness,
1470 : // though.
1471 7 : if (SrcVT.bitsLE(MVT::i32)) {
1472 : // The integer can be represented exactly in an f64.
1473 2 : Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1474 4 : MVT::i32, Src);
1475 4 : Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1476 4 : APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1477 4 : Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1478 : } else {
1479 : RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1480 5 : if (SrcVT.bitsLE(MVT::i64)) {
1481 4 : Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1482 5 : MVT::i64, Src);
1483 : LC = RTLIB::SINTTOFP_I64_PPCF128;
1484 1 : } else if (SrcVT.bitsLE(MVT::i128)) {
1485 2 : Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1486 : LC = RTLIB::SINTTOFP_I128_PPCF128;
1487 : }
1488 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1489 :
1490 10 : Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first;
1491 5 : GetPairElements(Hi, Lo, Hi);
1492 : }
1493 :
1494 7 : if (isSigned)
1495 : return;
1496 :
1497 : // Unsigned - fix up the SINT_TO_FP value just calculated.
1498 8 : Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1499 4 : SrcVT = Src.getValueType();
1500 :
1501 : // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1502 : static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1503 : static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1504 : static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1505 4 : ArrayRef<uint64_t> Parts;
1506 :
1507 4 : switch (SrcVT.getSimpleVT().SimpleTy) {
1508 0 : default:
1509 0 : llvm_unreachable("Unsupported UINT_TO_FP!");
1510 : case MVT::i32:
1511 2 : Parts = TwoE32;
1512 2 : break;
1513 : case MVT::i64:
1514 1 : Parts = TwoE64;
1515 1 : break;
1516 : case MVT::i128:
1517 1 : Parts = TwoE128;
1518 1 : break;
1519 : }
1520 :
1521 : // TODO: Are there fast-math-flags to propagate to this FADD?
1522 8 : Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1523 8 : DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble(),
1524 4 : APInt(128, Parts)),
1525 4 : dl, MVT::ppcf128));
1526 8 : Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1527 4 : Lo, Hi, ISD::SETLT);
1528 4 : GetPairElements(Lo, Lo, Hi);
1529 : }
1530 :
1531 :
1532 : //===----------------------------------------------------------------------===//
1533 : // Float Operand Expansion
1534 : //===----------------------------------------------------------------------===//
1535 :
1536 : /// ExpandFloatOperand - This method is called when the specified operand of the
1537 : /// specified node is found to need expansion. At this point, all of the result
1538 : /// types of the node are known to be legal, but other operands of the node may
1539 : /// need promotion or expansion as well as the specified one.
1540 86 : bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1541 : LLVM_DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1542 86 : SDValue Res = SDValue();
1543 :
1544 : // See if the target wants to custom expand this node.
1545 258 : if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1546 : return false;
1547 :
1548 148 : switch (N->getOpcode()) {
1549 0 : default:
1550 : #ifndef NDEBUG
1551 : dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1552 : N->dump(&DAG); dbgs() << "\n";
1553 : #endif
1554 0 : llvm_unreachable("Do not know how to expand this operator's operand!");
1555 :
1556 4 : case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break;
1557 0 : case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
1558 20 : case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
1559 :
1560 0 : case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
1561 4 : case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break;
1562 10 : case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
1563 1 : case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
1564 1 : case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1565 6 : case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
1566 7 : case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
1567 21 : case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1568 21 : OpNo); break;
1569 : }
1570 :
1571 : // If the result is null, the sub-method took care of registering results etc.
1572 74 : if (!Res.getNode()) return false;
1573 :
1574 : // If the result is N, the sub-method updated N in place. Tell the legalizer
1575 : // core about this.
1576 74 : if (Res.getNode() == N)
1577 : return true;
1578 :
1579 : assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1580 : "Invalid operand expansion");
1581 :
1582 68 : ReplaceValueWith(SDValue(N, 0), Res);
1583 68 : return false;
1584 : }
1585 :
1586 : /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1587 : /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1588 13 : void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1589 : SDValue &NewRHS,
1590 : ISD::CondCode &CCCode,
1591 : const SDLoc &dl) {
1592 13 : SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1593 13 : GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1594 13 : GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1595 :
1596 : assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1597 :
1598 : // FIXME: This generated code sucks. We want to generate
1599 : // FCMPU crN, hi1, hi2
1600 : // BNE crN, L:
1601 : // FCMPU crN, lo1, lo2
1602 : // The following can be improved, but not that much.
1603 : SDValue Tmp1, Tmp2, Tmp3;
1604 26 : Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1605 26 : LHSHi, RHSHi, ISD::SETOEQ);
1606 26 : Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1607 26 : LHSLo, RHSLo, CCCode);
1608 26 : Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1609 26 : Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1610 26 : LHSHi, RHSHi, ISD::SETUNE);
1611 26 : Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1612 26 : LHSHi, RHSHi, CCCode);
1613 26 : Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1614 26 : NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1615 13 : NewRHS = SDValue(); // LHS is the result, not a compare.
1616 13 : }
1617 :
1618 0 : SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1619 0 : SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1620 0 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1621 0 : FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1622 :
1623 : // If ExpandSetCCOperands returned a scalar, we need to compare the result
1624 : // against zero to select between true and false values.
1625 0 : if (!NewRHS.getNode()) {
1626 0 : NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1627 0 : CCCode = ISD::SETNE;
1628 : }
1629 :
1630 : // Update N to have the operands specified.
1631 0 : return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1632 : DAG.getCondCode(CCCode), NewLHS, NewRHS,
1633 0 : N->getOperand(4)), 0);
1634 : }
1635 :
1636 4 : SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1637 : assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1638 : "Logic only correct for ppcf128!");
1639 4 : SDValue Lo, Hi;
1640 8 : GetExpandedFloat(N->getOperand(1), Lo, Hi);
1641 : // The ppcf128 value is providing only the sign; take it from the
1642 : // higher-order double (which must have the larger magnitude).
1643 4 : return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1644 8 : N->getValueType(0), N->getOperand(0), Hi);
1645 : }
1646 :
1647 10 : SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1648 : assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1649 : "Logic only correct for ppcf128!");
1650 10 : SDValue Lo, Hi;
1651 20 : GetExpandedFloat(N->getOperand(0), Lo, Hi);
1652 : // Round it the rest of the way (e.g. to f32) if needed.
1653 10 : return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1654 20 : N->getValueType(0), Hi, N->getOperand(1));
1655 : }
1656 :
1657 1 : SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1658 2 : EVT RVT = N->getValueType(0);
1659 : SDLoc dl(N);
1660 :
1661 2 : RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1662 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1663 2 : return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first;
1664 : }
1665 :
1666 1 : SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1667 2 : EVT RVT = N->getValueType(0);
1668 : SDLoc dl(N);
1669 :
1670 2 : RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1671 : assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1672 2 : return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1673 3 : false, dl).first;
1674 : }
1675 :
1676 6 : SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1677 6 : SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1678 6 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1679 6 : FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1680 :
1681 : // If ExpandSetCCOperands returned a scalar, we need to compare the result
1682 : // against zero to select between true and false values.
1683 6 : if (!NewRHS.getNode()) {
1684 6 : NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1685 6 : CCCode = ISD::SETNE;
1686 : }
1687 :
1688 : // Update N to have the operands specified.
1689 6 : return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1690 6 : N->getOperand(2), N->getOperand(3),
1691 6 : DAG.getCondCode(CCCode)), 0);
1692 : }
1693 :
1694 7 : SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1695 7 : SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1696 7 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1697 7 : FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1698 :
1699 : // If ExpandSetCCOperands returned a scalar, use it.
1700 7 : if (!NewRHS.getNode()) {
1701 : assert(NewLHS.getValueType() == N->getValueType(0) &&
1702 : "Unexpected setcc expansion!");
1703 7 : return NewLHS;
1704 : }
1705 :
1706 : // Otherwise, update N to have the operands specified.
1707 0 : return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1708 0 : DAG.getCondCode(CCCode)), 0);
1709 : }
1710 :
1711 21 : SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1712 : if (ISD::isNormalStore(N))
1713 21 : return ExpandOp_NormalStore(N, OpNo);
1714 :
1715 : assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1716 : assert(OpNo == 1 && "Can only expand the stored value so far");
1717 : StoreSDNode *ST = cast<StoreSDNode>(N);
1718 :
1719 0 : SDValue Chain = ST->getChain();
1720 0 : SDValue Ptr = ST->getBasePtr();
1721 :
1722 0 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1723 0 : ST->getValue().getValueType());
1724 : assert(NVT.isByteSized() && "Expanded type not byte sized!");
1725 : assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1726 : (void)NVT;
1727 :
1728 0 : SDValue Lo, Hi;
1729 0 : GetExpandedOp(ST->getValue(), Lo, Hi);
1730 :
1731 0 : return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1732 0 : ST->getMemoryVT(), ST->getMemOperand());
1733 : }
1734 :
1735 : //===----------------------------------------------------------------------===//
1736 : // Float Operand Promotion
1737 : //===----------------------------------------------------------------------===//
1738 : //
1739 :
1740 0 : static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1741 0 : if (OpVT == MVT::f16) {
1742 0 : return ISD::FP16_TO_FP;
1743 0 : } else if (RetVT == MVT::f16) {
1744 0 : return ISD::FP_TO_FP16;
1745 : }
1746 :
1747 0 : report_fatal_error("Attempt at an invalid promotion-related conversion");
1748 : }
1749 :
1750 2840 : bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1751 2840 : SDValue R = SDValue();
1752 :
1753 8520 : if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
1754 : LLVM_DEBUG(dbgs() << "Node has been custom lowered, done\n");
1755 : return false;
1756 : }
1757 :
1758 : // Nodes that use a promotion-requiring floating point operand, but doesn't
1759 : // produce a promotion-requiring floating point result, need to be legalized
1760 : // to use the promoted float operand. Nodes that produce at least one
1761 : // promotion-requiring floating point result have their operands legalized as
1762 : // a part of PromoteFloatResult.
1763 5650 : switch (N->getOpcode()) {
1764 0 : default:
1765 0 : llvm_unreachable("Do not know how to promote this operator's operand!");
1766 :
1767 395 : case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break;
1768 16 : case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break;
1769 72 : case ISD::FP_TO_SINT:
1770 72 : case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
1771 1294 : case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
1772 0 : case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break;
1773 296 : case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break;
1774 752 : case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break;
1775 : }
1776 :
1777 2825 : if (R.getNode())
1778 2825 : ReplaceValueWith(SDValue(N, 0), R);
1779 : return false;
1780 : }
1781 :
1782 395 : SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1783 395 : SDValue Op = N->getOperand(0);
1784 790 : EVT OpVT = Op->getValueType(0);
1785 :
1786 395 : SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1787 395 : EVT PromotedVT = Promoted->getValueType(0);
1788 :
1789 : // Convert the promoted float value to the desired IVT.
1790 395 : EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
1791 395 : SDValue Convert = DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N),
1792 395 : IVT, Promoted);
1793 : // The final result type might not be an scalar so we need a bitcast. The
1794 : // bitcast will be further legalized if needed.
1795 790 : return DAG.getBitcast(N->getValueType(0), Convert);
1796 : }
1797 :
1798 : // Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
1799 : // PromoteFloatRes_FCOPYSIGN.
1800 16 : SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1801 : assert (OpNo == 1 && "Only Operand 1 must need promotion here");
1802 32 : SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1803 :
1804 16 : return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
1805 32 : N->getOperand(0), Op1);
1806 : }
1807 :
1808 : // Convert the promoted float value to the desired integer type
1809 72 : SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1810 144 : SDValue Op = GetPromotedFloat(N->getOperand(0));
1811 144 : return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
1812 : }
1813 :
1814 1294 : SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1815 2588 : SDValue Op = GetPromotedFloat(N->getOperand(0));
1816 1294 : EVT VT = N->getValueType(0);
1817 :
1818 : // Desired VT is same as promoted type. Use promoted float directly.
1819 1294 : if (VT == Op->getValueType(0))
1820 982 : return Op;
1821 :
1822 : // Else, extend the promoted float value to the desired VT.
1823 624 : return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
1824 : }
1825 :
1826 : // Promote the float operands used for comparison. The true- and false-
1827 : // operands have the same type as the result and are promoted, if needed, by
1828 : // PromoteFloatRes_SELECT_CC
1829 0 : SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1830 0 : SDValue LHS = GetPromotedFloat(N->getOperand(0));
1831 0 : SDValue RHS = GetPromotedFloat(N->getOperand(1));
1832 :
1833 0 : return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1834 : LHS, RHS, N->getOperand(2), N->getOperand(3),
1835 0 : N->getOperand(4));
1836 : }
1837 :
1838 : // Construct a SETCC that compares the promoted values and sets the conditional
1839 : // code.
1840 296 : SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
1841 296 : EVT VT = N->getValueType(0);
1842 296 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1843 592 : SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1844 592 : SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1845 296 : ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1846 :
1847 296 : return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
1848 :
1849 : }
1850 :
1851 : // Lower the promoted Float down to the integer value of same size and construct
1852 : // a STORE of the integer value.
1853 752 : SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
1854 : StoreSDNode *ST = cast<StoreSDNode>(N);
1855 752 : SDValue Val = ST->getValue();
1856 : SDLoc DL(N);
1857 :
1858 752 : SDValue Promoted = GetPromotedFloat(Val);
1859 752 : EVT VT = ST->getOperand(1).getValueType();
1860 752 : EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1861 :
1862 752 : SDValue NewVal;
1863 2256 : NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
1864 752 : IVT, Promoted);
1865 :
1866 752 : return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
1867 1504 : ST->getMemOperand());
1868 : }
1869 :
1870 : //===----------------------------------------------------------------------===//
1871 : // Float Result Promotion
1872 : //===----------------------------------------------------------------------===//
1873 :
1874 7680 : void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
1875 7680 : SDValue R = SDValue();
1876 :
1877 15360 : switch (N->getOpcode()) {
1878 : // These opcodes cannot appear if promotion of FP16 is done in the backend
1879 : // instead of Clang
1880 0 : case ISD::FP16_TO_FP:
1881 : case ISD::FP_TO_FP16:
1882 : default:
1883 0 : llvm_unreachable("Do not know how to promote this operator's result!");
1884 :
1885 1748 : case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break;
1886 743 : case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
1887 1526 : case ISD::EXTRACT_VECTOR_ELT:
1888 1526 : R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
1889 17 : case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break;
1890 :
1891 : // Unary FP Operations
1892 196 : case ISD::FABS:
1893 : case ISD::FCEIL:
1894 : case ISD::FCOS:
1895 : case ISD::FEXP:
1896 : case ISD::FEXP2:
1897 : case ISD::FFLOOR:
1898 : case ISD::FLOG:
1899 : case ISD::FLOG2:
1900 : case ISD::FLOG10:
1901 : case ISD::FNEARBYINT:
1902 : case ISD::FNEG:
1903 : case ISD::FRINT:
1904 : case ISD::FROUND:
1905 : case ISD::FSIN:
1906 : case ISD::FSQRT:
1907 : case ISD::FTRUNC:
1908 196 : case ISD::FCANONICALIZE: R = PromoteFloatRes_UnaryOp(N); break;
1909 :
1910 : // Binary FP Operations
1911 827 : case ISD::FADD:
1912 : case ISD::FDIV:
1913 : case ISD::FMAXNAN:
1914 : case ISD::FMINNAN:
1915 : case ISD::FMAXNUM:
1916 : case ISD::FMINNUM:
1917 : case ISD::FMUL:
1918 : case ISD::FPOW:
1919 : case ISD::FREM:
1920 827 : case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break;
1921 :
1922 15 : case ISD::FMA: // FMA is same as FMAD
1923 15 : case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break;
1924 :
1925 3 : case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break;
1926 :
1927 1397 : case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
1928 818 : case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break;
1929 187 : case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break;
1930 0 : case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break;
1931 :
1932 81 : case ISD::SINT_TO_FP:
1933 81 : case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
1934 122 : case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
1935 :
1936 : }
1937 :
1938 7680 : if (R.getNode())
1939 6161 : SetPromotedFloat(SDValue(N, ResNo), R);
1940 7680 : }
1941 :
1942 : // Bitcast from i16 to f16: convert the i16 to a f32 value instead.
1943 : // At this point, it is not possible to determine if the bitcast value is
1944 : // eventually stored to memory or promoted to f32 or promoted to a floating
1945 : // point at a higher precision. Some of these cases are handled by FP_EXTEND,
1946 : // STORE promotion handlers.
1947 1748 : SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
1948 1748 : EVT VT = N->getValueType(0);
1949 1748 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1950 : // Input type isn't guaranteed to be a scalar int so bitcast if not. The
1951 : // bitcast will be legalized further if necessary.
1952 1748 : EVT IVT = EVT::getIntegerVT(*DAG.getContext(),
1953 3496 : N->getOperand(0).getValueType().getSizeInBits());
1954 3496 : SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0));
1955 3496 : return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
1956 : }
1957 :
1958 743 : SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
1959 : ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
1960 1486 : EVT VT = N->getValueType(0);
1961 : SDLoc DL(N);
1962 :
1963 : // Get the (bit-cast) APInt of the APFloat and build an integer constant
1964 743 : EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1965 1486 : SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
1966 743 : IVT);
1967 :
1968 : // Convert the Constant to the desired FP type
1969 : // FIXME We might be able to do the conversion during compilation and get rid
1970 : // of it from the object code
1971 743 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1972 1486 : return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
1973 : }
1974 :
1975 : // If the Index operand is a constant, try to redirect the extract operation to
1976 : // the correct legalized vector. If not, bit-convert the input vector to
1977 : // equivalent integer vector. Extract the element as an (bit-cast) integer
1978 : // value and convert it to the promoted type.
1979 1526 : SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
1980 : SDLoc DL(N);
1981 :
1982 : // If the index is constant, try to extract the value from the legalized
1983 : // vector type.
1984 1526 : if (isa<ConstantSDNode>(N->getOperand(1))) {
1985 1519 : SDValue Vec = N->getOperand(0);
1986 1519 : SDValue Idx = N->getOperand(1);
1987 1519 : EVT VecVT = Vec->getValueType(0);
1988 1519 : EVT EltVT = VecVT.getVectorElementType();
1989 :
1990 1519 : uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1991 :
1992 1519 : switch (getTypeAction(VecVT)) {
1993 : default: break;
1994 534 : case TargetLowering::TypeScalarizeVector: {
1995 1068 : SDValue Res = GetScalarizedVector(N->getOperand(0));
1996 534 : ReplaceValueWith(SDValue(N, 0), Res);
1997 534 : return SDValue();
1998 : }
1999 35 : case TargetLowering::TypeWidenVector: {
2000 35 : Vec = GetWidenedVector(Vec);
2001 105 : SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
2002 35 : ReplaceValueWith(SDValue(N, 0), Res);
2003 35 : return SDValue();
2004 : }
2005 950 : case TargetLowering::TypeSplitVector: {
2006 950 : SDValue Lo, Hi;
2007 950 : GetSplitVector(Vec, Lo, Hi);
2008 :
2009 1900 : uint64_t LoElts = Lo.getValueType().getVectorNumElements();
2010 950 : SDValue Res;
2011 950 : if (IdxVal < LoElts)
2012 1452 : Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
2013 : else
2014 466 : Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
2015 : DAG.getConstant(IdxVal - LoElts, DL,
2016 466 : Idx.getValueType()));
2017 950 : ReplaceValueWith(SDValue(N, 0), Res);
2018 950 : return SDValue();
2019 : }
2020 :
2021 : }
2022 : }
2023 :
2024 : // Bit-convert the input vector to the equivalent integer vector
2025 14 : SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
2026 14 : EVT IVT = NewOp.getValueType().getVectorElementType();
2027 :
2028 : // Extract the element as an (bit-cast) integer value
2029 7 : SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
2030 14 : NewOp, N->getOperand(1));
2031 :
2032 : // Convert the element to the desired FP type
2033 7 : EVT VT = N->getValueType(0);
2034 7 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2035 21 : return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
2036 : }
2037 :
2038 : // FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result
2039 : // needs promotion, so does the argument X. Note that Y, if needed, will be
2040 : // handled during operand promotion.
2041 17 : SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2042 17 : EVT VT = N->getValueType(0);
2043 17 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2044 34 : SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2045 :
2046 17 : SDValue Op1 = N->getOperand(1);
2047 :
2048 17 : return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2049 : }
2050 :
2051 : // Unary operation where the result and the operand have PromoteFloat type
2052 : // action. Construct a new SDNode with the promoted float value of the old
2053 : // operand.
2054 196 : SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2055 196 : EVT VT = N->getValueType(0);
2056 196 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2057 392 : SDValue Op = GetPromotedFloat(N->getOperand(0));
2058 :
2059 196 : return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2060 : }
2061 :
2062 : // Binary operations where the result and both operands have PromoteFloat type
2063 : // action. Construct a new SDNode with the promoted float values of the old
2064 : // operands.
2065 827 : SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2066 827 : EVT VT = N->getValueType(0);
2067 827 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2068 1654 : SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2069 1654 : SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2070 1654 : return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2071 : }
2072 :
2073 15 : SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2074 15 : EVT VT = N->getValueType(0);
2075 15 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2076 30 : SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2077 30 : SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2078 30 : SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2079 :
2080 15 : return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2081 : }
2082 :
2083 : // Promote the Float (first) operand and retain the Integer (second) operand
2084 3 : SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2085 3 : EVT VT = N->getValueType(0);
2086 3 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2087 6 : SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2088 3 : SDValue Op1 = N->getOperand(1);
2089 :
2090 3 : return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2091 : }
2092 :
2093 : // Explicit operation to reduce precision. Reduce the value to half precision
2094 : // and promote it back to the legal type.
2095 1397 : SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2096 : SDLoc DL(N);
2097 :
2098 1397 : SDValue Op = N->getOperand(0);
2099 1397 : EVT VT = N->getValueType(0);
2100 1397 : EVT OpVT = Op->getValueType(0);
2101 2794 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2102 1397 : EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2103 :
2104 : // Round promoted float to desired precision
2105 4191 : SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2106 : // Promote it back to the legal output type
2107 2794 : return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2108 : }
2109 :
2110 818 : SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2111 : LoadSDNode *L = cast<LoadSDNode>(N);
2112 818 : EVT VT = N->getValueType(0);
2113 :
2114 : // Load the value as an integer value with the same number of bits.
2115 818 : EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2116 818 : SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
2117 818 : SDLoc(N), L->getChain(), L->getBasePtr(),
2118 818 : L->getOffset(), L->getPointerInfo(), IVT,
2119 : L->getAlignment(),
2120 818 : L->getMemOperand()->getFlags(),
2121 2454 : L->getAAInfo());
2122 : // Legalize the chain result by replacing uses of the old value chain with the
2123 : // new one
2124 1636 : ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2125 :
2126 : // Convert the integer value to the desired FP type
2127 818 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2128 818 : return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2129 : }
2130 :
2131 : // Construct a new SELECT node with the promoted true- and false- values.
2132 187 : SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2133 374 : SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2134 374 : SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2135 :
2136 187 : return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2137 374 : N->getOperand(0), TrueVal, FalseVal);
2138 : }
2139 :
2140 : // Construct a new SELECT_CC node with the promoted true- and false- values.
2141 : // The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
2142 0 : SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2143 0 : SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2144 0 : SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2145 :
2146 0 : return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
2147 : N->getOperand(0), N->getOperand(1), TrueVal, FalseVal,
2148 0 : N->getOperand(4));
2149 : }
2150 :
2151 : // Construct a SDNode that transforms the SINT or UINT operand to the promoted
2152 : // float type.
2153 81 : SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2154 : SDLoc DL(N);
2155 81 : EVT VT = N->getValueType(0);
2156 81 : EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2157 324 : SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
2158 : // Round the value to the desired precision (that of the source type).
2159 81 : return DAG.getNode(
2160 : ISD::FP_EXTEND, DL, NVT,
2161 81 : DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL)));
2162 : }
2163 :
2164 122 : SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2165 122 : return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2166 122 : N->getValueType(0)));
2167 : }
2168 :
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