Line data Source code
1 : //===- SplitKit.h - Toolkit for splitting live ranges -----------*- C++ -*-===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // This file contains the SplitAnalysis class as well as mutator functions for
11 : // live range splitting.
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #ifndef LLVM_LIB_CODEGEN_SPLITKIT_H
16 : #define LLVM_LIB_CODEGEN_SPLITKIT_H
17 :
18 : #include "LiveRangeCalc.h"
19 : #include "llvm/ADT/ArrayRef.h"
20 : #include "llvm/ADT/BitVector.h"
21 : #include "llvm/ADT/DenseMap.h"
22 : #include "llvm/ADT/DenseSet.h"
23 : #include "llvm/ADT/IntervalMap.h"
24 : #include "llvm/ADT/PointerIntPair.h"
25 : #include "llvm/ADT/SmallPtrSet.h"
26 : #include "llvm/ADT/SmallVector.h"
27 : #include "llvm/CodeGen/LiveInterval.h"
28 : #include "llvm/CodeGen/LiveIntervals.h"
29 : #include "llvm/CodeGen/MachineBasicBlock.h"
30 : #include "llvm/CodeGen/MachineFunction.h"
31 : #include "llvm/CodeGen/SlotIndexes.h"
32 : #include "llvm/MC/LaneBitmask.h"
33 : #include "llvm/Support/Compiler.h"
34 : #include <utility>
35 :
36 : namespace llvm {
37 :
38 : class LiveIntervals;
39 : class LiveRangeEdit;
40 : class MachineBlockFrequencyInfo;
41 : class MachineDominatorTree;
42 : class MachineLoopInfo;
43 : class MachineRegisterInfo;
44 : class TargetInstrInfo;
45 : class TargetRegisterInfo;
46 : class VirtRegMap;
47 :
48 : /// Determines the latest safe point in a block in which we can insert a split,
49 : /// spill or other instruction related with CurLI.
50 : class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
51 : private:
52 : const LiveIntervals &LIS;
53 :
54 : /// Last legal insert point in each basic block in the current function.
55 : /// The first entry is the first terminator, the second entry is the
56 : /// last valid point to insert a split or spill for a variable that is
57 : /// live into a landing pad successor.
58 : SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastInsertPoint;
59 :
60 : SlotIndex computeLastInsertPoint(const LiveInterval &CurLI,
61 : const MachineBasicBlock &MBB);
62 :
63 : public:
64 : InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum);
65 :
66 : /// Return the base index of the last valid insert point for \pCurLI in \pMBB.
67 1255889 : SlotIndex getLastInsertPoint(const LiveInterval &CurLI,
68 : const MachineBasicBlock &MBB) {
69 1255889 : unsigned Num = MBB.getNumber();
70 : // Inline the common simple case.
71 2511778 : if (LastInsertPoint[Num].first.isValid() &&
72 : !LastInsertPoint[Num].second.isValid())
73 596442 : return LastInsertPoint[Num].first;
74 659447 : return computeLastInsertPoint(CurLI, MBB);
75 : }
76 :
77 : /// Returns the last insert point as an iterator for \pCurLI in \pMBB.
78 : MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI,
79 : MachineBasicBlock &MBB);
80 :
81 : /// Return the base index of the first insert point in \pMBB.
82 920236 : SlotIndex getFirstInsertPoint(MachineBasicBlock &MBB) {
83 920236 : SlotIndex Res = LIS.getMBBStartIdx(&MBB);
84 920236 : if (!MBB.empty()) {
85 920236 : MachineBasicBlock::iterator MII = MBB.SkipPHIsLabelsAndDebug(MBB.begin());
86 920236 : if (MII != MBB.end())
87 920234 : Res = LIS.getInstructionIndex(*MII);
88 : }
89 920236 : return Res;
90 : }
91 :
92 : };
93 :
94 : /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
95 : /// opportunities.
96 : class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
97 : public:
98 : const MachineFunction &MF;
99 : const VirtRegMap &VRM;
100 : const LiveIntervals &LIS;
101 : const MachineLoopInfo &Loops;
102 : const TargetInstrInfo &TII;
103 :
104 : /// Additional information about basic blocks where the current variable is
105 : /// live. Such a block will look like one of these templates:
106 : ///
107 : /// 1. | o---x | Internal to block. Variable is only live in this block.
108 : /// 2. |---x | Live-in, kill.
109 : /// 3. | o---| Def, live-out.
110 : /// 4. |---x o---| Live-in, kill, def, live-out. Counted by NumGapBlocks.
111 : /// 5. |---o---o---| Live-through with uses or defs.
112 : /// 6. |-----------| Live-through without uses. Counted by NumThroughBlocks.
113 : ///
114 : /// Two BlockInfo entries are created for template 4. One for the live-in
115 : /// segment, and one for the live-out segment. These entries look as if the
116 : /// block were split in the middle where the live range isn't live.
117 : ///
118 : /// Live-through blocks without any uses don't get BlockInfo entries. They
119 : /// are simply listed in ThroughBlocks instead.
120 : ///
121 : struct BlockInfo {
122 : MachineBasicBlock *MBB;
123 : SlotIndex FirstInstr; ///< First instr accessing current reg.
124 : SlotIndex LastInstr; ///< Last instr accessing current reg.
125 : SlotIndex FirstDef; ///< First non-phi valno->def, or SlotIndex().
126 : bool LiveIn; ///< Current reg is live in.
127 : bool LiveOut; ///< Current reg is live out.
128 :
129 : /// isOneInstr - Returns true when this BlockInfo describes a single
130 : /// instruction.
131 : bool isOneInstr() const {
132 : return SlotIndex::isSameInstr(FirstInstr, LastInstr);
133 : }
134 : };
135 :
136 : private:
137 : // Current live interval.
138 : const LiveInterval *CurLI = nullptr;
139 :
140 : /// Insert Point Analysis.
141 : InsertPointAnalysis IPA;
142 :
143 : // Sorted slot indexes of using instructions.
144 : SmallVector<SlotIndex, 8> UseSlots;
145 :
146 : /// UseBlocks - Blocks where CurLI has uses.
147 : SmallVector<BlockInfo, 8> UseBlocks;
148 :
149 : /// NumGapBlocks - Number of duplicate entries in UseBlocks for blocks where
150 : /// the live range has a gap.
151 : unsigned NumGapBlocks;
152 :
153 : /// ThroughBlocks - Block numbers where CurLI is live through without uses.
154 : BitVector ThroughBlocks;
155 :
156 : /// NumThroughBlocks - Number of live-through blocks.
157 : unsigned NumThroughBlocks;
158 :
159 : /// DidRepairRange - analyze was forced to shrinkToUses().
160 : bool DidRepairRange;
161 :
162 : // Sumarize statistics by counting instructions using CurLI.
163 : void analyzeUses();
164 :
165 : /// calcLiveBlockInfo - Compute per-block information about CurLI.
166 : bool calcLiveBlockInfo();
167 :
168 : public:
169 : SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
170 : const MachineLoopInfo &mli);
171 :
172 : /// analyze - set CurLI to the specified interval, and analyze how it may be
173 : /// split.
174 : void analyze(const LiveInterval *li);
175 :
176 : /// didRepairRange() - Returns true if CurLI was invalid and has been repaired
177 : /// by analyze(). This really shouldn't happen, but sometimes the coalescer
178 : /// can create live ranges that end in mid-air.
179 0 : bool didRepairRange() const { return DidRepairRange; }
180 :
181 : /// clear - clear all data structures so SplitAnalysis is ready to analyze a
182 : /// new interval.
183 : void clear();
184 :
185 : /// getParent - Return the last analyzed interval.
186 0 : const LiveInterval &getParent() const { return *CurLI; }
187 :
188 : /// isOriginalEndpoint - Return true if the original live range was killed or
189 : /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
190 : /// and 'use' for an early-clobber def.
191 : /// This can be used to recognize code inserted by earlier live range
192 : /// splitting.
193 : bool isOriginalEndpoint(SlotIndex Idx) const;
194 :
195 : /// getUseSlots - Return an array of SlotIndexes of instructions using CurLI.
196 : /// This include both use and def operands, at most one entry per instruction.
197 : ArrayRef<SlotIndex> getUseSlots() const { return UseSlots; }
198 :
199 : /// getUseBlocks - Return an array of BlockInfo objects for the basic blocks
200 : /// where CurLI has uses.
201 : ArrayRef<BlockInfo> getUseBlocks() const { return UseBlocks; }
202 :
203 : /// getNumThroughBlocks - Return the number of through blocks.
204 0 : unsigned getNumThroughBlocks() const { return NumThroughBlocks; }
205 :
206 : /// isThroughBlock - Return true if CurLI is live through MBB without uses.
207 : bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
208 :
209 : /// getThroughBlocks - Return the set of through blocks.
210 164683 : const BitVector &getThroughBlocks() const { return ThroughBlocks; }
211 :
212 : /// getNumLiveBlocks - Return the number of blocks where CurLI is live.
213 : unsigned getNumLiveBlocks() const {
214 8697 : return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks();
215 : }
216 :
217 : /// countLiveBlocks - Return the number of blocks where li is live. This is
218 : /// guaranteed to return the same number as getNumLiveBlocks() after calling
219 : /// analyze(li).
220 : unsigned countLiveBlocks(const LiveInterval *li) const;
221 :
222 : using BlockPtrSet = SmallPtrSet<const MachineBasicBlock *, 16>;
223 :
224 : /// shouldSplitSingleBlock - Returns true if it would help to create a local
225 : /// live range for the instructions in BI. There is normally no benefit to
226 : /// creating a live range for a single instruction, but it does enable
227 : /// register class inflation if the instruction has a restricted register
228 : /// class.
229 : ///
230 : /// @param BI The block to be isolated.
231 : /// @param SingleInstrs True when single instructions should be isolated.
232 : bool shouldSplitSingleBlock(const BlockInfo &BI, bool SingleInstrs) const;
233 :
234 : SlotIndex getLastSplitPoint(unsigned Num) {
235 1345896 : return IPA.getLastInsertPoint(*CurLI, *MF.getBlockNumbered(Num));
236 : }
237 :
238 : MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB) {
239 12003 : return IPA.getLastInsertPointIter(*CurLI, *BB);
240 : }
241 :
242 : SlotIndex getFirstSplitPoint(unsigned Num) {
243 1291062 : return IPA.getFirstInsertPoint(*MF.getBlockNumbered(Num));
244 : }
245 : };
246 :
247 : /// SplitEditor - Edit machine code and LiveIntervals for live range
248 : /// splitting.
249 : ///
250 : /// - Create a SplitEditor from a SplitAnalysis.
251 : /// - Start a new live interval with openIntv.
252 : /// - Mark the places where the new interval is entered using enterIntv*
253 : /// - Mark the ranges where the new interval is used with useIntv*
254 : /// - Mark the places where the interval is exited with exitIntv*.
255 : /// - Finish the current interval with closeIntv and repeat from 2.
256 : /// - Rewrite instructions with finish().
257 : ///
258 : class LLVM_LIBRARY_VISIBILITY SplitEditor {
259 : SplitAnalysis &SA;
260 : AliasAnalysis &AA;
261 : LiveIntervals &LIS;
262 : VirtRegMap &VRM;
263 : MachineRegisterInfo &MRI;
264 : MachineDominatorTree &MDT;
265 : const TargetInstrInfo &TII;
266 : const TargetRegisterInfo &TRI;
267 : const MachineBlockFrequencyInfo &MBFI;
268 :
269 : public:
270 : /// ComplementSpillMode - Select how the complement live range should be
271 : /// created. SplitEditor automatically creates interval 0 to contain
272 : /// anything that isn't added to another interval. This complement interval
273 : /// can get quite complicated, and it can sometimes be an advantage to allow
274 : /// it to overlap the other intervals. If it is going to spill anyway, no
275 : /// registers are wasted by keeping a value in two places at the same time.
276 : enum ComplementSpillMode {
277 : /// SM_Partition(Default) - Try to create the complement interval so it
278 : /// doesn't overlap any other intervals, and the original interval is
279 : /// partitioned. This may require a large number of back copies and extra
280 : /// PHI-defs. Only segments marked with overlapIntv will be overlapping.
281 : SM_Partition,
282 :
283 : /// SM_Size - Overlap intervals to minimize the number of inserted COPY
284 : /// instructions. Copies to the complement interval are hoisted to their
285 : /// common dominator, so only one COPY is required per value in the
286 : /// complement interval. This also means that no extra PHI-defs need to be
287 : /// inserted in the complement interval.
288 : SM_Size,
289 :
290 : /// SM_Speed - Overlap intervals to minimize the expected execution
291 : /// frequency of the inserted copies. This is very similar to SM_Size, but
292 : /// the complement interval may get some extra PHI-defs.
293 : SM_Speed
294 : };
295 :
296 : private:
297 : /// Edit - The current parent register and new intervals created.
298 : LiveRangeEdit *Edit = nullptr;
299 :
300 : /// Index into Edit of the currently open interval.
301 : /// The index 0 is used for the complement, so the first interval started by
302 : /// openIntv will be 1.
303 : unsigned OpenIdx = 0;
304 :
305 : /// The current spill mode, selected by reset().
306 : ComplementSpillMode SpillMode = SM_Partition;
307 :
308 : using RegAssignMap = IntervalMap<SlotIndex, unsigned>;
309 :
310 : /// Allocator for the interval map. This will eventually be shared with
311 : /// SlotIndexes and LiveIntervals.
312 : RegAssignMap::Allocator Allocator;
313 :
314 : /// RegAssign - Map of the assigned register indexes.
315 : /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
316 : /// Idx.
317 : RegAssignMap RegAssign;
318 :
319 : using ValueForcePair = PointerIntPair<VNInfo *, 1>;
320 : using ValueMap = DenseMap<std::pair<unsigned, unsigned>, ValueForcePair>;
321 :
322 : /// Values - keep track of the mapping from parent values to values in the new
323 : /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
324 : ///
325 : /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
326 : /// 2. (Null, false) - the value is mapped to multiple values in
327 : /// Edit.get(RegIdx). Each value is represented by a minimal live range at
328 : /// its def. The full live range can be inferred exactly from the range
329 : /// of RegIdx in RegAssign.
330 : /// 3. (Null, true). As above, but the ranges in RegAssign are too large, and
331 : /// the live range must be recomputed using LiveRangeCalc::extend().
332 : /// 4. (VNI, false) The value is mapped to a single new value.
333 : /// The new value has no live ranges anywhere.
334 : ValueMap Values;
335 :
336 : /// LRCalc - Cache for computing live ranges and SSA update. Each instance
337 : /// can only handle non-overlapping live ranges, so use a separate
338 : /// LiveRangeCalc instance for the complement interval when in spill mode.
339 : LiveRangeCalc LRCalc[2];
340 :
341 : /// getLRCalc - Return the LRCalc to use for RegIdx. In spill mode, the
342 : /// complement interval can overlap the other intervals, so it gets its own
343 : /// LRCalc instance. When not in spill mode, all intervals can share one.
344 : LiveRangeCalc &getLRCalc(unsigned RegIdx) {
345 434849 : return LRCalc[SpillMode != SM_Partition && RegIdx != 0];
346 : }
347 :
348 : /// Find a subrange corresponding to the lane mask @p LM in the live
349 : /// interval @p LI. The interval @p LI is assumed to contain such a subrange.
350 : /// This function is used to find corresponding subranges between the
351 : /// original interval and the new intervals.
352 : LiveInterval::SubRange &getSubRangeForMask(LaneBitmask LM, LiveInterval &LI);
353 :
354 : /// Add a segment to the interval LI for the value number VNI. If LI has
355 : /// subranges, corresponding segments will be added to them as well, but
356 : /// with newly created value numbers. If Original is true, dead def will
357 : /// only be added a subrange of LI if the corresponding subrange of the
358 : /// original interval has a def at this index. Otherwise, all subranges
359 : /// of LI will be updated.
360 : void addDeadDef(LiveInterval &LI, VNInfo *VNI, bool Original);
361 :
362 : /// defValue - define a value in RegIdx from ParentVNI at Idx.
363 : /// Idx does not have to be ParentVNI->def, but it must be contained within
364 : /// ParentVNI's live range in ParentLI. The new value is added to the value
365 : /// map. The value being defined may either come from rematerialization
366 : /// (or an inserted copy), or it may be coming from the original interval.
367 : /// The parameter Original should be true in the latter case, otherwise
368 : /// it should be false.
369 : /// Return the new LI value.
370 : VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx,
371 : bool Original);
372 :
373 : /// forceRecompute - Force the live range of ParentVNI in RegIdx to be
374 : /// recomputed by LiveRangeCalc::extend regardless of the number of defs.
375 : /// This is used for values whose live range doesn't match RegAssign exactly.
376 : /// They could have rematerialized, or back-copies may have been moved.
377 : void forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI);
378 :
379 : /// Calls forceRecompute() on any affected regidx and on ParentVNI
380 : /// predecessors in case of a phi definition.
381 : void forceRecomputeVNI(const VNInfo &ParentVNI);
382 :
383 : /// defFromParent - Define Reg from ParentVNI at UseIdx using either
384 : /// rematerialization or a COPY from parent. Return the new value.
385 : VNInfo *defFromParent(unsigned RegIdx,
386 : VNInfo *ParentVNI,
387 : SlotIndex UseIdx,
388 : MachineBasicBlock &MBB,
389 : MachineBasicBlock::iterator I);
390 :
391 : /// removeBackCopies - Remove the copy instructions that defines the values
392 : /// in the vector in the complement interval.
393 : void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
394 :
395 : /// getShallowDominator - Returns the least busy dominator of MBB that is
396 : /// also dominated by DefMBB. Busy is measured by loop depth.
397 : MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
398 : MachineBasicBlock *DefMBB);
399 :
400 : /// Find out all the backCopies dominated by others.
401 : void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet,
402 : SmallVectorImpl<VNInfo *> &BackCopies);
403 :
404 : /// Hoist back-copies to the complement interval. It tries to hoist all
405 : /// the back-copies to one BB if it is beneficial, or else simply remove
406 : /// redundant backcopies dominated by others.
407 : void hoistCopies();
408 :
409 : /// transferValues - Transfer values to the new ranges.
410 : /// Return true if any ranges were skipped.
411 : bool transferValues();
412 :
413 : /// Live range @p LR corresponding to the lane Mask @p LM has a live
414 : /// PHI def at the beginning of block @p B. Extend the range @p LR of
415 : /// all predecessor values that reach this def. If @p LR is a subrange,
416 : /// the array @p Undefs is the set of all locations where it is undefined
417 : /// via <def,read-undef> in other subranges for the same register.
418 : void extendPHIRange(MachineBasicBlock &B, LiveRangeCalc &LRC,
419 : LiveRange &LR, LaneBitmask LM,
420 : ArrayRef<SlotIndex> Undefs);
421 :
422 : /// extendPHIKillRanges - Extend the ranges of all values killed by original
423 : /// parent PHIDefs.
424 : void extendPHIKillRanges();
425 :
426 : /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
427 : void rewriteAssigned(bool ExtendRanges);
428 :
429 : /// deleteRematVictims - Delete defs that are dead after rematerializing.
430 : void deleteRematVictims();
431 :
432 : /// Add a copy instruction copying \p FromReg to \p ToReg before
433 : /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
434 : /// necessary to construct a sequence of copies to cover it exactly.
435 : SlotIndex buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask,
436 : MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
437 : bool Late, unsigned RegIdx);
438 :
439 : SlotIndex buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg,
440 : MachineBasicBlock &MB, MachineBasicBlock::iterator InsertBefore,
441 : unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def);
442 :
443 : public:
444 : /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
445 : /// Newly created intervals will be appended to newIntervals.
446 : SplitEditor(SplitAnalysis &sa, AliasAnalysis &aa, LiveIntervals &lis,
447 : VirtRegMap &vrm, MachineDominatorTree &mdt,
448 : MachineBlockFrequencyInfo &mbfi);
449 :
450 : /// reset - Prepare for a new split.
451 : void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
452 :
453 : /// Create a new virtual register and live interval.
454 : /// Return the interval index, starting from 1. Interval index 0 is the
455 : /// implicit complement interval.
456 : unsigned openIntv();
457 :
458 : /// currentIntv - Return the current interval index.
459 : unsigned currentIntv() const { return OpenIdx; }
460 :
461 : /// selectIntv - Select a previously opened interval index.
462 : void selectIntv(unsigned Idx);
463 :
464 : /// enterIntvBefore - Enter the open interval before the instruction at Idx.
465 : /// If the parent interval is not live before Idx, a COPY is not inserted.
466 : /// Return the beginning of the new live range.
467 : SlotIndex enterIntvBefore(SlotIndex Idx);
468 :
469 : /// enterIntvAfter - Enter the open interval after the instruction at Idx.
470 : /// Return the beginning of the new live range.
471 : SlotIndex enterIntvAfter(SlotIndex Idx);
472 :
473 : /// enterIntvAtEnd - Enter the open interval at the end of MBB.
474 : /// Use the open interval from the inserted copy to the MBB end.
475 : /// Return the beginning of the new live range.
476 : SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
477 :
478 : /// useIntv - indicate that all instructions in MBB should use OpenLI.
479 : void useIntv(const MachineBasicBlock &MBB);
480 :
481 : /// useIntv - indicate that all instructions in range should use OpenLI.
482 : void useIntv(SlotIndex Start, SlotIndex End);
483 :
484 : /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
485 : /// Return the end of the live range.
486 : SlotIndex leaveIntvAfter(SlotIndex Idx);
487 :
488 : /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
489 : /// Return the end of the live range.
490 : SlotIndex leaveIntvBefore(SlotIndex Idx);
491 :
492 : /// leaveIntvAtTop - Leave the interval at the top of MBB.
493 : /// Add liveness from the MBB top to the copy.
494 : /// Return the end of the live range.
495 : SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
496 :
497 : /// overlapIntv - Indicate that all instructions in range should use the open
498 : /// interval, but also let the complement interval be live.
499 : ///
500 : /// This doubles the register pressure, but is sometimes required to deal with
501 : /// register uses after the last valid split point.
502 : ///
503 : /// The Start index should be a return value from a leaveIntv* call, and End
504 : /// should be in the same basic block. The parent interval must have the same
505 : /// value across the range.
506 : ///
507 : void overlapIntv(SlotIndex Start, SlotIndex End);
508 :
509 : /// finish - after all the new live ranges have been created, compute the
510 : /// remaining live range, and rewrite instructions to use the new registers.
511 : /// @param LRMap When not null, this vector will map each live range in Edit
512 : /// back to the indices returned by openIntv.
513 : /// There may be extra indices created by dead code elimination.
514 : void finish(SmallVectorImpl<unsigned> *LRMap = nullptr);
515 :
516 : /// dump - print the current interval mapping to dbgs().
517 : void dump() const;
518 :
519 : // ===--- High level methods ---===
520 :
521 : /// splitSingleBlock - Split CurLI into a separate live interval around the
522 : /// uses in a single block. This is intended to be used as part of a larger
523 : /// split, and doesn't call finish().
524 : void splitSingleBlock(const SplitAnalysis::BlockInfo &BI);
525 :
526 : /// splitLiveThroughBlock - Split CurLI in the given block such that it
527 : /// enters the block in IntvIn and leaves it in IntvOut. There may be uses in
528 : /// the block, but they will be ignored when placing split points.
529 : ///
530 : /// @param MBBNum Block number.
531 : /// @param IntvIn Interval index entering the block.
532 : /// @param LeaveBefore When set, leave IntvIn before this point.
533 : /// @param IntvOut Interval index leaving the block.
534 : /// @param EnterAfter When set, enter IntvOut after this point.
535 : void splitLiveThroughBlock(unsigned MBBNum,
536 : unsigned IntvIn, SlotIndex LeaveBefore,
537 : unsigned IntvOut, SlotIndex EnterAfter);
538 :
539 : /// splitRegInBlock - Split CurLI in the given block such that it enters the
540 : /// block in IntvIn and leaves it on the stack (or not at all). Split points
541 : /// are placed in a way that avoids putting uses in the stack interval. This
542 : /// may require creating a local interval when there is interference.
543 : ///
544 : /// @param BI Block descriptor.
545 : /// @param IntvIn Interval index entering the block. Not 0.
546 : /// @param LeaveBefore When set, leave IntvIn before this point.
547 : void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
548 : unsigned IntvIn, SlotIndex LeaveBefore);
549 :
550 : /// splitRegOutBlock - Split CurLI in the given block such that it enters the
551 : /// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
552 : /// Split points are placed to avoid interference and such that the uses are
553 : /// not in the stack interval. This may require creating a local interval
554 : /// when there is interference.
555 : ///
556 : /// @param BI Block descriptor.
557 : /// @param IntvOut Interval index leaving the block.
558 : /// @param EnterAfter When set, enter IntvOut after this point.
559 : void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
560 : unsigned IntvOut, SlotIndex EnterAfter);
561 : };
562 :
563 : } // end namespace llvm
564 :
565 : #endif // LLVM_LIB_CODEGEN_SPLITKIT_H
|
