LCOV - code coverage report

Current view: top level - lib/Target/AArch64/Disassembler - AArch64Disassembler.cpp (source / functions) Hit Total Coverage Test: llvm-toolchain.info Lines: 156 641 24.3 % Date: 2018-10-20 13:21:21 Functions: 10 79 12.7 % Legend: Lines: hit not hit

Function Name	Hit count
_Z10DecodeSImmILi10EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv	0
_Z10DecodeSImmILi4EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv	0
_Z10DecodeSImmILi5EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv	0
_Z10DecodeSImmILi6EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv	0
_Z10DecodeSImmILi8EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv	0
_Z10DecodeSImmILi9EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv	0
_Z16DecodeImm8OptLslILi16EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEjmPKv	0
_Z16DecodeImm8OptLslILi32EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEjmPKv	0
_Z16DecodeImm8OptLslILi64EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEjmPKv	0
_Z16DecodeImm8OptLslILi8EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEjmPKv	0
_ZL15DecodeMemExtendRN4llvm6MCInstEjmPKv	0
_ZL18DecodeSVEIncDecImmRN4llvm6MCInstEjmPKv	0
_ZL19DecodeVecShiftL8ImmRN4llvm6MCInstEjmPKv	0
_ZL19DecodeVecShiftR8ImmRN4llvm6MCInstEjmPKv	0
_ZL20DecodeVecShiftL16ImmRN4llvm6MCInstEjmPKv	0
_ZL20DecodeVecShiftL32ImmRN4llvm6MCInstEjmPKv	0
_ZL20DecodeVecShiftL64ImmRN4llvm6MCInstEjmPKv	0
_ZL20DecodeVecShiftR16ImmRN4llvm6MCInstEjmPKv	0
_ZL20DecodeVecShiftR32ImmRN4llvm6MCInstEjmPKv	0
_ZL20DecodeVecShiftR64ImmRN4llvm6MCInstEjmPKv	0
_ZL21DecodeDDRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL21DecodeQQRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL22DecodeDDDRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL22DecodePPRRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL22DecodeQQQRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL22DecodeZPRRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL23DecodeDDDDRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL23DecodeFPR8RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL23DecodeMRSSystemRegisterRN4llvm6MCInstEjmPKv	0
_ZL23DecodeMSRSystemRegisterRN4llvm6MCInstEjmPKv	0
_ZL23DecodeModImmInstructionRN4llvm6MCInstEjmPKv	0
_ZL23DecodeQQQQRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL23DecodeZPR2RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL23DecodeZPR3RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL23DecodeZPR4RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL24DecodeFPR16RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL24DecodeFPR32RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL24DecodeFPR64RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL24DecodeGPR32RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL24DecodeGPR64RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL24DecodeMoveImmInstructionRN4llvm6MCInstEjmPKv	0
_ZL25DecodeFMOVLaneInstructionRN4llvm6MCInstEjmPKv	0
_ZL25DecodeFPR128RegisterClassRN4llvm6MCInstEjmPKv	0
_ZL25DecodePPR_3bRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL25DecodePairLdStInstructionRN4llvm6MCInstEjmPKv	0
_ZL25DecodeVectorRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL25DecodeZPR_3bRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL25DecodeZPR_4bRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL26DecodeFixedPointScaleImm32RN4llvm6MCInstEjmPKv	0
_ZL26DecodeFixedPointScaleImm64RN4llvm6MCInstEjmPKv	0
_ZL26DecodeGPR32spRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL26DecodeGPR64spRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL26DecodeVecShiftR16ImmNarrowRN4llvm6MCInstEjmPKv	0
_ZL26DecodeVecShiftR32ImmNarrowRN4llvm6MCInstEjmPKv	0
_ZL26DecodeVecShiftR64ImmNarrowRN4llvm6MCInstEjmPKv	0
_ZL27DecodeAddSubERegInstructionRN4llvm6MCInstEjmPKv	0
_ZL27DecodeLogicalImmInstructionRN4llvm6MCInstEjmPKv	0
_ZL27DecodeModImmTiedInstructionRN4llvm6MCInstEjmPKv	0
_ZL27DecodeSignedLdStInstructionRN4llvm6MCInstEjmPKv	0
_ZL28DecodeFPR128_loRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL29DecodeSystemPStateInstructionRN4llvm6MCInstEjmPKv	0
_ZL30DecodeExclusiveLdStInstructionRN4llvm6MCInstEjmPKv	0
_ZL30DecodeGPR64commonRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL30DecodeSVELogicalImmInstructionRN4llvm6MCInstEjmPKv	0
_ZL30DecodeThreeAddrSRegInstructionRN4llvm6MCInstEjmPKv	0
_ZL33DecodeWSeqPairsClassRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL33DecodeXSeqPairsClassRegisterClassRN4llvm6MCInstEjmPKv	0
_ZL34DecodeLoadAllocTagArrayInstructionRN4llvm6MCInstEjmPKv	0
_ZL35DecodeGPRSeqPairsClassRegisterClassRN4llvm6MCInstEjjmPKv	0
_ZL31createAArch64ExternalSymbolizerRKN4llvm6TripleEPFiPvmmmiS3_EPFPKcS3_mPmmPS7_ES3_PNS_9MCContextEOSt10unique_ptrINS_16MCRelocationInfoESt14default_deleteISF_EE	9
_ZL19DecodeTestAndBranchRN4llvm6MCInstEjmPKv	32
_ZL18DecodePCRelLabel19RN4llvm6MCInstEjmPKv	130
_ZL25DecodeUnconditionalBranchRN4llvm6MCInstEjmPKv	154
_ZL20DecodeAdrInstructionRN4llvm6MCInstEjmPKv	179
_ZL20DecodeAddSubImmShiftRN4llvm6MCInstEjmPKv	390
_ZL29DecodeUnsignedLdStInstructionRN4llvm6MCInstEjmPKv	489
_ZL25createAArch64DisassemblerRKN4llvm6TargetERKNS_15MCSubtargetInfoERNS_9MCContextE	880
LLVMInitializeAArch64Disassembler	10844
_ZNK4llvm19AArch64Disassembler14getInstructionERNS_6MCInstERmNS_8ArrayRefIhEEmRNS_11raw_ostreamES7_	86223

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