LCOV - code coverage report

Current view: top level - lib/Target/AMDGPU - AMDGPUISelLowering.cpp (source / functions) Hit Total Coverage Test: llvm-toolchain.info Lines: 1540 1831 84.1 % Date: 2018-10-20 13:21:21 Functions: 109 120 90.8 % Legend: Lines: hit not hit

Function Name	Hit count
_ZL13isNegativeOneN4llvm7SDValueE	0
_ZL14allocateCCRegsjN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateEPKNS_19TargetRegisterClassEj	0
_ZL17allocateSGPRTuplejN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateE	0
_ZL17allocateVGPRTuplejN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateE	0
_ZL20foldFreeOpFromSelectRN4llvm14TargetLowering15DAGCombinerInfoENS_7SDValueE	0
_ZL25distributeOpThroughSelectRN4llvm14TargetLowering15DAGCombinerInfoEjRKNS_5SDLocENS_7SDValueES6_S6_	0
_ZNK4llvm20AMDGPUTargetLowering11LowerFFLOORENS_7SDValueERNS_12SelectionDAGE	0
_ZNK4llvm20AMDGPUTargetLowering11getLoHalf64ENS_7SDValueERNS_12SelectionDAGE	0
_ZNK4llvm20AMDGPUTargetLowering12isFPImmLegalERKNS_7APFloatENS_3EVTE	0
_ZNK4llvm20AMDGPUTargetLowering17getTargetNodeNameEj	0
_ZNK4llvm20AMDGPUTargetLowering22ShouldShrinkFPConstantENS_3EVTE	0
_ZNK4llvm20AMDGPUTargetLowering23LowerDYNAMIC_STACKALLOCENS_7SDValueERNS_12SelectionDAGE	3
_ZNK4llvm20AMDGPUTargetLowering15getSqrtEstimateENS_7SDValueERNS_12SelectionDAGEiRiRbb	8
_ZNK4llvm20AMDGPUTargetLowering19loadStackInputValueERNS_12SelectionDAGENS_3EVTERKNS_5SDLocEl	8
_ZNK4llvm20AMDGPUTargetLowering16LowerINT_TO_FP64ENS_7SDValueERNS_12SelectionDAGEb	10
_ZNK4llvm20AMDGPUTargetLowering20storeStackInputValueERNS_12SelectionDAGERKNS_5SDLocENS_7SDValueES6_l	10
_ZNK4llvm20AMDGPUTargetLowering10LowerFRINTENS_7SDValueERNS_12SelectionDAGE	14
_ZNK4llvm20AMDGPUTargetLowering13LowerFROUND64ENS_7SDValueERNS_12SelectionDAGE	16
_ZNK4llvm20AMDGPUTargetLowering16LowerFP64_TO_INTENS_7SDValueERNS_12SelectionDAGEb	16
_ZNK4llvm20AMDGPUTargetLowering22LowerSIGN_EXTEND_INREGENS_7SDValueERNS_12SelectionDAGE	16
_Z15constantFoldBFEIiEN4llvm7SDValueERNS0_12SelectionDAGET_jjRKNS0_5SDLocE	24
_Z15constantFoldBFEIjEN4llvm7SDValueERNS0_12SelectionDAGET_jjRKNS0_5SDLocE	24
_ZNK4llvm20AMDGPUTargetLowering22isCheapToSpeculateCttzEv	27
_ZNK4llvm20AMDGPUTargetLowering28isKnownNeverNaNForTargetNodeENS_7SDValueERKNS_12SelectionDAGEbj	27
_ZNK4llvm20AMDGPUTargetLowering10LowerFCEILENS_7SDValueERNS_12SelectionDAGE	31
_ZNK4llvm20AMDGPUTargetLowering19addTokenForArgumentENS_7SDValueERNS_12SelectionDAGERNS_16MachineFrameInfoEi	35
_ZL8isInv2PiRKN4llvm7APFloatE	36
_ZNK4llvm20AMDGPUTargetLowering9LowerFREMENS_7SDValueERNS_12SelectionDAGE	36
_ZNK4llvm20AMDGPUTargetLowering15LowerFP_TO_UINTENS_7SDValueERNS_12SelectionDAGE	37
_ZNK4llvm20AMDGPUTargetLowering15LowerSINT_TO_FPENS_7SDValueERNS_12SelectionDAGE	38
_ZNK4llvm20AMDGPUTargetLowering18ReplaceNodeResultsEPNS_6SDNodeERNS_15SmallVectorImplINS_7SDValueEEERNS_12SelectionDAGE	43
_ZNK4llvm20AMDGPUTargetLowering26getImplicitParameterOffsetERKNS_15MachineFunctionENS0_17ImplicitParameterE	44
_ZNK4llvm20AMDGPUTargetLowering15LowerUINT_TO_FPENS_7SDValueERNS_12SelectionDAGE	47
_ZNK4llvm20AMDGPUTargetLowering15LowerFNEARBYINTENS_7SDValueERNS_12SelectionDAGE	48
_ZL11getLog2EValRN4llvm12SelectionDAGERKNS_5SDLocENS_3EVTE	50
_ZNK4llvm20AMDGPUTargetLowering9lowerFEXPENS_7SDValueERNS_12SelectionDAGE	50
_ZNK4llvm20AMDGPUTargetLowering22isCheapToSpeculateCtlzEv	60
_ZNK4llvm20AMDGPUTargetLowering15LowerFP_TO_SINTENS_7SDValueERNS_12SelectionDAGE	65
_ZNK4llvm20AMDGPUTargetLowering16LowerINT_TO_FP32ENS_7SDValueERNS_12SelectionDAGEb	67
_ZNK4llvm20AMDGPUTargetLowering9LowerFLOGENS_7SDValueERNS_12SelectionDAGEd	74
_ZNK4llvm20AMDGPUTargetLowering11LowerFTRUNCENS_7SDValueERNS_12SelectionDAGE	75
_ZNK4llvm20AMDGPUTargetLowering16LowerFROUND32_16ENS_7SDValueERNS_12SelectionDAGE	77
_ZNK4llvm20AMDGPUTargetLowering9LowerCallERNS_14TargetLowering16CallLoweringInfoERNS_15SmallVectorImplINS_7SDValueEEE	78
_ZNK4llvm20AMDGPUTargetLowering12LowerSDIVREMENS_7SDValueERNS_12SelectionDAGE	84
_ZNK4llvm20AMDGPUTargetLowering18lowerUnhandledCallERNS_14TargetLowering16CallLoweringInfoERNS_15SmallVectorImplINS_7SDValueEEENS_9StringRefE	85
_ZL18extractF64ExponentN4llvm7SDValueERKNS_5SDLocERNS_12SelectionDAGE	91
_ZNK4llvm20AMDGPUTargetLowering10isZExtFreeEPNS_4TypeES2_	91
_ZNK4llvm20AMDGPUTargetLowering11LowerFROUNDENS_7SDValueERNS_12SelectionDAGE	93
_ZNK4llvm20AMDGPUTargetLowering19performMulhsCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	103
_ZNK4llvm20AMDGPUTargetLowering11getHiHalf64ENS_7SDValueERNS_12SelectionDAGE	138
_ZNK4llvm20AMDGPUTargetLowering23performMulLoHi24CombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	142
_ZNK4llvm20AMDGPUTargetLowering26isConstantCostlierToNegateENS_7SDValueE	143
_ZNK4llvm20AMDGPUTargetLowering13LowerDIVREM24ENS_7SDValueERNS_12SelectionDAGEb	169
_ZNK4llvm20AMDGPUTargetLowering12LowerUDIVREMENS_7SDValueERNS_12SelectionDAGE	171
_ZNK4llvm20AMDGPUTargetLowering16getRecipEstimateENS_7SDValueERNS_12SelectionDAGEiRi	326
_ZNK4llvm20AMDGPUTargetLowering14LowerCTLZ_CTTZENS_7SDValueERNS_12SelectionDAGE	415
_ZNK4llvm20AMDGPUTargetLowering18LowerGlobalAddressEPNS_21AMDGPUMachineFunctionENS_7SDValueERNS_12SelectionDAGE	455
_ZNK4llvm20AMDGPUTargetLowering20combineFMinMaxLegacyERKNS_5SDLocENS_3EVTENS_7SDValueES5_S5_S5_S5_RNS_14TargetLowering15DAGCombinerInfoE	781
_ZNK4llvm20AMDGPUTargetLowering15LowerFP_TO_FP16ENS_7SDValueERNS_12SelectionDAGE	983
_ZL15fnegFoldsIntoOpj	1014
_ZNK4llvm20AMDGPUTargetLowering17performRcpCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	1069
_ZNK4llvm20AMDGPUTargetLowering14isTruncateFreeEPNS_4TypeES2_	1215
_ZL8getMul24RN4llvm12SelectionDAGERKNS_5SDLocENS_7SDValueES5_jb	1416
_ZNK4llvm20AMDGPUTargetLowering25shouldExpandAtomicRMWInIREPNS_13AtomicRMWInstE	1585
_ZNK4llvm20AMDGPUTargetLowering28splitBinaryBitConstantOpImplERNS_14TargetLowering15DAGCombinerInfoERKNS_5SDLocEjNS_7SDValueEjj	1630
_ZNK4llvm20AMDGPUTargetLowering18performFAbsCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	1934
_ZNK4llvm20AMDGPUTargetLowering31ComputeNumSignBitsForTargetNodeENS_7SDValueERKNS_5APIntERKNS_12SelectionDAGEj	2070
_ZNK4llvm20AMDGPUTargetLowering10isFAbsFreeENS_3EVTE	2086
_ZNK4llvm20AMDGPUTargetLowering21shouldReduceLoadWidthEPNS_6SDNodeENS_3ISD11LoadExtTypeENS_3EVTE	2251
_ZNK4llvm20AMDGPUTargetLowering15SplitVectorLoadENS_7SDValueERNS_12SelectionDAGE	2512
_ZNK4llvm20AMDGPUTargetLowering17isSelectSupportedENS_18TargetLoweringBase17SelectSupportKindE	2742
_ZNK4llvm20AMDGPUTargetLowering15split64BitValueENS_7SDValueERNS_12SelectionDAGE	2907
_ZN4llvm20AMDGPUTargetLowering21allUsesHaveSourceModsEPKNS_6SDNodeEj	3559
_ZNK4llvm20AMDGPUTargetLowering14loadInputValueERNS_12SelectionDAGEPKNS_19TargetRegisterClassENS_3EVTERKNS_5SDLocERKNS_13ArgDescriptorE	3590
_ZL13hasSourceModsPKN4llvm6SDNodeE	3694
_ZNK4llvm20AMDGPUTargetLowering19performMulhuCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	3893
_ZNK4llvm20AMDGPUTargetLowering18performFNegCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	3991
_ZN4llvm20AMDGPUTargetLowering17CCAssignFnForCallEjb	4202
_ZN4llvm18AMDGPUCallLowering17CCAssignFnForCallEjb	4214
_ZNK4llvm20AMDGPUTargetLowering10isFNegFreeENS_3EVTE	4490
_ZNK4llvm20AMDGPUTargetLowering19LowerCONCAT_VECTORSENS_7SDValueERNS_12SelectionDAGE	5046
_ZNK4llvm20AMDGPUTargetLowering28storeOfVectorConstantIsCheapENS_3EVTEjj	5532
_ZL5isI24N4llvm7SDValueERNS_12SelectionDAGE	6146
_ZN4llvm20AMDGPUTargetLowering13numBitsSignedENS_7SDValueERNS_12SelectionDAGE	6168
_ZN4llvm18AMDGPUCallLowering19CCAssignFnForReturnEjb	6325
_ZN4llvm20AMDGPUTargetLowering19CCAssignFnForReturnEjb	6325
_ZNK4llvm20AMDGPUTargetLowering17performSraCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	6417
_ZNK4llvm20AMDGPUTargetLowering10isZExtFreeENS_7SDValueENS_3EVTE	6844
_ZN4llvm20AMDGPUTargetLowering20getEquivalentMemTypeERNS_11LLVMContextENS_3EVTE	7341
_ZNK4llvm20AMDGPUTargetLowering17performMulCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	7810
_ZNK4llvm20AMDGPUTargetLowering10isZExtFreeENS_3EVTES1_	8038
_ZNK4llvm20AMDGPUTargetLowering21isNarrowingProfitableENS_3EVTES1_	8050
_ZNK4llvm20AMDGPUTargetLowering16SplitVectorStoreENS_7SDValueERNS_12SelectionDAGE	8472
_ZNK4llvm20AMDGPUTargetLowering23performCtlz_CttzCombineERKNS_5SDLocENS_7SDValueES4_S4_RNS_14TargetLowering15DAGCombinerInfoE	9190
_ZNK4llvm20AMDGPUTargetLowering25performAssertSZExtCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	11426
_ZNK4llvm20AMDGPUTargetLowering20performSelectCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	11431
_ZN4llvm20AMDGPUTargetLowering15numBitsUnsignedENS_7SDValueERNS_12SelectionDAGE	12389
_ZNK4llvm20AMDGPUTargetLowering22LowerEXTRACT_SUBVECTORENS_7SDValueERNS_12SelectionDAGE	17301
_ZNK4llvm20AMDGPUTargetLowering23isLoadBitCastBeneficialENS_3EVTES1_	18200
_ZNK4llvm20AMDGPUTargetLowering29analyzeFormalArgumentsComputeERNS_7CCStateERKNS_15SmallVectorImplINS_3ISD8InputArgEEE	18461
_ZNK4llvm20AMDGPUTargetLowering11LowerReturnENS_7SDValueEjbRKNS_15SmallVectorImplINS_3ISD9OutputArgEEERKNS2_IS1_EERKNS_5SDLocERNS_12SelectionDAGE	18482
_ZNK4llvm20AMDGPUTargetLowering20CreateLiveInRegisterERNS_12SelectionDAGEPKNS_19TargetRegisterClassEjNS_3EVTERKNS_5SDLocEb	19354
_ZNK4llvm20AMDGPUTargetLowering14isTruncateFreeENS_3EVTES1_	21675
_ZNK4llvm20AMDGPUTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE	24615
_ZNK4llvm20AMDGPUTargetLowering36aggressivelyPreferBuildVectorSourcesENS_3EVTE	33489
_ZNK4llvm20AMDGPUTargetLowering22performTruncateCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	55273
_ZNK4llvm20AMDGPUTargetLowering17performSrlCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE	62750
_ZNK4llvm20AMDGPUTargetLowering14getVectorIdxTyERKNS_10DataLayoutE	159088
_ZL15hasVolatileUserPN4llvm6SDNodeE	183847
_ZNK4llvm20AMDGPUTargetLowering29computeKnownBitsForTargetNodeENS_7SDValueERNS_9KnownBitsERKNS_5APIntERKNS_12SelectionDAGEj	277927
_ZNK4llvm20AMDGPUTargetLowering21isSDNodeAlwaysUniformEPKNS_6SDNodeE	2586210

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