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1 : //===-- AMDGPUInstrInfo.cpp - Base class for AMD GPU InstrInfo ------------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : /// \file
11 : /// \brief Implementation of the TargetInstrInfo class that is common to all
12 : /// AMD GPUs.
13 : //
14 : //===----------------------------------------------------------------------===//
15 :
16 : #include "AMDGPUInstrInfo.h"
17 : #include "AMDGPURegisterInfo.h"
18 : #include "AMDGPUTargetMachine.h"
19 : #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
20 : #include "llvm/CodeGen/MachineFrameInfo.h"
21 : #include "llvm/CodeGen/MachineInstrBuilder.h"
22 : #include "llvm/CodeGen/MachineRegisterInfo.h"
23 :
24 : using namespace llvm;
25 :
26 : // Pin the vtable to this file.
27 : //void AMDGPUInstrInfo::anchor() {}
28 :
29 0 : AMDGPUInstrInfo::AMDGPUInstrInfo(const GCNSubtarget &ST) { }
30 :
31 :
32 : // TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence.
33 27 : bool AMDGPUInstrInfo::isUniformMMO(const MachineMemOperand *MMO) {
34 : const Value *Ptr = MMO->getValue();
35 : // UndefValue means this is a load of a kernel input. These are uniform.
36 : // Sometimes LDS instructions have constant pointers.
37 : // If Ptr is null, then that means this mem operand contains a
38 : // PseudoSourceValue like GOT.
39 27 : if (!Ptr || isa<UndefValue>(Ptr) ||
40 27 : isa<Constant>(Ptr) || isa<GlobalValue>(Ptr))
41 : return true;
42 :
43 27 : if (MMO->getAddrSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT)
44 : return true;
45 :
46 : if (const Argument *Arg = dyn_cast<Argument>(Ptr))
47 2 : return AMDGPU::isArgPassedInSGPR(Arg);
48 :
49 : const Instruction *I = dyn_cast<Instruction>(Ptr);
50 25 : return I && I->getMetadata("amdgpu.uniform");
51 : }
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