LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - AMDGPUSubtarget.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 109 250 43.6 %
Date: 2018-10-20 13:21:21 Functions: 35 111 31.5 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZN4llvm15AMDGPUSubtargetD0Ev 0
_ZN4llvm15AMDGPUSubtargetD2Ev 0
_ZNK4llvm12GCNSubtarget10hasDLInstsEv 0
_ZNK4llvm12GCNSubtarget10hasSDWAMacEv 0
_ZNK4llvm12GCNSubtarget11hasSDWAOmodEv 0
_ZNK4llvm12GCNSubtarget11hasSDWASdstEv 0
_ZNK4llvm12GCNSubtarget13enableIEEEBitERKNS_15MachineFunctionE 0
_ZNK4llvm12GCNSubtarget13getGenerationEv 0
_ZNK4llvm12GCNSubtarget13hasAddNoCarryEv 0
_ZNK4llvm12GCNSubtarget13hasFastFMAF32Ev 0
_ZNK4llvm12GCNSubtarget13hasSDWAScalarEv 0
_ZNK4llvm12GCNSubtarget14hasFmaMixInstsEv 0
_ZNK4llvm12GCNSubtarget14hasSGPRInitBugEv 0
_ZNK4llvm12GCNSubtarget14isXNACKEnabledEv 0
_ZNK4llvm12GCNSubtarget15enableDX10ClampEv 0
_ZNK4llvm12GCNSubtarget15getLDSBankCountEv 0
_ZNK4llvm12GCNSubtarget15hasApertureRegsEv 0
_ZNK4llvm12GCNSubtarget15hasCodeObjectV3Ev 0
_ZNK4llvm12GCNSubtarget15hasScalarStoresEv 0
_ZNK4llvm12GCNSubtarget16hasFP16DenormalsEv 0
_ZNK4llvm12GCNSubtarget16hasFP64DenormalsEv 0
_ZNK4llvm12GCNSubtarget16hasHalfRate64OpsEv 0
_ZNK4llvm12GCNSubtarget16hasVGPRIndexModeEv 0
_ZNK4llvm12GCNSubtarget16useFlatForGlobalEv 0
_ZNK4llvm12GCNSubtarget17enableSISchedulerEv 0
_ZNK4llvm12GCNSubtarget17getStackAlignmentEv 0
_ZNK4llvm12GCNSubtarget18debuggerInsertNopsEv 0
_ZNK4llvm12GCNSubtarget18getMaxNumUserSGPRsEv 0
_ZNK4llvm12GCNSubtarget18hasFlatGlobalInstsEv 0
_ZNK4llvm12GCNSubtarget18hasFlatInstOffsetsEv 0
_ZNK4llvm12GCNSubtarget18hasSDWAOutModsVOPCEv 0
_ZNK4llvm12GCNSubtarget18hasUnpackedD16VMemEv 0
_ZNK4llvm12GCNSubtarget19hasFlatAddressSpaceEv 0
_ZNK4llvm12GCNSubtarget19loadStoreOptEnabledEv 0
_ZNK4llvm12GCNSubtarget20debuggerEmitPrologueEv 0
_ZNK4llvm12GCNSubtarget20getWavefrontSizeLog2Ev 0
_ZNK4llvm12GCNSubtarget20isTrapHandlerEnabledEv 0
_ZNK4llvm12GCNSubtarget22d16PreservesUnusedBitsEv 0
_ZNK4llvm12GCNSubtarget23enableHugePrivateBufferEv 0
_ZNK4llvm12GCNSubtarget24getMaxPrivateElementSizeEv 0
_ZNK4llvm12GCNSubtarget24hasUnalignedBufferAccessEv 0
_ZNK4llvm12GCNSubtarget25hasUnalignedScratchAccessEv 0
_ZNK4llvm12GCNSubtarget26getScalarizeGlobalBehaviorEv 0
_ZNK4llvm12GCNSubtarget27hasAutoWaitcntBeforeBarrierEv 0
_ZNK4llvm12GCNSubtarget28unsafeDSOffsetFoldingEnabledEv 0
_ZNK4llvm12GCNSubtarget6hasBFEEv 0
_ZNK4llvm12GCNSubtarget6hasBFIEv 0
_ZNK4llvm12GCNSubtarget6hasDPPEv 0
_ZNK4llvm12GCNSubtarget7hasBCNTEj 0
_ZNK4llvm12GCNSubtarget7hasFFBHEv 0
_ZNK4llvm12GCNSubtarget7hasFFBLEv 0
_ZNK4llvm12GCNSubtarget8dumpCodeEv 0
_ZNK4llvm12GCNSubtarget8useDS128Ev 0
_ZNK4llvm12GCNSubtarget9hasMovrelEv 0
_ZNK4llvm13R600Subtarget11hasCFAluBugEv 0
_ZNK4llvm13R600Subtarget12hasCaymanISAEv 0
_ZNK4llvm13R600Subtarget13getGenerationEv 0
_ZNK4llvm13R600Subtarget14hasVertexCacheEv 0
_ZNK4llvm13R600Subtarget17getStackAlignmentEv 0
_ZNK4llvm13R600Subtarget19getTexVTXClauseSizeEv 0
_ZNK4llvm13R600Subtarget6hasFMAEv 0
_ZNK4llvm15AMDGPUSubtarget13has16BitInstsEv 0
_ZNK4llvm15AMDGPUSubtarget13hasVOP3PInstsEv 0
_ZNK4llvm15AMDGPUSubtarget14hasMadMixInstsEv 0
_ZNK4llvm15AMDGPUSubtarget15hasFPExceptionsEv 0
_ZNK4llvm15AMDGPUSubtarget16getMaxWavesPerEUEv 0
_ZNK4llvm15AMDGPUSubtarget16getWavefrontSizeEv 0
_ZNK4llvm15AMDGPUSubtarget16hasFP32DenormalsEv 0
_ZNK4llvm15AMDGPUSubtarget17hasFminFmaxLegacyEv 0
_ZNK4llvm15AMDGPUSubtarget18getLocalMemorySizeEv 0
_ZNK4llvm15AMDGPUSubtarget18hasInv2PiInlineImmEv 0
_ZNK4llvm15AMDGPUSubtarget19hasTrigReducedRangeEv 0
_ZNK4llvm15AMDGPUSubtarget22isPromoteAllocaEnabledEv 0
_ZNK4llvm15AMDGPUSubtarget7hasSDWAEv 0
_ZNK4llvm15AMDGPUSubtarget9hasMulI24Ev 0
_ZNK4llvm15AMDGPUSubtarget9hasMulU24Ev 0
_ZNK4llvm12GCNSubtarget23enableEarlyIfConversionEv 22
_ZNK4llvm12GCNSubtarget22getInstructionSelectorEv 43
_ZNK4llvm12GCNSubtarget15getCallLoweringEv 60
_ZNK4llvm12GCNSubtarget16getLegalizerInfoEv 93
_ZNK4llvm12GCNSubtarget14getRegBankInfoEv 458
_ZNK4llvm13R600Subtarget16getMaxWavesPerEUEj 2011
_ZNK4llvm13R600Subtarget16getMinWavesPerEUEv 2011
_ZNK4llvm13R600Subtarget20enableSubRegLivenessEv 2298
_ZN4llvm12GCNSubtargetD0Ev 2481
_ZNK4llvm13R600Subtarget21getMaxWorkGroupsPerCUEj 4022
_ZNK4llvm13R600Subtarget19getSelectionDAGInfoEv 4605
_ZNK4llvm13R600Subtarget23getMaxFlatWorkGroupSizeEv 6567
_ZNK4llvm13R600Subtarget23getMinFlatWorkGroupSizeEv 6567
_ZNK4llvm13R600Subtarget21getInstrItineraryDataEv 7070
_ZNK4llvm13R600Subtarget22enableMachineSchedulerEv 7070
_ZNK4llvm15AMDGPUSubtarget22getImplicitArgNumBytesERKNS_8FunctionE 19817
_ZNK4llvm12GCNSubtarget20enableSubRegLivenessEv 20673
_ZNK4llvm12GCNSubtarget19getSelectionDAGInfoEv 24132
_ZNK4llvm13R600Subtarget16getFrameLoweringEv 27979
_ZNK4llvm12GCNSubtarget16getMaxWavesPerEUEj 37603
_ZNK4llvm12GCNSubtarget16getMinWavesPerEUEv 37603
_ZNK4llvm12GCNSubtarget21getInstrItineraryDataEv 57749
_ZNK4llvm12GCNSubtarget22enableMachineSchedulerEv 60874
_ZNK4llvm13R600Subtarget17getTargetLoweringEv 90151
_ZNK4llvm15AMDGPUSubtarget14isAmdHsaOrMesaERKNS_8FunctionE 129139
_ZNK4llvm12GCNSubtarget21getMaxWorkGroupsPerCUEj 198931
_ZNK4llvm12GCNSubtarget23getMaxFlatWorkGroupSizeEv 261081
_ZNK4llvm12GCNSubtarget23getMinFlatWorkGroupSizeEv 261154
_ZNK4llvm12GCNSubtarget16getFrameLoweringEv 262679
_ZNK4llvm13R600Subtarget12getInstrInfoEv 398648
_ZNK4llvm12GCNSubtarget17getTargetLoweringEv 1298529
_ZNK4llvm13R600Subtarget15getRegisterInfoEv 1594975
_ZNK4llvm12GCNSubtarget12getInstrInfoEv 5449312
_ZNK4llvm12GCNSubtarget15getRegisterInfoEv 33229215

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