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1 : //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : /// \file
11 : /// R600 DAG Lowering interface definition
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #ifndef LLVM_LIB_TARGET_AMDGPU_R600ISELLOWERING_H
16 : #define LLVM_LIB_TARGET_AMDGPU_R600ISELLOWERING_H
17 :
18 : #include "AMDGPUISelLowering.h"
19 :
20 : namespace llvm {
21 :
22 : class R600InstrInfo;
23 : class R600Subtarget;
24 :
25 285 : class R600TargetLowering final : public AMDGPUTargetLowering {
26 :
27 : const R600Subtarget *Subtarget;
28 : public:
29 : R600TargetLowering(const TargetMachine &TM, const R600Subtarget &STI);
30 :
31 : const R600Subtarget *getSubtarget() const;
32 :
33 : MachineBasicBlock *
34 : EmitInstrWithCustomInserter(MachineInstr &MI,
35 : MachineBasicBlock *BB) const override;
36 : SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
37 : SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
38 : void ReplaceNodeResults(SDNode * N,
39 : SmallVectorImpl<SDValue> &Results,
40 : SelectionDAG &DAG) const override;
41 : CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const;
42 : SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
43 : bool isVarArg,
44 : const SmallVectorImpl<ISD::InputArg> &Ins,
45 : const SDLoc &DL, SelectionDAG &DAG,
46 : SmallVectorImpl<SDValue> &InVals) const override;
47 : EVT getSetCCResultType(const DataLayout &DL, LLVMContext &,
48 : EVT VT) const override;
49 :
50 : bool canMergeStoresTo(unsigned AS, EVT MemVT,
51 : const SelectionDAG &DAG) const override;
52 :
53 : bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
54 : unsigned Align,
55 : bool *IsFast) const override;
56 :
57 : private:
58 : unsigned Gen;
59 : /// Each OpenCL kernel has nine implicit parameters that are stored in the
60 : /// first nine dwords of a Vertex Buffer. These implicit parameters are
61 : /// lowered to load instructions which retrieve the values from the Vertex
62 : /// Buffer.
63 : SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL,
64 : unsigned DwordOffset) const;
65 :
66 : void lowerImplicitParameter(MachineInstr *MI, MachineBasicBlock &BB,
67 : MachineRegisterInfo & MRI, unsigned dword_offset) const;
68 : SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG,
69 : const SDLoc &DL) const;
70 : SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const;
71 :
72 : SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
73 : SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
74 : SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
75 : SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
76 : SelectionDAG &DAG) const override;
77 : SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
78 :
79 : SDValue lowerPrivateTruncStore(StoreSDNode *Store, SelectionDAG &DAG) const;
80 : SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
81 : SDValue lowerFP_TO_UINT(SDValue Op, SelectionDAG &DAG) const;
82 : SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
83 :
84 : SDValue lowerPrivateExtLoad(SDValue Op, SelectionDAG &DAG) const;
85 : SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
86 : SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
87 : SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
88 : SDValue LowerSHLParts(SDValue Op, SelectionDAG &DAG) const;
89 : SDValue LowerSRXParts(SDValue Op, SelectionDAG &DAG) const;
90 : SDValue LowerUADDSUBO(SDValue Op, SelectionDAG &DAG,
91 : unsigned mainop, unsigned ovf) const;
92 :
93 : SDValue stackPtrToRegIndex(SDValue Ptr, unsigned StackWidth,
94 : SelectionDAG &DAG) const;
95 : void getStackAddress(unsigned StackWidth, unsigned ElemIdx,
96 : unsigned &Channel, unsigned &PtrIncr) const;
97 : bool isZero(SDValue Op) const;
98 : bool isHWTrueValue(SDValue Op) const;
99 : bool isHWFalseValue(SDValue Op) const;
100 :
101 : bool FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src,
102 : SDValue &Neg, SDValue &Abs, SDValue &Sel, SDValue &Imm,
103 : SelectionDAG &DAG) const;
104 :
105 : SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
106 : };
107 :
108 : } // End namespace llvm;
109 :
110 : #endif
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