LCOV - code coverage report

Current view: top level - lib/Target/AMDGPU - SIISelLowering.cpp (source / functions) Hit Total Coverage Test: llvm-toolchain.info Lines: 3425 3754 91.2 % Date: 2018-10-20 13:21:21 Functions: 157 173 90.8 % Legend: Lines: hit not hit

Function Name	Hit count
_ZL22processShaderInputArgsRN4llvm15SmallVectorImplINS_3ISD8InputArgEEEjNS_8ArrayRefIS2_EERNS_9BitVectorEPNS_12FunctionTypeEPNS_21SIMachineFunctionInfoE	0
_ZL23allocateSGPR32InputImplRN4llvm7CCStateEPKNS_19TargetRegisterClassEj	0
_ZL25allocateSpecialInputSGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE	0
_ZL25allocateSpecialInputVGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE	0
_ZL27computeIndirectRegAndOffsetRKN4llvm14SIRegisterInfoEPKNS_19TargetRegisterClassEji	0
_ZL30allocateSpecialEntryInputVGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE	0
_ZNK4llvm16SITargetLowering14isMemOpUniformEPKNS_6SDNodeE	0
_ZNK4llvm16SITargetLowering34createDebuggerPrologueStackObjectsERNS_15MachineFunctionE	4
_ZNK4llvm16SITargetLowering15isFPExtFoldableEjNS_3EVTES1_	24
_ZNK4llvm16SITargetLowering22mayBeEmittedAsTailCallEPKNS_8CallInstE	28
_ZL14loadM0FromVGPRPKN4llvm11SIInstrInfoERNS_17MachineBasicBlockERNS_12MachineInstrEjjibb	32
_ZL22emitLoadM0FromVGPRLoopPKN4llvm11SIInstrInfoERNS_19MachineRegisterInfoERNS_17MachineBasicBlockES6_RKNS_8DebugLocERKNS_14MachineOperandEjjjjibb	32
_ZNK4llvm16SITargetLowering18isShuffleMaskLegalENS_8ArrayRefIiEENS_3EVTE	32
_ZNK4llvm16SITargetLowering33shouldConvertConstantLoadToIntImmERKNS_5APIntEPNS_4TypeE	32
_ZL19allocateVGPR32InputRN4llvm7CCStateE	38
_ZNK4llvm16SITargetLowering17getImplicitArgPtrERNS_12SelectionDAGERKNS_5SDLocE	42
_ZNK4llvm16SITargetLowering33isEligibleForTailCallOptimizationENS_7SDValueEjbRKNS_15SmallVectorImplINS_3ISD9OutputArgEEERKNS2_IS1_EERKNS2_INS3_8InputArgEEERNS_12SelectionDAGE	51
_ZL16getMOVRELDPseudoRKN4llvm14SIRegisterInfoEPKNS_19TargetRegisterClassE	66
_ZL15emitIndirectSrcRN4llvm12MachineInstrERNS_17MachineBasicBlockERKNS_12GCNSubtargetE	71
_ZNK4llvm16SITargetLowering14splitKillBlockERNS_12MachineInstrEPNS_17MachineBasicBlockE	84
_ZL15emitIndirectDstRN4llvm12MachineInstrERNS_17MachineBasicBlockERKNS_12GCNSubtargetE	90
_ZNK4llvm16SITargetLowering20isCheapAddrSpaceCastEjj	94
_ZNK4llvm16SITargetLowering19getOptimalMemOpTypeEmjjbbbRNS_15MachineFunctionE	124
_ZNK4llvm16SITargetLowering17getRegisterByNameEPKcNS_3EVTERNS_12SelectionDAGE	131
_ZNK4llvm16SITargetLowering22getCanonicalConstantFPERNS_12SelectionDAGERKNS_5SDLocENS_3EVTERKNS_7APFloatE	149
_ZL20setM0ToIndexFromSGPRPKN4llvm11SIInstrInfoERNS_19MachineRegisterInfoERNS_12MachineInstrEibb	161
_ZNK4llvm16SITargetLowering19isNoopAddrSpaceCastEjj	246
_ZL22getConstantPermuteMaskj	318
_ZL20fp16SrcZerosHighBitsj	324
_ZNK4llvm16SITargetLowering19lowerStackParameterERNS_12SelectionDAGERNS_11CCValAssignERKNS_5SDLocENS_7SDValueERKNS_3ISD8InputArgE	402
_ZNK4llvm16SITargetLowering17passSpecialInputsERNS_14TargetLowering16CallLoweringInfoERNS_7CCStateERKNS_21SIMachineFunctionInfoERNS_15SmallVectorImplISt4pairIjNS_7SDValueEEEERNS9_ISB_EESB_	575
_ZNK4llvm16SITargetLowering17shouldEmitPCRelocEPKNS_11GlobalValueE	588
_ZNK4llvm16SITargetLowering18shouldEmitGOTRelocEPKNS_11GlobalValueE	694
_ZNK4llvm16SITargetLowering23denormalsEnabledForTypeENS_3EVTE	720
_ZNK4llvm16SITargetLowering15shouldEmitFixupEPKNS_11GlobalValueE	1338
_ZNK4llvm16SITargetLowering20isOffsetFoldingLegalEPKNS_19GlobalAddressSDNodeE	1725
_ZNK4llvm16SITargetLowering20insertCopiesSplitCSREPNS_17MachineBasicBlockERKNS_15SmallVectorImplIS2_EE	1754
_ZNK4llvm16SITargetLowering18initializeSplitCSREPNS_17MachineBasicBlockE	1755
_ZNK4llvm16SITargetLowering28getRegForInlineAsmConstraintEPKNS_18TargetRegisterInfoENS_9StringRefENS_3MVTE	2343
_ZN4llvm16SITargetLoweringC2ERKNS_13TargetMachineERKNS_12GCNSubtargetE	2492
_ZNK4llvm16SITargetLowering36getVectorTypeBreakdownForCallingConvERNS_11LLVMContextEjNS_3EVTERS3_RjRNS_3MVTE	3407
_ZNK4llvm16SITargetLowering25enableAggressiveFMAFusionENS_3EVTE	4434
_ZNK4llvm16SITargetLowering31isMemOpHasNoClobberedMemOperandEPKNS_6SDNodeE	4734
_ZNK4llvm16SITargetLowering17getConstraintTypeENS_9StringRefE	7630
_ZNK4llvm16SITargetLowering8copyToM0ERNS_12SelectionDAGENS_7SDValueERKNS_5SDLocES3_	9146
_ZNK4llvm16SITargetLowering26isFMAFasterThanFMulAndFAddENS_3EVTE	12661
_ZNK4llvm16SITargetLowering17getPreloadedValueERNS_12SelectionDAGERKNS_21SIMachineFunctionInfoENS_3EVTENS_21AMDGPUFunctionArgInfo14PreloadedValueE	13733
_ZNK4llvm16SITargetLowering27EmitInstrWithCustomInserterERNS_12MachineInstrEPNS_17MachineBasicBlockE	14237
_ZNK4llvm16SITargetLowering18getSetCCResultTypeERKNS_10DataLayoutERNS_11LLVMContextENS_3EVTE	14419
_ZNK4llvm16SITargetLowering16canMergeStoresToEjNS_3EVTERKNS_12SelectionDAGE	15492
_ZNK4llvm16SITargetLowering9buildRSRCERNS_12SelectionDAGERKNS_5SDLocENS_7SDValueEjm	17275
_ZL19allocateSystemSGPRsRN4llvm7CCStateERNS_15MachineFunctionERNS_21SIMachineFunctionInfoEjb	17950
_ZL20allocateHSAUserSGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE	17950
_ZL24reservePrivateMemoryRegsRKN4llvm13TargetMachineERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE	17974
_ZNK4llvm16SITargetLowering15supportSplitCSREPNS_15MachineFunctionE	19524
_ZNK4llvm16SITargetLowering16finalizeLoweringERNS_15MachineFunctionE	19746
_ZNK4llvm16SITargetLowering14CanLowerReturnEjRNS_15MachineFunctionEbRKNS_15SmallVectorImplINS_3ISD9OutputArgEEERNS_11LLVMContextE	20295
_ZNK4llvm16SITargetLowering18getTgtMemIntrinsicERNS_18TargetLoweringBase13IntrinsicInfoERKNS_8CallInstERNS_15MachineFunctionEj	26154
_ZNK4llvm16SITargetLowering23hasBitPreservingFPLogicENS_3EVTE	29044
_ZNK4llvm16SITargetLowering20getAddrModeArgumentsEPNS_13IntrinsicInstERNS_15SmallVectorImplIPNS_5ValueEEERPNS_4TypeE	31707
_ZNK4llvm16SITargetLowering24lowerKernArgParameterPtrERNS_12SelectionDAGERKNS_5SDLocENS_7SDValueEm	41155
_ZL14buildSMovImm32RN4llvm12SelectionDAGERKNS_5SDLocEm	41816
_ZNK4llvm16SITargetLowering26isLegalMUBUFAddressingModeERKNS_18TargetLoweringBase8AddrModeE	52973
_ZNK4llvm16SITargetLowering25isLegalFlatAddressingModeERKNS_18TargetLoweringBase8AddrModeE	54857
_ZNK4llvm16SITargetLowering27isLegalGlobalAddressingModeERKNS_18TargetLoweringBase8AddrModeE	111122
_ZNK4llvm16SITargetLowering30allowsMisalignedMemoryAccessesENS_3EVTEjjPb	130502
_ZNK4llvm16SITargetLowering29getNumRegistersForCallingConvERNS_11LLVMContextEjNS_3EVTE	146769
_ZNK4llvm16SITargetLowering29getRegisterTypeForCallingConvERNS_11LLVMContextEjNS_3EVTE	146769
_ZNK4llvm16SITargetLowering22getScalarShiftAmountTyERKNS_10DataLayoutENS_3EVTE	147959
_ZNK4llvm16SITargetLowering24getPreferredVectorActionENS_3EVTE	206860
_ZNK4llvm16SITargetLowering21isLegalAddressingModeERKNS_10DataLayoutERKNS_18TargetLoweringBase8AddrModeEPNS_4TypeEjPNS_11InstructionE	221586
_ZNK4llvm16SITargetLowering20isTypeDesirableForOpEjNS_3EVTE	303233
_ZNK4llvm16SITargetLowering29computeKnownBitsForFrameIndexENS_7SDValueERNS_9KnownBitsERKNS_5APIntERKNS_12SelectionDAGEj	447083
_ZNK4llvm16SITargetLowering12getSubtargetEv	1042597

Generated by: LCOV version 1.13